Low-disturbance self-recovery operation method for cross-point array ferroelectric memory
By applying specific voltage pulses to the cross-matrix ferroelectric memory using a four-pulse-cycle operation method, the problems of cell disturbance and high bit error rate are solved, resulting in faster access speed and lower bit error rate, thus improving the reliability of the ferroelectric memory.
Patent Information
- Application Number
- CN202410521333.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-28
- Publication Date
- 2025-10-28
- Estimated Expiration
- 2044-04-28
AI Technical Summary
Existing cross-matrix ferroelectric memories suffer from significant cell perturbation and bit error rate during writing and reading, and have slow access speeds. In particular, the polycrystalline and multi-domain characteristics and wide coercive field distribution of HfO2-based ferroelectric materials cause unselected cells to be perturbed by voltage pulses, and the read operation requires destructive charge sharing, making data recovery difficult.
The method employs a four-pulse cycle operation to apply specific voltage pulses to the selected word line and bit line, while maintaining the GND voltage on the unselected word line and bit line. Low-disturbance self-recovery is achieved through read, restore, and reset operations. The specific steps include applying GND and -Vdd/2, Vdd/2, Vdd/2 and -Vdd/2 and GND voltages, and combining the selected bit line voltage with external circuitry to achieve data read and restore.
It achieves smaller cell perturbations, lower bit error rates, and faster access speeds, is compatible with standard memory operation logic, automatically completes data recovery, and improves the reliability of high-density ferroelectric memories.