Servo drive control system of three-self-inertial-unit testing device

Abstract

The invention discloses a servo drive control system of a three-self-inertial-unit testing device. The servo drive control system comprises a processor, a CPLD, a drive circuit and a rotary transformer decoding circuit. The rotary transformer decoding circuit is used for converting a rotary transformer signal output by the rotary transformer into an angle signal and a speed signal; the processor is used for analyzing the angle signal and the speed signal to obtain current position information of the rotary table, processing the current position information of the rotary table to obtain current speed information of the rotary table, and outputting an enabling control signal based on the current speed information of the rotary table; the CPLD is connected with an external memory interface of the processor for address decoding processing and logic processing; the drive circuit drives the rotating mechanism and the locking mechanism in response to the enable control signal. According to the invention, the integrated control of the two brushless motors and the two brush motors is realized, and the two dual-channel rotary transformers are integrated to carry out high-precision decoding coupling processing and servo closed-loop control, so that the stability and response speed of the system are improved.

Description

Technical Field

[0001] This invention belongs to the field of servo control technology, specifically relating to a servo drive control system for a three-autoinertial navigation system testing device. Background Technology

[0002] Existing designs typically separate the servo controller from the driver, resulting in a large system size, complex wiring, increased installation and debugging difficulty, and high costs. Furthermore, existing designs often use discrete components to control the motor, leading to difficulties in system debugging. These discrete components are integrated on different circuit boards, requiring multiple boards to work together, making board installation cumbersome and prone to errors.

[0003] Therefore, in order to address the above-mentioned technical problems, it is necessary to provide a servo drive control system for a three-autoinertial navigation system testing device. Summary of the Invention

[0004] The purpose of this invention is to provide a servo drive control system for a three-autoinertial navigation system testing device, which simplifies the system structure through highly integrated design.

[0005] To achieve the above objectives, a specific embodiment of the present invention provides the following technical solution:

[0006] A servo drive control system for a three-auto inertial navigation system (SAS) test device, wherein the SAS test device includes at least two rotating mechanisms, two locking mechanisms, a turntable, and a rotary transformer, and the servo drive control system includes a processor, a CPLD, a drive circuit, and a rotary transformer decoding circuit.

[0007] The resolver decoding circuit is connected to the processor and the resolver, and is used to convert the resolver signal output by the resolver into angle signal and speed signal;

[0008] The processor is used to obtain the current position information of the turntable by parsing the angle signal and the speed signal, perform differential processing on the current position information of the turntable to obtain the current speed information of the turntable, and output an enable control signal based on the current speed information of the turntable.

[0009] The CPLD is connected to the external memory interface of the processor and is used for address decoding and logic processing.

[0010] The drive circuit responds to the enable control signal output by the processor to drive the rotation mechanism and the locking mechanism.

[0011] In one or more embodiments of the present invention, the driving circuit includes a brushless motor driving circuit and a brushed motor driving circuit;

[0012] The brushless motor drive circuit, in response to the enable control signal output by the processor, drives the rotating mechanism to adjust the turntable to a specified position.

[0013] The brushed motor drive circuit responds to the enable control signal output by the processor to drive the locking mechanism, thereby unlocking and locking the turntable.

[0014] In one or more embodiments of the present invention, the servo drive control system further includes an RS422 interface circuit, the RS422 interface circuit being configured with at least three RS422 interfaces, and the processor communicating with the host computer through the RS422 interfaces to receive transmission instructions and data from the host computer.

[0015] In one or more embodiments of the present invention, the servo drive control system further includes a digital I / O interface circuit, which is connected between the processor and the drive circuit. The digital I / O interface circuit includes a level conversion unit for bidirectional voltage conversion between TTL level signals in the 3.3V voltage domain and TTL level signals in the 5V voltage domain.

[0016] In one or more embodiments of the present invention, the digital I / O interface circuit further includes a digital input unit, the digital input unit being used to receive TTL level signals within the 5V voltage domain and to filter the TTL level signals within the 5V voltage domain; and / or,

[0017] The digital I / O interface circuit also includes a digital isolation unit for isolating electromagnetic interference.

[0018] In one or more embodiments of the present invention, the servo drive control system further includes a power supply circuit connected to the processor and the CPLD, for providing 24V DC power, 12V DC power, 5V DC power, 1.9V DC power and 3.3V DC power.

[0019] In one or more embodiments of the present invention, the power supply circuit includes a boost unit connected to an external 5V DC voltage source for generating a 12V DC voltage based on the 5V DC voltage.

[0020] In one or more embodiments of the present invention, the rotating mechanism includes a brushed motor, and the brushless motor drive circuit is used to drive the brushless motor. The brushless motor drive circuit includes a first undervoltage lockout module, a first overcurrent protection module, a first short circuit protection module, and a first overtemperature protection module. After the first overtemperature protection module is triggered, the brushless motor drive circuit reduces the frequency or shuts off the output.

[0021] In one or more embodiments of the present invention, the locking mechanism includes a brushed motor and a reducer. The brushed motor drive circuit is used to drive the brushed motor. The brushed motor drive circuit includes a second undervoltage lockout module, a second overcurrent protection module, a second short circuit protection module, and a second overtemperature protection module. After the second overtemperature protection module is triggered, the brushed motor drive circuit reduces the frequency or shuts off the output.

[0022] In one or more embodiments of the present invention, the resolver decoding circuit includes a resolver-to-digital converter, the resolver-to-digital converter adopts a parallel 16-bit interface, is powered by a 5V DC power supply, and the logic interface of the resolver-to-digital converter is compatible with 2.3V~5.25V level signals.

[0023] Compared with the prior art, the servo drive control system of the three-auto inertial navigation system test device of the present invention integrates the processor, CPLD, drive circuit and resolver decoding circuit into the servo drive control system, realizing integrated control of two brushless motors and two brushed motors. At the same time, it integrates two dual-channel resolvers for high-precision decoding and coupling processing, and performs servo closed-loop control, which significantly improves the stability and response speed of the system and effectively reduces energy consumption and maintenance costs. Attached Figure Description

[0024] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0025] Figure 1 This is a schematic diagram of the servo drive control system of the three-autoinertial navigation system test device in Embodiment 1 of the present invention.

[0026] Figure 2 This is a circuit diagram of the RS422 interface circuit in Embodiment 1 of the present invention;

[0027] Figure 3 This is a circuit diagram of the level conversion unit in Embodiment 1 of the present invention;

[0028] Figure 4 This is a circuit diagram of the digital input unit in Embodiment 1 of the present invention;

[0029] Figure 5 This is a circuit diagram of the digital isolation unit in Embodiment 1 of the present invention;

[0030] Figure 6 This is a circuit diagram of the CPLD in Embodiment 1 of the present invention;

[0031] Figure 7 This is a circuit diagram of the first power supply unit and the second power supply unit in Embodiment 1 of the present invention;

[0032] Figure 8 This is a circuit diagram of the boost unit in Embodiment 1 of the present invention;

[0033] Figure 9 This is a circuit diagram of the integrated three-phase MOSFET gate driver and its peripheral circuitry in Embodiment 1 of the present invention;

[0034] Figure 10 This is a circuit diagram of the dual-channel full-bridge motor driver and its peripheral circuits in Embodiment 1 of the present invention;

[0035] Figure 11 This is a circuit diagram of the resolver decoding circuit in Embodiment 1 of the present invention;

[0036] Figure 12 This is a flowchart of the closed-loop control in Embodiment 1 of the present invention. Detailed Implementation

[0037] To enable those skilled in the art to better understand the technical solutions in this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this disclosure.

[0038] The present invention provides a servo drive control system for a three-auto inertial navigation system (SAS) test device. The SAS test device includes at least two rotating mechanisms, two locking mechanisms, a turntable, and a rotary transformer. The servo drive control system includes a processor, a CPLD, a drive circuit, and a rotary transformer decoding circuit.

[0039] Furthermore, the resolver decoding circuit is connected to the processor and the resolver, and is used to convert the resolver signal output by the resolver into angle signal and speed signal;

[0040] The processor is used to obtain the current position information of the turntable by parsing the angle signal and the speed signal, perform differential processing on the current position information of the turntable to obtain the current speed information of the turntable, and output an enable control signal based on the current speed information of the turntable.

[0041] The CPLD is connected to the external memory interface of the processor and is used for address decoding and logic processing.

[0042] The drive circuit responds to the enable control signal output by the processor to drive the rotation mechanism and the locking mechanism.

[0043] Furthermore, the drive circuit includes a brushless motor drive circuit and a brushed motor drive circuit. The brushless motor drive circuit, in response to an enable control signal output by the processor, drives the rotating mechanism to rotate the turntable to a specified position. The brushed motor drive circuit, in response to an enable control signal output by the processor, drives the locking mechanism to unlock and lock the turntable.

[0044] Furthermore, the servo drive control system also includes an RS422 interface circuit, which is configured with at least three RS422 interfaces. The processor communicates with the host computer through the RS422 interfaces to receive transmission instructions and data from the host computer.

[0045] Furthermore, the servo drive control system also includes a digital I / O interface circuit, which is connected between the processor and the drive circuit. The digital I / O interface circuit includes a level conversion unit for bidirectional voltage conversion between TTL level signals in the 3.3V voltage domain and TTL level signals in the 5V voltage domain.

[0046] Furthermore, the digital I / O interface circuit also includes a digital input unit, which is used to receive TTL level signals within the 5V voltage domain and filter the TTL level signals within the 5V voltage domain; and / or,

[0047] The digital I / O interface circuit also includes a digital isolation unit for isolating electromagnetic interference.

[0048] Furthermore, the servo drive control system also includes a power supply circuit, which is connected to the processor and CPLD to provide 24V DC power, 12V DC power, 5V DC power, 1.9V DC power and 3.3V DC power.

[0049] Furthermore, the power supply circuit includes a boost unit connected to an external 5V DC voltage source to generate a 12V DC voltage based on the 5V DC voltage.

[0050] Furthermore, the rotating mechanism includes a brushed motor, and the brushless motor drive circuit is used to drive the brushless motor. The brushless motor drive circuit includes a first undervoltage lockout module, a first overcurrent protection module, a first short circuit protection module, and a first overtemperature protection module. After the first overtemperature protection module is triggered, the brushless motor drive circuit reduces the frequency or shuts off the output.

[0051] Furthermore, the locking mechanism includes a brushed motor and a reducer. The brushed motor drive circuit is used to drive the brushed motor. The brushed motor drive circuit includes a second undervoltage lockout module, a second overcurrent protection module, a second short circuit protection module, and a second overtemperature protection module. After the second overtemperature protection module is triggered, the brushed motor drive circuit reduces the frequency or shuts off the output.

[0052] Furthermore, the resolver decoding circuit includes a resolver-to-digital converter, which adopts a parallel 16-bit interface and is powered by a 5V DC power supply. The logic interface of the resolver-to-digital converter is compatible with 2.3V~5.25V level signals.

[0053] The present invention will be further described below with reference to specific embodiments.

[0054] Example 1:

[0055] like Figure 1 As shown, this embodiment provides a servo drive control system 100 for a three-autoinertial group test device 200, wherein the three-autoinertial group test device 200 includes at least two rotating mechanisms 201, two locking mechanisms 202, a turntable 203 and a rotary transformer 204, and the servo drive control system 100 includes a processor 101, a CPLD, a drive circuit 102 and a rotary transformer decoding circuit 103.

[0056] Furthermore, the resolver decoding circuit 103 is connected to the processor 101 and the resolver 204, and is used to convert the resolver signal output by the resolver 204 into angle signal and speed signal;

[0057] The processor 101 is used to obtain the current position information of the turntable 203 by parsing the angle signal and the speed signal, perform differential processing on the current position information of the turntable 203 to obtain the current speed information of the turntable 203, and output an enable control signal based on the current speed information of the turntable 203.

[0058] The CPLD is connected to the external memory interface of the processor 101 and is used for address decoding and logic processing.

[0059] The drive circuit 102 responds to the enable control signal output by the processor 101 to drive the rotation mechanism 201 and the locking mechanism 202.

[0060] Furthermore, the drive circuit 102 includes a brushless motor drive circuit and a brushed motor drive circuit. The brushless motor drive circuit, in response to the enable control signal output by the processor 101, drives the rotation mechanism 201 to rotate the turntable 203 to a specified position. The brushed motor drive circuit, in response to the enable control signal output by the processor 101, drives the locking mechanism 202 to unlock and lock the turntable 203.

[0061] Furthermore, the processor 101 in this embodiment is a DSP. For example, the DSP includes a TMS320-F28335.

[0062] This embodiment integrates the processor, CPLD, drive circuit, and resolver decoding circuit into the servo drive control system 100, and all circuits and components within the servo drive control system 100 are packaged on a single circuit board to achieve a highly integrated design. The servo drive control system 100 realizes integrated control of two brushless motors and two brushed motors, and integrates two dual-channel resolvers for high-precision decoding and coupling processing to perform servo closed-loop control.

[0063] like Figure 1 As shown, the servo drive control system 100 also includes an RS422 interface circuit 104, which is configured with at least three RS422 interfaces. The processor 101 communicates with the host computer 300 through the RS422 interface to receive transmission instructions and data from the host computer 300.

[0064] In this embodiment, the RS422 interface circuit 104 has a transmission rate of 115200bps, 8 data bits, 1 stop bit, and no parity check. This embodiment uses a DSP as the core and designs three RS422 communication interfaces using on-chip three-channel asynchronous full-duplex SCI communication.

[0065] Combination Figure 2 As shown, in this embodiment, the RS422 interface circuit 104 includes a first non-isolated chip D15 and its peripheral circuits, a second non-isolated chip D17 and its peripheral circuits, and an isolated chip D16 and its peripheral circuits. For example, the first non-isolated chip D15 includes a MAX3490EESA chip, the second non-isolated chip D17 includes a MAX3490EESA chip, and the isolated chip D16 includes an ADM2682EBR chip.

[0066] The servo drive control system 100 also includes a digital I / O interface circuit 105, which is connected between the processor 101 and the drive circuit 102. The digital I / O interface circuit 105 performs level matching and enhances I / O drive capability.

[0067] The digital I / O interface circuit 105 in this embodiment includes a level conversion unit, a digital input unit, and a digital isolation unit.

[0068] like Figure 3As shown, the level conversion unit D6 is used to realize bidirectional voltage conversion between TTL level signals in the 3.3V voltage domain and TTL level signals in the 5V voltage domain. In this embodiment, the level conversion unit includes a 16-bit dual-supply bus transceiver D6, used to support multiple 5V TTL outputs and two fault inputs from the drive circuit 102. Exemplarily, the level conversion unit D6 includes an SN74LVC16T245 chip and its peripheral circuitry.

[0069] like Figure 4 As shown, the digital input unit is used to receive TTL level signals within the 5V voltage domain and to filter the TTL level signals within the 5V voltage domain.

[0070] The digital input unit in this embodiment includes a first filter circuit 1051, a second filter circuit 1052, and a third filter circuit 1053.

[0071] The first filter circuit 1051 includes a first resistor R203, a second resistor R202, and a first capacitor C202. The first end of the first resistor R203 serves as the first end of the first filter circuit 1051, and the second end is connected to the first end of the second resistor R202 and the first end of the first capacitor C202 and serves as the second end of the first filter circuit 1051. The second end of the first capacitor C202 is connected to ground potential, and the second end of the second resistor R202 is connected to ground potential.

[0072] The second filter circuit 1052 includes a third resistor R2, a fourth resistor R29, and a second capacitor C90. The first end of the third resistor R2 serves as the first end of the second filter circuit 1052, and the second end is connected to the first end of the fourth resistor R29 and the first end of the second capacitor C90, serving as the second end of the second filter circuit 1052. The second end of the second capacitor C90 is connected to ground potential, and the second end of the fourth resistor R29 is connected to ground potential.

[0073] The third filter circuit 1053 includes a fifth resistor R3, a sixth resistor R28, and a third capacitor C91. The first end of the fifth resistor R3 serves as the first end of the third filter circuit 1053, and the second end is connected to the first end of the sixth resistor R28 and the first end of the third capacitor C91, serving as the second end of the third filter circuit 1053. The second end of the third capacitor C91 is connected to ground potential, and the second end of the sixth resistor R28 is connected to ground potential.

[0074] like Figure 5As shown, the digital isolation unit is used to isolate electromagnetic interference. In this embodiment, the digital isolation unit includes an optocoupler isolation chip D107, a first current-limiting resistor R200, a second current-limiting resistor R201, and a fourth capacitor C200. The positive input terminal of the optocoupler isolation chip D107 is connected to the first terminal of the first current-limiting resistor R200, and the negative input terminal is connected to ground. The fourth capacitor C200 is connected between the second terminal of the first current-limiting resistor R200 and ground. The first output terminal of the optocoupler isolation chip D107 is connected to ground, and the second output terminal is connected to the second current-limiting resistor R201. The second terminal of the second current-limiting resistor R201 is connected to a 3.3V power supply.

[0075] Combination Figure 6 As shown, this embodiment uses a CPLD for address decoding and related logic processing. The CPLD is connected to the external memory interface XINTF of the processor 101. CS0, CS6, and CS7 are the chip select signals for XINTF, each corresponding to an independent address space used to distinguish different external devices. The CS0 address space is mapped to the DA extension, and the CS6 address space is mapped to the serial port extension. Required DSP pins include the write signal XWE0, the read signal XRD, and address lines A0, A1, A2, A8, A9, A10, and A11. XZCS0 and XZCS6 are the chip select signals for XINTF, corresponding to the address spaces of Zone 0 and Zone 6 respectively, used to access different external devices.

[0076] In this embodiment, the CPLD includes a complex programmable logic device D2 and its peripheral circuits. For example, the complex programmable logic device D2 includes an EPM240T100I5.

[0077] It is understood that by directly integrating the processor 101 with the CPLD and the drive circuit, this embodiment reduces the signal transmission path (such as the wiring for encoder feedback), reduces the communication latency from milliseconds to microseconds, and significantly improves the closed-loop bandwidth.

[0078] In addition, the servo drive control system 100 of this embodiment has a built-in digital isolation unit, a first filter circuit 1051, a second filter circuit 1052 and a third filter circuit 1053 to achieve signal isolation and filtering and avoid introducing noise.

[0079] Furthermore, by integrating the processor 101 with the CPLD, a standardized parameter configuration interface can be provided, which can shorten the system debugging time.

[0080] Furthermore, the servo drive control system 100 in this embodiment also includes a power supply circuit 106, which is connected to the processor 101 and the CPLD, and is used to provide 24V DC power, 12V DC power, 5V DC power, 1.9V DC power and 3.3V DC power. Among them, the 24V DC power and 5V DC power are provided by external power sources.

[0081] The power supply circuit 106 in this embodiment includes a first power supply unit and a second power supply unit.

[0082] like Figure 7 As shown, the first power supply unit includes a first power chip D22 and its peripheral circuitry. The peripheral circuitry includes a first matching resistor R23, a fifth capacitor C80, a second matching resistor R1, a first inductor L4, a sixth capacitor C81, and a seventh capacitor C6. Specifically, the input terminal of the first power chip D22 is connected to the power supply voltage, and its output terminal is connected to the first terminal of the first matching resistor R23, the first terminal of the fifth capacitor C80, and the first terminal of the first inductor L4. The second terminal of the first matching resistor R23 is connected to the adjustment terminal ADJ of the first power chip D22 and the first terminal of the second matching resistor R1. The second terminal of the second matching resistor R1 and the second terminal of the fifth capacitor C80 are connected to ground. The second terminal of the first inductor L4 outputs a 1.9V DC power supply. The first terminals of the sixth capacitor C81 and the seventh capacitor C6 are connected to the second terminal of the first inductor L4, and the second terminals of the sixth capacitor C81 and the seventh capacitor C6 are connected to ground. For example, the first power chip D22 includes a TLV1117-ADJ power chip.

[0083] The first power supply unit is used to provide 1.9V DC power to the DSP core.

[0084] like Figure 7As shown, the second power supply unit includes a second power supply chip D23 and its peripheral circuitry. The peripheral circuitry includes an eighth capacitor C78, ​​a ninth capacitor C5, a tenth capacitor C79, an eleventh capacitor C82, a seventh capacitor C7, and a second inductor L5. Specifically, the input terminal of the second power supply chip D23 is connected to the power supply voltage and the first terminal of the eighth capacitor C78. The ground terminal ADJ of the second power supply chip D23 and the second terminal of the eighth capacitor C78 are connected to ground potential. The output terminal of the second power supply chip D23 is connected to the first terminals of the ninth capacitor C5, the tenth capacitor C79, and the second inductor L5. The second terminals of the ninth capacitor C5 and the tenth capacitor C79 are connected to ground potential. The second terminal of the second inductor L5 outputs a 3.3V DC power supply. The first terminals of the eleventh capacitor C82 and the seventh capacitor C7 are connected to the second terminal of the second inductor L5. The second terminals of the eleventh capacitor C82 and the seventh capacitor C7 are connected to ground potential. For example, the second power supply chip D23 includes a TLV1117-3.3 power supply chip.

[0085] The second power supply unit provides 3.3V DC power to the DSP, CPLD, level conversion unit, first non-isolated chip D15, and second non-isolated chip D17.

[0086] Furthermore, the power supply circuit 106 also includes a boost unit, which is connected to an external 5V DC voltage source to generate a 12V DC voltage based on the 5V DC voltage.

[0087] like Figure 8 As shown, the boost unit in this embodiment includes a DC-DC converter D24 and its peripheral circuitry. Exemplarily, the DC-DC converter D24 includes a TLV61046A chip. It is understood that DC-DC converters are well-known in the prior art and therefore will not be described in detail here. Any known or unknown DC-DC converter may be used without limitation.

[0088] The rotating mechanism 201 includes a brushed motor and a brushless motor drive circuit for driving the brushless motor. The brushless motor drive circuit includes a first undervoltage lockout module, a first overcurrent protection module, a first short circuit protection module, and a first overtemperature protection module. After the first overtemperature protection module is triggered, the brushless motor drive circuit reduces the frequency or shuts off the output.

[0089] Combination Figure 9 As shown, the brushless motor drive circuit includes at least two sets of integrated three-phase MOSFET gate drivers and their peripheral circuitry. Exemplarily, the integrated three-phase MOSFET gate driver includes a DRV8312 chip.

[0090] The brushless motor drive circuit in this embodiment includes two three-phase motor drive chips, DRV8312, which improves the system's space utilization and reliability across various operating scenarios. The brushless motor drive circuit integrates power MOSFETs and an intelligent protection system, achieving an efficiency of up to 97%. The internal power MOSFETs have an on-resistance of 80mΩ, a maximum absolute withstand voltage of 70V, a continuous current of 3.5A, and a peak current of 6.5A. The PWM frequency can reach 500kHz, ensuring precise motor control and dynamic response.

[0091] In this embodiment, the three-phase half-bridge of the brushless motor drive circuit can be controlled independently. Each phase is equipped with an independent power supply and grounding pin, supports external shunt resistor current detection, and has built-in anti-cross-conduction protection, eliminating the need for external buffers or Schottky diodes.

[0092] The brushless motor drive circuit in this embodiment has multiple protection circuits to ensure system robustness. The threshold value can be set via an external resistor to adapt to different motor requirements.

[0093] The locking mechanism 202 includes a brushed motor and a reducer. The brushed motor drive circuit is used to drive the brushed motor. The brushed motor drive circuit includes a second undervoltage lockout module, a second overcurrent protection module, a second short circuit protection module, and a second overtemperature protection module. After the second overtemperature protection module is triggered, the brushed motor drive circuit reduces the frequency or shuts off the output.

[0094] Combination Figure 10 As shown, the brushless motor drive circuit of this embodiment includes a dual-channel full-bridge motor driver and its peripheral circuits. For example, the dual-channel full-bridge motor driver includes a DRV8412 chip.

[0095] This embodiment uses two brushed motors with reducers as the locking mechanism. The brushless motor drive circuits driving these two brushed motors are integrated into the servo drive control system, using a single DRV8412 chip as the driver for both locking motors, achieving a drive efficiency of up to 97%. The brushless motor drive circuit in this embodiment uses 110mΩ low on-resistance MOSFETs, significantly reducing heat loss and supporting smaller heatsinks and power supply designs. The absolute maximum operating voltage of the brushless motor drive circuit in this embodiment is 70V, adapting to industrial-grade power fluctuation requirements.

[0096] This embodiment uses a single DRV8412 chip to independently drive two brushed motors. The continuous current is 2*3A and the peak current is 2*6A. It has multiple protection circuits to ensure system robustness. The peak current limiting threshold can be set by an external resistor to adapt to the peak current requirements of different brushed motors.

[0097] Furthermore, the resolver decoding circuit 103 includes a resolver-to-digital converter, which adopts a parallel 16-bit interface, is compatible with the DSP28335 controller, is powered by a 5V DC power supply, and has a logic interface compatible with 2.3V~5.25V level signals.

[0098] Combination Figure 11 As shown, the resolver-to-digital converter of this embodiment is used to convert the analog signal of the resolver into high-precision digital angle and speed data. Exemplarily, the resolver-to-digital converter includes an AD2S1210 chip and its peripheral circuitry.

[0099] The servo drive control system 100 in this embodiment uses four AD2S1210 chips to decode the dual-channel resolver of two axes, converting the resolver signals output by the resolver into angle and speed signals. All four AD2S1210 chips in this embodiment are configured with 16-bit resolution to achieve maximum performance, and through a decoding coupling design, the maximum single-axis decoding resolution reaches 20 bits.

[0100] Combination Figure 12 As shown, in this embodiment, the servo drive control system 100 implements closed-loop control, including: the three-autoinertial navigation system test device 200 automatically enters the turning mode after receiving the turning command; the host computer 300 sets the position via DSP; the resolver angle position is measured by using the position derivative as a velocity measurement element to measure the angular velocity of the turntable shaft system; the resolver also serves as a turntable angular position measurement element; and position and velocity corrections are completed by the DSP. Furthermore, the position loop employs a composite controller method with an integral robust inversion controller and a disturbance observer to achieve high-precision static positioning control and dynamic tracking with a certain bandwidth.

[0101] This invention realizes an integrated hardware and software circuit design for servo drive control of two-axis brushless motors and two-axis brushed motors, which has the advantages of small size, low noise, high control precision, low power consumption, and low cost. The modular design facilitates maintenance and upgrades, significantly extending the service life of the equipment and reducing long-term operating costs.

[0102] This invention also features robust control, dynamically and adaptively adjusting parameters based on real-time operating conditions to ensure the system is always in optimal working condition. Its highly integrated design reduces external connections, lowers the failure rate, and enhances the overall system's anti-interference capability and robustness, making it suitable for complex and variable working environments. Through real-time feedback from a high-precision resolver and robust servo control, it effectively copes with various operating condition changes, ensuring dynamic response speed and static stability.

[0103] This invention integrates multi-axis motor control technology to ensure synchronization and coordination, thereby improving the overall system efficiency. Its unique robust control algorithm guarantees operational stability.

[0104] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0105] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0106] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0107] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0108] It will be apparent to those skilled in the art that this disclosure is not limited to the details of the exemplary embodiments described above, and that this disclosure can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of this disclosure is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this disclosure. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0109] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

Claims

1. A servo drive control system for a three-auto inertial navigation system (INS) testing device, wherein the INS testing device comprises at least two rotating mechanisms, two locking mechanisms, a turntable, and a rotary transformer, characterized in that, The servo drive control system includes a processor, a CPLD, a drive circuit, and a resolver decoding circuit. The resolver decoding circuit is connected to the processor and the resolver, and is used to convert the resolver signal output by the resolver into angle signal and speed signal; The processor is used to obtain the current position information of the turntable by parsing the angle signal and the speed signal, perform differential processing on the current position information of the turntable to obtain the current speed information of the turntable, and output an enable control signal based on the current speed information of the turntable. The CPLD is connected to the external memory interface of the processor and is used for address decoding and logic processing. The drive circuit responds to the enable control signal output by the processor to drive the rotation mechanism and the locking mechanism.

2. The servo drive control system of the three-autoinertial navigation system testing device according to claim 1, characterized in that, The drive circuit includes a brushless motor drive circuit and a brushed motor drive circuit. The brushless motor drive circuit responds to the enable control signal output by the processor and is used to drive the rotating mechanism to rotate the turntable to a specified position. The brushed motor drive circuit responds to the enable control signal output by the processor and is used to drive the locking mechanism to unlock and lock the turntable.

3. The servo drive control system of the three-autoinertial navigation system testing device according to claim 1, characterized in that, The servo drive control system also includes an RS422 interface circuit, which is configured with at least three RS422 interfaces. The processor communicates with the host computer through the RS422 interfaces to receive transmission instructions and data from the host computer.

4. The servo drive control system of the three-autoinertial navigation system testing device according to claim 1, characterized in that, The servo drive control system further includes a digital I / O interface circuit, which is connected between the processor and the drive circuit. The digital I / O interface circuit includes a level conversion unit for bidirectional voltage conversion between TTL level signals in the 3.3V voltage domain and TTL level signals in the 5V voltage domain.

5. The servo drive control system of the three-autoinertial navigation system testing device according to claim 4, characterized in that, The digital I / O interface circuit also includes a digital input unit, which is used to receive TTL level signals in the 5V voltage domain and to filter the TTL level signals in the 5V voltage domain. And / or, The digital I / O interface circuit also includes a digital isolation unit for isolating electromagnetic interference.

6. The servo drive control system of the three-autoinertial navigation system testing device according to claim 1, characterized in that, The servo drive control system also includes a power supply circuit, which is connected to the processor and CPLD and is used to provide 24V DC power, 12V DC power, 5V DC power, 1.9V DC power and 3.3V DC power.

7. The servo drive control system of the three-autoinertial navigation system testing device according to claim 6, characterized in that, The power supply circuit includes a boost unit, which is connected to an external 5V DC voltage source to generate a 12V DC voltage based on the 5V DC voltage.

8. The servo drive control system of the three-autoinertial navigation system testing device according to claim 2, characterized in that, The rotating mechanism includes a brushed motor, and the brushless motor drive circuit is used to drive the brushless motor. The brushless motor drive circuit includes a first undervoltage lockout module, a first overcurrent protection module, a first short circuit protection module, and a first overtemperature protection module. After the first overtemperature protection module is triggered, the brushless motor drive circuit reduces the frequency or shuts off the output.

9. The servo drive control system of the three-autoinertial navigation system testing device according to claim 2, characterized in that, The locking mechanism includes a brushed motor and a reducer. The brushed motor drive circuit is used to drive the brushed motor. The brushed motor drive circuit includes a second undervoltage lockout module, a second overcurrent protection module, a second short circuit protection module, and a second overtemperature protection module. After the second overtemperature protection module is triggered, the brushed motor drive circuit reduces the frequency or shuts off the output.

10. The servo drive control system of the three-autoinertial navigation system testing device according to claim 1, characterized in that, The resolver decoding circuit includes a resolver-to-digital converter, which adopts a parallel 16-bit interface and is powered by a 5V DC power supply. The logic interface of the resolver-to-digital converter is compatible with level signals from 2.3V to 5.25V.

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