ZYNQ chip solidification program verification method and system and readable storage medium

Abstract

The invention provides a ZYNQ chip solidification program verification method and system and a readable storage medium, and relates to the technical field of chip program verification. According to the method, by fully utilizing the program compiling characteristic of the chip solidification program and the characteristic that the program and the overall state of related program codes can be represented, only the actual program and value associated with the processor system are measured and calculated for the currently loaded chip solidification program after the ZYNQ chip is powered on; according to the method, information matching verification is carried out on an original processor system program and a value of a recorded solidification program version, and the whole chip solidification program does not need to be subjected to overall program and measurement and calculation by consuming more initialization time, so that the product initialization time is saved, the verification result of the corresponding solidification program is ensured to have relatively high reliability, and the verification efficiency is improved. Product research and development personnel or delivered product auditing personnel can conveniently and quickly confirm the correctness condition of the current chip solidification program and the adaptation condition between the current chip solidification program and the recorded solidification program version number.

Description

TECHNICAL FIELD

[0001] The present application relates to the chip program verification technical field, in particular, relates to a ZYNQ chip solidification program verification method and system and a readable storage medium. BACKGROUND

[0002] With the continuous development of science and technology, the ZYNQ chip based on the Xilinx SoC (System on a Chip, System on a Chip) architecture is widely used in the fields of intelligent driving of automobile, radar guidance, industrial automation manufacturing, etc. because it integrates the processor system (Processing System, PS) unit of single-core or multi-core ARM (Advanced RISC Machines, Advanced RISC Machines) processor and programmable logic (Programmable Logic) unit, which is equivalent to integrating the software programmability of ARM processor and the hardware programmability of FPGA (Field Programmable Gate Array, Field Programmable Gate Array).

[0003] In the application process of the ZYNQ chip, the electronic product carrying the ZYNQ chip is usually required to verify the current chip solidification program loaded by the ZYNQ chip during power-on initialization, so as to determine whether the current chip solidification program is correct, so as to solve the problem of confusion of solidification program version of the corresponding electronic product in different product development stages or product delivery stages. However, it is worth noting that the existing chip solidification program verification scheme for the ZYNQ chip cannot effectively balance the reliability of the verification result and the efficiency of the chip initialization verification, which often leads to that the product initialization time exceeds the overall index requirement, but cannot provide reliable solidification program verification result. SUMMARY

[0004] Therefore, the purpose of the present application is to provide a ZYNQ chip solidification program verification method and system and a readable storage medium, which can fully utilize the program compilation characteristics of the chip solidification program, as well as the characteristics of the program and the overall state of the related program code, and after the ZYNQ chip is powered on, only the actual program and value associated with the processor system (i.e. PS unit) of the current loaded chip solidification program are calculated and processed to match and verify the original processor system program and value of the recorded solidification program version of different product development stages or product delivery stages, so as to save the product initialization time while ensuring that the final solidification program verification result has strong reliability, which is convenient for product development personnel or delivery product audit personnel to quickly confirm the correctness of the current chip solidification program and the adaptation between the current chip solidification program and the recorded solidification program version number (i.e. the version identification of the recorded solidification program version).

[0005] To achieve the above object, the technical scheme adopted by the embodiments of the present application is as follows. In a first aspect, the present application provides a ZYNQ chip solidification program verification method, applied to an electronic device carrying a ZYNQ chip to be verified, the verification method comprising: When the ZYNQ chip to be verified is powered on and initialized, the current chip solidification program version number of the ZYNQ chip to be verified is read, and the target program code corresponding to the processor system of the ZYNQ chip to be verified in the current chip solidification program is extracted; The target program code is programmed and calculated to obtain the current target program and value of the ZYNQ chip to be verified; The chip solidification program version number and the target program and value are sent to an information comparison device, so that the information comparison device performs information matching verification on the chip solidification program version number and the target program and value according to the original processor system program and value of the ZYNQ chip to be verified under different solidification program versions.

[0006] In an optional implementation, the step of extracting the target program code corresponding to the processor system of the ZYNQ chip to be verified in the current chip solidification program comprises: For each ARM processor core of the ZYNQ chip to be verified, the program start offset address corresponding to the ARM processor core is read in the startup image file of the current chip solidification program, and the code segment size and data segment size are read in the program size file corresponding to the ARM processor core; In the program memory of the current chip solidification program, the program code is extracted according to the program start offset address, the code segment size and the data segment size to obtain the target program code currently actually used by the ARM processor core.

[0007] In an optional implementation, the step of programming and calculating the target program code to obtain the current target program and value of the ZYNQ chip to be verified comprises: For each ARM processor core of the ZYNQ chip to be verified, the target program code corresponding to the ARM processor core is binary converted to obtain the corresponding binary program file; The binary program file is subjected to byte-level binary addition operation, and the binary addition operation result is expressed in decimal numerical value to obtain the current target program and value of the ARM processor core.

[0008] In a second aspect, the present application provides a ZYNQ chip solidification program verification method, applied to an information comparison device in communication connection with an electronic device carrying a ZYNQ chip to be verified, the verification method comprising: obtaining a chip firmware version number and target program and value uploaded by the electronic device during power-on initialization of the ZYNQ chip to be checked, wherein the target program and value are directly associated with a processor system of the ZYNQ chip to be checked; extracting target processor system program and value corresponding to the chip firmware version number from the pre-stored original processor system program and value of the ZYNQ chip to be checked under different firmware version; detecting whether the target processor system program and value match the target program and value; if it is detected that the target processor system program and value match the target program and value successfully, it is determined that the current chip firmware of the ZYNQ chip to be checked is correct, otherwise it is determined that the current chip firmware of the ZYNQ chip to be checked is incorrect.

[0009] In an optional embodiment, when the original processor system program and value stored by the information comparison device is obtained by adding the original processor core program and value of each ARM processor core of the ZYNQ chip to be checked under the corresponding firmware version, the step of detecting whether the target processor system program and value match the target program and value comprises: performing addition operation on the target program and value of each ARM processor core of the ZYNQ chip to be checked to obtain the actual processor system program and value of the ZYNQ chip to be checked; performing numerical comparison between the target processor system program and value and the actual processor system program and value; when the target processor system program and value remain consistent with the actual processor system program and value, it is determined that the target processor system program and value match the target program and value successfully, otherwise it is determined that the target processor system program and value match the target program and value unsuccessfully.

[0010] In an optional embodiment, when the original processor system program and value stored by the information comparison device includes the original processor core program and value of each ARM processor core of the ZYNQ chip to be checked under the corresponding firmware version, the step of detecting whether the target processor system program and value match the target program and value comprises: performing numerical comparison between the original processor core program and value corresponding to each ARM processor core of the ZYNQ chip to be checked and the target program and value; When the original processor core program and value of each ARM processor core of the ZYNQ chip to be verified are consistent with the target program and value, it is determined that the target processor system program and value match the target program and value successfully, otherwise, it is determined that the target processor system program and value match the target program and value unsuccessfully.

[0011] In a third aspect, the present application provides a ZYNQ chip solidification program verification method, applied to an information comparison device and an electronic device in communication connection, wherein the electronic device is equipped with a ZYNQ chip to be verified, and the verification method comprises the following steps: When the electronic device is powered on and initialized, the current chip solidification program version number of the ZYNQ chip to be verified is read, and the target program code corresponding to the processor system in the current chip solidification program of the ZYNQ chip to be verified is extracted; The electronic device performs program and calculation on the target program code to obtain the current target program and value of the ZYNQ chip to be verified; The electronic device sends the chip solidification program version number and the target program and value to the information comparison device; The information comparison device performs information matching verification on the chip solidification program version number and the target program and value according to the original processor system program and value of the ZYNQ chip to be verified under different solidification program versions.

[0012] In an optional implementation, the step of performing information matching verification on the chip solidification program version number and the target program and value according to the original processor system program and value of the ZYNQ chip to be verified under different solidification program versions by the information comparison device comprises the following steps: Extracting the target processor system program and value corresponding to the chip solidification program version number from the pre-stored original processor system program and value of the ZYNQ chip to be verified under different solidification program versions; Detecting whether the target processor system program and value match the target program and value or not; If it is detected that the target processor system program and value match the target program and value successfully, it is determined that the current chip solidification program of the ZYNQ chip to be verified is correct, otherwise, it is determined that the current chip solidification program of the ZYNQ chip to be verified is incorrect.

[0013] In a fourth aspect, the present application provides a ZYNQ chip solidification program verification system, comprising an electronic device and an information comparison device, wherein the electronic device is equipped with a ZYNQ chip to be verified, and the electronic device is in communication connection with the information comparison device; The electronic device and the information comparison device each store a computer program and can run the computer program to implement the ZYNQ chip solidification program verification method in any one of the preceding embodiments.

[0014] In a fifth aspect, the present application provides a readable storage medium, which stores a computer program, and when the computer program is executed by an electronic device to be verified for a ZYNQ chip or an information comparison device in communication connection with the electronic device, the ZYNQ chip solidification program verification method in any one of the preceding embodiments is implemented.

[0015] In this case, the beneficial effects of the embodiments of the present application can include the following: When the ZYNQ chip to be verified of the electronic device is powered on and initialized, the present application reads the current chip solidification program version number of the ZYNQ chip to be verified, extracts the target program code corresponding to the processor system in the current chip solidification program of the ZYNQ chip to be verified, and performs program and calculation to obtain the target program and value corresponding to the processor system, and then sends the chip solidification program version number and the target program and value to the information comparison device. The information comparison device performs information matching verification on the chip solidification program version number and the target program and value according to the original processor system program and value of the ZYNQ chip to be verified under different solidification program versions, so as to fully utilize the program compilation characteristics of the chip solidification program and the characteristics of the program and the program code that can represent the overall state of the related program code. Only the actual program and value associated with the processor system (i.e. the PS unit) of the ZYNQ chip after power-on need to be measured and calculated to achieve a solidification program verification effect with high reliability, without consuming more initialization time for overall program and measurement of the entire chip solidification program. In this way, the product initialization time is saved, and the final solidification program verification result has high reliability, which facilitates product R&D personnel or product delivery personnel to quickly confirm the correctness of the current chip solidification program and the adaptation between the current chip solidification program and the recorded solidification program version number.

[0016] In order to make the above objectives, characteristics and advantages of the present application more apparent and easy to understand, the following preferred embodiments are described in detail below, and the accompanying drawings are described as follows. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0018] Figure 1A system composition schematic diagram of the ZYNQ chip solidification program verification system provided by the embodiment of the present application is provided. Figure 2 A flowchart of the first ZYNQ chip solidification program method provided by the embodiment of the present application is provided. Figure 3 A flowchart of the sub-steps included in step S240 in Figure 2 A flowchart of the second ZYNQ chip solidification program method provided by the embodiment of the present application is provided. Figure 4 A flowchart of the third ZYNQ chip solidification program method provided by the embodiment of the present application is provided. Figure 5

[0019] Figure: 10-ZYNQ chip solidification program verification system; 11-electronic device; 12-information comparison device. DETAILED DESCRIPTION

[0020] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations.

[0021] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without making creative efforts fall within the scope of protection of the present application.

[0022] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, therefore, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0023] In the description of the present application, it should be understood that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship commonly understood by those skilled in the art, and are only for the convenience of describing the present application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0024] ​In the description of the present application, it is also necessary to explain that, unless otherwise explicitly specified and limited, the terms "set", "install", "connect", "connect" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium, it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0025] In addition, in the description of the present application, it can be understood that the relationship terms such as "first" and "second" and the like are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or includes elements inherent to such process, method, article or device. Without more limitation, the element defined by the sentence "including a…" does not exclude the presence of other identical elements in the process, method, article or device including the element. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0026] Applicants found through painstaking research that the existing chip hardening program verification schemes for ZYNQ chips mainly adopt the following ideas: Idea one: in the chip initialization process after the power-on of the ZYNQ chip, the FSBL (First Stage Boot Loader, first stage boot loader) boot program complete image file in the chip hardening program is verified by using the ZYNQ BootROM verification mechanism. (It can be implemented by using CRC (Cyclic Redundancy Check, cyclic redundancy check)-32 algorithm or RSA-PSS digital signature algorithm) Calculate the check value, and then realize the hardening program verification effect based on the calculated check value. Among them, this idea only verifies the head of the FSBL boot program, and does not completely cover the entire chip hardening program in essence, cannot verify the entire chip hardening program, and cannot give the program and related to the chip hardening program.

[0027] The second thought is that during the program solidification process of the designed chip solidification program, the reference data that needs to be solidified synchronously is configured, and the CRC check value is calculated based on the reference data, and then the aforementioned CRC check value and the reference data are stored in the electronic device where the ZYNQ chip is located, so that when the ZYNQ chip is powered on and the aforementioned chip solidification program is loaded, the stored reference data and the corresponding CRC check value are read, and the CRC check value of the reference data is recalculated, and then the CRC check value calculated by the ZYNQ chip itself is compared with the stored CRC check value, to realize the program check effect of the chip solidification program. Among them, this thought requires product researchers to have a very good understanding of the running mechanism of the FSBL boot program, and to increase the logic code of CRC check in the appropriate position of the FSBL boot program, and cannot destroy the running mechanism of the FSBL boot program itself, so that the technical literacy requirement of this thought to product researchers is higher, and it cannot check whether the written reference data itself is correct, and in essence, it cannot check the entire chip solidification program, and it cannot give the program and.

[0028] The third thought is that a program and calculation logic code is written in the local solidification program corresponding to the PS unit of the chip solidification program, so that when the ZYNQ chip is powered on and the aforementioned chip solidification program is loaded, the aforementioned program and calculation logic code is run, the binary addition operation is performed on all bytes of the chip solidification program currently loaded by the ZYNQ chip from the program memory (for example, Flash) corresponding to the aforementioned chip solidification program, to obtain the current actual overall program sum value, and then it is compared with the original overall program sum value calculated in advance before the aforementioned chip solidification program is solidified, to see whether they are the same, to realize the program check effect of the entire chip solidification program, and can give the program and of the entire chip solidification program. Among them, the program and calculation time of this thought is too long, which will seriously affect the power-on initialization time of the electronic device where the ZYNQ chip is located, resulting in that the corresponding product initialization time exceeds the overall index requirement.

[0029] In this case, the embodiment of the present application can make full use of the program compiling characteristics of the chip hardening program, and the characteristics of the program and the program code representing the overall state, and only calculate the actual program and values associated with the processor system (i.e. the PS unit) for the currently loaded chip hardening program when the ZYNQ chip is powered on, to match and verify the original processor system program and values of the recorded hardening program version of different product development stages or product delivery stages, so as to save the product initialization time, ensure that the final hardening program verification result has strong reliability, and facilitate the product development personnel or product delivery audit personnel to quickly confirm the correctness of the current chip hardening program and the adaptation between the current chip hardening program and the recorded hardening program version number.

[0030] Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The following embodiments and features in the embodiments can be combined with each other without conflict.

[0031] Please refer to Figure 1 , Figure 1 is a system composition schematic diagram of the ZYNQ chip hardening program verification system 10 provided by the embodiment of the present application. In the embodiment of the present application, the ZYNQ chip hardening program verification system 10 can include an electronic device 11 and an information comparison device 12, wherein the electronic device 11 is loaded with a ZYNQ chip to be verified, and the information comparison device 12 is in communication connection with the electronic device 11, so as to cooperate with the electronic device 11 to only calculate the actual program and values associated with the processor system of the loaded chip hardening program in the chip initialization process after the ZYNQ chip to be verified is powered on, to realize a reliable hardening program verification effect without consuming more initialization time for the whole chip hardening program, so as to save the product initialization time, ensure that the final hardening program verification result has strong reliability, facilitate the product development personnel or product delivery audit personnel to quickly confirm the correctness of the current chip hardening program and the adaptation between the current chip hardening program and the recorded hardening program version number. In this process, the electronic device 11 can be, but is not limited to, a laser radar, a seeker, a smart phone, etc.; the information comparison device 12 can be, but is not limited to, a personal computer, a tablet computer, a server, etc.; and the ZYNQ chip to be verified can be a ZYNQ-7000 series chip.

[0032] In the embodiment of the present application, for the ZYNQ chip to be verified, the corresponding chip hardening program is generally composed of an FSBL boot program, a PS unit initialization program and a PL unit initialization program, and a Boot Image file (which can be represented in BIN file format) of the chip hardening program can be formed by file coding according to a certain coding rule from an ELF file of the corresponding FSBL boot program, an ELF file of the PS unit initialization program and a BIT file of the PL unit initialization program, so that the arrangement order of the ELF file of the FSBL boot program, the ELF file of the PS unit initialization program and the BIT file of the PL unit initialization program in the Boot Image file is fixed respectively, wherein the FSBL boot program belongs to the underlying packaging program of the ZYNQ chip when it is shipped, and its editability is very weak, so the start offset address of the ELF file of the FSBL boot program in the Boot Image file is relatively fixed, and often does not change with the modification of the chip hardening program, while the start offset address of the ELF file of the PS unit initialization program in the Boot Image file is determined depending on the BIT file of the PL unit initialization program (that is, the start offset address of the ELF file of the PS unit initialization program changes with the change of the BIT file of the PL unit initialization program), and the BIT file is often not easily changed after being generated (because the program editing convenience of the PL unit initialization program is lower than that of the PS unit initialization program), but the ELF file of the PS unit initialization program is most likely to change.

[0033] That is, in the modification process of the chip hardening program, the FSBL boot program is generally not transformed, and often the PL unit initialization program and the PS unit initialization program are modified, wherein if the BIT file of the PL unit initialization program does not change, even if the PS unit initialization program is modified at this time, the start offset address of the ELF file of the PS unit initialization program will not change, and if the BIT file of the PL unit initialization program changes, even if the PS unit initialization program is not modified at this time, the start offset address of the ELF file of the PS unit initialization program will change, so whether the corresponding chip hardening program is modified can be directly known by observing the change of the program of the PS unit initialization program (which is obtained by binary addition operation from the effective program code enclosed by the start offset address, the code segment size and the data segment size of the corresponding initialization program).

[0034] In other words, the program compilation characteristic of the ZYNQ chip firmware program can be expressed as "the PL unit initialization program and the PS unit initialization program in the chip firmware program have program editability, the start offset address of the PS unit initialization program in the start image file is determined depending on the PL unit initialization program, and the start offset address of the PS unit initialization program changes with the change of the PL unit initialization program". The correctness of the ZYNQ chip firmware program (i.e., whether the ZYNQ chip firmware program is the original chip firmware program actually configured in the specific firmware program version) and the adaptation between the ZYNQ chip firmware program and the recorded firmware program version number (i.e., the version identifier of the recorded firmware program version) can be determined by directly observing whether the actual program and value associated with the PS unit of the ZYNQ chip firmware program (i.e., the program and value of the PS unit initialization program) change relative to the original processor system program and value (i.e., the real program and value of the recorded PS unit initialization program corresponding to the recorded firmware program version) under a specific firmware program version (i.e., a recorded firmware program version at different product development stages or product delivery stages).

[0035] In the embodiments of the present application, the electronic device 11 and the information comparison device 12 are each configured with a software function module, a hardware circuit module, and / or a computer program related to the ZYNQ chip firmware program verification scheme provided by the embodiments of the present application, and can cooperatively run the software function module, the hardware circuit module, and / or the computer program to fully utilize the program compilation characteristic of the chip firmware program and the program and the characteristic of the related program code that can represent the overall state of the program, and only measure and calculate the actual program and value associated with the processor system after the ZYNQ chip is powered on, to verify the information matching with the original processor system program and value of the recorded firmware program version at different product development stages or product delivery stages. Therefore, while saving the product initialization time, the final firmware program verification result has strong reliability, which facilitates the product development personnel or the product delivery audit personnel to quickly confirm the correctness of the current chip firmware program and the adaptation between the current chip firmware program and the recorded firmware program version number.

[0036] It can be understood that, Figure 1 The block diagram shown is only one composition schematic diagram of the ZYNQ chip firmware program verification system 10. The ZYNQ chip firmware program verification system 10 can further include more or fewer components than those shown in the block diagram, or have a different configuration than that shown in the block diagram. Figure 1 The components shown in the block diagram can be implemented in hardware, software, or a combination thereof. Figure 1 The components shown in the block diagram can be implemented in hardware, software, or a combination thereof. Figure 1 The components shown in the block diagram can be implemented in hardware, software, or a combination thereof.

[0037] In the application, in order to ensure that the ZYNQ chip solidification program verification system 10 can only measure the actual program and value associated with the processor system of the ZYNQ chip after power-on, and to realize a reliable solidification program verification effect, so as to save the product initialization time while ensuring that the final solidification program verification result has strong reliability, the embodiment of the application realizes the foregoing purpose by providing a ZYNQ chip solidification program verification method which can be applied to the foregoing ZYNQ chip solidification program verification system 10. The ZYNQ chip solidification program verification method provided by the application will be described in detail below.

[0038] Please refer to Figure 2 , Figure 2 is a flowchart of a first ZYNQ chip solidification program method provided by the embodiment of the application. In the embodiment of the application, the first ZYNQ chip solidification program method is applied to the ZYNQ chip solidification program verification system 10 described above, and the first ZYNQ chip solidification program method can include steps S210-S240.

[0039] In step S210, the electronic device reads the current chip solidification program version number of the ZYNQ chip to be verified when the ZYNQ chip to be verified is powered on and initialized, and extracts the target program code corresponding to the processor system in the current chip solidification program of the ZYNQ chip to be verified.

[0040] In the embodiment, the chip solidification program version number is the version identifier of the current chip solidification program actually loaded by the ZYNQ chip to be verified during the chip initialization process after power-on. When the ZYNQ chip to be verified is powered on and initialized, the electronic device 11 can determine the starting offset address of the PS unit initialization program corresponding to the PS unit in the current chip solidification program by querying the startup image file corresponding to the current chip solidification program, and then extract the program code in the program memory for the current chip solidification program based on the starting offset address, to ensure that the target program code extracted can effectively represent the PS unit initialization program actually loaded by the ZYNQ chip to be verified.

[0041] Optionally, in an implementation of the embodiment, when the PS unit of the ZYNQ chip to be verified includes one or more ARM processor cores, the corresponding PS unit initialization program substantially includes all single-core initialization programs corresponding to the respective ARM processor cores, each single-core initialization program corresponds to a target program code in the current chip solidification program, and each single-core initialization program corresponds to a program starting offset address in the startup image file of the current chip solidification program. Therefore, the step of "extracting the target program code corresponding to the processor system in the current chip solidification program of the ZYNQ chip to be verified" can include: reading, for each ARM processor core of the ZYNQ chip to be verified, a program start offset address corresponding to the ARM processor core from a start image file of the current chip hardening program, and reading a code segment size and a data segment size from a program size file corresponding to the ARM processor core; performing program code extraction according to the program start offset address, the code segment size, and the data segment size in a program memory of the current chip hardening program to obtain target program code currently actually used by the ARM processor core.

[0042] The program size file corresponding to a single ARM processor core is used to describe the size of each memory segment (including a code segment, a data segment, a BBS segment, a stack segment, etc.) in the single-core initialization program.

[0043] In step S220, the electronic device performs program and calculation on the target program code to obtain the target program and value of the ZYNQ chip to be verified.

[0044] In the embodiment, after the electronic device 11 extracts the target program code of each ARM processor core in the ZYNQ chip to be verified when the product is powered on and initialized, the electronic device 11 performs program and calculation on the target program code corresponding to each ARM processor core to obtain the target program and value of each ARM processor core in the ZYNQ chip to be verified at the current chip hardening program actually loaded.

[0045] Optionally, in an implementation of the embodiment, when the PS unit of the ZYNQ chip to be verified includes one or more ARM processor cores, the step of performing program and calculation on the target program code to obtain the target program and value of the ZYNQ chip to be verified can include: performing binary conversion processing on the target program code corresponding to each ARM processor core of the ZYNQ chip to be verified to obtain a corresponding binary program file; performing byte-level binary addition operation on the binary program file, and performing decimal numerical representation on the binary addition operation result to obtain the target program and value of the ARM processor core.

[0046] When the binary program file of an ARM processor core is obtained, bytes can be used as the binary division unit to divide the binary program file into all binary numerical values involved in the binary program file, and then binary addition operation is performed on the binary numerical values to obtain the corresponding binary addition operation result.

[0047] Therefore, the application can realize the PS unit program and value calculation effect for the current chip firmware actually loaded by the ZYNQ chip after power-on through the cooperation between the above steps S210 and S220.

[0048] In step S230, the electronic device sends the chip firmware version number and the target program and value to the information comparison device.

[0049] In the embodiment, when the electronic device 11 obtains the chip firmware version number corresponding to the current chip firmware actually loaded and the target program and value of the current chip firmware corresponding to the PS unit of the ZYNQ chip to be verified during product initialization, the electronic device 11 uploads the chip firmware version number and all the target program and value actually calculated to the information comparison device 12, so that the information comparison device 12 detects whether the chip firmware version number and all the target program and value conform to the recorded firmware version based on the original processor system program and value of the recorded firmware version uploaded by the electronic device 11 at different product development stages or product delivery stages, determines the correctness of the current chip firmware and the adaptation between the current chip firmware and the recorded firmware version number.

[0050] In step S240, the information comparison device performs information matching verification on the chip firmware version number and the target program and value according to the original processor system program and value of the ZYNQ chip to be verified under different firmware versions.

[0051] In the embodiment, after the information comparison device 12 obtains the chip firmware version number and the target program and value uploaded by the electronic device 11 after power-on, the information comparison device 12 searches for the target processor system program and value corresponding to the chip firmware version number in the original processor system program and value of the ZYNQ chip to be verified under different firmware versions pre-stored by the information comparison device 12, and then performs information matching on the searched target processor system program and value and the received target program and value to determine whether the current chip firmware of the ZYNQ chip to be verified is correct.

[0052] Optionally, please refer to Figure 3 , Figure 3 is Figure 2 the flowchart of the sub-steps included in step S240 in the embodiment. In the embodiment, the step S240 can include sub-steps S241-S244 to effectively detect whether the current chip firmware actually loaded by the ZYNQ chip to be verified is correct.

[0053] Sub-step S241, among the pre-stored original processor system programs and values of the ZYNQ chip to be verified under different solidification program versions, extract the target processor system program and value corresponding to the chip solidification program version number.

[0054] Sub-step S242, detect whether the target processor system program and value match the target program and value.

[0055] Optionally, in an embodiment of the present embodiment, when the original processor system program and value stored by the information comparison device is obtained by adding the original processor core program and value of each ARM processor core of the ZYNQ chip to be verified under the corresponding solidification program version, the step of "detecting whether the target processor system program and value match the target program and value" can include: performing addition operation on the target program and value of each ARM processor core of the ZYNQ chip to be verified to obtain the actual processor system program and value of the ZYNQ chip to be verified at present; numerically comparing the target processor system program and value with the actual processor system program and value; when the target processor system program and value remain consistent with the actual processor system program and value, it is determined that the target processor system program and value match the target program and value successfully, otherwise it is determined that the target processor system program and value match the target program and value unsuccessfully.

[0056] Optionally, in another embodiment of the present embodiment, when the original processor system program and value stored by the information comparison device 12 includes the original processor core program and value of each ARM processor core of the ZYNQ chip to be verified under the corresponding solidification program version, the step of "detecting whether the target processor system program and value match the target program and value" can include: for each ARM processor core of the ZYNQ chip to be verified, numerically compare the original processor core program and value corresponding to the ARM processor core with the target program and value; when the original processor core program and value of each ARM processor core of the ZYNQ chip to be verified remain consistent with the target program and value, it is determined that the target processor system program and value match the target program and value successfully, otherwise it is determined that the target processor system program and value match the target program and value unsuccessfully.

[0057] In the embodiment, when the target processor system program and value matches the target program and value successfully, it indicates that the current chip firmware actually loaded by the ZYNQ chip to be verified in the chip initialization process is consistent with the original chip firmware actually configured by the target recorded firmware version (i.e., the recorded firmware version pointed by the chip firmware version number), the current chip firmware is loaded correctly, and it is completely adapted to the chip firmware version number. At this time, the information comparison device 12 will correspondingly execute the substep S243. When the target processor system program and value fails to match the target program and value, it indicates that the current chip firmware is inconsistent with the original chip firmware actually configured by the target recorded firmware version, the current chip firmware is incorrect, and it cannot be adapted to the chip firmware version number. The current chip firmware may have unreported program modification actions while maintaining the chip firmware version number, or the current chip firmware belongs to the current loaded incorrect chip firmware. At this time, the information comparison device 12 will correspondingly execute the substep S244.

[0058] The substep S243 determines whether the current chip firmware of the ZYNQ chip to be verified is correct.

[0059] The substep S244 determines whether the current chip firmware of the ZYNQ chip to be verified is incorrect.

[0060] In the embodiment, when the information comparison device 12 determines that the current chip firmware of the ZYNQ chip to be verified is incorrect, the information comparison device 12 will remind the product R&D personnel or the product delivery audit personnel to re-power the electronic device 11, or remind the product R&D personnel to manually check the mutual corresponding condition between the program version number and the actual program content of the real chip firmware of the electronic device 11, so that the electronic device 11 in which the ZYNQ chip to be verified is located can realize the mutual corresponding effect between the real chip firmware and the firmware version number as soon as possible.

[0061] Therefore, the present application can effectively detect whether the current chip firmware actually loaded by the ZYNQ chip to be verified is correct by executing the above-mentioned substeps S241-S244.

[0062] The application can make the ZYNQ chip solidification program verification system 10 only measure the actual program and value associated with the processor system after the ZYNQ chip is powered on, so as to realize the solidification program verification effect with high reliability, save the product initialization time, ensure that the final solidification program verification result has high reliability, and facilitate the product development personnel or product delivery personnel to quickly confirm the correctness of the current chip solidification program and the adaptation between the current chip solidification program and the recorded solidification program version number.

[0063] In the application, in order to ensure that the electronic device 11 can measure only the actual program and value associated with the PS unit after the ZYNQ chip is powered on, the information comparison device 12 is used to match and verify the original processor system program and value of the recorded solidification program version in different product development stages or product delivery stages, so as to save the product initialization time, ensure that the final solidification program verification result has high reliability, and realize the foregoing purpose by providing a ZYNQ chip solidification program verification method for the foregoing electronic device 11. The ZYNQ chip solidification program verification method provided by the application is described in detail below.

[0064] Please refer to Figure 4 , Figure 4 is a flowchart of a second ZYNQ chip solidification program method provided by the application. In the application, the second ZYNQ chip solidification program method is applied to the electronic device 11, and the electronic device 11 is provided with a ZYNQ chip to be verified. At this time, the second ZYNQ chip solidification program method can include steps S310-S330.

[0065] In step S310, when the ZYNQ chip to be verified is powered on and initialized, the current chip solidification program version number of the ZYNQ chip to be verified is read, and the target program code corresponding to the processor system in the current chip solidification program of the ZYNQ chip to be verified is extracted.

[0066] In the embodiment, the step of extracting the target program code corresponding to the processor system in the current chip solidification program of the ZYNQ chip to be verified can include: For each ARM processor core of the ZYNQ chip to be verified, the program start offset address corresponding to the ARM processor core is read in the startup image file of the current chip solidification program, and the code segment size and the data segment size are read in the program size file corresponding to the ARM processor core. In the program memory for the current chip solidification program, program code extraction is performed according to the program start offset address, the code segment size and the data segment size, to obtain target program code currently actually used by the ARM processor core.

[0067] The specific step execution process of step S310 can refer to the detailed description of step S210, and will not be repeated here.

[0068] In step S320, the target program code is programmed and calculated to obtain the target program and value of the ZYNQ chip to be verified.

[0069] In the embodiment, the step of programming and calculating the target program code to obtain the target program and value of the ZYNQ chip to be verified can include: For each ARM processor core of the ZYNQ chip to be verified, the target program code corresponding to the ARM processor core is binary converted to obtain a corresponding binary program file; The binary program file is subjected to byte-level binary addition operation, and the binary addition operation result is expressed in decimal numerical value to obtain the target program and value of the ARM processor core.

[0070] The specific step execution process of step S320 can refer to the detailed description of step S220, and will not be repeated here.

[0071] In step S330, the chip solidification program version number and the target program and value are sent to the information comparison device, so that the information comparison device performs information matching verification on the chip solidification program version number and the target program and value according to the original processor system program and value of the ZYNQ chip to be verified under different solidification program versions.

[0072] Therefore, by executing steps S310-S330, the electronic device 11 can measure and calculate only the actual program and value of the PS unit associated with the currently loaded chip solidification program after the ZYNQ chip is powered on, which facilitates the information comparison device 12 to use the original processor system program and value of the recorded solidification program version in different product development stages or product delivery stages for information matching verification, thereby saving product initialization time while ensuring that the final solidification program verification result has strong reliability, facilitating product development personnel or product delivery personnel to quickly confirm the correctness of the current chip solidification program and the adaptation between the current chip solidification program and the recorded solidification program version number.

[0073] In the present application, in order to ensure that the information comparison device 12 can cooperate with the electronic device 11 to implement the ZYNQ chip solidification program verification operation with high efficiency and strong reliability, the embodiment of the present application provides a ZYNQ chip solidification program verification method which can be applied to the aforementioned information comparison device 12 to achieve the aforementioned purpose. The ZYNQ chip solidification program verification method provided by the present application will be described in detail below.

[0074] Please refer to Figure 5 , Figure 5 is a flowchart of a third ZYNQ chip solidification program method provided by the embodiment of the present application. In the embodiment of the present application, the third ZYNQ chip solidification program method is applied to the aforementioned information comparison device 12, the information comparison device 12 is in communication connection with the electronic device 11 carrying the ZYNQ chip to be verified, and the third ZYNQ chip solidification program method can include steps S410-S450.

[0075] Step S410, obtaining the chip solidification program version number and target program and value uploaded by the electronic device when the ZYNQ chip to be verified is powered on and initialized, wherein the target program and value are directly associated with the processor system of the ZYNQ chip to be verified.

[0076] Step S420, extracting the target processor system program and value corresponding to the chip solidification program version number from the pre-stored original processor system program and value of the ZYNQ chip to be verified under different solidification program versions.

[0077] Step S430, detecting whether the target processor system program and value and the target program and value are information matched.

[0078] Optionally, in one implementation manner of the embodiment, when the original processor system program and value stored by the information comparison device 12 is obtained by adding the original processor core program and value of each ARM processor core of the ZYNQ chip to be verified under the corresponding solidification program version, the step S430 can include: performing addition operation on the target program and value of each ARM processor core of the ZYNQ chip to be verified to obtain the actual processor system program and value of the ZYNQ chip to be verified at present; performing numerical comparison between the target processor system program and value and the actual processor system program and value; when the target processor system program and value and the actual processor system program and value are consistent, it is determined that the target processor system program and value and the target program and value are matched successfully, otherwise it is determined that the target processor system program and value and the target program and value are matched unsuccessfully.

[0079] Optionally, in another implementation of the embodiment, when the information comparison device 12 stores the original processor system program and values of all ARM processor cores of the ZYNQ chip to be verified, the step S430 can include: For each ARM processor core of the ZYNQ chip to be verified, the original processor core program and values corresponding to the ARM processor core are compared with the target program and values; When the original processor core program and values of all ARM processor cores of the ZYNQ chip to be verified are consistent with the target program and values, it is determined that the target processor system program and values match the target program and values successfully, otherwise it is determined that the target processor system program and values match the target program and values unsuccessfully.

[0080] In the embodiment, when the target processor system program and values match the target program and values successfully, it indicates that the current chip firmware actually loaded by the ZYNQ chip to be verified in the chip initialization process is consistent with the original chip firmware actually configured by the target recorded firmware version (i.e. the recorded firmware version pointed by the chip firmware version number), the current chip firmware is loaded correctly, and it is completely adapted to the chip firmware version number. At this time, the information comparison device 12 will correspondingly execute step S440; when the target processor system program and values match the target program and values unsuccessfully, it indicates that the current chip firmware is inconsistent with the original chip firmware actually configured by the target recorded firmware version, the current chip firmware is incorrect, and it cannot be adapted to the chip firmware version number. The current chip firmware may have unreported program modification actions while maintaining the chip firmware version number, or the current chip firmware belongs to the current loaded error chip firmware. At this time, the information comparison device 12 will correspondingly execute step S450.

[0081] Step S440, determining that the current chip firmware of the ZYNQ chip to be verified is correct.

[0082] Step S450, determining that the current chip firmware of the ZYNQ chip to be verified is incorrect.

[0083] Therefore, the information comparison device 12 can cooperate with the electronic device 11 to implement the high-efficiency and high-reliability ZYNQ chip solidification program verification operation, save the product initialization time of the electronic device 11, and facilitate the product development personnel or product delivery personnel to quickly confirm the correctness of the current chip solidification program and the adaptation between the current chip solidification program and the recorded solidification program version number.

[0084] In the embodiments of the present application, it should be understood that the disclosed apparatus and method can also be implemented by other means. The apparatus embodiments described above are only schematic, for example, the flowcharts and block diagrams in the drawings show possible implementation architectures, functions and operations of the apparatus, method and computer program product according to the embodiments of the present application. In this regard, each block in the flowcharts or block diagrams can represent a module, a program segment or a part of code, which contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur in different orders from those described in the drawings. For example, two consecutive blocks can actually be executed substantially in parallel, and sometimes they can be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and the combination of blocks in the block diagrams and / or flowcharts, can be implemented by a dedicated hardware-based system for executing the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.

[0085] In addition, the functional modules in each of the embodiments of the present application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part. When the functions are realized in the form of software function modules and sold or used as independent products, they can be stored in a readable storage medium. Based on this understanding, the technical solutions of the present application can be embodied in the form of a software product, which is stored in a readable storage medium and includes a number of instructions for causing the information comparison device 12 or the electronic device 11 carrying the ZYNQ chip to be verified to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned readable storage medium includes a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0086] The above merely provides various embodiments of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical scope disclosed by the present application, which should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method for verifying the firmware of a ZYNQ chip, characterized in that, The verification method, applied to electronic devices equipped with ZYNQ chips to be verified, includes: When the ZYNQ chip to be verified is powered on and initialized, the current chip firmware version number of the ZYNQ chip to be verified is read, and the target program code corresponding to the processor system in the current chip firmware of the ZYNQ chip to be verified is extracted. The target program code is processed and calculated to obtain the current target program and value of the ZYNQ chip to be verified. The chip firmware version number and the target program sum value are sent to the information comparison device, so that the information comparison device can perform information matching and verification between the chip firmware version number and the target program sum value based on the original processor system program sum value of the ZYNQ chip under different firmware versions.

2. The verification method according to claim 1, characterized in that, The step of extracting the target program code corresponding to the processor system in the current chip firmware of the ZYNQ chip to be verified includes: For each ARM processor core of the ZYNQ chip to be verified, the program start offset address corresponding to the ARM processor core is read from the startup image file of the current chip firmware, and the code segment size and data segment size are read from the program size file corresponding to the ARM processor core. In the program memory of the current chip firmware, the program code is extracted according to the program start offset address, the code segment size and the data segment size to obtain the target program code currently used by the ARM processor core.

3. The verification method according to claim 2, characterized in that, The step of performing program calculations on the target program code to obtain the current target program and value of the ZYNQ chip to be verified includes: For each ARM processor core of the ZYNQ chip to be verified, the target program code corresponding to that ARM processor core is converted into binary code to obtain the corresponding binary program file. Perform byte-level binary addition on the binary program file and represent the result of the binary addition in decimal to obtain the current target program and value of the ARM processor core.

4. A method for verifying the firmware of a ZYNQ chip, characterized in that, An information comparison device applied to an electronic device communicating with an electronic device equipped with a ZYNQ chip to be verified, the verification method comprising: The electronic device acquires the chip firmware version number and target program and value uploaded during the power-on initialization of the ZYNQ chip to be verified, wherein the target program and value are directly associated with the processor system of the ZYNQ chip to be verified. Extract the target processor system program and value corresponding to the firmware version number of the ZYNQ chip to be verified from the pre-stored original processor system program and values ​​of the ZYNQ chip under different firmware versions; Detect whether the target processor system program and value match the target program and value information; If the target processor system program and value are found to match the target program and value, the current chip firmware program of the ZYNQ chip to be verified is determined to be correct; otherwise, the current chip firmware program of the ZYNQ chip to be verified is determined to be incorrect.

5. The verification method according to claim 4, characterized in that, When the original processor system program and value stored in the information comparison device are obtained by adding the original processor core program and value of each of the ARM processor cores of the ZYNQ chip to be verified under the corresponding firmware version, the step of detecting whether the target processor system program and value matches the target program and value includes: The target program and value of each of the ARM processor cores of the ZYNQ chip to be verified are added together to obtain the current actual processor system program and value of the ZYNQ chip to be verified. The target processor system program and value are numerically compared with the actual processor system program and value. When the target processor system program and value are consistent with the actual processor system program and value, it is determined that the target processor system program and value matches the target program and value successfully; otherwise, it is determined that the target processor system program and value fails to match the target program and value.

6. The verification method according to claim 4, characterized in that, When the original processor system program and values ​​stored in the information comparison device include the original processor core programs and values ​​of all ARM processor cores of the ZYNQ chip to be verified under their respective firmware versions, the step of detecting whether the target processor system program and values ​​match the target program and values ​​includes: For each ARM processor core of the ZYNQ chip to be verified, the original processor core program and value corresponding to that ARM processor core are numerically compared with the target program and value. When the original processor core program and value of each of the ARM processor cores of the ZYNQ chip to be verified are consistent with the target program and value, it is determined that the target processor system program and value matches the target program and value successfully; otherwise, it is determined that the target processor system program and value fails to match the target program and value.

7. A method for verifying the firmware of a ZYNQ chip, characterized in that, An information comparison device and electronic device used in mutual communication connections, wherein the electronic device is equipped with a ZYNQ chip to be verified, and the verification method includes: When the ZYNQ chip to be verified is powered on and initialized, the electronic device reads the current chip firmware version number of the ZYNQ chip to be verified and extracts the target program code corresponding to the processor system in the current chip firmware of the ZYNQ chip to be verified. The electronic device performs programs and calculations on the target program code to obtain the current target program and value of the ZYNQ chip to be verified. The electronic device sends the chip firmware version number and the target program value to the information comparison device; The information comparison device performs information matching and verification between the chip firmware version number and the target program and value based on the original processor system program and value of the ZYNQ chip under different firmware versions.

8. The verification method according to claim 7, characterized in that, The information comparison device performs an information matching and verification step, based on the original processor system program and value of the ZYNQ chip under different firmware versions, to match and verify the firmware version number of the chip with the target program and value. This includes: Extract the target processor system program and value corresponding to the firmware version number of the ZYNQ chip to be verified from the pre-stored original processor system program and values ​​of the ZYNQ chip under different firmware versions; Detect whether the target processor system program and value match the target program and value information; If the target processor system program and value are found to match the target program and value, the current chip firmware program of the ZYNQ chip to be verified is determined to be correct; otherwise, the current chip firmware program of the ZYNQ chip to be verified is determined to be incorrect.

9. A ZYNQ chip firmware verification system, characterized in that, The verification system includes an electronic device and an information comparison device, wherein the electronic device is equipped with a ZYNQ chip to be verified, and the electronic device is communicatively connected to the information comparison device; The electronic device and the information comparison device each store a computer program and can run the computer program to implement the ZYNQ chip firmware verification method according to any one of claims 1-8.

10. A readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by an electronic device equipped with a ZYNQ chip to be verified or an information comparison device that is communicatively connected to the electronic device, it implements the ZYNQ chip firmware verification method according to any one of claims 1-8.

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