Hybrid mismatch calibration charge pump for dual-path charge pump phase-locked loop

Abstract

The invention relates to a hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop. The hybrid mismatch calibration charge pump is characterized in that high-frequency noise in reference current is filtered through a low-pass filter; the first current copying branch circuit and the second current copying branch circuit copy the filtered reference current and provide current reference for the charging branch circuit and the discharging branch circuit; the charging branch generates charging current; the discharging branch generates charging current; the coarse calibration current unit and the fine calibration current unit are used for adjusting reference current copied by the first current copy branch and the second current copy branch and providing current mismatch compensation; the operational amplifier AMP clamps the reference current after mismatch compensation and the output of the charge pump; the Schmitt trigger is connected in parallel between the power supply end of the charging branch and the output end of the charge pump, closes the charge pump when the output voltage of the charge pump exceeds a set value, and limits the output voltage of the charge pump from deviating from the center voltage. Accurate matching of charging and discharging current is achieved, the circuit is stabilized, and the performance of the charge pump is improved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of integrated circuit design, and particularly relates to a hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop. BACKGROUND

[0002] In modern integrated circuit design, communication systems continue to put forward higher performance requirements for transceiver chips, which are the core of high-quality on-chip integrated transceivers and are widely used in millimeter wave communication, SerDes and other products. The frequency stability and phase noise performance of the clock signal directly affect the overall performance of the system. With the rapid development of communication technology, there is an increasing demand for high-frequency, low-phase noise clock signals. Dual-path phase-locked loops significantly optimize the flexibility of loop parameter design by separating the proportional path and the integral path. The proportional path provides fast dynamic response, while the integral path suppresses steady-state error, which can theoretically achieve low in-band noise and wide locking range.

[0003] The dual-path architecture improves system performance while also bringing technical challenges to the matching accuracy of the charge pump current. In the locked state of the circuit, in order to eliminate the dead zone of the PFD, the charge and discharge current sources of the charge pump need to be turned on at the same time for a period of time in each cycle. If the current of the two current sources is not accurately matched, assuming l up is greater than l dn , then there will be a current of l up minus l dn charging the filter capacitor, causing the control voltage of the VCO to rise, and then causing the output frequency of the VCO to change, reducing the noise performance of the output clock. Specifically, if there is a current deviation in the charge and discharge process of the charge pumps in the proportional path and the integral path, it will cause periodic ripples in the tuning end of the voltage-controlled oscillator, significantly degrading the phase noise caused by the reference clock. More complex is that when the current mismatch of the two paths presents opposite polarity, their synergistic effect will form a charge compensation effect, further amplifying the fluctuation amplitude of the tuning voltage.

[0004] On the traditional charge pump, the occurrence of mismatch has been greatly blocked by the current replication branch and the op-amp clamping, but due to the differences in the characteristics of the UP and DN control MOS tubes and the possible non-ideal effects of the op-amp, mismatch still occurs. In view of this technical bottleneck, the current mainstream current calibration scheme has significant constraints: the digital calibration technology adjusts through binary weight current units, but its calibration accuracy is limited by the minimum achievable current resolution, causing exponential growth in circuit area and energy consumption; the analog calibration scheme, although it uses op-amps or transconductance linear circuits to achieve stepless adjustment, faces the dual difficulties of limited working interval and process angle sensitivity, and its calibration accuracy is easily affected by process fluctuations and drift. SUMMARY

[0005] To solve the problems in the background art, the application provides a hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop, comprising:

[0006] a constant current source I, a cascode current mirror, a low-pass filter, a coarse calibration current unit, a fine calibration current unit, a first current replication branch, a second current replication branch, an operational amplifier AMP, a charging branch, a discharging branch and a Schmitt trigger;

[0007] The constant current source I is used to provide a global reference current.

[0008] The reference current is first processed by the cascode current mirror to improve the output impedance and reduce the interference of the load on the reference current, and then filtered by the low-pass filter to filter out high-frequency noise in the reference current.

[0009] The first current replication branch and the second current replication branch are used to replicate the filtered reference current and provide a current reference to the charging branch and the discharging branch; the charging branch is used to generate a charging current; and the discharging branch is used to generate a charging current.

[0010] The coarse calibration current unit and the fine calibration current unit are used to adjust the reference current replicated by the first current replication branch and the second current replication branch to provide current mismatch compensation.

[0011] The non-inverting input terminal of the operational amplifier AMP is connected to the reference current node after mismatch compensation, the inverting input terminal is connected to the output terminal of the charge pump, and the output terminal of the operational amplifier AMP is connected to the current reference output terminal of the first current replication branch, which is used to clamp the reference current after mismatch compensation and the output of the charge pump.

[0012] The Schmitt trigger is connected in parallel between the power supply terminal of the charging branch and the output terminal of the charge pump, which is used to turn off the charge pump when the output voltage of the charge pump exceeds the set value, and limit the deviation of the output voltage of the charge pump from the center voltage.

[0013] The application has at least the following beneficial effects

[0014] The present application aims at the problems of VCO control voltage ripple, phase noise degradation caused by insufficient current matching precision of charge pump under the double-path architecture in the background art, and the problems of limited precision of traditional digital calibration, high area and energy consumption, limited working interval of analog calibration and process sensitivity, by setting the Cascode current mirror to improve the output impedance to reduce the interference of the load on the reference current, the low-pass filter to filter out high-frequency noise, the coarse calibration current unit and the fine calibration current unit to cooperatively realize wide-range and high-precision current mismatch compensation, the operational amplifier AMP to clamp the reference current after mismatch compensation and the charge pump output to ensure stability, and the Schmitt trigger to be used to turn off the charge pump when the output voltage of the charge pump exceeds the set value, limit the deviation of the output voltage of the charge pump from the center voltage, and finally realize accurate matching of the charging and discharging currents and stabilize the circuit, effectively improving the performance of the charge pump and overcoming the defects of the traditional calibration scheme. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 It is a schematic diagram of a hybrid mismatch calibration charge pump structure.

[0016] Figure 2 It is a schematic diagram of a Schmitt trigger structure.

[0017] Figure 3 It is a schematic diagram of control voltage ripple caused by current mismatch.

[0018] Figure 4 It is a schematic diagram of coarse and fine calibration logic control module.

[0019] Figure 5 It is a schematic diagram of a hybrid calibration process. DETAILED DESCRIPTION

[0020] The embodiments of the present application will be described in detail with specific reference to the drawings. The skilled person can easily understand other advantages and effects of the present application from the content disclosed in the specification. The present application can also be implemented or applied by means of other different specific embodiments, and the details in the specification can be modified or changed based on different views and applications without departing from the spirit of the present application. It should be noted that the diagrams provided in the following examples only illustrate the basic concept of the present application in a schematic manner, and the following examples and features in the examples can be combined with each other without conflict.

[0021] Please refer to Figures 1-5 The present application provides a hybrid mismatch calibration charge pump for a double-path charge pump phase-locked loop, comprising: a constant current source I, a Cascode current mirror, a low-pass filter, a coarse calibration current unit, a fine calibration current unit, a first current replication branch, a second current replication branch, an operational amplifier AMP, a charging branch, a discharging branch, and a Schmitt trigger.

[0022] The constant current source I is used to provide a global reference current;

[0023] The reference current is firstly processed by the Cascode current mirror to improve the output impedance and reduce the interference of the load to the reference current, and then filtered by the low-pass filter to filter out the high-frequency noise in the reference current;

[0024] The first current replication branch and the second current replication branch are used to replicate the filtered reference current and provide a current reference to the charging branch and the discharging branch; the charging branch is used to generate a charging current; and the discharging branch is used to generate a discharging current;

[0025] The coarse calibration current unit and the fine calibration current unit are used to adjust the reference current replicated by the first current replication branch and the second current replication branch, and provide current mismatch compensation;

[0026] The non-inverting input terminal of the operational amplifier AMP is connected to the reference current node after the mismatch compensation, the inverting input terminal of the operational amplifier AMP is connected to the output terminal of the charge pump, and the output terminal of the operational amplifier AMP is connected to the current reference output terminal of the first current replication branch, and is used to clamp the reference current after the mismatch compensation and the output of the charge pump;

[0027] The Schmitt trigger is connected in parallel between the power supply end of the charging branch and the output terminal of the charge pump, and is used to turn off the charge pump when the output voltage of the charge pump exceeds the set value, and limit the deviation of the output voltage of the charge pump from the center voltage.

[0028] As Figure 1As shown, in the present embodiment, by integrating constant current source I, Cascode current mirror, low-pass filter, coarse and fine calibration current units, double current replication branches, operational amplifier AMP, charge and discharge branches, and Schmitt trigger, a current mismatch calibration system with wide range and high precision is constructed. Among them, constant current source I provides global reference current, which is improved in output impedance by Cascode current mirror to reduce the interference of load on reference current, and then filtered by low-pass filter to remove high-frequency noise, providing stable and pure reference for subsequent current replication; the first and second current replication branches are responsible for replicating the processed reference current, providing current reference for the charging and discharging branches, respectively, while the coarse and fine calibration current units work together to adjust the replicated reference current to compensate for current mismatch; the operational amplifier AMP clamps the reference current node after mismatch compensation and the output end of the charge pump to ensure current stability; the Schmitt trigger is used to turn off the charge pump when the output voltage of the charge pump exceeds the set value, limiting the deviation of the output voltage of the charge pump from the center voltage. The scheme solves the problems of VCO control voltage ripple and phase noise degradation caused by insufficient current matching precision of the charge pump under the double-path architecture in the background technology, and overcomes the defects of limited precision of traditional digital calibration, high area and energy consumption, and limited working interval and process sensitivity of analog calibration. Through the cooperation of multiple components, accurate matching of charge and discharge currents and circuit stability are achieved, effectively improving the performance of the charge pump and enhancing the overall noise performance and reliability of the dual-path charge pump phase-locked loop.

[0029] Preferably, the Cascode current mirror comprises a transistor NM2 and a transistor NM3; the drain of the transistor NM2, the gate of the transistor NM2 and the output end of the constant current source I are connected and serve as the output end of the Cascode current mirror; the source of the transistor NM2 is connected to the drain of the transistor NM3; the source of the transistor NM3 is grounded; and the gate of the transistor NM3 is connected to the power supply end.

[0030] In the present embodiment, the Cascode current mirror significantly improves the output impedance through the common-source and common-gate structure of the Cascode current mirror. Higher output impedance can effectively isolate the influence of subsequent circuit load changes on the reference current, reduce the instability of the reference current caused by load fluctuations, and provide a more reliable original reference for the current replication of the entire charge pump.

[0031] Preferably, the low-pass filter comprises a resistor R and a capacitor C; one end of the resistor R is connected to the output end of the Cascode current mirror; the other end of the resistor R is connected to one end of the capacitor C and serves as the output end of the low-pass filter; and the other end of the capacitor C is grounded.

[0032] In the present embodiment, the RC low-pass filter network composed of resistor and capacitor can effectively filter out the high-frequency noise components in the reference current processed by the Cascode current mirror.

[0033] Preferably, the coarse calibration current unit comprises M coarse calibration current pieces connected in parallel; each coarse calibration current piece comprises: a transistor MN4 and a transistor NM9; the source of the transistor NM9 is connected to ground; the gate of the transistor NM9 is connected to a control signal bit<0:1>; the drain of the transistor NM9 is connected to the source of the transistor MN4; the gate of the transistor MN4 is connected to a power supply end; the drain of the transistor MN4 is an output end of the coarse calibration current piece; and the output ends of the M coarse calibration current pieces are connected to the non-inverting input end of the operational amplifier AMP.

[0034] In this embodiment, the coarse-grained adjustment of the reference current is realized by M coarse calibration current pieces connected in parallel. The control signal bit<0:1> can generate four combined states, corresponding to the opening of different numbers of coarse calibration current pieces, to quickly compensate for the current mismatch in a large step, solving the problem of possible large initial mismatch of charge and discharge currents under the double-path architecture. At the same time, the coarse calibration current unit cooperates with the subsequent fine calibration current unit to avoid the exponential growth of area and energy consumption caused by pure digital calibration on the basis of ensuring wide-range adjustment, laying a foundation for realizing high-precision current matching, effectively alleviating the VCO control voltage ripple and phase noise degradation caused by current mismatch, and improving the overall performance of the charge pump.

[0035] Preferably, the fine calibration current unit comprises Q fine calibration current pieces connected in parallel; each fine calibration current piece comprises: a transistor PM2, a transistor PM3, and a transistor PM4; the source of the transistor PM2 is connected to a power supply end; the gate of the transistor PM2 is connected to a control signal bit<2:3>; the drain of the transistor PM2 is connected to one end of a resistor R1; the other end of the resistor R1 is connected to the source of the transistor PM3; the gate of the transistor PM3 is connected to a control signal V PD ; the drain of the transistor PM3 is connected to the source of the transistor PM4; the gate of the transistor PM4 is connected to a control signal B ias ; the drain of the transistor PM4 is an output end of the fine calibration current piece; and the output ends of the Q fine calibration current pieces are connected to the non-inverting input end of the operational amplifier AMP.

[0036] In this embodiment, high-precision current regulation is achieved by the design of fine calibration current slices. The control signal bit<2:3> provides four combination states, which, in combination with the dynamic control of PM3 by the VPD signal, can achieve smaller step current regulation to compensate for the residual mismatch after coarse calibration; PM4 stabilizes the working point under the control of the Bias signal, and the resistor R1 assists in adjusting the current accuracy. Q parallel fine calibration current slices expand the regulation range, and cooperate with the coarse calibration current unit to form a hybrid calibration mechanism of "coarse tuning + fine tuning", which not only avoids the area and energy consumption explosion of pure digital calibration, but also overcomes the process sensitivity of analog calibration, significantly improves the precision and stability of current mismatch compensation, provides a guarantee for the accurate matching of charge and discharge currents, effectively alleviates the VCO control voltage ripple and phase noise degradation, and further improves the performance of the charge pump.

[0037] Preferably, the first current replication branch comprises: J first current replication slices; each first current replication slice comprises: a transistor PM5 and a transistor PM6; the source of the transistor PM5 is connected to a power supply end; the gate of the transistor PM5 is connected to a ground; the drain of the transistor PM5 is connected to the source of the transistor PM6; the gate of the transistor PM6 is used as a current reference output end of the first current replication slice; the current reference output ends of the J first current replication slices are connected to the output end of the operational amplifier AMP; the drain of the transistor PM6 is used as an input end of the first current replication slice; and the input ends of the J first current replication slices are connected to the non-inverting input end of the operational amplifier AMP.

[0038] In this embodiment, the current replication capability is enhanced by J parallel replication slices, and high-precision current transfer is achieved with the help of the closed-loop control of the operational amplifier AMP. The current mirror structure composed of PM5 and PM6 can accurately replicate the reference current after mismatch compensation under the control of the output end of the operational amplifier AMP, and provide a stable current reference for the charging branch. The clamping effect of the operational amplifier AMP on the gate of PM6 effectively eliminates the current deviation caused by the channel length modulation effect of the MOS tube, and solves the current mismatch problem caused by voltage changes in traditional current replication. In cooperation with the coarse and fine calibration current units, this branch ensures the accurate matching of the charging current and the reference current, reduces the VCO control voltage ripple caused by the charge and discharge current deviation, thereby improving the phase noise performance of the dual-path charge pump phase-locked loop, and improving the stability and reliability of the overall circuit.

[0039] Preferably, the second current copy branch comprises: K second current copy slices; each second current copy slice comprises: a transistor NM5 and a transistor NM6; the source of the transistor NM5 is connected to the drain of the transistor NM6; the source of the transistor NM6 is connected to the ground; the gate of the transistor NM6 is connected to the power supply end; the drain of the transistor NM5 is the output end of the second current copy slice; the gate of the transistor NM5 is the current reference output end of the second current copy slice; the output ends of the K second current copy slices are connected to the non-inverting input end of the operational amplifier AMP; and the current reference output ends of the K second current copy slices are connected to the output end of the low-pass filter.

[0040] In the embodiment, the replication capability of the reference current is enhanced by K parallel copy slices, and a stable current reference is provided for the discharge branch. The current mirror structure composed of the NM5 and the NM6 can accurately replicate the filtered reference current under the control of the reference current output by the low-pass filter; the gate of the NM6 is connected to the power supply end, which can stabilize the working state and reduce the interference of voltage fluctuation on current replication. At the same time, the parallel design of the K slices improves the current output capability, and the first current copy branch provides a reference for the discharge and charging branches, respectively, cooperates with the compensation effect of the coarse calibration and fine calibration current units, and effectively solves the current mismatch problem caused by process fluctuation and device characteristic difference in the traditional current replication. The branch ensures the accurate matching of the discharge current and the reference current, reduces the VCO control voltage ripple caused by the charge and discharge current deviation, thereby improving the phase noise performance of the dual-path charge pump phase-locked loop and improving the stability of the overall circuit.

[0041] Preferably, the charging branch comprises: N charging circuit slices, each charging circuit slice comprising: a transistor PM7 and a transistor PM8; the source of the transistor PM8 is connected to the power supply end; the gate of the transistor PM8 is connected to the control signal UP; the drain of the transistor PM8 is connected to the source of the transistor PM7; the gate of the transistor PM7 is the current reference input end of the charging circuit slice; the drain of the transistor PM7 is the output end of the charging circuit slice; the current reference input ends of the N charging circuit slices are connected to the output end of the operational amplifier AMP; and the output ends of the N charging circuit slices are connected to the inverting input end of the operational amplifier AMP.

[0042] In this embodiment, this structure aims to solve the problem of insufficient accuracy of matching charging current and reference current under the dual-path architecture in the background art. The adjustment range of the charging current is expanded by N parallel charging circuit fragments, and the PM7 gate receives the output signal of the operational amplifier AMP (i.e., the current reference of the first current replication branch), which ensures accurate matching of the charging current and the calibrated reference current. PM8, as a switch controlled by the UP signal, is responsible for controlling the opening and closing of the charging branch, and its cooperation with PM7 realizes the on-demand output of the charging current. The operational amplifier AMP is connected to the output end of the charging branch through the inverting input end, forming a closed-loop control, which further suppresses the current mismatch caused by device characteristic differences or process fluctuations.

[0043] Preferably, the discharging branch includes N discharging circuit fragments, each of which includes a transistor NM7 and a transistor NM8; the source of the transistor NM8 is grounded; the gate of the transistor NM8 is connected to a control signal DN; the drain of the transistor NM8 is connected to the source of the transistor NM7; the gate of the transistor NM7 serves as the current reference input end of the discharging circuit fragment; the drain of the transistor NM7 serves as the output end of the discharging circuit fragment; the current reference input ends of the N discharging circuit fragments are connected to the output end of the low-pass filter; and the output ends of the N discharging circuit fragments are connected to the inverting input end of the operational amplifier AMP.

[0044] In this embodiment, the adjustment range of the discharging current is expanded by N parallel discharging circuit fragments, and the NM7 gate receives the output signal of the low-pass filter (i.e., the purified reference current reference), which ensures accurate matching of the discharging current and the reference current. NM8, as a switch controlled by the DN signal, is responsible for controlling the opening and closing of the discharging branch, and its cooperation with NM7 realizes the on-demand output of the discharging current. The output ends of all discharging circuit fragments are connected to the inverting input end of the operational amplifier AMP, which cooperates with the closed-loop control of the operational amplifier to further suppress the current mismatch caused by device characteristic differences or process fluctuations.

[0045] It needs to be particularly pointed out that in the embodiment, the Schmitt trigger comprises: the transistor PM9, the transistor PM10, the transistor PM11, the transistor NM10, the transistor NM11 and the transistor NM12; the gate of the transistor PM9, the gate of the transistor PM10, the gate of the transistor NM12, the gate of the transistor NM10 are connected with the input end of the Schmitt trigger; the source of the transistor PM9 and the drain of the transistor NM11 are connected with the power supply end; the drain of the transistor PM9, the source of the transistor M10 and the source of the transistor PM11 are connected; the drain of the transistor PM11 is connected with the ground; the drain of the PM10 and the drain of the NM12 are connected with the output end of the Schmitt trigger; the gate of the transistor PM11 and the gate of the transistor NM11 are connected; the source of the transistor NM11, the drain of the transistor NM10 and the source of the transistor NM12 are connected; the source of the transistor NM10 is connected with the ground.

[0046] Figure 3 The adverse effects caused by the current mismatch of the charge pump are shown, when Iup and Idn are not equal, the net charge output by the charge pump will cause periodic ripples on the control voltage of the voltage-controlled oscillator; Iup and Idn respectively represent the output current (the drain of the transistor PM7) of the charging branch and the output current (the drain of the transistor NM7) of the discharging branch.

[0047] As Figure 4 shown, the connection relationship of the coarse and fine calibration logic module in the embodiment is shown; the coarse and fine calibration logic module receives an external lock signal Lock, and dynamically allocates the calibration mode according to the lock state. Among them, the coarse and fine calibration logic module receives the lock signal Lock, the output end of the coarse and fine calibration logic module is connected with the mixed calibration charge pump module and the fine calibration phase detector respectively, dynamically allocates the calibration mode according to the lock state, and coordinates the coarse and fine calibration actions. The fine calibration phase detector is used to generate a fine calibration control signal VPD according to the phase relationship of the reference clock and the feedback signal, and control the fine calibration step size. The mixed calibration process is shown in Figure 5 shown, in the lock state, the coarse calibration mode is preferentially enabled, and the relative size of Iup and Idn is judged by phase difference detection; when Iup is less than Idn, the coarse calibration unit is activated to increase the charging current by a coarse calibration step size; when Iup is greater than Idn, the fine calibration mode is triggered, the fine calibration current step size is adjusted and the fine calibration is completed; after the calibration is completed, the control code is frozen and the calibration logic power supply is turned off.

[0048] The present application aims at the problems of VCO control voltage ripple, phase noise degradation caused by insufficient current matching precision of charge pump under the double-path architecture in the background art, and the problems of limited precision of traditional digital calibration, high area and energy consumption, limited working interval of analog calibration and process sensitivity, the output impedance is improved by setting Cascode current mirror to reduce the interference of load on the reference current, the low-pass filter filters out high-frequency noise, the coarse calibration current unit and the fine calibration current unit cooperatively realize wide-range and high-precision current mismatch compensation, the operational amplifier AMP clamps the reference current after mismatch compensation and the output of the charge pump to ensure stability, the Schmitt trigger prevents entering the area of too large VCO gain to avoid the influence of amplifying current mismatch, and finally the accurate matching of charging and discharging current and the stability of the circuit are realized, the performance of the charge pump is effectively improved, and the defects of the traditional calibration scheme are overcome.

[0049] Finally, it should be pointed out that the above embodiments are only used to illustrate the technical solutions of the present application and not to limit it, although the present application has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present application can be modified or replaced equivalently without departing from the purpose and scope of the technical solutions, which should be covered in the scope of the claims of the present application.

Claims

1. A hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop, the charge pump comprising: Comprise: Constant current source I, Cascode current mirror, low pass filter, coarse calibration current unit, fine calibration current unit, first current copy branch, second current copy branch, operational amplifier AMP, charging branch, discharging branch and Schmitt trigger; The constant current source I is used to provide a global reference current; The reference current is first processed by the Cascode current mirror to improve the output impedance and reduce the interference of the load on the reference current; Then the low pass filter is used to filter out high frequency noise in the reference current; The first current copy branch and the second current copy branch are used to copy the filtered reference current and provide current reference to the charging branch and the discharging branch; The charging branch is used to generate charging current; the discharging branch is used to generate charging current; The coarse calibration current unit and the fine calibration current unit are used to adjust the reference current copied by the first current copy branch and the second current copy branch to provide current mismatch compensation; The non-inverting input terminal of the operational amplifier AMP is connected to the reference current node after mismatch compensation, the inverting input terminal is connected to the output terminal of the charge pump, and the output terminal of the operational amplifier AMP is connected to the current reference output terminal of the first current copy branch, which is used to clamp the reference current after mismatch compensation and the output of the charge pump; The Schmitt trigger is connected in parallel between the power supply end of the charging branch and the output terminal of the charge pump, which is used to turn off the charge pump when the output voltage of the charge pump exceeds the set value, and limit the deviation of the output voltage of the charge pump from the center voltage.

2. The hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop of claim 1, wherein, The Cascode current mirror comprises a transistor NM2 and a transistor NM3; the drain of the transistor NM2, the gate of the transistor NM2 and the output terminal of the constant current source I are connected and serve as the output terminal of the Cascode current mirror; the source of the transistor NM2 is connected to the drain of the transistor NM3; the source of the transistor NM3 is grounded; and the gate of the transistor NM3 is connected to the power supply end.

3. The hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop of claim 1, wherein, The low pass filter comprises a resistor R and a capacitor C; one end of the resistor R is connected to the output terminal of the Cascode current mirror; the other end of the resistor R is connected to one end of the capacitor C and serves as the output terminal of the low pass filter; and the other end of the capacitor C is grounded.

4. The hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop of claim 1, wherein, The coarse calibration current unit comprises M coarse calibration current pieces connected in parallel; Each coarse calibration current piece comprises a transistor MN4 and a transistor NM9; the source of the transistor NM9 is grounded; the gate of the transistor NM9 is connected to a control signal bit<0:1>; the drain of the transistor NM9 is connected to the source of the transistor MN4; the gate of the transistor MN4 is connected to the power supply end; the drain of the transistor MN4 serves as the output terminal of the coarse calibration current piece; and the output terminals of the M coarse calibration current pieces are connected to the non-inverting input terminal of the operational amplifier AMP.

5. The hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop of claim 1, wherein, The fine calibration current unit comprises Q fine calibration current pieces in parallel; each fine calibration current piece comprises a transistor PM2, a transistor PM3 and a transistor PM4; the source of the transistor PM2 is connected to a power supply end; the gate of the transistor PM2 is connected to a control signal bit<2:3>; the drain of the transistor PM2 is connected to one end of a resistor R1; the other end of the resistor R1 is connected to the source of the transistor PM3; the gate of the transistor PM3 is connected to a control signal V PD ; the drain of the transistor PM3 is connected to the source of the transistor PM4; the gate of the transistor PM4 is connected to a control signal B ias ; the drain of the transistor PM4 is used as an output end of the fine calibration current piece; and the output ends of the Q fine calibration current pieces are connected to the non-inverting input end of an operational amplifier AMP.

6. The hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop of claim 1, wherein, The first current copy branch comprises J first current copy slices, each of which comprises a transistor PM5 and a transistor PM6; the source of the transistor PM5 is connected to a power supply end; the gate of the transistor PM5 is connected to a ground; the drain of the transistor PM5 is connected to the source of the transistor PM6; the gate of the transistor PM6 is a current reference output end of the first current copy slice; the current reference output ends of the J first current copy slices are connected to the output end of the operational amplifier AMP; the drain of the transistor PM6 is an input end of the first current copy slice; and the input ends of the J first current copy slices are connected to the non-inverting input end of the operational amplifier AMP.

7. The hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop of claim 1, wherein, The second current copy branch comprises K second current copy slices, each of which comprises a transistor NM5 and a transistor NM6; the source of the transistor NM5 is connected to the drain of the transistor NM6; the source of the transistor NM6 is connected to a ground; the gate of the transistor NM6 is connected to a power supply end; the drain of the transistor NM5 is an output end of the second current copy slice; the gate of the transistor NM5 is a current reference output end of the second current copy slice; the output ends of the K second current copy slices are connected to the non-inverting input end of the operational amplifier AMP; and the current reference output ends of the K second current copy slices are connected to the output end of the low-pass filter.

8. The hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop of claim 1, wherein, The charging branch comprises N charging circuit slices, each of which comprises a transistor PM7 and a transistor PM8; the source of the transistor PM8 is connected to a power supply end; the gate of the transistor PM8 is connected to a control signal UP; the drain of the transistor PM8 is connected to the source of the transistor PM7; the gate of the transistor PM7 is a current reference input end of the charging circuit slice; the drain of the transistor PM7 is an output end of the charging circuit slice; the current reference input ends of the N charging circuit slices are connected to the output end of the operational amplifier AMP; and the output ends of the N charging circuit slices are connected to the inverting input end of the operational amplifier AMP.

9. The hybrid mismatch calibration charge pump for a dual-path charge pump phase-locked loop of claim 1, wherein, The discharging branch comprises N discharging circuit slices, each of which comprises a transistor NM7 and a transistor NM8; the source of the transistor NM8 is connected to a ground; the gate of the transistor NM8 is connected to a control signal DN; the drain of the transistor NM8 is connected to the source of the transistor NM7; the gate of the transistor NM7 is a current reference input end of the discharging circuit slice; the drain of the transistor NM7 is an output end of the discharging circuit slice; the current reference input ends of the N discharging circuit slices are connected to the output end of the low-pass filter; and the output ends of the N discharging circuit slices are connected to the inverting input end of the operational amplifier AMP.

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