Anodic bonding method

Abstract

The invention provides an anodic bonding method, and belongs to the technical field of anodic bonding. The method comprises the steps that a first substrate and a second substrate are provided, and the first substrate is a silicon-based substrate with a multi-layer structure and comprises a dielectric layer and a silicon layer formed on the dielectric layer; the first substrate and the second substrate are aligned in the vertical direction, so that the silicon layer of the first substrate faces the to-be-deposited surface of the second substrate, and a preset distance is formed between the silicon layer and the to-be-deposited surface of the second substrate; performing vacuum ion activation on the first substrate to enable the silicon atoms to be in an activated state so as to enable the silicon atoms to be deposited on the to-be-deposited surface of the second substrate, and forming a silicon thin film on the surface of the second substrate; laminating the first substrate and the second substrate on which the silicon thin film is formed to obtain a pre-bonding structure; and carrying out bonding treatment on the pre-bonding structure by adopting an anodic bonding process. According to the method, the problem that the bonding strength is reduced due to the electric field shielding effect when the existing anodic bonding technology faces a multi-layer silicon-based structure containing a dielectric layer is solved, and the anodic bonding quality is effectively improved.

Description

Technical Field

[0001] This invention relates to the field of anodic bonding technology, and more particularly to an anodic bonding method. Background Technology

[0002] Anodic bonding is a key technology widely used in microelectronic packaging, microelectromechanical systems (MEMS) manufacturing, and semiconductor device packaging. It is primarily used to tightly bond glass sheets to silicon wafers or other materials. The core of this technology lies in utilizing an electrochemical reaction to induce a strong chemical bond between the glass sheet and the silicon wafer under high temperature and high electric field conditions. However, when the substrate material contains a dielectric film thicker than 10 μm, significant electric field losses occur during the bonding process, resulting in a low electric field strength between the substrate materials and hindering effective bonding.

[0003] Existing technologies improve bond strength through optimizing bonding parameters, plasma treatment, or oxide film deposition. However, these methods often require higher voltages and temperatures, which not only increases process complexity but can also lead to dielectric breakdown, triggering uncontrolled ion migration and ultimately damaging the device. Furthermore, high-temperature treatments can adversely affect some temperature-sensitive materials or device structures, increasing the risk of thermal stress and deformation. Meanwhile, while surface treatments such as plasma treatment can improve bond quality, they require sophisticated equipment and involve complex processes that are difficult to control precisely. More critically, existing technologies are prone to voids or gaps at the bonding interface, severely impacting bond quality and reliability.

[0004] Therefore, there is an urgent need for an improved anodic bonding method that can effectively reduce electric field losses, lower the voltage and temperature required for bonding, simplify process steps, avoid dielectric breakdown and excessive thermal stress when processing silicon wafers containing thick dielectric films, and ensure that the bonding interface is free of voids or gaps, thereby significantly improving bonding quality and reliability. Summary of the Invention

[0005] To address the above problems, the present invention provides an anodic bonding method, comprising the following steps: A first substrate and a second substrate are provided, wherein the first substrate is a silicon-based substrate having a multilayer structure, including a dielectric layer and a silicon layer formed on the dielectric layer; Align the first substrate and the second substrate in the vertical direction, so that the silicon layer of the first substrate faces the surface to be deposited on the second substrate, and there is a preset distance between them; The first substrate is subjected to vacuum ion activation treatment to activate the silicon atoms in the silicon layer of the first substrate, so that the silicon atoms in the silicon layer are deposited onto the surface of the second substrate to be deposited, thereby forming a silicon thin film on the surface of the second substrate. The first substrate and the second substrate on which a silicon thin film is formed are pressed together to obtain a pre-bonded structure; The pre-bonded structure is bonded using an anodic bonding process to obtain the bonded structure.

[0006] Optionally, the activation voltage of the vacuum ion activation treatment is any value between 1.5kV and 2.5kV, the activation current is any value between 100mA and 150mA, and the activation time is any value between 300s and 1000s.

[0007] Optionally, the vacuum ion activation treatment is performed in a vacuum chamber with a vacuum level of 0.1 × 10⁻⁶. -6 pa-1×10 -6 For any value in pa, an inert gas is used as the working gas during the vacuum ion activation process.

[0008] Optionally, the thickness of the silicon thin film is any value between 5 nm and 20 nm.

[0009] Optionally, in the step of pressing the first substrate and the second substrate with the silicon thin film formed thereon together to obtain the pre-bonded structure, the pressing conditions are: any value of temperature between 20℃ and 30℃, and any value of pressure between 10kN and 30kN.

[0010] Optionally, the pressing is performed in the vacuum chamber.

[0011] Optionally, the preset spacing is any value between 120mm and 140mm.

[0012] Optionally, the process parameters for anodic bonding are: bonding temperature of any value between 300℃ and 400℃, bonding voltage of any value between 500V and 1200V, bonding pressure of any value between 6kN and 10kN, and discharge time of any value between 5min and 15min.

[0013] Optionally, the thickness of the dielectric layer in the first substrate is greater than 10 μm, and the second substrate is glass.

[0014] According to the present invention, a pre-bonding step is introduced before anodic bonding. This involves using vacuum ion activation treatment to activate silicon atoms in the silicon layer of the first substrate, allowing them to directly deposit onto the surface of the second substrate to form a silicon thin film, thus achieving pre-bonding of the two substrates. This pre-bonding step differs from the traditional anodic bonding process, which relies on the direct reaction between oxygen ions on the glass surface and the silicon substrate, and offers significant technical advantages. First, vacuum ion activation treatment activates silicon atoms on the surface of the first substrate under high-energy ion bombardment, causing them to be directionally deposited onto the surface of the second substrate, forming a dense, continuous silicon-rich thin film in situ. This silicon film effectively fills the micro-nano gaps between the two substrates, reducing the risk of voids and debonding caused by surface unevenness or local depressions in traditional lamination processes, thereby improving the density and uniformity of the interface bonding. Furthermore, compared to existing anodic bonding techniques that suffer from reduced bonding strength due to electric field shielding effects when dealing with multilayer silicon-based structures containing dielectric layers, this invention, through the introduction of a pre-bonded silicon film, establishes auxiliary conductive channels and active reaction layers between the substrates. This effectively enhances the range of the interfacial electric field and the bonding reaction activity, significantly improving the bonding strength and reliability in thick-film structures. This method achieves superior bonding quality without sacrificing additional temperature or voltage parameters. Attached Figure Description

[0015] Figure 1 A schematic diagram of an anodic bonding method according to an embodiment of the present invention is shown. Detailed Implementation

[0016] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, it should be noted that, for ease of description, only the parts relevant to this application are shown in the accompanying drawings, not the entire structure. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of this application.

[0017] The terms “comprising” and “having”, and any variations thereof, used in this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0018] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0019] Figure 1 A schematic diagram of an anodic bonding method according to an embodiment of the present invention is shown. Figure 1 As shown, in one embodiment, the anodic bonding method includes the following steps: S1, providing a first substrate and a second substrate, the first substrate being a silicon-based substrate with a multilayer structure, including a dielectric layer and a silicon layer formed on the dielectric layer.

[0020] S2, Align the first substrate and the second substrate in the vertical direction, so that the silicon layer of the first substrate faces the surface to be deposited on the second substrate, and there is a preset distance between them.

[0021] S3, perform vacuum ion activation treatment on the first substrate to activate the silicon atoms in the silicon layer of the first substrate, so that the silicon atoms in the silicon layer can be deposited onto the surface of the second substrate to be deposited, thereby forming a silicon thin film on the surface of the second substrate.

[0022] S4, the first substrate and the second substrate with the silicon thin film formed are pressed together to obtain a pre-bonded structure.

[0023] S5, the pre-bonded structure is bonded using an anodic bonding process to obtain the bonded structure.

[0024] According to the present invention, a pre-bonding step is introduced before anodic bonding. This involves using vacuum ion activation treatment to activate silicon atoms in the silicon layer of the first substrate, allowing them to directly deposit onto the surface of the second substrate to form a silicon thin film, thus achieving pre-bonding of the two substrates. This pre-bonding step differs from the traditional anodic bonding process, which relies on the direct reaction between oxygen ions on the glass surface and the silicon substrate, and offers significant technical advantages. First, vacuum ion activation treatment activates silicon atoms on the surface of the first substrate under high-energy ion bombardment, causing them to be directionally deposited onto the surface of the second substrate, forming a dense, continuous silicon-rich thin film in situ. This silicon film effectively fills the micro-nano gaps between the two substrates, reducing the risk of voids and debonding caused by surface unevenness or local depressions in traditional lamination processes, thereby improving the density and uniformity of the interface bonding. Furthermore, compared to existing anodic bonding techniques that suffer from reduced bonding strength due to electric field shielding effects when dealing with multilayer silicon-based structures containing dielectric layers, this invention, through the introduction of a pre-bonded silicon film, establishes auxiliary conductive channels and active reaction layers between the substrates. This effectively enhances the range of the interfacial electric field and the bonding reaction activity, significantly improving the bonding strength and reliability in thick-film structures. This method achieves superior bonding quality without sacrificing additional temperature or voltage parameters.

[0025] In step S1, the thickness of the dielectric layer in the first substrate is greater than 10 μm, for example, it can be 11 μm, 15 μm, 20 μm, or 25 μm. In the anodic bonding process, when the dielectric layer thickness is greater than 10 μm, the electric field will be significantly attenuated as it passes through the dielectric layer, resulting in a decrease in the electric field strength reaching the bonding interface and affecting the bonding effect. In one embodiment, the second substrate is glass. In the anodic bonding process, alkali metal ions in the glass migrate towards the anode, forming a depletion layer. Oxygen ions in the depletion layer react with silicon to generate silicon dioxide, achieving tight bonding between the substrates through chemical bonds. It should be explained that the depletion layer is an alkali metal ion-deficient layer.

[0026] In step S2, the first substrate and the second substrate have a predetermined spacing in the vertical direction. In one embodiment, the predetermined spacing is any value between 120mm and 140mm, for example, 120mm, 125mm, 130mm, 135mm, or 140mm. When the predetermined spacing is less than 120mm, the sputtered silicon atoms may concentrate in the central region of the second substrate, resulting in insufficient film thickness in the edge regions; when the predetermined spacing is greater than 140mm, the sputtered silicon atoms may scatter or be lost before reaching the second substrate, resulting in uneven film thickness. Within this range, it can be ensured that the sputtered silicon atoms can be uniformly deposited on the surface of the second substrate.

[0027] In step S3, the vacuum ion activation process is performed in a vacuum chamber using an inert gas as the working gas, such as argon, helium, or xenon. The inert gas is ionized under high vacuum conditions to form a stable plasma, which generates high-energy ions that activate silicon atoms. In one embodiment, the vacuum level of the vacuum chamber is 0.1 × 10⁻⁶. - 6 pa-1×10 -6 Any value in pa, for example, can be 0.1 × 10 -6 pa, 0.5×10 -6 pa or 1×10 -6 The vacuum level in the vacuum chamber is within this range, which ensures that the sputtered silicon film is in an activated state and is not oxidized by the air outside the chamber, while also ensuring the best transmission efficiency and focusing effect of the ion beam, so that the sputtered silicon atoms uniformly cover the surface of the second substrate.

[0028] In one embodiment, the activation voltage for vacuum ion activation processing is any value between 1.5kV and 2.5kV, for example, 1.5kV, 2kV, or 2.5kV. When the activation voltage is below 1.5kV, the energy of the ion beam is insufficient to effectively activate silicon atoms, resulting in low sputtering efficiency and uneven film thickness. When the activation voltage is above 2.5kV, the ion beam energy is too high, causing excessive bombardment of the silicon wafer surface, increasing surface damage, and affecting film quality. The activation current is any value between 100mA and 150mA, for example, 100mA, 110mA, 120mA, 125mA, 130mA, 140mA, or 145mA. Within this range, the activation current ensures that the ion beam has sufficient energy and density to effectively activate silicon atoms and promote their sputtering, while ensuring that the sputtered silicon film has high uniformity. The activation time can be any value between 300s and 1000s, such as 300s, 400s, 600s, 650s, 800s, or 1000s. When the activation time is less than 300s, the number of sputtered silicon atoms is insufficient, resulting in an excessively thin film and affecting bonding quality. When the activation time is greater than 1000s, it increases production costs and causes excessive bombardment of the silicon wafer surface, also affecting film quality.

[0029] In one embodiment, the thickness of the silicon thin film in the second substrate formed in step S3 is any value between 5nm and 20nm, for example, 5nm, 10nm, 12.5nm, 15nm, or 20nm. Within this range, it is possible to ensure uniform silicon film coverage, reduce voids and gaps at the bonding interface, and ensure strong adhesion between the silicon thin film and the second substrate.

[0030] In step S4, the pressing conditions are as follows: The temperature is any value between 20℃ and 30℃, for example, 20℃, 25℃, or 30℃. Pressing at room temperature effectively avoids thermal expansion and stress caused by high temperatures, which could affect the quality of the bonding interface. The pressure is any value between 10kN and 30kN, for example, 10kN, 15kN, or 30kN. Within this pressure range, close contact between the substrates is ensured, avoiding voids and gaps at the bonding interface, and improving the uniformity and reliability of the bonding. In one embodiment, pressing is performed within the aforementioned vacuum chamber. Pressing within this vacuum chamber ensures that the sputtered silicon film is in an activated state for effective pre-bonding and prevents oxidation by air, which could lead to bonding failure.

[0031] In step S5, the process parameters for anodic bonding are as follows: bonding temperature is any value between 300℃ and 400℃, for example, 300℃, 350℃, or 400℃; bonding voltage is any value between 500V and 1200V, for example, 500V, 600V, 700V, 800V, 850V, 900V, 1000V, 1100V, or 1200V; bonding pressure is any value between 6kN and 10kN, for example, 6kN, 8kN, or 10kN; and discharge time is any value between 5min and 15min, for example, 5min, 10min, or 15min. Since the two substrates have been pre-bonded in the preceding steps, effective bonding of the substrates can be achieved in the anodic bonding process by using the above-mentioned parameter ranges for bonding voltage, bonding temperature, and bonding pressure.

[0032] Example 1 Embodiment 1 of the present invention provides an anodic bonding method, comprising the following steps: (1) The first substrate is a silicon substrate with a silicon / silicon dioxide / silicon structure, and the second substrate is glass. The thickness of the silicon dioxide is 15 μm.

[0033] (2) The first and second substrates are placed into the vacuum chamber and aligned vertically, with a predetermined distance of 130 mm between them. The vacuum level of the chamber is 1 × 10⁻⁶. -6 Pa.

[0034] (3) The silicon atoms in the silicon layer of the first substrate are activated by high vacuum ion activation through the activation unit inside the chamber, and the silicon atoms in the silicon layer are deposited onto the glass surface. The activation voltage of the vacuum ion activation process is 2kV, the activation current is 125mA, and the activation time is 650s.

[0035] (4) The first substrate is pressed together with the glass to obtain a pre-bonded structure. The pressing temperature is 25°C and the pressing pressure is 15kN.

[0036] (5) The above pre-bonded structure is subjected to anodic bonding treatment to obtain a bonded structure. The process parameters for anodic bonding treatment are: bonding temperature of 400℃, bonding voltage of 1200V, bonding pressure of 8kN, and discharge time of 10min.

[0037] Comparative Example 1 Comparative Example 1 provides an anodic bonding method, including the following steps: (1) The first substrate is a silicon substrate with a silicon / silicon dioxide / silicon structure, and the second substrate is glass. The thickness of the silicon dioxide is 15 μm.

[0038] (2) The above substrate is subjected to anodic bonding treatment to obtain a bonded structure. The process parameters for anodic bonding treatment are: bonding temperature of 420℃, bonding voltage of 1500V, bonding pressure of 8kN, and discharge time of 10min.

[0039] Table 1 below shows the conduction current at the bonding interface in the anodic bonding methods provided in Example 1 and Comparative Example 1.

[0040] Table 1 sample On-state current (mA) Example 1 8-12 Comparative Example 1 3-4 Table 1 above shows the conduction current fluctuation data obtained during the bonding process by monitoring the current at the bonding interface. Table 1 shows that, compared to Comparative Example 1, Embodiment 1 of the present invention has a higher conduction current. This indicates that the anodic bonding method provided in Embodiment 1 improves the electronic conduction during the bonding process through a pre-bonding process, avoiding the attenuation of the electric field as it passes through the dielectric layer when the dielectric layer thickness is greater than 10 μm, which would reduce the electric field strength reaching the bonding interface and affect the bonding effect. Furthermore, compared to Embodiment 1, Comparative Example 1 used higher anodic bonding voltage and temperature in the anodic bonding process, while Embodiment 1 used conventional anodic bonding process conditions. This demonstrates that the anodic bonding method provided by the present invention can achieve superior bonding quality without sacrificing additional temperature or voltage parameters.

[0041] In summary, this invention introduces a pre-bonding step before anodic bonding, employing vacuum ion activation treatment to activate silicon atoms on the surface of the first substrate under high-energy ion bombardment. These atoms then directionally deposit onto the surface of the second substrate, forming a dense, continuous silicon-rich thin film in situ. This silicon film effectively fills the micro-nano gaps between the two substrates, reducing the risk of voids and debonding caused by surface unevenness or local depressions in traditional lamination processes, thereby improving the density and uniformity of the interfacial bonding. Furthermore, compared to existing anodic bonding technologies that suffer from reduced bonding strength due to electric field shielding effects in multilayer silicon-based structures containing dielectric layers, this invention, through the introduction of the pre-bonded silicon film, establishes auxiliary conductive channels and an active reaction layer between the substrates, effectively increasing the range of the interfacial electric field and the bonding reaction activity, significantly enhancing the bonding strength and reliability in thick-film structures. This method achieves superior bonding quality without sacrificing additional temperature or voltage parameters.

[0042] The above is only one specific implementation of this application, and any other improvements made based on the concept of this application shall be considered within the scope of protection of this application.

Claims

1. An anodic bonding method, characterized in that, Includes the following steps: A first substrate and a second substrate are provided, wherein the first substrate is a silicon-based substrate having a multilayer structure, including a dielectric layer and a silicon layer formed on the dielectric layer; Align the first substrate and the second substrate in the vertical direction, so that the silicon layer of the first substrate faces the surface to be deposited on the second substrate, and there is a preset distance between them; The first substrate is subjected to vacuum ion activation treatment to activate the silicon atoms in the silicon layer of the first substrate, so that the silicon atoms in the silicon layer are deposited onto the surface of the second substrate to be deposited, thereby forming a silicon thin film on the surface of the second substrate. The first substrate and the second substrate on which a silicon thin film is formed are pressed together to obtain a pre-bonded structure; The pre-bonded structure is bonded using an anodic bonding process to obtain the bonded structure.

2. The anodic bonding method according to claim 1, characterized in that, The activation voltage of the vacuum ion activation treatment is any value between 1.5kV and 2.5kV, the activation current is any value between 100mA and 150mA, and the activation time is any value between 300s and 1000s.

3. The anodic bonding method according to claim 2, characterized in that, The vacuum ion activation treatment is performed in a vacuum chamber with a vacuum level of 0.1 × 10⁻⁶. -6 pa-1×10 -6 For any value in pa, an inert gas is used as the working gas during the vacuum ion activation process.

4. The anodic bonding method according to claim 3, characterized in that, The thickness of the silicon thin film is any value between 5nm and 20nm.

5. The anodic bonding method according to any one of claims 1-4, characterized in that, In the step of pressing the first substrate and the second substrate with the silicon thin film formed thereon together to obtain the pre-bonded structure, the pressing conditions are: any value of temperature between 20℃ and 30℃, and any value of pressure between 10kN and 30kN.

6. The anodic bonding method according to claim 5, characterized in that, The pressing is performed in the vacuum chamber.

7. The anodic bonding method according to any one of claims 1-4 and 6, characterized in that, The preset spacing is any value between 120mm and 140mm.

8. The anodic bonding method according to any one of claims 1-4 and 6, characterized in that, The process parameters for anodic bonding are as follows: bonding temperature is any value between 300℃ and 400℃, bonding voltage is any value between 500V and 1200V, bonding pressure is any value between 6kN and 10kN, and discharge time is any value between 5min and 15min.

9. The anodic bonding method according to any one of claims 1-4 and 6, characterized in that, The thickness of the dielectric layer in the first substrate is greater than 10 μm, and the second substrate is glass.

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