Gate leakage current model of MOS device
By introducing a function with gate-substrate voltage Vgb, gate oxide thickness tox, and temperature as independent variables, a gate leakage current model for MOS devices is described, which solves the problem of insufficient fitting accuracy in the depletion region and improves device performance and reliability.
Patent Information
- Application Number
- CN202511050201.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-29
- Publication Date
- 2025-11-21
AI Technical Summary
In the existing technology, the gate leakage current model of traditional MOS devices has insufficient fitting accuracy in the depletion region, which affects the device performance and reliability.
A gate leakage current model for MOS devices is provided. By introducing a function with gate-substrate voltage Vgb, gate oxide thickness tox, and temperature as independent variables, the difference in gate leakage current Igate between the accumulation and depletion regions is described, thereby improving the fitting accuracy.
It achieves good fitting accuracy in both the accumulation and depletion regions, solves the problem of insufficient accuracy of traditional models in the depletion region, and improves device performance and reliability.
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Figure CN120994926A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of semiconductor integrated circuit manufacturing, and specifically to a gate leakage current model of a MOS device. Background Technology
[0002] As semiconductor process nodes continue to shrink and gate oxide thickness decreases, gate leakage current increases significantly. In traditional MOS varactor diodes, gate leakage current has become one of the key factors affecting device performance and reliability.
[0003] Currently, the results of traditional gate leakage current models are typically as follows: Figure 1 As shown, it can be observed that the simulated curves only have a good alignment effect in the accumulation region on the right, while it is difficult to obtain sufficient model accuracy in the depletion region on the left. Summary of the Invention
[0004] This application provides a gate leakage current model for a MOS device, which can improve the fitting accuracy of the gate leakage current in the depletion region.
[0005] This application provides a gate leakage current model for a MOS device, and the expression for the gate leakage current model is as follows: ; Among them, the It is a function with the gate-substrate voltage Vgb as the independent variable, used to describe the trend of gate leakage current Igate as a function of gate-substrate voltage Vgb. The It is a function with the gate-substrate voltage Vgb and the gate oxide thickness tox of the device as independent variables, used to describe the difference in gate leakage current Igate between the accumulation region and the depletion region; The It is a temperature compensation function with the current temperature T as the independent variable.
[0006] In some embodiments, the The expression is: ; Wherein, Vge1 is an empirical coefficient used to adjust the nonlinear intensity.
[0007] In some embodiments, the The expression is: ; Wherein, the Vge0 is the amplitude coefficient of the leakage current, the Vgep0 is the exponential coefficient of the gate-substrate voltage Vgb, the Vgep1 is the exponential coefficient of the gate oxide layer thickness, the Vgep1tox is the power coefficient of the oxide layer thickness, and the area is the gate area.
[0008] In some embodiments, the Vge1 is extracted by the following steps: The expression is: ; Wherein, the tc1vg is the first-order temperature coefficient of the gate voltage, the T is the given reference temperature, and the T is the current temperature.
[0009] In some embodiments, the Vge1 is extracted by the following steps: Obtaining test data for the MOS device, the test data including the measured variation curve of the gate leakage current Igate with the gate-substrate voltage Vgb at a fixed gate oxide layer thickness tox and a fixed temperature; Based on the test data, the empirical coefficient Vge1 is fitted.
[0010] In some embodiments, the Vge0, Vgep0, Vgep1, Vgep1tox are extracted by the following steps: Obtaining test data for the MOS device, the test data including: the measured variation data of the gate leakage current Igate with the gate-substrate voltage Vgb at a fixed gate oxide layer thickness tox; and the measured variation data of the gate leakage current Igate with the gate oxide layer thickness tox at a fixed gate-substrate voltage Vgb; Based on the measured variation data of the gate leakage current Igate with the gate-substrate voltage Vgb at a fixed gate oxide layer thickness tox, the Vgep0 is extracted; Based on the measured variation data of the gate leakage current Igate with the gate oxide layer thickness tox at a fixed gate-substrate voltage Vgb, the Vgep1 and Vgep1tox are extracted; Based on the extracted Vgep0, Vgep1 and Vgep1tox, the Vge0 is obtained.
[0011] In some embodiments, the tc1vg is extracted by the following steps: Obtaining test data for the MOS device, the test data including the measured data of the gate leakage current Igate at different temperatures; Based on the test data, the tc1vg is fitted.
[0012] In some embodiments, the gate leakage current model is applied to the MOS varactor diode.
[0013] The technical solution of this application has at least the following advantages: 1. This application provides a gate leakage current model for a MOS device, by introducing... This model can describe the difference in gate leakage current (Igate) between the accumulation and depletion regions, enabling the output of the gate leakage current model to have good fitting accuracy in both the accumulation and depletion regions, thus solving the problem of insufficient model accuracy in the depletion region of existing gate leakage current models. Attached Figure Description
[0014] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0015] Figure 1 This is a comparison chart of the running results of the traditional gate leakage current model provided in the background art of this application and the actual test results.
[0016] Figure 2.1 This is an exemplary embodiment provided by this application for demonstrating Trend chart of Vgb variation.
[0017] Figure 2.2 This is an exemplary embodiment provided by this application for demonstrating Trend chart of Vgb variation.
[0018] Figure 3 This is an exemplary embodiment provided by this application for demonstrating Trend chart of Vgb variation.
[0019] Figure 4 This is a comparison chart provided by an exemplary embodiment of this application, illustrating the running results of a gate leakage current model of a MOS device and the actual test results. Detailed Implementation
[0020] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0021] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third" are only for descriptive purposes and cannot be understood as indicating or implying relative importance.
[0022] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connection" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements, or it can be wireless connection, or it can be wired connection. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0023] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as there is no conflict.
[0024] The present application provides a gate leakage current model of a MOS device, which can be applied to a MOS varactor. The expression of the gate leakage current model is: .
[0025] Wherein, is a function formula with gate-substrate voltage Vgb as the independent variable, which is used to describe the trend of gate leakage current Igate with gate-substrate voltage Vgb. is a function formula with gate-substrate voltage Vgb and gate oxide layer thickness tox of the device as the independent variable, which is used to describe the difference between the accumulation region and the depletion region of the gate leakage current Igate. is a temperature compensation function with the current temperature T as the independent variable.
[0026] Further, the expression of the above is: .
[0027] Wherein, Vge1 is an empirical coefficient for adjusting the nonlinearity strength, which can be obtained by extracting the test data of the MOS tube. is a function of the gate-substrate voltage Vgb, which is used to describe the trend of the gate leakage current Igate with the gate-substrate voltage Vgb. Referring to Figure 2.1 , which shows the trend of Igate with Vgb. Figure 2.2 , which shows the trend of Igate with Vgb.
[0028] Further, the expression of the above-mentioned is as follows: .
[0029] wherein Vge0 is the amplitude coefficient of the leakage current, which can be in A / μm2, Vgep0 is the exponential coefficient of the gate-substrate voltage Vgb, which can be in V⁻¹, Vgep1 is the exponential coefficient of the gate oxide thickness, which can be in nm⁻¹, Vgep1tox is the power coefficient of the oxide thickness, and area is the gate area. In the above formula, can describe the exponential effect of the gate-substrate voltage Vgb on the gate leakage current Igate, can describe the exponential effect of the gate oxide thickness tox on the gate leakage current Igate. By introducing , the gate leakage current curve output by the gate leakage current model in the present application has good fitting accuracy not only in the accumulation region but also in the depletion region. Referring to Figure 3 , which shows the trend of Igate with Vgb.
[0030] Further, the expression of the temperature compensation function is as follows: .
[0031] wherein tc1vg is the first-order temperature coefficient of the gate voltage, which can be in % / °C. T is the current temperature, and Tref is the given reference temperature. For example, the reference temperature may be 25°C.
[0032] Further, each coefficient in the above-mentioned gate leakage current model can be extracted from the actual test data of the MOS transistor.
[0033] Further, the extraction method of the empirical coefficient Vge1 in the above-mentioned can be as follows: Obtain the test data of the MOS device, which includes the measured variation curve of the gate leakage current Igate with the gate-substrate voltage Vgb under a fixed gate oxide thickness and a fixed temperature.
[0034] Exemplarily, several MOS transistors are tested to obtain test data, where the test data includes the measured change curve of the gate leakage current Igate with the gate-substrate voltage Vgb at a fixed gate oxide thickness tox and a fixed temperature. It is to be noted that the range of the substrate voltage Vgb covers the accumulation region and the depletion region.
[0035] Based on the test data, the empirical coefficient Vge1 is fitted.
[0036] Exemplarily, the logarithm of both sides of the gate leakage current model can be taken first, and the empirical coefficient Vge1 is fitted based on the measured change curve of the gate leakage current Igate with the gate-substrate voltage Vgb at a fixed gate oxide thickness tox and a fixed temperature.
[0037] Further, the extraction process of Vge0, Vgep0, Vgep1, and Vgep1tox in the above can be as follows: Obtain test data for the MOS device.
[0038] The test data includes: the measured change data of the gate leakage current Igate with the gate-substrate voltage Vgb at a fixed gate oxide thickness tox; and the measured change data of the gate leakage current Igate with the gate oxide thickness tox at a fixed gate-substrate voltage Vgb.
[0039] Based on the measured change data of the gate leakage current Igate with the gate-substrate voltage Vgb at a fixed gate oxide thickness tox, Vgep0 is extracted.
[0040] Exemplarily, according to the measured change data of the gate leakage current Igate with the gate-substrate voltage Vgb at a fixed gate oxide thickness tox, the measured change curve of the gate leakage current Igate with the gate-substrate voltage Vgb is obtained, and the exponential coefficient Vgep0 of the gate-substrate voltage Vgb is extracted by fitting the slope of the measured change curve.
[0041] Based on the measured change data of the gate leakage current Igate with the gate oxide thickness tox at a fixed gate-substrate voltage Vgb, Vgep1 and Vgep1tox are extracted.
[0042] For example, according to the measured variation data of the gate leakage current Igate with the gate oxide layer thickness tox at a fixed gate-substrate voltage Vgb, a measured variation curve of the gate leakage current Igate with the gate oxide layer thickness tox at the fixed gate-substrate voltage Vgb is obtained. Then, the exponential coefficient Vgep1 of the gate oxide layer thickness is fitted by presetting the power coefficient Vgep1tox of the oxide layer thickness and according to the slope of the measured variation curve. Then, the power coefficient Vgep1tox of the oxide layer thickness is adjusted by a non-linear least square method to obtain the power coefficient Vgep1tox of the oxide layer thickness and the exponential coefficient Vgep1 of the gate oxide layer thickness when the fitting error is the smallest.
[0043] Based on the extracted Vgep0, Vgep1 and Vgep1tox, Vge0 is obtained.
[0044] For example, the amplitude coefficient Vge0 of the leakage current, the exponential coefficient Vgep1 of the gate oxide layer thickness and the power coefficient Vgep1tox of the oxide layer thickness that have been extracted are substituted into , and then the amplitude coefficient Vge0 of the leakage current is extracted.
[0045] Further, the first-order temperature coefficient tc1vg of the gate voltage can be extracted by the following steps: Test data for the MOS device is obtained.
[0046] The test data includes measured data of the gate leakage current Igate at different temperatures.
[0047] Based on the test data, tc1vg is fitted.
[0048] For example, according to the measured data of the gate leakage current Igate at different temperatures, the first-order temperature coefficient tc1vg of the gate voltage is obtained by a linear regression method. .
[0049] The MOS device gate leakage current model provided by the embodiment of the present application can describe the difference between the accumulation region and the depletion region of the gate leakage current Igate by introducing , so that the output result of the gate leakage current model can have good fitting accuracy in both the accumulation region and the depletion region, and the problem of insufficient model accuracy of the existing gate leakage current model in the depletion region is solved. For example Figure 4As shown in the figure, curve 1 is the running result of the traditional gate leakage current model, curve 2 is the running result of the gate leakage current model of the MOS device provided in the application, and each circular coordinate point is the actual test result. It can be found that, compared with the traditional gate leakage current model, the running result of the gate leakage current model of the MOS device provided in the application has better fitting accuracy in the left depletion region and the right accumulation region.
[0050] Obviously, the above embodiments are only examples for clearly illustrating but not limiting the embodiments. Based on the above description, other different forms of changes or variations can be made by those skilled in the art. All the embodiments do not need to be exhausted here. The obvious changes or variations derived therefrom are still within the protection scope of the application.
Claims
1. A gate leakage current model for a MOS device, characterized in that, The expression for the gate leakage current model is: ； Among them, the It is a function with the gate-substrate voltage Vgb as the independent variable, used to describe the trend of gate leakage current Igate as a function of gate-substrate voltage Vgb. The It is a function with the gate-substrate voltage Vgb and the gate oxide thickness tox of the device as independent variables, used to describe the difference in gate leakage current Igate between the accumulation region and the depletion region; The It is a temperature compensation function with the current temperature T as the independent variable.
2. The gate leakage current model of a MOS device according to claim 1, characterized in that, The The expression is: ； Wherein, Vge1 is an empirical coefficient used to adjust the nonlinear intensity.
3. The gate leakage current model of a MOS device according to claim 1, characterized in that, The The expression is: ； Wherein, Vge0 is the magnitude coefficient of the leakage current, Vgep0 is the exponential coefficient of the gate-substrate voltage Vgb, Vgep1 is the exponential coefficient of the gate oxide thickness, Vgep1tox is the power coefficient of the oxide thickness, and area is the gate area.
4. The gate leakage current model of a MOS device according to claim 1, characterized in that, The The expression is: ； Wherein, tc1vg is the first-order temperature coefficient of the gate voltage. T is the given reference temperature, and T is the current temperature.
5. The gate leakage current model of a MOS device according to claim 2, characterized in that, The Vge1 is extracted through the following steps: Obtain test data for MOS devices, including the measured curve of gate leakage current Igate versus gate-substrate voltage Vgb at a fixed gate oxide thickness tox and a fixed temperature; Based on the test data, the empirical coefficient Vge1 is obtained by fitting.
6. The gate leakage current model of a MOS device according to claim 3, characterized in that, The extraction process of Vge0, Vgep0, Vgep1, and Vgep1tox is as follows: Obtain test data for MOS devices, including: measured data of gate leakage current Igate as a function of gate-substrate voltage Vgb with a fixed gate oxide thickness tox; and measured data of gate leakage current Igate as a function of gate oxide thickness tox with a fixed gate-substrate voltage Vgb. Based on the measured variation data of gate leakage current Igate with gate-substrate voltage Vgb under a fixed gate oxide thickness tox, Vgep0 is extracted; Based on the measured variation data of gate leakage current Igate with gate oxide thickness tox under a fixed gate-substrate voltage Vgb, Vgep1 and Vgep1tox are extracted; Based on the extracted Vgep0, Vgep1, and Vgep1tox, Vge0 is obtained.
7. The gate leakage current model of a MOS device according to claim 4, characterized in that, The tc1vg is extracted through the following steps: Acquire test data for MOS devices, including measured data of gate leakage current Igate at different temperatures; Based on the test data, the tc1vg was obtained by fitting.
8. The gate leakage current model of a MOS device according to claim 1, characterized in that, The gate leakage current model is applied to MOS varactor diodes.