Anti-overshoot driving circuit and method and control circuit thereof

Abstract

The invention provides an anti-overshoot driving circuit, an anti-overshoot driving method and a control circuit thereof. The driving circuit includes a level detection unit and a driving unit. The level detection unit is coupled to a common node SW of the power supply chip, and compares a voltage signal on the common node with a preset voltage in a first duration starting from an effective edge of a first control signal so as to generate a driving adjustment signal. The driving unit generates a driving signal according to the first control signal and the driving adjusting signal to drive the first switch tube to be conducted. Wherein the driving adjusting signal is used for adjusting the value of the driving signal when the first switching tube is switched on, so that the phenomenon that the power supply chip is damaged due to a forward overshoot peak is avoided, and the overall stability of the power supply chip is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic circuits, and in particular to an anti-overdriving circuit, a method and a control circuit thereof. BACKGROUND

[0002] In the field of switching power supply, with the gradual development of high-voltage and high-current demand, the voltage withstand capability of the power supply chip is required to be higher and higher. When designing a high-voltage and high-current power supply chip, in order to reduce switching loss, the commutation speed needs to be as fast as possible to reduce AC loss. When the power switch is turned on, the too fast commutation speed will cause the voltage of the common node between the two power switches, i.e. the power conversion point SW, to overshoot upwards, which will cause the power supply chip to be abnormal, and even damaged.

[0003] In view of the above problem that the power supply chip is easily damaged, it is expected to maximize the reduction of AC loss while suppressing the overshoot voltage peak as much as possible. SUMMARY

[0004] Therefore, the present application aims to provide an anti-overdriving circuit, a driving method and a control circuit to alleviate the above technical problems.

[0005] The first aspect of the present application provides an anti-overdriving circuit applied to a switching power supply, the switching power supply comprising a first switch tube and a second switch tube, the driving circuit comprising: a level detection unit receiving a first control signal and coupled to a common node of the first switch tube and the second switch tube, for detecting a voltage signal on the common node and comparing the voltage signal on the common node with a preset voltage within a first time length starting from a valid edge of the first control signal, to generate a driving adjustment signal, wherein the first control signal is used to control the on-time and off-time of the first switch tube; a driving unit receiving the first control signal and the driving adjustment signal, and generating a driving signal according to the first control signal and the driving adjustment signal, and sending the driving signal to the control end of the first switch tube for driving the on and off of the first switch tube, wherein the driving adjustment signal is used to adjust the value of the driving signal when the first switch tube is turned on.

[0006] The second aspect of the present application provides a control circuit applied to a switching power supply, the switching power supply comprising a first switch tube and a second switch tube, the control circuit comprising: a control module for generating a first control signal and a second control signal according to the output voltage of the switching power supply, the first control signal being used to control the on-time and off-time of the first switch tube, and the second control signal being used to control the on-time and off-time of the second switch tube; a driving circuit as described above for generating a driving signal according to the first control signal, the driving signal being used to drive the first switch tube; and a second driving circuit for generating a second driving signal according to the second control signal, the second driving signal being used to drive the second switch tube.

[0007] The third aspect of the present application provides a driving method applied to a switching power supply, the switching power supply comprising a first switch tube and a second switch tube, the driving method comprising: detecting a voltage signal on a common node of the first switch tube and the second switch tube, and comparing the voltage signal on the common node with a preset voltage in a first time length initiated by a valid edge of a first control signal to generate a driving adjustment signal, wherein the first control signal is used to control the on time and the off time of the first switch tube; and receiving the first control signal and the driving adjustment signal, and generating a driving signal according to the first control signal and the driving adjustment signal, and sending the driving signal to a control end of the first switch tube to drive the first switch tube, wherein the driving adjustment signal is used to adjust the value of the driving signal when the first switch tube is turned off.

[0008] The driving circuit, the driving method and the control circuit provided by the embodiment of the present application can effectively prevent the overvoltage peak from appearing on the power conversion point due to the too fast commutation speed in the on phase of the first switch tube of the switching power supply, protect the power chip from being damaged, and improve the stability of the whole power chip. BRIEF DESCRIPTION OF DRAWINGS

[0009] In order to more clearly illustrate the technical solutions in the specific embodiments or the prior art, the drawings needed to be used in the specific embodiments or the prior art description will be briefly described below.

[0010] Figure 1 The present application provides a circuit schematic diagram of a switching power supply.

[0011] Figure 2 The present application provides another circuit schematic diagram of a switching power supply.

[0012] Figure 3 The present application provides another circuit schematic diagram of a switching power supply.

[0013] Figure 4 The present application provides a schematic diagram of a switching power supply with a control circuit.

[0014] Figure 5 The present application provides a flow chart of a driving method applied to a switching power supply. DETAILED DESCRIPTION

[0015] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions of the present application will be described clearly and completely below with reference to the drawings. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of the present application.

[0016] In the field of switching power supply, during the process of turning on the upper tube, the current will rapidly increase from zero, and the speed of current increase is much greater than the speed of power inductance charging. The parasitic inductance in the circuit will induce a spike at the common node SW between the two switches of the power chip. At the same time, when the upper tube is turned on, the body diode of the lower tube needs to be reversed, and this process will generate a transient reverse current, which will further exacerbate the upward overshoot of the SW point voltage together with the parasitic inductance. Therefore, the management of the turn-on speed of the upper tube is crucial. In order to reduce the positive overshoot voltage spike of the SW point, the commutation speed is generally slow, and at this time the switching loss will be greatly increased. Therefore, it is necessary to provide a solution. Based on this, the embodiments of the present application provide a kind of anti-overshoot driving circuit, driving method and control circuit, which can guarantee the commutation speed and also can alleviate the problem of SW positive overshoot voltage spike.

[0017] The switching power supply provided by the embodiments of the present application includes a first switch tube and a second switch tube, wherein the first switch tube is also called an upper power tube or an upper tube, the second switch tube is also called a lower power tube or a lower tube, and the connection point of the first switch tube and the second switch tube is the common node SW in the embodiments of the present application, and the driving circuit in the embodiments of the present application is used to drive the first switch tube to reduce the positive voltage overshoot of the common node SW during the process of turning on the first switch tube.

[0018] The above-mentioned switching power supply can include various suitable topologies, and the above-mentioned common node SW of the embodiments of the present application can also be called the power conversion point of the switching power supply. In order to facilitate the description, in the embodiments of the present application, the switching power supply with BUCK topology will be taken as an example for description, but those skilled in the art can understand that the disclosed content of the present application can also be used in other suitable topologies.

[0019] Specifically, as shown in the circuit schematic diagram of the switching power supply according to one embodiment of the present application. Figure 1 As shown in the circuit schematic diagram of the switching power supply according to one embodiment of the present application. Figure 1 In the circuit schematic diagram, the first switch tube HS, the second switch tube LS, the common node SW, the power inductance L, the filter capacitor C and the driving circuit are shown, and other circuits of the switching power supply can be set according to actual use, which is not limited by the embodiments of the present application. Figure 1In the illustrated embodiment, the first switch HS, the second switch LS, the power inductor L and the filter capacitor C form a BUCK topology. In Figure 1 In the illustrated embodiment, the first switch HS and the second switch LS are illustrated as N-type Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). It is understood by those skilled in the art that in other embodiments, the first switch HS and the second switch LS can also include other suitable semiconductor switch types, such as JFETs, IGBTs, DMOS, and the like.

[0020] In the embodiments of the present application, the drive circuit includes a level detection unit 10 and a drive unit 20.

[0021] Each level detection unit 10 receives a first control signal HS_in and is coupled to a common node SW of the first switch HS and the second switch LS for detecting a voltage signal at the common node SW and comparing the voltage signal at the common node SW with a preset voltage within a first time duration initiated by a valid edge of the first control signal HS_in to generate a drive adjustment signal cut_drv. The first control signal HS_in is used to control the on-time and off-time of the first switch HS. In one embodiment, the first control signal HS_in is a logic high-low signal. The first control signal HS_in can be a control signal issued by a main controller of a power chip. The first control signal HS_in can change its self-generated duty cycle to control the on-time and off-time of the first switch HS according to load requirements. In one embodiment, the valid edge of the first control signal HS_in includes a rising edge and can also include a falling edge. In one embodiment, the arrival of the valid edge of the first control signal HS_in represents that the first switch HS will be turned on. It is noted that in the description herein, "turning on" the first switch HS refers to the action of controlling the first switch HS from being off to being fully on. For example, in one embodiment, when the first switch HS is a MOSFET, the turning on stage of the MOSFET includes a delay stage, a linear region rising stage, a Miller plateau stage, and a final on-state adjustment stage until full conduction.

[0022] In one embodiment, the first time duration is greater than the turn-on time of the first switch HS. For example, in one embodiment, the turn-on time of the first switch HS is 2 ns, and the first time duration can be set to 10 ns.

[0023] The driving unit 20 receives the first control signal and the driving adjustment signal cut_drv, and generates the driving signal HS_gate according to the first control signal and the driving adjustment signal cut_drv, and sends the driving signal HS_gate to the control end of the first switch tube HS for driving the first switch tube HS, wherein the driving adjustment signal cut_drv is used for adjusting the value of the driving signal when the first switch tube HS is turned on. In an embodiment, adjusting the value of the driving signal includes adjusting the current value of the driving signal, and the driving speed can be increased or decreased by increasing or decreasing the driving current value.

[0024] In addition, Figure 1 The second control signal LS_in for controlling the second switch tube LS is also shown in the figure, which is used for controlling the second switch tube LS, and in an embodiment, the control signal LS_in of the second switch tube LS will also be sent to the second driving circuit to generate a driving signal for driving the second switch tube LS, and the embodiments of the present application do not limit this.

[0025] Based on Figure 1 The driving circuit applied to the switching power supply shown in the figure can timely adjust the size of the driving signal HS_gate when the voltage positive overshoot peak appears at the potential of the common node SW, so as to avoid the phenomenon of damage to the switching power supply due to the upward positive overshoot of the potential of the common node SW, and improve the overall stability of the switching power supply.

[0026] In order to facilitate understanding, Figure 1 The specific schematic diagram of the level detection unit 10 is also shown in the dashed box, and specifically, the level detection unit 10 includes a single pulse generating circuit, a first detection tube PM1, a detection resistor R and a second detection tube NM1.

[0027] The single pulse generating circuit receives the first control signal HS_in, and starts to generate a single pulse signal Pulse with a first pulse width at the active edge of the first control signal HS_in, wherein the first pulse width of the single pulse signal Pulse represents a first time length.

[0028] The first end of the first detection tube PM1 is coupled to the first power supply voltage VCC, the second end of the first detection tube PM1 is coupled to the first end of the second detection tube NM1, and the control end of the first detection tube receives the single pulse signal Pulse. Figure 1 In the embodiment shown in the figure, the first detection tube PM1 is shown as a P-type MOS tube, and specifically, the source of the PMOS tube is used as the first end of the first detection tube PM1, the drain of the PMOS tube is used as the second end of the first detection tube PM1, and the gate of the PMOS tube is used as the control end of the first detection tube PM1.

[0029] The second end of the second detection tube NM1 is coupled to the common node through a detection resistor R, and the common end of the second end of the second detection tube NM1 and the detection resistor R serves as an output end of the level detection unit 10 to provide a driving adjustment signal cut_drv. When the voltage of the second end of the second detection tube NM1 is higher than the voltage of the first end thereof, the second detection tube NM1 is cut off. Figure 1 In the embodiment shown, the second detection tube NM1 is shown as a diode, wherein the first end of the second detection tube NM1 is the anode of the diode, and the second end of the second detection tube NM1 is the cathode of the diode. In other embodiments, other suitable devices can be used to realize the function of the second detection tube NM1, for example, in an embodiment, the second detection tube NM1 comprises an N-type MOS tube, the drain of the NMOS tube serves as the first end of the second detection tube NM1, and the gate of the NMOS tube and the source of the NMOS tube are coupled together to serve as the second end of the second detection tube NM1. Figure 2 In the embodiment shown, the second detection tube NM1 comprises an N-type MOS tube, the drain of the NMOS tube serves as the first end of the second detection tube NM1, and the gate of the NMOS tube and the source of the NMOS tube are coupled together to serve as the second end of the second detection tube NM1. In the above embodiment, the preset voltage is the first power supply voltage VCC of the driving circuit minus the turn-on threshold of the first detection tube PM1, the turn-on threshold of the second detection tube NM1, and the voltage drop on the detection resistor R. In an embodiment, the first power supply voltage VCC is a low-voltage domain power supply voltage.

[0030] Meanwhile, those skilled in the art can also understand that, in other embodiments, the first detection tube PM1 and the second detection tube NM1 can also use other suitable switching tube devices, and the correspondence of each electrode of the switching tube can be set according to actual use, which is not limited in the embodiments of the present application.

[0031] Figure 2 Fig. 4 shows a circuit schematic diagram of a switching power supply according to another embodiment of the present application. In the embodiment shown, Figure 2 In the embodiment shown, the driving circuit further comprises a buffer circuit 30 arranged between the level detection unit 10 and the driving unit 20, which is used to receive the driving adjustment signal cut_drv, reshape the driving adjustment signal cut_drv, and output a new driving adjustment signal cut_drv1. The driving unit 20 then generates the driving signal HS_gate according to the first control signal HS_in and the new driving adjustment signal cut_drv1.

[0032] In actual use, the buffer circuit 30 in the embodiments of the present application generally comprises an odd number of series-connected NAND gates, for example, three series-connected NAND gates. In actual use, the number of the series-connected NAND gates can be set according to actual use, which is not limited in the embodiments of the present application.

[0033] Further, Figure 3 Fig. 5 shows a circuit schematic diagram of a switching power supply according to still another embodiment of the present application. In the embodiment shown, Figure 1 on the basis ofFigure 3 Further shown is a schematic diagram of internal circuit structure of the driving unit 20. Next, the driving unit 20 in the embodiment of the present application will be further described.

[0034] Specifically, as shown in the figure, the driving unit 20 in the embodiment of the present application comprises a minimum current generating module 201, an adjusting current generating module 202 and a current adjusting switch PM2. Figure 3 The minimum current generating module 201 has a first end, a second end, a third end and a control end, the first end of the minimum current generating module 201 receives the second supply voltage BST, the second end of the minimum current generating module 201 is coupled to the common node SW, the third end of the minimum current generating module 201 is coupled to the control end of the first switch tube HS, and the control end of the minimum current generating module 201 receives the first control signal HS_in.

[0035] The adjusting current generating module 202 also has a first end, a second end, a third end and a control end, the second end of the adjusting current generating module 202 is coupled to the common node SW, the third end of the adjusting current generating module 202 is coupled to the control end of the first switch tube HS, and the control end of the adjusting current generating module 202 receives the first control signal HS_in.

[0036] The current adjusting switch PM2 has a first end, a second end and a control end, the first end of the current adjusting switch PM2 receives the second supply voltage BST, the second end of the current adjusting switch PM2 is coupled to the first end of the adjusting current generating module 202, and the control end of the current adjusting switch PM2 receives the driving adjusting signal cut_drv. In one embodiment, the second supply voltage BST is a supply voltage in a high voltage domain, for example, the second supply voltage BST is a bootstrap voltage. Generally, the second supply voltage BST is designed to be greater than the first supply voltage VCC. For example, the bootstrap voltage is designed to be the potential of the common node SW plus 5V, and the first supply voltage VCC is designed to be 5V.

[0037] In actual use, the current adjusting switch PM2 is generally implemented by a MOS tube,

[0038] for example, a P-type MOS tube, in which the gate of the PMOS tube is the control end of the current adjusting switch PM2, the drain of the PMOS tube is the second end of the current adjusting switch PM2, and the source of the PMOS tube is the first end of the current adjusting switch PM2. In other embodiments, the current adjusting switch PM2 can also be set to a switch tube of other suitable structure, which can be set according to actual use, and the embodiment of the present application does not limit this. Figure 3

[0039] ​The minimum current generating module 201 includes a third switch tube Q3 and a fourth switch tube Q4 connected in sequence. Specifically, the first end of the third switch tube Q3 is connected with the first end of the fourth switch tube Q4, and the first end of the third switch tube Q3 is coupled with the control end of the first switch tube HS as the third end of the minimum current generating module 201; the second end of the third switch tube Q3 is connected to the second power supply voltage BST as the first end of the minimum current generating module 201; the second end of the fourth switch tube Q4 is coupled with the common node SW as the second end of the minimum current generating module 201; the control ends of the third switch tube Q3 and the fourth switch tube Q4 receive the first control signal HS_in as the control end of the minimum current generating module 201.

[0040] Similarly, the adjustment current generating module 202 includes a fifth switch tube Q5 and a sixth switch tube Q6 connected in sequence. The first end of the fifth switch tube Q5 is connected with the first end of the sixth switch tube Q6, and the first end of the fifth switch tube Q5 is coupled with the control end of the first switch tube HS as the third end of the adjustment current generating module 202; the second end of the fifth switch tube Q5 is connected with the second end of the current adjustment switch PM2 as the first end of the adjustment current generating module 202; the second end of the sixth switch tube Q6 is coupled with the common node SW as the second end of the adjustment current generating module 202; the control ends of the fifth switch tube Q5 and the sixth switch tube Q6 receive the first control signal HS_in as the control end of the adjustment current generating module 202.

[0041] Based on the circuit schematic diagram of the above-mentioned driving circuit, the basic working principle of the anti-overshoot driving circuit provided in the embodiment of the present application is as follows: When the active edge of the first control signal HS_in, which represents the need to turn on the first switch tube HS, arrives, the single pulse generating circuit in the level detection unit 10 will generate a single pulse with a first pulse width to turn on the PMOS tube PM1, and the first supply voltage VCC will be sent to the buffer circuit 30 through the PMOS tube PM1 and the NMOS tube NM1, and the buffer circuit will shape the voltage at the source of the NMOS tube NM1 and send it to the control end of the current regulating switch PM2 after being inverted to turn on the current regulating switch PM2. At the same time, the first control signal HS_in controls the switch tubes Q3 and Q5 to be turned on and controls the switch tubes Q4 and Q6 to be turned off, and the drive unit 20 provides the driving currents i1 and i2 through the switch tubes Q3 and Q5 respectively to jointly drive the first switch tube HS to be turned on, and the voltage Vsw of the common node SW will gradually rise. As the voltage Vsw rises, the second end voltage of the second detection tube NM1 will gradually rise, and when the second end voltage of the second detection tube NM1 is higher than the first supply voltage VCC minus the turn-on threshold of the first detection tube PM1, the turn-on threshold of the second detection tube NM1, and the voltage drop on the detection resistor R, the second detection tube NM1 is turned off. Consequently, the current regulating switch PM2 will be turned off, and the drive unit 20 will only provide the driving current i1 through the switch tube Q3 to continue to drive the first switch tube HS to be turned on. Since the driving current is reduced, the driving speed will slow down, and the commutation speed of the first switch tube HS will be smaller.

[0042] In the above embodiment, it is equivalent to that during the operation of the drive circuit, the minimum current generating module 201 and the regulating current generating module 202 divide the current for driving the first switch tube HS to be turned on into two levels: the first level current I1+I2 and the second level current 11. The first level: full speed pull-up, which increases the turn-on speed of the first switch tube HS; the second level: after the voltage of the common node SW reaches a certain voltage value, the pull-up current is reduced to slow down the turn-on. Therefore, the positive voltage overshoot of the common node SW can be effectively reduced or avoided, and the purpose of protecting the switching power supply from being damaged is achieved. When the first switch tube HS is completely turned on, the first detection tube PM1 will also be turned off in time after being turned on for a first duration, so as to prevent the voltage on the common node SW from changing or leaking through the first detection tube PM1 and the second detection tube NM1 after the second switch tube LS is turned on.

[0043] In one embodiment, the critical point of driving deceleration can be selected by setting the first supply voltage VCC with different values, and the size of the driving current before and after deceleration can be set by selecting switch tubes Q3, Q4, Q5 and Q6 with different sizes to control the peak of the positive voltage overshoot. In one embodiment, the current I1 and the current I2 can be equal or not equal.

[0044] Further, the embodiment of the present application further provides a control circuit applied to a switching power supply, specifically, the switching power supply comprises a first switch tube and a second switch tube, in order to facilitate understanding, Figure 4 A switching power supply circuit schematic diagram with a control circuit is shown, the first switch tube HS, the second switch tube LS and the control circuit of the switching power supply are shown respectively, wherein the control circuit comprises a driving circuit 500, a second driving circuit 501 and a control module 502.

[0045] The control module 502 is used for generating a first control signal HS_in and a second control signal LS_in according to the output voltage of the switching power supply, the first control signal HS_in is used for controlling the on time and the off time of the first switch tube HS, and the second control signal LS_in is used for controlling the on time and the off time of the second switch tube LS.

[0046] The driving circuit 500 is used for generating a driving signal according to the first control signal HS_in, and the driving signal is used for driving the first switch tube HS. The second driving circuit 501 is used for generating a second driving signal according to the second control signal LS_in, and the second driving signal is used for driving the second switch tube LS.

[0047] It should be understood that the control module 502 can have different circuit structures according to different control modes selected by the switching power supply. In one embodiment, for example, as shown in Figure 4 The control module 502 comprises a comparison circuit, a logic circuit and a clock circuit. The comparison circuit can compare the feedback signal of the output voltage of the switching power supply with the preset reference voltage, and then output the corresponding level to the logic circuit according to the comparison result. The logic circuit receives the output signal of the comparison circuit and the output signal of the clock circuit, and generates the first control signal HS_in and the second control signal LS_in to the driving circuit 500 and the second driving circuit 501 respectively, so as to realize the driving of the first switch tube HS and the second switch tube LS.

[0048] It should be understood that Figure 4 The shown is only one possible implementation, in other embodiments, the control module, the second driving circuit, and the model, parameters of the first switch tube and the second switch tube, and the specific design of the circuit can be set according to the actual use, the embodiment of the present application does not limit this.

[0049] The embodiment of the present application further provides a driving method applied to the switching power supply provided by the above-mentioned embodiment. Specifically, as shown in Figure 5 A flow chart of a driving method applied to a switching power supply is shown, the method comprises the following steps S1 and S2.

[0050] In step S1, a voltage signal on the common node SW of the first switch tube and the second switch tube is detected, and the voltage signal on the common node SW is compared with a preset voltage in a first time length started by a valid edge of a first control signal to generate a driving adjustment signal, wherein the first control signal is used to control the on-time and off-time of the first switch tube.

[0051] In step S2, the first control signal and the driving adjustment signal are received, and a driving signal is generated according to the first control signal and the driving adjustment signal, and the driving signal is sent to the control end of the first switch tube to drive the first switch tube, and the driving adjustment signal is used to adjust the value of the driving signal when the first switch tube is turned on.

[0052] Those skilled in the art can understand that the specific working process of the above-described driving method and control circuit can refer to the description of the corresponding driving circuit in the foregoing embodiments, which will not be described here. In addition, the terms "first", "second", "third" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance. Finally, it should be pointed out that: the above embodiments are only specific embodiments of the present application, which are used to illustrate the technical solutions of the present application, and are not limited thereto. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can modify or easily think of changes to the technical solutions recorded in the foregoing embodiments within the technical range disclosed by the present application, or make equivalent replacement to some technical features thereof; and these modifications, changes or replacements do not make the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be covered within the protection scope of the present application.

Claims

1. An overshoot protection drive circuit for switching power supplies, characterized in that, The switching power supply includes a first switching transistor and a second switching transistor, and the driving circuit includes: A level detection unit receives a first control signal and is coupled to a common node of the first switch and the second switch. It is used to detect the voltage signal on the common node and compare the voltage signal on the common node with a preset voltage within a first duration at the beginning of the effective edge of the first control signal to generate a drive adjustment signal. The first control signal is used to control the on-time and off-time of the first switch. The driving unit receives a first control signal and a driving adjustment signal, generates a driving signal according to the first control signal and the driving adjustment signal, and sends the driving signal to the control terminal of the first switching transistor to drive the first switching transistor to turn on and off. The driving adjustment signal is used to adjust the value of the driving signal when the first switching transistor is turned on.

2. The driving circuit according to claim 1, characterized in that, The level detection unit includes a single pulse generation circuit, a first detection tube, a detection resistor, and a second detection tube; A single pulse generation circuit receives a first control signal and generates a single pulse signal with a first pulse width starting from the effective edge of the first control signal, wherein the first pulse width represents a first duration. The first end of the first detection tube is coupled to the first power supply voltage, the second end of the first detection tube is coupled to the first end of the second detection tube, and the control end of the first detection tube receives a single pulse signal. The second end of the second detection tube is coupled to a common node through a detection resistor. The second end of the second detection tube and the common end of the detection resistor serve as the output of the level detection unit to provide a drive adjustment signal. When the voltage at the second end of the second detection tube is higher than the voltage at its first end, the second detection tube is turned off.

3. The driving circuit according to claim 2, characterized in that, The second detection tube includes a diode, with the cathode of the diode serving as the first end of the second detection tube and the anode of the diode serving as the second end of the second detection tube.

4. The driving circuit according to claim 2, characterized in that, The second detection transistor includes an NMOS transistor, with the drain of the NMOS serving as the first terminal of the second detection transistor, and the gate and source of the NMOS coupled together as the second terminal of the second detection transistor.

5. The driving circuit according to claim 1, characterized in that, The driving circuit also includes: A buffer circuit is disposed between the level detection unit and the driving unit. The buffer circuit is used to receive the driving adjustment signal, shape the driving adjustment signal and output a new driving adjustment signal. The driving unit will generate the driving signal according to the first control signal and the new driving adjustment signal.

6. The driving circuit according to claim 1, characterized in that, The driving unit includes: A minimum current generating module has a first terminal, a second terminal and a third terminal. The first terminal of the minimum current generating module receives a second supply voltage. The second terminal of the minimum current generating module is coupled to a common node. The third terminal of the minimum current generating module is coupled to the control terminal of a first switching transistor. The control terminal of the minimum current generating module receives the first control signal. A regulating current generating module has a first terminal, a second terminal, and a third terminal. The second terminal of the regulating current generating module is coupled to a common node, and the third terminal of the regulating current generating module is coupled to the control terminal of a first switching transistor. The control terminal of the regulating current generating module receives a first control signal. A current regulating switch has a first terminal, a second terminal, and a control terminal. The first terminal of the current regulating switch receives a second supply voltage. The second terminal of the current regulating switch is coupled to the first terminal of the regulating current generating module. The control terminal of the current regulating switch receives the drive regulation signal.

7. The driving circuit according to claim 6, characterized in that, The minimum current generating module includes a third switch and a fourth switch connected in sequence; Wherein, the first end of the third switch is connected to the first end of the fourth switch, and the common connection point serves as the third end of the minimum current generating module; the second end of the third switch serves as the first end of the minimum current generating module, and the second end of the fourth switch serves as the second end of the minimum current generating module; the control ends of the third switch and the fourth switch serve as the control ends of the minimum current generating module.

8. The driving circuit according to claim 7, characterized in that, The regulating current generating module includes a fifth switching transistor and a sixth switching transistor connected in sequence; Wherein, the first end of the fifth switch is connected to the first end of the sixth switch, and the common connection point serves as the third end of the regulating current generating module; the second end of the fifth switch serves as the first end of the regulating current generating module, and the second end of the sixth switch serves as the second end of the regulating current generating module; the control ends of the fifth switch and the sixth switch serve as the control ends of the regulating current generating module.

9. A control circuit for a switching power supply, the switching power supply comprising a first switching transistor and a second switching transistor, characterized in that, The control circuit includes: The control module is used to generate a first control signal and a second control signal based on the output voltage of the switching power supply. The first control signal is used to control the on-time and off-time of the first switching transistor, and the second control signal is used to control the on-time and off-time of the second switching transistor. The driving circuit according to any one of claims 1 to 8 is configured to generate a driving signal based on a first control signal, the driving signal being used to drive a first switching transistor; and The second driving circuit is used to generate a second driving signal according to the second control signal, and the second driving signal is used to drive the second switching transistor.

10. A driving method for a switching power supply, the switching power supply comprising a first switching transistor and a second switching transistor, characterized in that, The driving method includes: The voltage signal at the common node of the first and second switching transistors is detected, and within a first duration starting from the effective edge of the first control signal, the voltage signal at the common node is compared with a preset voltage to generate a drive adjustment signal, wherein the first control signal is used to control the on-time and off-time of the first switching transistor; and The system receives a first control signal and the drive adjustment signal, generates a drive signal based on the first control signal and the drive adjustment signal, and sends the drive signal to the control terminal of the first switch to drive the first switch. The drive adjustment signal is used to adjust the value of the drive signal when the first switch is turned on.

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