Upper arm driving circuit
By optimizing the component connections and control timing of the upper arm drive circuit, the problems of conduction delay and malfunction of the upper arm IGBT in the power conversion device were solved, achieving fast switching and efficient operation.
Patent Information
- Application Number
- CN202480030744.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-06-08
- Filing Date
- 2024-02-15
- Publication Date
- 2025-12-05
AI Technical Summary
In the prior art, the gate charge of the upper arm IGBT of the power conversion device is slowly extracted when it is turned on, which leads to the problem of turn-on delay, and is prone to malfunction, especially when the output is negative.
The structure employs a first switching element, a first diode, a second diode, a second switching element, and a third diode. By controlling the on and off timing of these elements, current is prevented from flowing through the resistor, ensuring rapid switching of the upper arm switching element.
This technology prevents malfunctions when the power conversion circuit output is at a negative potential and suppresses the conduction delay of the upper arm switching element, thereby improving the reliability and efficiency of the power conversion device.
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Figure CN121079889A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to an upper arm drive circuit. BACKGROUND
[0002] Due to the increased awareness of environmental protection in the world, the requirement for energy saving is further improved, and power conversion devices (inverters) are widely used in various fields. In the power conversion devices mounted on driving systems of railway vehicles, air conditioners and the like, high performance, high efficiency and high reliability become important issues.
[0003] A general power conversion device is provided with: a power conversion circuit composed of a bridge circuit having upper and lower arms, the arms being composed of switching elements and backflow diodes connected in anti-parallel therewith; an upper arm drive circuit that drives and controls the switching elements of the upper arm; and a lower arm drive circuit that drives and controls the switching elements of the lower arm.
[0004] As a technology related to the upper arm drive circuit, for example, there is patent document 1. In the abstract of patent document 1, it is described that "an upper arm drive circuit is provided, which, in a power conversion device having a bridge circuit composed of upper and lower arms, does not malfunction even when the output of the power conversion device becomes a negative potential, and enables stable control of the upper arm".
[0005] In addition, in the Figure 2 A of patent document 1, as an upper arm drive circuit (6) that drives an upper arm IGBT (2), a configuration is described that has: an upper arm drive MOSFET (10) whose drain is connected to the gate of the upper arm IGBT (2) and whose source is connected to the emitter of the upper arm IGBT (2) (the reference potential of the upper arm IGBT (2)); and an upper arm drive MOSFET (9) whose drain is connected to the gate of the upper arm drive MOSFET (10) and whose source is connected to the upper arm drive circuit reference potential wiring (12) via a resistor (11).
[0006] Further, as an example of a circuit configuration that enables prevention of malfunction even when the output of the power conversion device becomes a negative potential, in the Figure 3 A of patent document 1, a configuration is described in which: as a reference potential wiring GND connection portion (15) (see the Figure 2 A of patent document 1), a diode (18) is provided that has an anode connected to the upper arm drive circuit reference potential wiring (12) and a cathode connected to a reference potential (GND (ground)); and as a reference potential wiring inverter output connection portion (16) (see the Figure 2 A of patent document 1), a diode (19) is provided that has an anode connected to the upper arm drive circuit reference potential wiring (12) and a cathode connected to the reference potential of the upper arm IGBT (2).
[0007] Prior Art Documents
[0008] Patent Documents
[0009] Patent Document 1: Japanese Patent Application Publication No. 2022-146525 SUMMARY
[0010] Problems to be Solved by the Invention
[0011] However, in the configuration of the upper arm drive circuit of Patent Document 1, Figure 2 A and Figure 3 In the configuration in which the upper arm IGBT (2) is combined with the upper arm drive MOSFET (9) and the upper arm drive MOSFET (10), at the timing at which the upper arm IGBT (2) is turned on, when the gate charge is extracted from the gate of the upper arm drive MOSFET (10) via the upper arm drive MOSFET (9) in order to turn off the upper arm drive MOSFET (10), there is a resistor (11) in the path, and thus there is a problem in that the extraction of the gate charge is slowed down, and the turn-on of the upper arm IGBT (2) is delayed.
[0012] The present application has been made to solve the above problems, and has as its object to provide an upper arm drive circuit that can prevent malfunction even when the output of a power conversion circuit becomes a negative potential, and that can suppress turn-on delay of an upper arm switching element.
[0013] Means for Solving the Problems
[0014] To solve the above problems, the upper arm drive circuit of the present application, which drives an upper arm switching element of a power conversion circuit, is characterized by comprising: a first switching element whose drain is connected to the gate of the upper arm switching element and whose source is connected to a reference potential terminal of the upper arm switching element; a first diode whose cathode is connected to the gate of the first switching element and whose anode is connected to the source of the first switching element; a second diode whose cathode is connected to the anode of the first diode; a second switching element whose drain is connected to the gate of the first switching element and whose source is connected to the anode of the second diode, and which is controlled to be turned on at the timing at which the upper arm switching element is turned on and the first switching element is turned off; a third diode whose cathode is connected to a reference potential; and a first resistor whose one terminal is connected to a connection node between the source of the second switching element and the anode of the second diode, and whose other terminal is connected to the anode of the third diode.
[0015] Effects of the Invention
[0016] According to the present application, an upper arm drive circuit that can prevent malfunction even when the output of a power conversion circuit becomes a negative potential, and that can suppress turn-on delay of an upper arm switching element can be realized. BRIEF DESCRIPTION OF DRAWINGS
[0017] Figure 1is a circuit diagram showing a schematic configuration of the upper arm drive circuit of the embodiment.
[0018] Figure 2 is a circuit diagram showing the operation of the upper arm drive circuit of the embodiment.
[0019] Figure 3 is a circuit diagram showing the operation of the upper arm drive circuit of the embodiment.
[0020] Figure 4 is a circuit diagram showing a schematic configuration of the upper arm drive circuit of Comparative Example 1.
[0021] Figure 5 is a circuit diagram showing the operation of the upper arm drive circuit of Comparative Example 1.
[0022] Figure 6 is a circuit diagram showing the operation of the upper arm drive circuit of Comparative Example 1.
[0023] Figure 7 is a circuit diagram showing a schematic configuration of the upper arm drive circuit of Comparative Example 2. DETAILED DESCRIPTION
[0024] Hereinafter, the embodiments of the present application will be described using the drawings. In each drawing and each embodiment, the same or similar constituent elements are denoted by the same reference numerals, and overlapping description will be omitted.
[0025] Figure 1 is a circuit diagram showing a schematic configuration of the upper arm drive circuit of the embodiment.
[0026] The power conversion device 3 has the upper arm drive circuit 1, the power conversion circuit 2, and a lower arm drive circuit not shown.
[0027] The power conversion circuit 2 has the upper arm switching element Ql and the lower arm switching element Q2 connected in series with each other between a direct current power source potential VDC and a reference potential GND, the upper arm backflow diode DQl connected in antiparallel with the upper arm switching element Ql, and the lower arm backflow diode DQ2 connected in antiparallel with the lower arm switching element Q2. The alternating current output of the power conversion circuit 2 is output from a connection node between the upper arm switching element Ql and the lower arm switching element Q2 to an output terminal OUT.
[0028] As the upper arm switching element Q1 and the lower arm switching element Q2, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), or the like can be used. Further, in the case of using a MOSFET, a body diode built in the MOSFET can be used as the upper arm return diode DQ1 and the lower arm return diode DQ2. In the present embodiment, a case where the upper arm switching element Q1 and the lower arm switching element Q2 are N-type switching elements is described as an example. The reference potential GND is, for example, a ground potential, but is not limited thereto.
[0029] The upper arm drive circuit 1 is a drive circuit that drives the upper arm switching element Q1, and an unillustrated lower arm drive circuit is a drive circuit that drives the lower arm switching element Q2.
[0030] The upper arm drive circuit 1 of the present embodiment has a first switching element SW1, a first diode D1, a second diode D2, a second switching element SW2, a third diode D3, and a first resistor R1.
[0031] The drain of the first switching element SW1 is connected to the gate of the upper arm switching element Q1, and the source is connected to the reference potential terminal of the upper arm switching element Q1. By turning on the first switching element SW1, the gate and the reference potential terminal of the upper arm switching element Q1 can be short-circuited, and charges can be extracted from the gate of the upper arm switching element Q1. As the first switching element SW1, for example, an N-type MOSFET can be used.
[0032] The cathode of the first diode D1 is connected to the gate of the first switching element SW1, and the anode is connected to the source of the first switching element SW1.
[0033] The cathode of the second diode D2 is connected to the anode of the first diode.
[0034] The drain of the second switching element SW2 is connected to the gate of the first switching element SW1, and the source is connected to the anode of the second diode D2. The second switching element SW2 is controlled to be turned on at a timing at which the upper arm switching element Q1 is turned on and the first switching element SW1 is turned off. As the second switching element SW2, for example, an N-type MOSFET can be used.
[0035] The cathode of the third diode D3 is connected to the reference potential GND. The reference potential GND is, for example, a ground potential, but is not limited thereto. Further, the reference potential GND of the upper arm drive circuit 1 can be the same as the reference potential GND of the power conversion circuit 2, or can be different.
[0036] One terminal of the first resistor R1 is connected to a connection node N between the source of the second switching element SW2 and the anode of the second diode D2, and the other terminal is connected to the anode of the third diode D3.
[0037] The upper arm drive circuit 1 of the present embodiment preferably further has a second resistor R2 connected to the gate of the upper arm switching element Q1, and a Zener diode ZD having the cathode connected to the gate of the upper arm switching element Q1 and the anode connected to the reference potential terminal of the upper arm switching element Q1. The second resistor R2 functions as a gate resistor of the upper arm switching element Q1. The second resistor R2 is connected between the gate of the upper arm switching element Q1 and an unillustrated gate drive circuit that applies a conduction signal to the gate of the upper arm switching element Q1. In Figure 1 In the present embodiment, an example is shown in which the second resistor R2 is connected to the right side (the side close to the gate of the upper arm switching element Q1) of the drain of the first switching element SW1, but the present embodiment is not limited to this, and the second resistor R2 can also be connected to the left side of the drain of the first switching element SW1. The Zener diode ZD limits the voltage between the gate of the upper arm switching element Q1 and the reference potential terminal, and functions to protect the upper arm switching element Q1.
[0038] The upper arm drive circuit 1 of the present embodiment further has, for example, a P-type third switching element SW3 having the source connected to the power supply potential VCC and the drain connected to the gate of the second switching element SW2, and a third resistor R3 connected between the drain of the third switching element SW3 and one terminal of the first resistor R1, as a control circuit for controlling the operation of the second switching element SW2. The control circuit for controlling the operation of the second switching element SW2 shown here is merely an example, and the present embodiment is not limited to this. Here, an example is shown in which a P-type MOSFET is used as the third switching element SW3. In addition, in the case where an N-type MOSFET is used as the third switching element SW3, the circuit structure of the control circuit is appropriately changed.
[0039] The upper arm drive circuit 1 of the present embodiment further has an unillustrated gate drive circuit that applies a conduction signal to the gate of the upper arm switching element Q1, an unillustrated control circuit for controlling the operation of the first switching element SW1, an unillustrated control circuit for controlling the operation of the third switching element SW3, an unillustrated discharge circuit for extracting charges from the gate of the upper arm switching element Q1, and the like, but detailed description is omitted.
[0040] Figure 2 and Figure 3 is a circuit diagram that explains the operation of the upper arm drive circuit of the present embodiment.
[0041] As Figure 2As shown, a case where the upper arm switching element Ql is made to turn on (from off to on) is considered. Here, a case where the upper arm switching element Ql is in an off state and the output of the power conversion circuit 2 is a negative potential is explained. In this case, the reference potential terminal of the upper arm switching element Ql and the source of the first switching element SWl also become a negative potential.
[0042] By turning on the third switching element SW3, the second switching element SW2 is turned on and is conducted. Since the output of the power conversion circuit 2 is a negative potential, the charge is extracted from the gate of the first switching element SWl, and the current i flows via Figure 2 The second switching element SW2, the connection node N, the second diode D2 in the path shown flow to the output of the power conversion circuit 2, and the first switching element SWl can be made to turn off (from on to off). At this time, the path of the current i does not pass through the resistor, and thus the delay of the turn-off of the first switching element SWl can be suppressed.
[0043] To the gate of the upper arm switching element Ql, a conduction signal is further applied from a gate drive circuit not shown, the first switching element SWl is turned off, the first switching element SWl becomes non-conductive, the potential between the reference potential terminal and the gate of the upper arm switching element Ql becomes above the threshold value, and the upper arm switching element Ql turns on.
[0044] Thus, in the path of the current i that flows due to the charge extracted from the gate when the first switching element SWl is turned off, the resistor is not passed through, and thus the delay of the turn-off of the first switching element SWl can be suppressed, and thus the delay of the turn-on of the upper arm switching element Ql can be suppressed.
[0045] As Figure 3 shown, after the upper arm switching element Ql turns on, the potential of the output of the power conversion circuit 2 is positive, the first switching element SWl turns off, the second switching element SW2 turns on, and the third switching element SW3 turns on. At this time, the current i from the output of the power conversion circuit 2 flows via the path shown. Figure 3
[0046] In Figure 3 the state, the first switching element SWl has already turned off, and thus it is not a problem even if the current i flows via the first resistor Rl.
[0047] In addition, assuming that the first resistor R1 is not provided, a state of substantially short-circuiting is created, and thus there is a problem of burnout of the first diode D1, the second switching element SW2, the third diode D3, and particularly the second switching element SW2, which are elements that serve as a path for the current i. In contrast, in the present embodiment, burnout of these elements is prevented by the first resistor R1, and reduction of the current i that flows stably during conduction of the upper arm switching element Q1 is achieved, thereby reducing power consumption. In addition, in the state of Figure 2 , there is no resistance in the path of the current i, but the period is short in time, and thus burnout of elements is unlikely to occur, and thus there is no problem.
[0048] Further, in the state of Figure 3 , by the current i flowing through the first diode D1, the potential of the source of the first switching element SW1 is higher than that of the gate, and the amount of reverse bias between the gate and the source of the first switching element SW1 to the forward voltage of the first diode D1 is made, and thus the first switching element SW1 can be reliably maintained in the off state.
[0049] In addition, although not shown, in the case where the upper arm switching element Q1 is turned off, by a discharge circuit that is not shown, charges are extracted from the gate of the upper arm switching element Q1, and the upper arm switching element Q1 is turned off. In addition, the third switching element SW3 is turned off by a control circuit that is not shown and controls the operation of the third switching element SW3, and thus the second switching element SW2 is turned off, and the first switching element SW1 is turned on by a control circuit that is not shown and controls the operation of the first switching element SW1, and thus the off state of the upper arm switching element Q1 can be maintained.
[0050] Figure 4 is a circuit diagram that shows the outline structure of the upper arm drive circuit of Comparative Example 1.
[0051] The difference from Embodiment 1 shown in Figure 1 is that, in Comparative Example 1, instead of the first resistor R1, a fourth resistor R4 is provided between the source of the second switching element SW2 and the connection node N, and a discharge circuit 4 is added.
[0052] As shown in Figure 4 , the discharge circuit 4 has, for example, a fourth switching element SW4, a fifth resistor R5, and a capacitor C, and is a circuit that enables discharge by bypassing the fourth resistor R4 by turning on the discharge circuit 4 only between the CR time constant of the capacitor C and the fifth resistor R5 of the discharge circuit 4.
[0053] Figure 5 , and Figure 6 is a circuit diagram that shows the operation of the upper arm drive circuit of Comparative Example 1.
[0054] Figure 5 Indicates and Figure 2 The corresponding state. For example... Figure 5 As shown, in Comparative Example 1, when the upper arm switching element Q1 is turned on, the current i flows through the fourth resistor R4, thus causing a delay when the first switching element SW1 is turned off. As a result, the turn-on of the upper arm switching element Q1 is also delayed. Therefore, in Comparative Example 1, by adding a discharge circuit 4, the delay caused by the fourth resistor R4 is suppressed.
[0055] in addition, Figure 6 Indicates and Figure 3 The corresponding state. In Comparative Example 1, a fourth resistor R4 is provided to prevent component burnout.
[0056] In contrast to Comparative Example 1, in the embodiments, such as Figure 2 As shown, by placing a resistor at the position of the first resistor R1 instead of the fourth resistor R4, it is possible to... Figure 2 In this state, the current i does not pass through a resistor in the path, so the delay problem can be solved even without setting up a discharge circuit 4 like in Comparative Example 1.
[0057] Figure 7 This is a circuit diagram showing the outline structure of the upper arm drive circuit in Comparative Example 2.
[0058] use Figure 7 The issue of malfunction occurring when the output of power conversion circuit 2 becomes negative is explained. For example... Figure 7 As shown, the upper arm drive circuit 1 of Comparative Example 2 has a first switching element SW1, a second switching element SW2, and a fourth resistor R4. Furthermore, unlike the embodiment, Comparative Example 2 does not have wiring between the second diode D2, the connection node N, and the reference potential terminal of the upper arm switching element Q1 (which is the same as the output of the power conversion circuit 2).
[0059] In Comparative Example 2, with the upper arm switching element Q1 off, the first switching element SW1 on, and the second switching element SW2 off, the gate of the first switching element SW1 only drops to 0V, the same as the reference potential GND. Therefore, if the output of the power conversion circuit 2 becomes negative in this state, the first switching element SW1 is fixed to be on.
[0060] In this state, even if the upper arm switching element Q1 is turned on by applying a turn-on signal to the gate of the upper arm switching element Q1 through the gate drive circuit not shown, the gate of the upper arm switching element Q1 is fixed at 0V with the reference potential terminal because the first switching element SW1 is fixed to be turned on, resulting in a false operation where the upper arm switching element Q1 cannot be turned on.
[0061] In contrast,Figure 1 In the upper arm drive circuit 1 of the illustrated embodiment, in a state where the upper arm switching element Ql is off, the first switching element SWl is on, and the second switching element SW2 is off, when the output of the power conversion circuit 2 becomes a negative potential, the potential of the source of the second switching element SW2 (the potential of the connection node N) becomes, via the second diode D2, substantially the same potential as the output of the power conversion circuit 2. However, in this state, since the second switching element SW2 is off, the first switching element SWl maintains the state of being on.
[0062] Further, in the case of turning the upper arm switching element Ql on, the first switching element SWl can be turned off without being fixed to be on, and the upper arm switching element Ql can be turned on, so even in the case where the output of the power conversion circuit 2 becomes a negative potential, the misoperation as in Comparative Example 2 does not occur, and the misoperation can be prevented. Figure 2
[0063] As explained above, according to the upper arm drive circuit 1 of the embodiment, the misoperation can be prevented even in the case where the output of the power conversion circuit 2 becomes a negative potential, and the delay of turning on of the upper arm switching element Ql can be suppressed.
[0064] The above describes the embodiments of the present application, but the present application is not limited to the structures described in the embodiments, and various changes can be made within the scope of the technical idea of the present application. In addition, a part or all of the structures described in each of the embodiments can be combined and applied.
[0065] Symbol Explanation
[0066] 1: upper arm drive circuit, 2: power conversion circuit, 3: power conversion device, 4: discharge circuit, SWl: first switching element, SW2: second switching element, SW3: third switching element, SW4: fourth switching element, Dl: first diode, D2: second diode, D3: third diode, ZD: Zener diode, Rl: first resistor, R2: second resistor, R3: third resistor, R4: fourth resistor, R5: fifth resistor, C: capacitor, N: connection node, VCC: power supply potential, Ql: upper arm switching element, Q2: lower arm switching element, DQl: upper arm backflow diode, DQ2: lower arm backflow diode, VDC: direct current power supply potential, OUT: output terminal, GND: reference potential, i: current.
Claims
1. An upper arm drive circuit which drives an upper arm switching element of a power conversion circuit, characterized by, has: a first switching element whose drain is connected to the gate of the upper arm switching element and whose source is connected to the reference potential terminal of the upper arm switching element; a first diode whose cathode is connected to the gate of the first switching element and whose anode is connected to the source of the first switching element; a second diode whose cathode is connected to the anode of the first diode; a second switching element whose drain is connected to the gate of the first switching element and whose source is connected to the anode of the second diode, and which is controlled to be turned on at the time when the upper arm switching element is turned on and the first switching element is turned off; a third diode whose cathode is connected to a reference potential; and a first resistor whose one terminal is connected to a connection node between the source of the second switching element and the anode of the second diode, and whose other terminal is connected to the anode of the third diode. has:
2. The upper arm driving circuit according to claim 1, characterized by a second resistor connected to the gate of the upper arm switching element; and a Zener diode whose cathode is connected to the gate of the upper arm switching element and whose anode is connected to the reference potential terminal of the upper arm switching element. has:
3. The upper arm driving circuit according to claim 1, characterized by a third switching element of P type whose source is connected to a power supply potential and whose drain is connected to the gate of the second switching element; and a third resistor connected between the drain of the third switching element and one terminal of the first resistor.
Citation Information
Patent Citations
Upper arm drive circuit, drive circuit of power conversion apparatus, and power conversion apparatus
JP2022146525A