Weak signal adaptability testing and parameter debugging method for electroencephalogram ADC
By designing gradient signals and adjusting parameters, the problems of unsystematic EEG ADC testing and insufficient targeted adjustment were solved, enabling comprehensive adaptive testing and precise parameter adjustment of weak EEG signals, thus improving the effectiveness of the collected data.
Patent Information
- Application Number
- CN202511411577.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-29
- Publication Date
- 2025-12-12
AI Technical Summary
Existing EEG ADC testing methods lack gradient design, failing to reflect the adaptive differences of the acquisition chip under a full range of weak signals. Parameter tuning is not tailored to the characteristics of weak signals, resulting in insufficient validity of the acquired data.
A gradient test signal set is used to output a high-performance signal generator with a precise frequency and pure waveform, covering the frequency range of EEG signals. Combined with signal-to-noise ratio (SNR) and common-mode rejection ratio (CMRR) tests, a parameter tuning scheme is designed to adjust the gain and ADC register to meet the requirements.
It enables full-range weak signal adaptability testing of EEG ADC, improves the accuracy and pass rate of parameter tuning, and enhances the adaptability of the acquisition chip to weak EEG signals.
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Figure CN121101599A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of testing technology for electroencephalogram (EEG) signal acquisition equipment in biomedical engineering, specifically to a method for weak signal adaptability testing and parameter adjustment of an EEG ADC. Background Technology
[0002] Electroencephalogram (EEG) signals are a very special and complex type of bioelectrical signal. Their electrophysiological characteristics include: extremely weak amplitude, typically between 5 µV and 100 µV peak-to-peak values; a low-frequency spectrum, mainly concentrated between 0.5 Hz and 50 Hz; and a high-impedance signal source, as the signal originates from the postsynaptic potentials of neurons in the brain, attenuated by the skull and scalp, and measured on the skin surface, resulting in a high impedance electrode-skin interface. Noise and interference characteristics include: power line interference, with 50 Hz or 60 Hz power line interference and its harmonics present, whose amplitude can be several orders of magnitude stronger than the EEG signal, making it the most significant source of interference; and physiological artifacts, such as electrooculogram artifacts mainly generated by blinking and eye movements, and electromyogram artifacts mainly generated by facial and neck muscle tension or contraction. These artifacts overlap with real EEG signals in both the time and frequency domains, and are difficult to completely remove using hardware filtering alone.
[0003] As the core component of an EEG acquisition system, the adaptability of the ADC to weak EEG signals directly determines the validity of the acquired data. The weakness and low-frequency characteristics of EEG signals, coupled with interference from power frequency and electromyography (EMG), require the acquisition chip to maintain a high common-mode rejection ratio (CMRR) to suppress these interferences even with weak signal input.
[0004] Existing EEG ADC testing and debugging methods have limitations: First, weak signal testing lacks gradient design and often uses single-amplitude signal testing, which cannot reflect the adaptability differences of the acquisition chip under weak signals in the full range of 5μV-100μV; Second, parameter debugging is disconnected from the characteristics of weak signals, often using general acquisition chip parameters, such as gain and sampling rate, as the debugging object, without designing debugging strategies for signal amplification adaptability under weak signals. Therefore, there is an urgent need for a method that can systematically test the weak signal adaptability of EEG ADCs and design parameter debugging to overcome the limitations of existing methods. Summary of the Invention
[0005] The present invention proposes a method for weak signal adaptability testing and parameter adjustment of EEG ADC, which can at least solve the problems mentioned in the background technology.
[0006] To achieve the above objectives, the present invention adopts the following technical solution: A method for weak signal adaptability testing and parameter tuning of an EEG ADC, comprising the following steps: S1. Based on the amplitude range of EEG signals, a gradient test signal set is constructed. In the weak signal gradient system test stage, in order to simulate the microvolt-level characteristics of EEG signals, a high-performance signal generator is used as the signal source to output a high-quality signal with accurate frequency and pure waveform. The frequency range can cover the frequency of EEG signals. The amplitude of the sinusoidal signal increases, and the attenuated signal is analyzed and measured using an audio analyzer. S2. Input the gradient test signal into the EEG ADC to be tested, collect the output data and calculate the adaptive index.
[0007] Furthermore, S2 includes: Signal-to-noise ratio (SNR) test: Perform FFT transformation on the data output by the acquisition chip, calculate the ratio of signal frequency band power to noise frequency band power, and record SNR values at different amplitudes; Common-mode rejection ratio (CMRR) test: Simultaneously apply a sinusoidal signal to the differential signal input terminal and calculate the power value of the frequency band; Establish gradient test signals and corresponding signal-to-noise ratio (SNR) and common-mode rejection ratio (CMRR) datasets, design parameter adaptive tuning schemes, and perform gain parameter tuning. Furthermore, gain parameter tuning includes, The signal-to-noise ratio (SNR) is relatively small under low amplitude signals. The gain value is adjusted by the gain register of the acquisition chip, and the change in gain value and SNR is recorded after each adjustment. Low-amplitude signals have a low common-mode rejection ratio (CMRR). Gain is adjusted by regulating the ADC register, and the gain value and CMRR change are recorded after each adjustment. As can be seen from the above technical solution, the present invention aims to solve the problems of unsystematic testing of the adaptability of EEG ADC to weak signals and insufficient targeting of parameter tuning in existing methods, and provides a method for testing and tuning the adaptability of EEG ADC to weak signals, realizing optimization from gradient signal testing to precise parameter tuning, and improving the adaptability of EEG ADC to weak EEG signals.
[0008] Compared with existing technologies, the present invention provides a more systematic test, covering a full range of weak signal scenarios through gradient signal design, and acquiring a larger amount of data than single signal test; the debugging is more precise, and the parameter debugging adaptability is high (such as the gain adaptation rule for low amplitude signals), which effectively improves the pass rate of chip parameters after debugging. Attached Figure Description
[0009] Figure 1 This is a schematic diagram of the weak signal gradient system test according to an embodiment of the present invention; Figure 2 This is a schematic diagram of parameter adaptive control according to an embodiment of the present invention. Detailed Implementation
[0010] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments.
[0011] The weak signal adaptability test and parameter adjustment method of EEG ADC described in this embodiment includes the following steps: 1. Weak signal gradient system test like Figure 1 As shown, a gradient test signal set is constructed based on the amplitude range of EEG signals. In the weak signal gradient system test stage, in order to simulate the microvolt-level characteristics of EEG signals, a high-performance signal generator is used as the signal source to output a high-quality signal with accurate frequency and pure waveform. The frequency range can cover the frequency of EEG signals and the amplitude of the sinusoidal signal increases. However, the signal amplitude output by the signal generator is usually higher than the microvolt-level range of EEG signals. Therefore, a precision attenuator is used to attenuate the signal. At the same time, an audio analyzer is used to analyze and measure the attenuated signal.
[0012] 2. Parameter adaptability index adjustment like Figure 2 As shown, the gradient test signal is input into the EEG ADC under test, the output data is collected, and the fitness index is calculated, including: Signal-to-noise ratio (SNR) test: Perform FFT transformation on the data output by the acquisition chip, calculate the ratio of signal frequency band power to noise frequency band power, and record SNR values at different amplitudes; Common-mode rejection ratio (CMRR) test: Simultaneously apply a sine signal to the differential signal input terminal and calculate the power value of the frequency band.
[0013] Establish gradient test signals and corresponding SNR and CMRR datasets, design an adaptive parameter tuning scheme, and perform gain parameter tuning. For low-amplitude signals with low SNR, adjust the gain value by acquiring the chip's gain register, recording the gain value and SNR change after each adjustment. For low-amplitude signals with low CMRR, adjust the gain by adjusting the ADC register, recording the gain value and CMRR change after each adjustment.
[0014] The following are examples: The invention proposes a method for weak signal adaptability testing and parameter adjustment of EEG ADC.
[0015] The EEG acquisition chip with a 24-bit sampling rate of 250SPS-16kSPS was used for debugging.
[0016] 1. A weak signal gradient system was constructed using a high-precision signal generator and a precision attenuator. The amplitudes of the three signals, 5μV / 10Hz (α wave), 20μV / 20Hz (β wave), and 100μV / 50Hz (γ wave), were selected and increased in increments of 5μV to form a gradient test signal set.
[0017] 2. Input the gradient test signal into the EEG acquisition chip, collect the output data and calculate SNR and CMRR, and establish a gradient test signal and corresponding SNR and CMRR dataset.
[0018] 3. When the signal is low amplitude, SNR and CMRR are prone to not meeting the standards. It is necessary to mark the key objects for debugging and focus on adjusting the parameters to meet the requirements.
[0019] 4. Construct parameter adaptation index debugging: for signals with specific amplitude ranges, increase the gain to meet the SNR and CMRR standards.
[0020] In summary, the embodiments of the present invention provide a more systematic test, covering a full range of weak signal scenarios through gradient signal design, resulting in a larger amount of data acquisition compared to single-signal test; the debugging is more precise, and the parameter debugging adaptability is high (such as the gain adaptation rule for low-amplitude signals), effectively improving the pass rate of the chip parameters after debugging.
[0021] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for weak signal adaptability testing and parameter tuning of an EEG ADC, characterized in that, Includes the following steps, S1. Based on the amplitude range of EEG signals, a gradient test signal set is constructed. In the weak signal gradient system test stage, in order to simulate the microvolt-level characteristics of EEG signals, a high-performance signal generator is used as the signal source to output a high-quality signal with accurate frequency and pure waveform. The frequency range can cover the frequency of EEG signals. The amplitude of the sinusoidal signal increases, and the attenuated signal is analyzed and measured using an audio analyzer. S2. Input the gradient test signal into the EEG ADC to be tested, collect the output data and calculate the adaptive index.
2. The method for weak signal adaptability testing and parameter adjustment of EEG ADC according to claim 1, characterized in that: S2 includes: Signal-to-noise ratio (SNR) test: Perform FFT transformation on the data output by the acquisition chip, calculate the ratio of signal frequency band power to noise frequency band power, and record SNR values at different amplitudes; Common-mode rejection ratio (CMRR) test: Simultaneously apply a sinusoidal signal to the differential signal input terminal and calculate the power value of the frequency band; Establish gradient test signals and corresponding signal-to-noise ratio (SNR) and common-mode rejection ratio (CMRR) datasets, design parameter adaptive tuning schemes, and perform gain parameter tuning.
3. The method for weak signal adaptability testing and parameter adjustment of EEG ADC according to claim 2, characterized in that: Gain parameter tuning includes, The signal-to-noise ratio (SNR) is relatively small under low amplitude signals. The gain value is adjusted by the gain register of the acquisition chip, and the change in gain value and SNR is recorded after each adjustment. Low-amplitude signals have a small common-mode rejection ratio (CMRR). The gain is adjusted by adjusting the ADC register, and the gain value and the change in CMRR are recorded after each adjustment.