Preparation method of indium column, indium column and infrared detector

Abstract

The application provides an indium column preparation method and an indium column and an infrared detector, and belongs to the technical field of infrared detectors. The method comprises the following steps: forming a mesa of each contact layer by using a conventional mesa manufacturing process, then performing photoetching, passivation and cleaning; growing ubm metal in the opening by using a metal evaporation process to form a ubm electrode, then stripping and cleaning; forming an indium column photoetching hole on each ubm electrode by using a photoetching process, growing an indium layer in the indium column photoetching hole, then stripping and cleaning; and performing a reflow process on the chip after cleaning, so that uniform indium column solder joints with the same upper surface level are obtained through the melting of the indium column and the surface tension effect after the reflow process. The application is applied to the preparation of indium columns of infrared detectors.

Description

Technical Field

[0001] This application relates to the field of infrared detector technology, and in particular to a method for preparing an indium pillar, as well as the indium pillar and the infrared detector. Background Technology

[0002] Compared to monochromatic infrared detectors, multicolor infrared detectors can suppress complex backgrounds and have advantages such as a wide detection range, rich feature information, and strong anti-interference capabilities. They have broad application prospects in guidance, early warning, and search and tracking systems, and are currently a hot topic in the field of infrared detection and imaging. Existing multicolor infrared detectors require electrodes to be fabricated at contact layers of different depths to achieve ohmic contact, thus presenting a technical challenge of electrical signal extraction at multiple height differences. Current electrode fabrication processes typically use strip electrode leads to guide the electrical signals from deeply etched contact holes to a horizontal position via a ramping process, facilitating subsequent solder joint fabrication and interconnection processes.

[0003] However, as multicolor detector technology advances towards multi-band and small-pitch designs, the etching aspect ratio of the detector's mesa pixels is gradually increasing. This, in turn, increases the difficulty of fabricating electrodes on the mesa sidewalls with large aspect ratios. Due to the small metal deposition angle, the sidewall electrodes are prone to thinness, leading to excessive impedance and the risk of disconnection. Furthermore, because the lead-out electrodes are typically elongated, they do not match the circular hole shape of conventional solder joints, limiting subsequent reflow balling processes and hindering the guarantee of solder joint uniformity.

[0004] Existing detector electrode processes still suffer from overlay misalignment. Current detector processes require passivation photolithography, plasma etching, and resist removal cleaning before electrode photolithography. Due to the overlay misalignment between the two photolithography processes of electrode photolithography and passivation photolithography, this misalignment also limits the morphology after the subsequent indium pillar reflow process. Summary of the Invention

[0005] To address the problems of excessively thin sidewall electrodes and high impedance in existing infrared detector electrode ramping growth processes, this application proposes an indium pillar preparation method, as well as an indium pillar and an infrared detector.

[0006] The technical solution adopted in this application is: a method for preparing indium pillars, comprising the following steps:

[0007] Step 1: The mezzanine of each contact layer is formed using conventional mezzanine manufacturing processes, followed by photolithography to create holes, passivation of the holes, and cleaning.

[0008] Step 2: UBM metal is grown in the opening using a metal vapor deposition process to form UBM electrodes, which are then peeled off and cleaned. The area of ​​the UBM electrode corresponding to each contact layer is set to b.

[0009] Step 3: Form indium pillar photolithography holes on each UBM electrode using photolithography. Grow an indium layer in the indium pillar photolithography holes, then peel off and clean. Based on the increasing etching depth of each contact layer mesa, let the opening areas of each contact layer be c1, c2, ..., cn, where c1 < c2 < ... < cn; and let the height of the indium layer be d, such that... , where hn represents the mesa etching depth of the nth contact layer;

[0010] Step 4: After cleaning, the chip is reflowed to obtain indium pillar solder joints with the same horizontal height on the upper surface of each contact layer.

[0011] Furthermore, step one specifically includes:

[0012] Step S1: The mezzanine of each contact layer is formed using conventional mezzanine fabrication process. The mezzanine includes a contact layer and a passivation layer from bottom to top. A photoresist array is formed on the passivation layer using photolithography.

[0013] Step S2: Etch contact holes corresponding to each contact layer in the passivation layer;

[0014] Step S3: Clean the residual adhesive and etching products from the etched contact holes.

[0015] Furthermore, in step S2, a plasma dry etching process is used to etch contact holes on the contact layer.

[0016] Furthermore, in step S3, a plasma dry cleaning process is used to clean the contact holes.

[0017] Furthermore, step two specifically includes:

[0018] Step S4: UBM metal is grown in the contact hole using a metal vapor deposition process to form a UBM electrode;

[0019] Step S5: Perform photoresist stripping and cleaning on the chip after UBM electrode growth is completed.

[0020] Furthermore, the height of the ubm electrode formed in step S4 is higher than that of the passivation layer.

[0021] Furthermore, step three specifically includes:

[0022] Step S6: After cleaning, indium pillar photolithography holes are formed on each UBM electrode using photolithography.

[0023] Step S7: An indium layer is grown in the indium pillar photolithography hole using an indium vapor deposition process.

[0024] Furthermore, the reflux process in step four employs an indium pillar reflux process.

[0025] An indium pillar prepared using the aforementioned indium pillar preparation method.

[0026] An infrared detector comprising the aforementioned indium pillar.

[0027] The advantages of this application over the prior art are as follows:

[0028] 1. Compared with conventional processes, the electrode process of this application does not require sidewall ramping, which can avoid the risk of excessively thin sidewall electrodes and high impedance;

[0029] 2. This application can control the amount of indium deposited by controlling the opening area of ​​the indium pillar photolithography and the height of the indium pillar evaporation. After the reflow process, the indium pillar solder joints with the same horizontal height on the upper surface are obtained by the melting of the indium pillar, surface tension and the wetting effect of UBM metal on liquid indium, thereby ensuring the uniformity of the flip soldering process.

[0030] 3. The passivation opening process and electrode growth process in this application can be completed in one photolithography step, thereby eliminating the overlay deviation between passivation opening photolithography and electrode photolithography in conventional processes, saving time and material costs, and avoiding non-uniform defects in subsequent indium pillar growth caused by overlay deviation. Attached Figure Description

[0031] The following description, in conjunction with the accompanying drawings, further illustrates this application:

[0032] Figure 1 This is a schematic diagram of the photoresist array structure after photolithography is completed in step S1 of the method of this application.

[0033] Figure 2 This is a schematic diagram of the structure after plasma dry etching and dry cleaning are completed through steps S2 and S3 of the method described in this application.

[0034] Figure 3 This is a schematic diagram of the structure after UBM metal vapor deposition is completed through step S4 of the method described in this application;

[0035] Figure 4 This is a schematic diagram of the structure after UBM metal stripping and cleaning is completed through step S5 of the method in this application.

[0036] Figure 5 This is a schematic diagram of the structure after indium pillar lithography is completed through step S6 of the method in this application;

[0037] Figure 6 This is a schematic diagram of the structure after indium pillar evaporation completed through step S7 of the method in this application;

[0038] Figure 7 This is a schematic diagram of the structure after indium stripping and cleaning is completed through step S8 of the method in this application.

[0039] Figure 8 This is a schematic diagram of the structure after indium pillar reflux is completed through step S9 of the method in this application;

[0040] In the diagram: 1 is the contact layer, 2 is the passivation layer, 3 is the photoresist, 4 is the first contact layer, 5 is the second contact layer, 6 is the third contact layer, 7 is the contact hole, 8 is the UBM metal, 9 is the indium pillar solder joint, and 10 is the indium pillar photolithographic hole. Detailed Implementation

[0041] like Figures 1 to 8 As shown, this application provides a method for preparing indium pillars, the main technical concept of which is as follows: by designing a photolithographic pattern to control the size of the photolithographic apertures of indium and the amount of indium deposited, and after a reflow process, uniform indium pillar solder joints 9 with the same horizontal height on the upper surface are obtained through the melting of the indium pillars and the action of surface tension.

[0042] Based on the above technical concept, the indium pillar preparation method of this application mainly includes the following steps:

[0043] Step 1: The mezzanine of each contact layer is formed using conventional mezzanine manufacturing processes, followed by photolithography to create holes, passivation of the holes, and cleaning.

[0044] Step 2: UBM metal is grown in the opening using a metal vapor deposition process to form UBM electrodes, which are then peeled off and cleaned. The area of ​​the UBM electrode corresponding to each contact layer is set to b.

[0045] Step 3: Form indium pillar photolithography holes on each UBM electrode using photolithography. Grow an indium layer in the indium pillar photolithography holes, then peel off and clean. Based on the increasing etching depth of the mesa of each contact layer, let the opening areas of each contact layer be c1, c2, ..., cn, where c1 < c2 < ... < cn; and let the height of the indium layer be d, such that... , where hn represents the mesa etching depth of the nth contact layer;

[0046] Step 4: After cleaning, the chip is reflowed to obtain indium pillar solder joints with the same horizontal height on the upper surface of each contact layer.

[0047] The method of this application will be further described below with reference to a specific embodiment.

[0048] Example 1: In this example, there are three types of contact layers with different heights, namely the first contact layer 4, the second contact layer 5, and the third contact layer 6. The etching depth of the mesa of the first contact layer 4, the second contact layer 5, and the third contact layer 6 increases sequentially.

[0049] Based on this, the indium pillar preparation method of this application includes the following steps:

[0050] Step S1: A mesa with three contact layers is formed using conventional mesa fabrication technology. The mesa includes a contact layer 1 and a passivation layer 2 from bottom to top. Photoresist 3 is spin-coated onto the passivation layer 2. Then, photolithography is used to create openings in the photoresist 3 on the passivation layer 2 corresponding to the three contact layers 1, thereby forming a photoresist array. Figure 1 As shown.

[0051] In this embodiment, the opening depth corresponding to the first contact layer 4 is a1, the opening depth corresponding to the second contact layer 5 is a2, and the opening depth corresponding to the third contact layer 6 is a3, where a1 < a2 < a3.

[0052] Step S2: Using plasma dry etching process, contact holes 7 corresponding to the three contact layers 1 are etched in passivation layer 2.

[0053] Step S3; Use plasma dry cleaning process to clean the residual adhesive and etching products from the etched contact hole 7, to obtain the following... Figure 2 The structure shown is an example of this step, which aims to remove byproducts generated by dry etching while preserving the photolithographic aperture array framework to ensure the subsequent electrode growth.

[0054] Step S4: UBM metal 8 is grown in contact hole 7 using a metal vapor deposition process to form UBM electrode, such as... Figure 3 As shown. And assume that the area of ​​the ubm electrode in the first contact layer 4, the second contact layer 5, and the third contact layer 6 is all b. And the height of the formed ubm electrode needs to be higher than the passivation layer 2.

[0055] Step S5: Perform photoresist stripping and cleaning on the chip after UBM electrode growth to obtain the following... Figure 4 The structure shown.

[0056] Step S6: After cleaning, indium pillar photolithography holes 10 are formed on each UBM electrode using a photolithography process, such as... Figure 5 As shown; let the opening area of ​​the first contact layer 4 be c1, the opening area of ​​the second contact layer 5 be c2, and the opening area of ​​the third contact layer 6 be c3, where c1 < c2 < c3.

[0057] Step S7: An indium layer is grown in the indium pillar photolithography hole 10 using an indium evaporation process, such as... Figure 6 As shown; let the height of the indium layer be d, and make such that... Where h2 represents the mesa etching depth of the second contact layer 5 and h3 represents the mesa etching depth of the third contact layer 6. The purpose of this ratio is to ensure that the height of all indium pillar solder joints 9 is consistent after the final reflow process.

[0058] Step S8: Perform photoresist stripping and cleaning processes on the chip after indium evaporation to obtain the following... Figure 7 The structure shown.

[0059] Step S9: After cleaning, the chip is reflowed using a reflow process. The purpose is to utilize the surface tension of the liquid metal during indium pillar reflow and to minimize surface energy. Liquid indium can wet the UBM metal 8 without spreading into the passivation layer 2 and the air. In the wetted UBM layer, the liquid indium is held in place, while in the unwetted passivation layer 2 and the air layer above, the liquid indium contracts under surface tension. Since the volume ratio of indium to the area of ​​UBM metal 8 at different contact layer 1 positions is d:(d+h2):(d+h3), after reflow, each contact layer 1 can obtain indium pillar solder joints 9 with the same horizontal height on the upper surface, such as... Figure 8 As shown.

[0060] This application also proposes an indium pillar, which is prepared using the indium pillar preparation process described above.

[0061] This application also proposes an infrared detector, which uses the above-described indium pillar fabrication process to prepare indium pillar solder joints 9 with the same horizontal height on the upper surface.

[0062] The electrode growth and passivation opening fabrication in this application are completed in one step by photolithography followed by etching and vapor deposition, eliminating the overlay deviation of conventional processes.

[0063] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A method for preparing an indium pillar, characterized in that: Includes the following steps: Step 1: The mezzanine of each contact layer is formed using conventional mezzanine manufacturing processes, followed by photolithography to create holes, passivation of the holes, and cleaning. Step 2: UBM metal is grown in the opening using a metal vapor deposition process to form UBM electrodes, which are then peeled off and cleaned. The area of ​​the UBM electrode corresponding to each contact layer is set to b. Step 3: Form indium pillar photolithography holes on each UBM electrode using photolithography. Grow an indium layer in the indium pillar photolithography holes, then peel off and clean. Based on the increasing etching depth of the mesa of each contact layer, let the opening areas of each contact layer be c1, c2, ..., cn, where c1 < c2 < ... < cn; and let the height of the indium layer be d, such that... , where hn represents the mesa etching depth of the nth contact layer; Step 4: After cleaning, the chip is reflowed to obtain indium pillar solder joints with the same horizontal height on the upper surface of each contact layer.

2. The method for preparing an indium pillar according to claim 1, characterized in that: Step one specifically includes: Step S1: The mezzanine of each contact layer is formed using conventional mezzanine fabrication process. The mezzanine includes a contact layer and a passivation layer from bottom to top. A photoresist array is formed on the passivation layer using photolithography. Step S2: Etch contact holes corresponding to each contact layer in the passivation layer; Step S3: Clean the residual adhesive and etching products from the etched contact holes.

3. The method for preparing an indium pillar according to claim 2, characterized in that: In step S2, a plasma dry etching process is used to etch contact holes on the contact layer.

4. The method for preparing an indium pillar according to claim 3, characterized in that: In step S3, a plasma dry cleaning process is used to clean the contact holes.

5. The method for preparing an indium pillar according to claim 2, characterized in that: Step two specifically includes: Step S4: UBM metal is grown in the contact hole using a metal vapor deposition process to form a UBM electrode; Step S5: Perform photoresist stripping and cleaning on the chip after UBM electrode growth is completed.

6. The method for preparing an indium pillar according to claim 5, characterized in that: The height of the ubm electrode formed in step S4 is higher than that of the passivation layer.

7. The method for preparing an indium pillar according to claim 5, characterized in that: Step three specifically includes: Step S6: After cleaning, indium pillar photolithography holes are formed on each UBM electrode using photolithography. Step S7: An indium layer is grown in the indium pillar photolithography hole using an indium vapor deposition process.

8. The method for preparing an indium pillar according to claim 1, characterized in that: The reflux process in step four uses an indium pillar reflux process.

9. An indium pillar prepared by the indium pillar preparation method according to any one of claims 1-8.

10. An infrared detector, characterized in that: Includes the indium pillar as described in claim 9.

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