Graphical simulation method and device for signal flow, equipment and storage medium

Abstract

The invention discloses a graphical simulation method, device and equipment for a signal flow and a storage medium. The method comprises the following steps: detecting a coupling relationship between to-be-simulated components, and when the coupling relationship between the to-be-simulated components is cross-domain coupling, generating an original signal flow based on the to-be-simulated components and a side structure object connected with the to-be-simulated components; carrying out compiling and redundancy elimination on the original signal flow by adopting a sparse Boolean matrix to obtain a preprocessed signal flow; loop detection is carried out on the preprocessed signal flow, when a loop is detected, loop breaking processing is carried out on the detected loop, and a target signal flow is generated; graphical simulation is completed on the basis of the target signal flow, the multi-field coupling relation in the simulation model is automatically analyzed on the premise of not depending on manual intervention, the execution sequence conforming to physical constraints is generated, and the efficiency and accuracy of simulation modeling are effectively improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of system simulation, in particular to a graphical simulation method and device for signal flow, equipment and storage medium. BACKGROUND

[0002] Current multi-domain system simulation software (such as MATLAB / Simulink, Dassault Dymola, Siemens Amesim) generally adopts a graphical modeling method, and users construct a multi-domain coupled system model in the control field, mechanical field, energy field, etc. by dragging components and connection lines. When constructing a model, the traditional simulation modeling algorithm cannot distinguish the signal interface dependency types of components in different domains because the properties of components in different domains are different, and it will be judged as parallel computable, which leads to the situation that data competition and numerical oscillation occur when cross-domain components are coupled, and it also cannot accurately simulate the model containing a feedback loop in the same domain, which greatly affects the efficiency and accuracy of simulation modeling. SUMMARY

[0003] The embodiments of the present application provide a graphical simulation method for signal flow, solve the problems of low simulation modeling efficiency and low accuracy in the prior art, realize automatic analysis of multi-domain coupling relationship in a simulation model without relying on manual intervention, generate an execution order that meets physical constraints, reduce the configuration time from hours to seconds, greatly reduce the simulation error rate, and effectively improve the efficiency and accuracy of simulation modeling.

[0004] In a first aspect, the embodiments of the present application provide a graphical simulation method for signal flow, comprising: detecting the coupling relationship between the to-be-simulated components, and when the coupling relationship between the to-be-simulated components is cross-domain coupling, generating an original signal flow based on the to-be-simulated components and the edge structure object connecting the to-be-simulated components; compiling and eliminating the redundancy of the original signal flow by using a sparse Boolean matrix to obtain a preprocessed signal flow; detecting a loop for the preprocessed signal flow, and when a loop is detected, performing loop breaking processing on the detected loop to generate a target signal flow; completing graphical simulation based on the target signal flow.

[0005] In combination with the first aspect, in a possible implementation manner, when the coupling relationship between the to-be-simulated components is cross-domain coupling, the original signal flow is generated based on the to-be-simulated components and the edge structure object connecting the to-be-simulated components, comprising: when the coupling relationship between the to-be-simulated components is cross-domain coupling, the edge structure object connecting the to-be-simulated components is type-labeled to obtain the cross-domain label of each edge structure object; A default delay time is set, and an original signal stream is generated based on a to-be-simulated component node corresponding to each edge structure object, a reference weight of the to-be-simulated component node, a cross-domain mark, and the default delay time.

[0006] With reference to the first aspect, in a possible implementation manner, the compiling and redundancy elimination of the original signal stream by using the sparse Boolean matrix to obtain the preprocessed signal stream comprises: The original signal stream is input into a graph encoder for compiling, and the compiled data is stored by using a sparse Boolean matrix structure to construct an adjacency relationship matrix. The edge structure objects in the original signal stream are merged and removed based on the adjacency relationship matrix, and the edge structure object with the largest weight is retained, and a preprocessed signal stream is output.

[0007] With reference to the first aspect, in a possible implementation manner, the loop detection of the preprocessed signal stream, when a loop is detected, the detected loop is broken to generate a target signal stream, comprises: Step one: initialization processing of the preprocessed signal stream is performed to determine the priority of each to-be-simulated component node in the preprocessed signal stream, and a priority queue is generated based on the to-be-simulated component node and the corresponding priority. Step two: a to-be-simulated component node corresponding to the highest priority in the priority queue is selected as a source node, and the source node is added to an execution queue. Step three: the length of the execution queue is determined, and if the length of the execution queue is less than the total number of to-be-simulated component nodes in the priority queue, it indicates that there is a strongly connected component constituting a loop in the preprocessed signal stream. Step four: when a loop is detected, the detected loop is broken to generate a target signal stream. Step five: all adjacent nodes of the source node in the priority queue are traversed, and the in-degree value of each adjacent node is reduced by one, and the adjacent node with the reduced in-degree value of 0 is taken as a target node. Step six: the source node in the priority queue is deleted, and the target node is added to the priority queue, and the priority queue is updated. Step seven: the above steps two to six are iteratively executed until the priority queue is empty or the number of repeated iterations reaches a maximum iteration number, and then the iteration is stopped.

[0008] With reference to the first aspect, in a possible implementation manner, the initialization processing of the preprocessed signal stream to determine the priority of each to-be-simulated component node in the preprocessed signal stream comprises: An initialization connection adjustment weight of each to-be-simulated component node in the preprocessed signal stream is calculated, and the in-degree value of each to-be-simulated component node is counted by using an inverse adjacency matrix. The initialization connection adjustment weight of each to-be-simulated component node is multiplied by the in-degree value to obtain the priority of the to-be-simulated component node.

[0009] With reference to the first aspect, in a possible implementation manner, the calculation of the initialization connection adjustment weight of each to-be-simulated component node in the preprocessed signal flow comprises: The global connection density index, the global structure hub index, and the system-level propagation delay index of each to-be-simulated component node in the preprocessed signal flow are calculated. The weight adjustment coefficients corresponding to the global connection density index, the global structure hub index, and the system-level propagation delay index are respectively acquired, and a first weight calculation formula is invoked to calculate the initialization connection adjustment weight. The first weight calculation formula is specifically as follows:

[0010] In the formula, the first weight calculation formula is specifically as follows: indicates the i-th to-be-simulated component node, indicates the initialization connection adjustment weight of the i-th to-be-simulated component node, indicates the weight adjustment coefficient corresponding to the global connection density index, indicates the global connection density index of the i-th to-be-simulated component node, indicates the weight adjustment coefficient corresponding to the global structure hub index, indicates the global structure hub index of the i-th to-be-simulated component node, indicates the weight adjustment coefficient corresponding to the system-level propagation delay index, indicates the system-level propagation delay index of the i-th to-be-simulated component node.

[0011] With reference to the first aspect, in a possible implementation manner, when the loop is detected, the detected loop is subjected to loop breaking processing to generate a target signal flow, which comprises: When the loop is detected, the Tarjan algorithm is adopted to identify the strongly connected components among the to-be-simulated component nodes with the in-degree value of 0 in the preprocessed signal flow, and the loop in the preprocessed signal flow is determined according to the strongly connected components. The set of to-be-simulated component nodes with the node attribute of being allowed to be broken on the loop is taken as a candidate node set, a second weight calculation formula is invoked to calculate the loop breaking connection adjustment weight of each to-be-simulated component node in the candidate node set, and the to-be-simulated component node with the largest weight is selected as the loop breaking point. ​​​​​The delay module is inserted before the loop breaking point to complete the loop breaking processing, update the preprocessed signal stream, and take the updated preprocessed signal stream as the target signal stream. The second weight calculation formula is specifically:

[0012] In the formula, denotes the i-th to-be-simulated component node, denotes the i-th to-be-simulated component node, denotes the i-th to-be-simulated component node, denotes the loop breaking connection adjustment weight of the i-th to-be-simulated component node, denotes the component-in connection density index of the i-th to-be-simulated component node, denotes the weight adjustment coefficient corresponding to the component-in connection density index, denotes the loop destruction rate index of the i-th to-be-simulated component node, denotes the weight adjustment coefficient corresponding to the loop destruction rate index, denotes the residual graph perturbation degree index of the i-th to-be-simulated component node, denotes the weight adjustment coefficient corresponding to the residual graph perturbation degree index.

[0013] In a second aspect, an embodiment of the present application provides a graphical simulation device of a signal stream, including: An original signal stream generation module is configured to detect a coupling relationship between to-be-simulated components, and when the coupling relationship between the to-be-simulated components is cross-domain coupling, generate an original signal stream based on the to-be-simulated components and an edge structure object connecting the to-be-simulated components; A preprocessed signal stream generation module is configured to compile and eliminate redundancy of the original signal stream by using a sparse Boolean matrix to obtain a preprocessed signal stream; A target signal stream generation module is configured to perform loop detection on the preprocessed signal stream, perform loop breaking processing on a detected loop when the loop is detected, and generate a target signal stream; A target signal stream simulation module is configured to complete graphical simulation based on the target signal stream.

[0014] In a third aspect, an embodiment of the present application provides a device, including a processor, a memory for storing processor-executable instructions, and the processor executes the executable instructions to implement the method in the first aspect or any possible implementation manner of the first aspect.

[0015] ​​​Fourthly, embodiments of this application provide a non-volatile computer-readable storage medium, the non-volatile computer-readable storage medium including storage for storing a computer program or instructions that, when executed, cause the method described in the first aspect or any possible implementation of the first aspect to be implemented.

[0016] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages: This application embodiment detects the coupling relationship between the components to be simulated to determine whether the coupling relationship between the components is cross-domain. When the coupling relationship between the components to be simulated is cross-domain, an original signal flow is generated based on the component to be simulated and the edge structure object connecting the component to be simulated. Then, a sparse Boolean matrix is ​​used to compile and eliminate redundancy in the original signal flow formed by the component to be simulated and the edge structure object connecting the component to be simulated, resulting in a preprocessed signal flow. Then, loop detection is performed on the preprocessed signal flow. When a loop is detected, the detected loop is broken. This achieves the effect that the graphical simulation of the signal flow does not rely on manual intervention, can automatically parse the multi-domain coupling relationship in the simulation model, and generate an execution order that conforms to physical constraints. This reduces the configuration time of the graphical simulation from hours to seconds and greatly reduces the simulation error rate, effectively improving the efficiency and accuracy of simulation modeling. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 A flowchart illustrating a graphical simulation method for signal flow provided in this application embodiment; Figure 2 A flowchart for generating the target signal stream provided in an embodiment of this application; Figure 3 A flowchart for initializing a preprocessed signal stream is provided in an embodiment of this application; Figure 4 A flowchart for determining the initial connection adjustment weights provided in this application embodiment; Figure 5 A flowchart illustrating the loop breaking process performed by the loop elimination subroutine provided in this application embodiment; Figure 6 This is a signal flow graph before loop breaking processing provided in an embodiment of this application; Figure 7This is a signal flow graph after loop breaking processing provided in an embodiment of this application; Figure 8 This is a schematic diagram of the structure of a graphical simulation device for signal flow provided in an embodiment of this application. Detailed Implementation

[0019] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0020] The following description of some technologies involved in the embodiments of this application is provided to aid understanding and should be considered merely exemplary. Therefore, those skilled in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of this application. Similarly, for clarity and brevity, some descriptions of well-known functions and structures are omitted in the following description.

[0021] Figure 1 This is a flowchart of a graphical simulation method for signal flow provided in an embodiment of this application, including steps S10 to S40. Wherein, Figure 1 This is merely one execution order shown in the embodiments of this application, and does not represent the only execution order of the graphical simulation method for signal flow in this application. Where the final result can be achieved, Figure 1 The steps shown can be performed in parallel or in reverse order.

[0022] Specifically, the graphical simulation method for signal flow provided in this application includes the following steps: S10: Detect the coupling relationship between the components to be simulated. When the coupling relationship between the components to be simulated is cross-domain coupling, generate the original signal flow based on the component to be simulated and the edge structure object connecting the component to be simulated.

[0023] Here, the component to be simulated refers to the component that needs to be simulated. Cross-domain coupling refers to the connection relationship between components to be simulated in different physical domains. In this embodiment, the physical domains include, but are not limited to, the control domain, the mechanical domain, and the energy domain. The original signal flow refers to the signal flow composed of the component to be simulated and the edge structure objects connecting the components to be simulated.

[0024] Specifically, after detecting the component to be simulated, the simulation software will traverse the physical properties of the component to be simulated to determine whether there is a cross-domain coupling relationship between the component to be simulated, such as the data coupling between a discrete controller (sampling period of 1ms) in the control domain and a continuous dynamic component (integration step size of 0.01ms) in the mechanical domain. When it is determined that there is a cross-domain coupling relationship, a "hybrid zero-order hold type" type mark is inserted into the edge structure object connecting the component to be simulated, thereby obtaining the cross-domain mark of each edge structure object. Then, a default delay time is set in the edge structure object.

[0025] In this embodiment, each component to be simulated carries a baseline weight. After obtaining the default delay time, the simulation software generates the original signal stream based on the component node to be simulated corresponding to each edge structure object, the baseline weight of the component node to be simulated, the cross-domain marker, and the default delay time.

[0026] The baseline weights of the components to be simulated are derived from their static attributes, including their computational complexity level, the reciprocal of the sampling period, and the physical domain type coefficient. These baseline weights are determined when the model is first loaded and remain unchanged during subsequent dynamic calculations.

[0027] By inserting type markers and setting default delay times in edge structure objects, multi-domain coupling relationships in graphical models can be automatically resolved without manual intervention. This overcomes the problem that traditional simulation modeling algorithms would determine the components to be simulated in cross-domain coupling relationships as parallel computable, leading to data competition and data oscillation, and realizes cross-domain data coupling.

[0028] S20: The original signal stream is compiled and redundancy is eliminated using a sparse Boolean matrix to obtain a preprocessed signal stream.

[0029] Among them, the preprocessed signal stream refers to the signal stream obtained after compiling and redundancy elimination of the original signal stream.

[0030] Specifically, after obtaining the original signal stream, it is input into a graph encoder for compilation, and the compiled data is stored using a sparse Boolean matrix structure to construct an adjacency matrix. Then, based on the elements in the adjacency matrix, the edge structure objects in the original signal stream are merged and removed, eliminating duplicate connections and self-loop connections, and retaining the simulated component node with the largest baseline weight and its corresponding edge structure object to form a preprocessed signal stream.

[0031] The preprocessed signal stream is represented by a dual matrix in Compressed Sparse Row (CRS) storage format. The forward adjacency matrix is ​​used for forward traversal calculation, and the reverse adjacency matrix is ​​used for reverse source lookup. Using CRS dual matrix representation to represent the preprocessed signal stream can strictly control its memory usage within the range proportional to the sum of the number of nodes and the number of edges.

[0032] S30: Perform loop detection on the preprocessed signal stream. When a loop is detected, break the loop and generate the target signal stream.

[0033] S40: Perform graphical simulation based on the target signal flow.

[0034] The target signal stream refers to the signal stream obtained after breaking the loops in the preprocessed signal stream.

[0035] Specifically, after obtaining the preprocessed signal stream, loop detection is performed on the preprocessed signal stream to determine whether a loop exists. When a loop is detected, loop breaking is performed on the detected loop. In this embodiment, the loop breaking process includes, but is not limited to, calling a loop resolution subroutine. The specific execution process of the loop resolution subroutine includes: using the Tarjan algorithm to identify strongly connected components between simulation component nodes with in-degree values ​​not equal to 0 in the preprocessed signal stream, and determining the loop in the preprocessed signal stream based on the strongly connected components; taking the set of simulation component nodes with node attributes that allow disconnection on the loop as a candidate node set, and calling the second weight calculation formula to calculate the loop breaking connection adjustment weight of each simulation component node in the candidate node set, selecting the simulation component node with the largest weight as the loop breaking point; inserting a delay module before the loop breaking point to complete the loop breaking process, updating the preprocessed signal stream, and using the updated preprocessed signal stream as the target signal stream; by executing the above loop breaking process, automatic solution of the loop-containing model can be achieved without manual loop breaking, solving the problem that traditional simulation modeling algorithms cannot terminate under loop-containing models.

[0036] The target signal stream obtained by loop breaking is more consistent with the execution order of physical constraints. Using this target signal stream for graphical simulation effectively improves simulation efficiency and accuracy.

[0037] Furthermore, after obtaining the preprocessed signal stream, such as Figure 2 As shown, step S30 involves loop detection on the preprocessed signal stream. When a loop is detected, the detected loop is broken to generate the target signal stream. Specifically, this includes the following steps: Step 1: Initialize the preprocessed signal stream, determine the priority of each simulated component node in the preprocessed signal stream, and generate a priority queue based on the simulated component node and its corresponding priority. Step 2: Select the simulated component node with the highest priority in the priority queue as the source node and add it to the execution queue. Step 3: Determine the length of the execution queue. If the length of the execution queue is less than the total number of simulated component nodes in the priority queue, it indicates that a strongly connected component forms a loop in the preprocessed signal stream. Step 4: When a loop is detected, break the loop and generate the target signal stream. Step 5: Traverse all adjacent nodes of the source node in the priority queue, decrement the in-degree value of each adjacent node by one, and select the adjacent node with an in-degree value of 0 after decrementing as the target node. Step 6: Delete the source node from the priority queue and add the target node to the priority queue, updating the priority queue. Step 7: Repeat steps 2 to 6 until the priority queue is empty or the maximum number of iterations is reached, then stop.

[0038] In this embodiment, the maximum number of iterations is the number of edge structure objects in the preprocessed signal stream.

[0039] Furthermore, such as Figure 3 As shown, step one initializes the preprocessed signal stream and determines the priority of each node of the component to be simulated in the preprocessed signal stream. Specifically, this includes the following steps: S31: Calculate the initial connection adjustment weight of each node of the component to be simulated in the preprocessed signal stream, and count the in-degree value of each node of the component to be simulated by using the inverse adjacency matrix.

[0040] The in-degree value of the component node to be simulated refers to the number of edge structure objects input to that component node.

[0041] S32: Multiply the initial connection adjustment weight of each component node to be simulated by the in-degree value to obtain the priority of the component node to be simulated.

[0042] Specifically, the smaller the initial connection adjustment weight of the component node to be simulated, the higher its priority.

[0043] Furthermore, such as Figure 4 As shown, in step S31, the initial connection adjustment weight of each node of the component to be simulated in the preprocessed signal stream is calculated, which specifically includes the following steps: S311: Calculate the global connectivity density, global structural hub degree, and system-level propagation delay of each component node to be simulated in the preprocessed signal flow.

[0044] The global connection density index refers to the number of edge structure objects directly connected to the node of the component to be simulated in the preprocessed signal flow. The larger the value, the heavier the load as an information hub and the lower the initial priority.

[0045] The global structural hub index refers to the cumulative depth score of the component node to be simulated participating in all loops in the preprocessed signal flow. The larger the value, the deeper its level in the multi-ring nested structure and the lower its initial priority.

[0046] The system-level propagation delay index refers to the sum of the shortest paths from the node of the component to be simulated to all other nodes of the component to be simulated in the preprocessed signal stream. The larger the value, the wider its global influence as an information source and the lower its initial priority.

[0047] S312: Obtain the weight adjustment coefficients corresponding to the global connection density index, the global structural hub index, and the system-level propagation delay index respectively, and call the first weight calculation formula to calculate the initial connection adjustment weight.

[0048] The initial connection adjustment weights are weighted and synthesized based on the three dimensions of indicators in step S311. The synthesis formula is the sum of the products of each indicator and its corresponding weight adjustment coefficient.

[0049] The specific formula for calculating the first weight is as follows:

[0050] In the formula, Indicates the first One component node to be simulated. Indicates the first Adjust the initial connection weights of each component node to be simulated. This represents the weight adjustment coefficient corresponding to the global connectivity density metric. Indicates the first The global connection density index of each component node to be simulated. This represents the weight adjustment coefficient corresponding to the global structural hub index. Indicates the first The global structural hub degree index of each component node to be simulated. This represents the weight adjustment coefficient corresponding to the system-level propagation delay metric. Indicates the first The system-level propagation delay metric for each component node to be simulated.

[0051] It should be noted that, The smaller the value, the more significant the difference in the number of nodes of the component to be simulated. The higher the computational readiness, the higher the priority, and the more likely it should be placed in the priority queue.

[0052] The weighting adjustment coefficient in this embodiment , and These are static benchmark coefficients, and the sum of the three is 1.

[0053]

[0054] In the formula, Indicates the first One component node to be simulated. Indicates the first The global connection density index of each component node to be simulated. Indicates the first preprocessed signal stream The number of edge structure objects connected to the input side of each component node to be simulated. Indicates the first preprocessed signal stream The number of edge structure objects connected to the output side of each component node to be simulated.

[0055]

[0056] In the formula, Indicates the first One component node to be simulated. Indicates the first The global structural hub degree index of each component node to be simulated. This indicates the total number of loops in the preprocessed signal stream. Indicates the first Each loop corresponds to a strongly connected component; For indicator functions, when For the first The node of the component to be simulated in each loop, then ,when Not for the first The node of the component to be simulated in each loop, then .

[0057]

[0058] In the formula, Indicates the first The system-level propagation delay metrics for each component node to be simulated Indicates the first One component node to be simulated. Indicates the first One component node to be simulated. This represents all the component nodes to be simulated in the preprocessed signal stream. Indicates the first preprocessed signal stream The node to be simulated is the first component node. The shortest forward path length of each component node to be simulated.

[0059] Furthermore, such as Figure 5 As shown, in step four, when a loop is detected, the detected loop is broken to generate the target signal stream. This specifically includes the following steps: S41: When a loop is detected, the Tarjan algorithm (an algorithm for finding strongly connected components in a directed graph) is used to identify strongly connected components between nodes of the simulated component with a non-zero in-degree value in the preprocessed signal flow, and the loop in the preprocessed signal flow is determined based on the strongly connected components.

[0060] S42: Take the set of simulated component nodes whose node attributes on the loop are allowed to be disconnected as the candidate node set, and call the second weight calculation formula to calculate the loop disconnection adjustment weight of each simulated component node in the candidate node set, and select the simulated component node with the largest weight as the loop disconnection point.

[0061] Specifically, nodes of the component to be simulated that are allowed to be disconnected on the loop are taken as candidate points, and the set of candidate points is taken as candidate node set. A candidate point set includes several candidate points.

[0062] Furthermore, the node attributes that allow disconnection on the loop are inherent attributes of the component to be simulated. These attributes are set by the designers based on engineering experience during the simulation component construction phase and stored in the metadata description of the simulation component. This attribute includes a Boolean flag and disconnection constraints (such as the maximum allowed delay time, disconnection location restrictions, etc.).

[0063] Furthermore, after obtaining the candidate node set, the second weight calculation formula needs to be called to calculate the loop break adjustment weight of each component node to be simulated in the candidate node set, so as to ensure that the calculation results reflect the latest signal flow state.

[0064] This method for determining the weights for loop-breaking connections ensures that the loop-breaking process always adapts to the current topology by real-time acquisition of the structural state of the simulation graph, preventing the benchmark weights from becoming invalid due to structural changes in the simulation graph caused by previous operations. Simultaneously, the physical disconnectability of the nodes of the component to be simulated is decoupled from dynamic calculation as a priori constraints. This ensures both the controllability of engineering rules and the intelligent selection of loop-breaking processes, meeting the dual requirements of industrial-grade simulation systems for rule determinism and adaptability.

[0065] Furthermore, the formula for calculating the second weight is as follows:

[0066] In the formula, Indicates the first One component node to be simulated. Indicates the first Adjusting the weights of broken-loop connections in each node of the component to be simulated. Indicates the first The component interconnect density index of the nth component node to be simulated (i.e., the nth component node) (The connection density index of each component node to be simulated within its strongly connected component). This represents the weight adjustment coefficient corresponding to the component connectivity density index. Indicates the first The loop failure rate index of the node to be simulated (i.e., the first node) The loop disruption rate index of each simulated component node within its strongly connected component. This represents the weighting adjustment coefficient corresponding to the loop failure rate index. Indicates the first The residual graph perturbation index of the nth component node to be simulated (i.e., the nth) The residual graph perturbation index of each component node to be simulated within its strongly connected component. This represents the weight adjustment coefficient corresponding to the residual graph perturbation index.

[0067] Indicates the first The number of edge structure objects directly connected to a simulated component node within its strongly connected component (i.e., loop). The larger the value, the more significant the pivotal role of the corresponding simulated component node in the loop.

[0068] Indicates the removal of the first After a node of a component to be simulated, the proportion of the reachable path disappearing within the strongly connected component (i.e., loop) where it is located. The larger the value, the more thoroughly the corresponding component node of the component to be simulated destroys the integrity of the loop, and the more suitable it is as a loop break point.

[0069] Indicates the first The sum of the shortest paths from each simulated component node to other simulated component nodes within its strongly connected component (i.e., loop) is a key factor. The larger the value, the greater the disturbance to other simulated component nodes caused by disconnecting that node. Therefore, more caution should be exercised when selecting a node to disconnect from a strongly connected component (i.e., loop).

[0070] It should be noted that the weighting adjustment coefficient in this embodiment is a static baseline value and does not change throughout the entire image simulation of the signal flow. Therefore, , , .

[0071] In this embodiment, Used for comprehensive evaluation of the component nodes to be simulated As a measure of a candidate point's merits, a higher value indicates a greater loop-breaking effect (stronger destructive power and less disturbance), and it should be given priority as a loop-breaking point.

[0072]

[0073] In the formula, Indicates the first One component node to be simulated. Indicates the first The component interconnect density index of each component node to be simulated. Indicates the first digit within the corresponding strongly connected component. The number of edge structure objects connected to the input side of each component node to be simulated. Indicates the first digit within the corresponding strongly connected component. The number of edge structure objects connected to the output side of each component node to be simulated.

[0074]

[0075] In the formula, Indicates the first One component node to be simulated. Indicates the first The loop failure rate index of each component node to be simulated. This represents the total number of original reachable paths between all pairs of nodes in the simulated component within the corresponding strongly connected component. This indicates temporarily removing the node of the component to be simulated within the corresponding strongly connected component. After considering the edges associated with the nodes, the total number of reachable paths between the remaining nodes.

[0076]

[0077] In the formula, Indicates the first One component node to be simulated. Indicates the first The residual graph perturbation index of each component node to be simulated. Indicates the first One component node to be simulated. Indicates the first digit within the corresponding strongly connected component. The node to be simulated is the first component node. The shortest path distance of each component node to be simulated. This represents all the component nodes to be simulated in the preprocessed signal stream. This indicates a component node that has been added to the execution queue and is awaiting simulation.

[0078] In this embodiment, the loop disconnection adjustment weights of the simulated component nodes are generated in real time based entirely on the current connection topology of the directed graph, rather than being pre-assigned statically. Whenever the loop resolution subroutine is triggered, the simulation software re-executes the weight evaluation process for all nodes within the identified strongly connected components whose attributes are physically disconnectable, ensuring that the calculation results reflect the latest signal flow state.

[0079] S43: Insert a delay module before the loop break point to complete the loop breakage process, update the preprocessed signal stream, and use the updated preprocessed signal stream as the target signal stream.

[0080] Specifically, after determining the loop in the preprocessed signal flow through strongly connected components, the physical disconnectability attribute of all simulated component nodes within the strongly connected components is first read, and simulated component nodes marked as true (i.e., disconnectable) are selected as a candidate node set. Subsequently, only the second weight calculation formula is called to calculate the weight of the simulated component nodes within this candidate node set, avoiding wasting resources due to non-disconnectable simulated component nodes participating in the calculation. Finally, the simulated component node with the largest weight value in the candidate node set is selected as the loop break point, and a delay module is inserted before it to complete the loop breakage process. In this embodiment, the delay parameter of the delay module is taken as the minimum value allowed by physical constraints (i.e., the smaller of 0.1 milliseconds and 1 / 100th of the sampling period).

[0081] Furthermore, to facilitate understanding, an example is given to illustrate the handling of loop breaks. For example... Figure 6 , Figure 7 As shown, the candidate node set includes three simulated component nodes: A (controller), B (actuator), and C (sensor); their corresponding loop break adjustment weights are 10, 5, and 8, respectively; the simulated component node A with the largest weight value is selected as the loop break point, and a DelayBlock (delay module) with Delay=0.01ms is inserted before this node to complete the loop break processing. Figure 6 This is a simulation diagram of the signal flow before the loop is eliminated and the loop is broken. Figure 7 This is a simulation diagram of the signal flow after loop elimination, i.e., after loop breaking. It should be noted that cross-domain markers are attributes of the nodes of the component being simulated, and therefore are not included. Figure 6 , Figure 7 The Chinese side indicated that...

[0082] In this embodiment, by detecting the coupling relationship between the components to be simulated, when the coupling relationship between the components to be simulated is cross-domain coupling, the edge structure objects connecting the components to be simulated are type-marked and a default delay time is set to achieve unified processing of data from different domains under a single algorithm framework, avoiding cross-domain data competition. A preprocessed signal flow is obtained by compiling and redundancy elimination using a sparse Boolean matrix to form the original signal flow formed by the components to be simulated and the edge structure objects connecting the components to be simulated. Then, loop detection is performed on the preprocessed signal flow. When a loop is detected, a loop resolution subroutine is called to break the detected loop, effectively solving the problem that existing simulation technologies cannot properly simulate feedback loops in components of the same domain, and realizing automatic solution of loop-containing models. By implementing this embodiment, the graphical simulation of the signal flow can be performed without manual intervention, automatically resolving multi-domain coupling relationships in the simulation model and generating an execution order that conforms to physical constraints. This reduces the configuration time for graphical simulation from hours to seconds and greatly reduces the simulation error rate, effectively improving the efficiency and accuracy of simulation modeling.

[0083] While this application provides the method operation steps as described in the embodiments or flowcharts, more or fewer operation steps may be included based on conventional or non-inventive labor. The order of steps listed in this embodiment is merely one possible execution order among many and does not represent the only execution order. In actual device or client product execution, the methods shown in this embodiment or the accompanying drawings can be executed sequentially or in parallel (e.g., in a parallel processor or multi-threaded processing environment).

[0084] like Figure 8 As shown in the illustration, this application also provides a graphical simulation device for signal flow. The device includes: The original signal flow generation module 10 is used to detect the coupling relationship between the components to be simulated. When the coupling relationship between the components to be simulated is cross-domain coupling, the original signal flow is generated based on the component to be simulated and the edge structure object connecting the component to be simulated.

[0085] The preprocessed signal stream generation module 20 is used to compile and eliminate redundancy in the original signal stream using a sparse Boolean matrix to obtain a preprocessed signal stream.

[0086] The target signal stream generation module 30 is used to perform loop detection on the preprocessed signal stream. When a loop is detected, the detected loop is broken to generate the target signal stream.

[0087] The target signal flow simulation module 40 is used to perform graphical simulation based on the target signal flow.

[0088] Some modules in the apparatus described in this application can be described in the general context of computer-executable instructions that are executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, classes, etc., that perform a specific task or implement a specific abstract data type. This application can also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0089] The apparatus or module described in the above embodiments can be implemented by a computer chip or physical entity, or by a product with a certain function. For ease of description, the above apparatus is described by dividing it into various modules according to their functions. When implementing the embodiments of this application, the functions of each module can be implemented in one or more software and / or hardware. Of course, a module that implements a certain function can also be implemented by combining multiple sub-modules or sub-units.

[0090] The methods, apparatus, or modules described in this application can be implemented in a computer-readable program code manner. The controller can be implemented in any suitable manner, such as a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro)processor, logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers. Examples of controllers include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicon Labs C8051F320. A memory controller can also be implemented as part of the control logic of a memory. Those skilled in the art will also recognize that, in addition to implementing the controller in purely computer-readable program code manner, the same functionality can be achieved by logically programming the method steps to make the controller take the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers. Therefore, such a controller can be considered a hardware component, and the means included within it for implementing various functions can also be considered as structures within the hardware component. Alternatively, the device used to implement various functions can be viewed as either a software module that implements the method or a structure within a hardware component.

[0091] This application also provides an apparatus, the apparatus comprising: a processor; a memory for storing processor-executable instructions; wherein, when the processor executes the executable instructions, it implements the method described in this application.

[0092] This application also provides a non-volatile computer-readable storage medium storing a computer program or instructions thereon, which, when executed, enables the method described in this application embodiment to be implemented.

[0093] Furthermore, in the various embodiments of the present invention, each functional module can be integrated into a processing module, or each module can exist independently, or two or more modules can be integrated into a single module.

[0094] The aforementioned storage media include, but are not limited to, Random Access Memory (RAM), Read-Only Memory (ROM), Cache, Hard Disk Drive (HDD), or Memory Card. The memory can be used to store computer program instructions.

[0095] As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented by means of software plus necessary hardware. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product, or it can be embodied in the process of data migration. The computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, mobile terminal, server, or network device, etc.) to execute the methods described in various embodiments or some parts of the embodiments of this application.

[0096] The various embodiments described in this specification are presented in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on its differences from other embodiments. All or part of this application can be used in numerous general-purpose or special-purpose computer system environments or configurations. Examples include: personal computers, server computers, handheld or portable devices, tablet devices, mobile communication terminals, multiprocessor systems, microprocessor-based systems, programmable electronic devices, network PCs, minicomputers, mainframe computers, and distributed computing environments including any of the above systems or devices, etc.

[0097] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit this application. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of this application.

Claims

1. A graphical simulation method for signal flow, characterized in that, include: The coupling relationship between the components to be simulated is detected. When the coupling relationship between the components to be simulated is cross-domain coupling, the original signal flow is generated based on the component to be simulated and the edge structure object connecting the component to be simulated. The original signal stream is compiled and redundancy is eliminated using a sparse Boolean matrix to obtain a preprocessed signal stream. Loop detection is performed on the preprocessed signal stream. When a loop is detected, the detected loop is broken to generate the target signal stream. A graphical simulation is performed based on the target signal stream.

2. The graphical simulation method for signal flow according to claim 1, characterized in that, When the coupling relationship between the components to be simulated is cross-domain coupling, then based on the components to be simulated and the edge structure objects connecting the components to be simulated, the original signal flow is generated, including: When the coupling relationship between the components to be simulated is cross-domain coupling, the edge structure objects connecting the components to be simulated are type-marked to obtain the cross-domain mark of each edge structure object; Set the default delay time and generate the original signal flow based on the simulated component node corresponding to each edge structure object, the baseline weight of the simulated component node, the cross-domain marker, and the default delay time.

3. The method according to claim 1, characterized in that, The process of compiling and redundancy-eliminating the original signal stream using a sparse Boolean matrix to obtain a preprocessed signal stream includes: The original signal stream is input into a graph encoder for compilation, and the compiled data is stored using a sparse Boolean matrix structure to construct an adjacency matrix. Based on the adjacency matrix, the edge structure objects in the original signal stream are merged and removed, retaining the edge structure object with the largest weight, and the preprocessed signal stream is output.

4. The method according to claim 1, characterized in that, The step of performing loop detection on the preprocessed signal stream, and breaking the loop when it is detected to generate the target signal stream, includes: Step 1: Initialize the preprocessed signal stream, determine the priority of each component node to be simulated in the preprocessed signal stream, and generate a priority queue based on the component node to be simulated and its corresponding priority. Step 2: Select the highest priority component node in the priority queue as the source node, and add the source node to the execution queue; Step 3: Determine the length of the execution queue. If the length of the execution queue is less than the total number of nodes of the component to be simulated in the priority queue, it indicates that there is a strongly connected component forming a loop in the preprocessed signal stream. Step 4: When a loop is detected, the loop is broken to generate the target signal stream; Step 5: Traverse all adjacent nodes of the source node in the priority queue, decrement the in-degree value of each adjacent node by one, and take the adjacent node with an in-degree value of 0 after decrementing as the target node. Step Six: Delete the source node from the priority queue and add the target node to the priority queue, then update the priority queue; Step 7: Iterate through steps 2 to 6 until the priority queue is empty or the maximum number of iterations is reached, then stop.

5. The method according to claim 4, characterized in that, The initialization process of the preprocessed signal stream, which determines the priority of each node of the component to be simulated in the preprocessed signal stream, includes: Calculate the initial connection adjustment weight of each node of the component to be simulated in the preprocessed signal stream, and count the in-degree value of each node of the component to be simulated by using the inverse adjacency matrix; The priority of the simulated component node is obtained by multiplying the initial connection adjustment weight of each node by its in-degree value.

6. The method according to claim 5, characterized in that, The initial connection adjustment weights for each simulated component node in the preprocessed signal stream are calculated, including: Calculate the global connectivity density, global structural hub degree, and system-level propagation delay of each component node to be simulated in the preprocessed signal stream; Obtain the weight adjustment coefficients corresponding to the global connection density index, the global structural hub index, and the system-level propagation delay index respectively, and call the first weight calculation formula to calculate the initial connection adjustment weight; The formula for calculating the first weight is as follows: In the formula, Indicates the first One component node to be simulated. Indicates the first Adjust the initial connection weights of each component node to be simulated. This represents the weight adjustment coefficient corresponding to the global connectivity density metric. Indicates the first The global connection density index of each component node to be simulated. This represents the weight adjustment coefficient corresponding to the global structural hub index. Indicates the first The global structural hub degree index of each component node to be simulated. This represents the weight adjustment coefficient corresponding to the system-level propagation delay metric. Indicates the first The system-level propagation delay metric for each component node to be simulated.

7. The method according to claim 4, characterized in that, When a loop is detected, the detected loop is broken to generate the target signal stream, including: When a loop is detected, the Tarjan algorithm is used to identify strongly connected components between nodes of the simulated component in the preprocessed signal stream whose in-degree value is not 0, and the loop in the preprocessed signal stream is determined based on the strongly connected components. The set of simulated component nodes whose node attributes on the loop are allowed to be disconnected is taken as the candidate node set, and the second weight calculation formula is called to calculate the loop disconnection adjustment weight of each simulated component node in the candidate node set. The simulated component node with the largest weight is selected as the loop disconnection point. A delay module is inserted before the loop break point to complete the loop breakage process, update the preprocessed signal stream, and use the updated preprocessed signal stream as the target signal stream. The formula for calculating the second weight is as follows: In the formula, Indicates the first One component node to be simulated. Indicates the first Adjusting the weights of broken-loop connections in each node of the component to be simulated. Indicates the first The component interconnect density index of each component node to be simulated. This represents the weight adjustment coefficient corresponding to the component connectivity density index. Indicates the first The loop failure rate index of each component node to be simulated. This represents the weighting adjustment coefficient corresponding to the loop failure rate index. Indicates the first The residual graph perturbation index of each component node to be simulated. This represents the weight adjustment coefficient corresponding to the residual graph perturbation index.

8. A graphical simulation device for signal flow, characterized in that, include: The original signal flow generation module is used to detect the coupling relationship between the components to be simulated. When the coupling relationship between the components to be simulated is cross-domain coupling, the original signal flow is generated based on the component to be simulated and the edge structure object connecting the component to be simulated. The preprocessed signal stream generation module is used to compile and eliminate redundancy in the original signal stream using a sparse Boolean matrix to obtain a preprocessed signal stream. The target signal stream generation module is used to perform loop detection on the preprocessed signal stream. When a loop is detected, the detected loop is broken to generate the target signal stream. The target signal flow simulation module is used to perform graphical simulation based on the target signal flow.

9. An apparatus for performing a graphical simulation method for signal flow, characterized in that, include: processor; Memory used to store processor-executable instructions; When the processor executes the executable instructions, it implements the method as described in any one of claims 1 to 7.

10. A non-volatile computer-readable storage medium, characterized in that, Includes storage of computer programs or instructions that, when executed, cause the method as described in any one of claims 1 to 7 to be implemented.

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