Controllable resistor module linearly changing along with current and application of controllable resistor module

Abstract

The invention discloses a controllable resistor module linearly changing along with current and application of the controllable resistor module. A controllable resistor comprises an operational transconductance amplifier, a PMOS (P-channel Metal Oxide Semiconductor) tube PM1 and a PMOS tube PM2, the controllable resistor module can generate an equivalent resistor in direct proportion to a sampling current, so that the equivalent controllable resistor Rds and the Isense can be linearly correlated, the influence of process errors and temperature is small, the generated error is small, and the controllable resistor module can be applied to current-controlled oscillators, automatic gain control and other scenes needing controllable resistors.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuits, in particular to a controllable resistance module capable of linearly changing with current and applied to various scenarios and use thereof. BACKGROUND

[0002] With the increasing requirements for signal processing accuracy and stability in modern communication and radio frequency systems, the functions of current-controlled oscillator (CCO) and automatic gain control (AGC) circuit are increasingly dependent on high-performance controllable resistors. Such resistors can continuously adjust the resistance value according to the current or voltage signal, which is used to accurately set the oscillation frequency in CCO and to realize automatic gain adjustment in AGC, playing a key role in the overall linearity and dynamic response of the system.

[0003] However, controllable resistors still face two significant problems in practical applications: first, their resistance is extremely sensitive to temperature and process changes, and large deviations may occur between different operating temperatures or different chip batches, which seriously affects the consistency and reliability of the system; second, the resistance value cannot ideally change linearly with the control signal under wide-range current sampling conditions, which may introduce significant detection or adjustment errors. In CCO, such errors may cause the output frequency to deviate from the expected value and increase the phase noise; in AGC, it may cause inaccurate gain control, resulting in signal overshoot or response delay, limiting the dynamic range performance. SUMMARY

[0004] The present application aims to provide a controllable resistance module capable of accurately controlling the equivalent resistance of a PMOS transistor and linearly changing with current, which can be applied to various scenarios.

[0005] The present application provides a controllable resistance module that linearly changes with current, comprising an operational transconductance amplifier, a PMOS transistor PM1, and a PMOS transistor PM2. The non-inverting terminal of the operational transconductance amplifier is connected to the drain of the PMOS transistor PM1, and the inverting terminal is connected to a resistor R1 and then to an ideal voltage source V CC The output terminal of the operational transconductance amplifier is connected to the gate of the PMOS transistor PM1 and the gate of the PMOS transistor PM2. The resistor R1 and the inverting terminal of the operational transconductance amplifier are connected to a sampling current I sense The drain of the PMOS transistor PM1 is also connected to a bias current source I1; the source of the PMOS transistor PM1 and the drain of the PMOS transistor PM2 are connected to an ideal voltage source V CC ; the source of the PMOS transistor PM2 is connected to a capacitor C1 and then to an ideal voltage source V C .

[0006] The sampling current I senseTo simulate the sampling current of various scenes, the resistor R1 can convert the load current into the voltage at the inverting terminal of the operational amplifier. The bias current source I1 is converted into a voltage signal V GS1 through the PMOS tube PM1, and the drain voltage of the PMOS tube PM1 is clamped by the operational transconductance amplifier to control the drain-source voltage of the PMOS tube PM1 and the sampling current I sense linearly.

[0007] The capacitor C1 is a capacitor connected in series with a controllable resistor. The source of the PMOS tube PM2 is connected to the capacitor C1, and the source voltage and the drain voltage are approximately equal.

[0008] Further, the positive power supply pin of the operational transconductance amplifier of the controllable resistance module is connected to a 5V power supply V CC , and the negative power supply pin is grounded. The 5V power supply V CC supplies power to the operational transconductance amplifier.

[0009] Further, the operational transconductance amplifier of the controllable resistance module is a differential amplifier with differential input and single-ended output.

[0010] Further, the ideal voltage source V CC is 3.3V, the ideal voltage source V C is 0.88V, and the bias current source I1 is 3uA.

[0011] Further, the resistor R1 of the flow control resistance module converts the sampling current I sense into a voltage signal, and the resistor R1 is connected to the voltage V — at the inverting terminal of the operational transconductance amplifier, which satisfies formula I: Formula I.

[0012] Further, in the flow control resistance module, the drain voltage of the PMOS tube PM1 is clamped by the operational transconductance amplifier to V — , so that the drain-source voltage V ds1 of the PMOS tube PM1 satisfies formula II: Formula II.

[0013] Further, in the flow control resistance module, the size of the resistor R1 is controlled so that V ds1 does not exceed 100mV, and the PMOS tube PM1 and the PMOS tube PM2 are both in the deep linear region.

[0014] Further, the source-drain voltage of the PMOS PM1 and the PMOS PM2 of the flow control resistance module is controlled to be less than 100mV, and the PMOS PM1 and the PMOS PM2 are both in deep linear region.

[0015] Since the PMOS PM1 and the PMOS PM2 are in deep linear region, the equivalent drain-source resistance of the PMOS PM1 and the PMOS PM2 is inversely proportional to the absolute value of the gate-source voltage.

[0016] Further, the equivalent resistance of the PMOS PM1 of the flow control resistance module is R ds1 , and satisfies formula III, and when the PMOS PM1 is in deep linear region, satisfies formula IV: Formula III, Formula IV, The equivalent resistance of the PMOS PM2 is R ds2 , and satisfies formula V, VI, VII, Formula V, Formula VI, Formula VII, Where μ P is the hole mobility, C ox is the gate oxide capacitance, (W / L) PM1 is the width-length ratio of the PMOS PM1, (W / L) PM2 is the width-length ratio of the PMOS PM2, V GS is the gate-source voltage of the PMOS PM1, V th is the threshold voltage. The R ds1 and R ds2 are both linearly related to I sense .

[0017] Further, the equivalent resistance R ds2 of the PMOS PM2 of the flow control resistance module has an error rate of ±10% in the temperature range of -40℃ to 125℃; and the equivalent resistance R ds2 of the PMOS PM2 has an error rate of ±20% under any one of the process corners of tt or ff or ss.

[0018] Based on the use of any one of the above flow control resistance modules, the flow control resistance module is used in a current-controlled oscillator or an automatic gain control circuit.

[0019] Further, the use of the controllable resistance module in the CCO, the resistance is used as a timing control element of the oscillation frequency. The traditional fixed resistance will cause the output frequency to be inaccurate due to temperature drift and process deviation. By using the module, the same control current is used to drive the resistance and the charging current source of the oscillator, so that the resistance value and the charging current form an inherent proportional relationship, thereby offsetting the influence of environmental and manufacturing fluctuations, and realizing high stability and high linearity of the frequency output.

[0020] Further, the use of the controllable resistance module in the AGC, the resistance is used as a gain adjustment element of the variable gain amplifier (VGA). The control current generated by the AGC loop directly sets the resistance value of the resistance, thereby accurately controlling the gain of the amplifier. Since the resistance-current relationship is highly linear and stable, the control law of the gain remains consistent at different temperatures and between different chips, significantly improving the accuracy and response consistency of the AGC loop.

[0021] The controllable resistance module linearly changed with current and its use according to the present application can be applied to various scenarios, and has the beneficial effects that: First, the controllable resistance module linearly changed with current according to the present application can be applied to various scenarios, and through the unique circuit structure (operational transconductance amplifier + double PMOS tube) and deep linear region working design, the equivalent resistance R ds1 and the equivalent resistance R ds2 are strictly linearly related to the sampling current I sense . Compared with the prior art, the control accuracy of the equivalent resistance R ds1 and the equivalent resistance R ds2 is significantly improved, and the core problems such as being seriously affected by the mobility change under different processes and being seriously affected by the temperature change are solved.

[0022] Since the drain voltage of the PMOS tube PM1 is clamped, the current comes from the load current sampling current, so the equivalent resistance of the PMOS tube PM1 is proportional to the load current sampling current. Since the PMOS tube PM1 and the PMOS tube PM2 are both in the linear region, the gate-source voltages of the two are approximately equal, so the equivalent resistances of the PMOS tube PM1 and the PMOS tube PM2 are inversely proportional to the gate-source voltage. Therefore, the equivalent resistance of the PMOS tube PM2 is proportional to the load current sampling current. This solves the problem that the controlled resistance is inversely proportional to the square root of the current sampling current in the past, so that the controllable resistance cannot be linearly related to the sampling current, and is more suitable for CCO and AGC.

[0023] Since the ratio of the equivalent resistances of the PMOS tube PM1 and the PMOS tube PM2 is only related to the ratio of the width-length ratios of the two, the bias current I1 and the resistance R1 are accurately designed, and the source voltages of the two are approximately equal, the equivalent resistance of PM2 is little affected by the threshold voltage and process variation, little affected by the mobility variation under different processes, and further little affected by the temperature variation.

[0024] In summary, the controllable resistance module can generate an equivalent resistance proportional to the sampling current, and the module can not only make the equivalent flow control resistance R ds linearly related to I sense , solve the problem that the traditional flow control resistance module cannot follow the linear variation of I sense , and the control is not accurate; at the same time, the flow control resistance is less affected by process error and temperature, and the error is small. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 The controllable resistance module circuit principle diagram for the controllable resistance module linearly changed with current according to Embodiment 1 of the application can be applied to various scenes; Figure 2 The controllable resistance module of the application is a controllable resistance module. Figure 3 The controllable resistance module of the application is a controllable resistance module. DETAILED DESCRIPTION

[0026] In order to have a clearer understanding of the technical features, purposes and effects of the application, the specific embodiments of the application will be described in detail with reference to the drawings. The described embodiments are only part of the embodiments of the application, not all embodiments, and all other embodiments obtained by those skilled in the art without creative labor based on the embodiments of the application are within the scope of protection of the application. If no specific conditions are specified in the specific embodiments, the conventional conditions or the conditions provided by the manufacturer are used.

[0027] The following description relates to the drawings, and unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. The terms used in the present disclosure are only for the purpose of describing specific embodiments, and are not intended to limit the present disclosure. Specific embodiment one:

[0028] A controllable resistance module linearly changed with current, comprising an operational transconductance amplifier, a PMOS tube PM1 and a PMOS tube PM2; The non-inverting terminal of the operational transconductance amplifier is connected to the drain of PMOS transistor PM1, and the inverting terminal of the operational transconductance amplifier is connected to resistor R1 and then connected to ideal voltage source V CC The output terminal of the operational transconductance amplifier is connected to the gate of PMOS transistor PM1 and the gate of PMOS transistor PM2. The inverting terminal of the operational transconductance amplifier is connected to sampling current I sense The drain of PMOS transistor PM1 is also connected to bias current source I1, and the source of PMOS transistor PM1 and the drain of PMOS transistor PM2 are connected to ideal voltage source V CC The source of PMOS transistor PM2 is connected to capacitor C1 and then connected to ideal voltage source V C .

[0029] In other embodiments, the positive power pin of the operational transconductance amplifier is connected to 5V power source V CC , and the negative power pin is connected to ground.

[0030] In other embodiments, the operational transconductance amplifier is a differential amplifier with differential input and single-ended output.

[0031] In other embodiments, the ideal voltage source V CC is 3.3V, the ideal voltage source V C is 0.88V, and the bias current source I1 is 3uA.

[0032] In other embodiments, the resistance R1 of the flow-controlled resistance module converts the sampling current I sense into a voltage signal, and the voltage V — at the inverting terminal of the operational transconductance amplifier connected to the resistance R1 satisfies formula I: Formula I.

[0033] In other embodiments, in the flow-controlled resistance module, the drain voltage of PMOS transistor PM1 is clamped to V — by the operational transconductance amplifier, so that the drain-source voltage V ds1 of PMOS transistor PM1 satisfies formula II: Formula II.

[0034] In other embodiments, in the flow-controlled resistance module, the size of the resistance R1 is controlled so that V ds1 does not exceed 100mV, and both PMOS transistor PM1 and PMOS transistor PM2 are in deep linear region.

[0035] In other embodiments, the source-drain voltages of the PMOS transistors PM1 and PM2 in the current-controlled resistor module are controlled to be less than 100mV, and both PMOS transistors PM1 and PM2 are in the deep linear region.

[0036] Since PMOS transistors PM1 and PM2 are located in the deep linear region, the equivalent drain-source resistance of PMOS transistors PM1 and PM2 is inversely proportional to the absolute value of the gate-source voltage.

[0037] In other embodiments, the equivalent resistance of the PMOS transistor PM1 in the current-controlled resistor module is R. ds1 And satisfying Formula III, when the PMOS transistor PM1 is in the deep linear region, it satisfies Formula IV: Formula III, Formula IV, The equivalent resistance of the PMOS transistor PM2 is R. ds2 And satisfy formulas V, VI, VII. Formula V, Formula VI, Formula VII, Where μ P C represents hole mobility. ox For the gate oxide capacitance, (W / L) PM1 The width-to-length ratio (W / L) of PMOS transistor PM1 PM2 V represents the aspect ratio of PMOS transistor PM2. GS V is the gate-source voltage of PMOS transistor PM1. th Threshold voltage; The R ds1 and R ds2 All with I sense Linear correlation.

[0038] In other embodiments, the equivalent resistance R of the PMOS transistor PM2 ds2 The error rate is ±10% within the temperature range of -40℃ to 125℃. And the equivalent resistance R of the PMOS transistor PM2 ds2 At any process angle of TT, FF, or SS, the error rate is ±20%. Specific Implementation Method Two:

[0039] Application of a controllable resistor module that varies linearly with current, the current-controlled resistor module being used in a current-controlled oscillator. Specific implementation method three:

[0040] Application of a controllable resistor module that varies linearly with current, the current-controlled resistor module being used in an automatic gain control circuit.

[0041] Example 1: A controllable resistor module that varies linearly with current, such as... Figure 1 As shown, it includes an operational transconductance amplifier, PMOS transistors PM1 and PM2; the non-inverting input of the operational transconductance amplifier is connected to the drain of PMOS transistor PM1, and the inverting input is connected to an ideal voltage source V after a resistor R1. CC The output terminal of the operational transconductance amplifier is simultaneously connected to the gate of PMOS transistor PM1 and the gate of PMOS transistor PM2. The resistor R1 and the inverting input of the operational transconductance amplifier are both connected to the sampling current I. sense The drain of PMOS transistor PM1 is also connected to a bias current source I1; the source of PMOS transistor PM1 and the drain of PMOS transistor PM2 are simultaneously connected to an ideal voltage source V. CC The source of the PMOS transistor PM2 is connected to capacitor C1 and then to an ideal voltage source V. C .

[0042] In this embodiment 1, the positive power supply pin of the operational transconductance amplifier is connected to a 5V power supply V. CC The negative power supply pin is grounded. The operational transconductance amplifier is a differential amplifier with differential input and single-ended output. The ideal voltage source V... CC The ideal voltage source V is 3.3V. C The voltage is 0.88V, and the bias current source I1 is 3uA.

[0043] The resistor R1 of the current-controlled resistor module will sample the current I. sense Converted to a voltage signal, the voltage V connected to the inverting input of the operational transconductance amplifier by resistor R1 is... — Satisfying Formula I: Formula I.

[0044] In the current-controlled resistor module, the drain voltage of the PMOS transistor PM1 is clamped to V by the operational transconductance amplifier. — This causes the drain-source voltage V of the PMOS transistor PM1 to... ds1 Satisfying Formula II: Formula II.

[0045] In the current-controlled resistor module, the value of resistor R1 is controlled to make V ds1 The voltage is kept below 100mV, so that both PMOS transistors PM1 and PM2 are in the deep linear region.

[0046] The source-drain voltages of PMOS transistors PM1 and PM2 in the current-controlled resistor module are controlled to be less than 100mV, and both PMOS transistors PM1 and PM2 are in the deep linear region.

[0047] Since PMOS transistors PM1 and PM2 are located in the deep linear region, the equivalent drain-source resistance of PMOS transistors PM1 and PM2 is inversely proportional to the absolute value of the gate-source voltage.

[0048] The equivalent resistance of the PMOS transistor PM1 in the current-controlled resistor module is R. ds1 And satisfying Formula III, when the PMOS transistor PM1 is in the deep linear region, it satisfies Formula IV: Formula III, Formula IV, The equivalent resistance of the PMOS transistor PM2 is R. ds2 And satisfy formulas V, VI, VII. Formula V, Formula VI, Formula VII, Where μ P C represents hole mobility. ox For the gate oxide capacitance, (W / L) PM1 The width-to-length ratio (W / L) of PMOS transistor PM1 PM2 V represents the aspect ratio of PMOS transistor PM2. GS V is the gate-source voltage of PMOS transistor PM1. th Threshold voltage; The R ds1 and R ds2 All with I sense Linear correlation, such as Figure 2 As shown.

[0049] like Figure 3 As shown, the equivalent resistance R of the PMOS transistor PM2 is... ds2 The error rate is ±10% within a temperature range of -40℃ to 125℃; the equivalent resistance R of the PMOS transistor PM2 ds2一 At any process angle of TT, FF, or SS, the error rate is ±20%.

Claims

1. A controllable resistor module that linearly varies with current, characterized in that, It includes an operational transconductance amplifier, PMOS transistors PM1 and PM2; the non-inverting input of the operational transconductance amplifier is connected to the drain of PMOS transistor PM1, and the inverting input is connected to an ideal voltage source V after a resistor R1. CC The output terminal of the operational transconductance amplifier is simultaneously connected to the gate of PMOS transistor PM1 and the gate of PMOS transistor PM2. The resistor R1 and the inverting input of the operational transconductance amplifier are both connected to the sampling current I. sense The drain of PMOS transistor PM1 is also connected to a bias current source I1; the source of PMOS transistor PM1 and the drain of PMOS transistor PM2 are simultaneously connected to an ideal voltage source V. CC The source of the PMOS transistor PM2 is connected to capacitor C1 and then to an ideal voltage source V. C .

2. The controllable resistor module according to claim 1, characterized in that: The positive power supply pin of the operational transconductance amplifier is connected to a 5V power supply V. CC The negative power supply pin is grounded.

3. The controllable resistor module according to claim 1, characterized in that: The operational transconductance amplifier is a differential amplifier with differential input and single-ended output.

4. The controllable resistor module according to claim 1, characterized in that, The ideal voltage source V CC The ideal voltage source V is 3.3V. C The voltage is 0.88V, and the bias current source I1 is 3uA.

5. The controllable resistor module according to claim 1, characterized in that: Resistor R1 will sample current I sense Converted to a voltage signal, the voltage V connected to the inverting input of the operational transconductance amplifier by resistor R1 is... — Satisfying Formula I: Formula I.

6. The controllable resistor module according to claim 1, characterized in that: The drain voltage of the PMOS transistor PM1 is clamped to V by the operational transconductance amplifier. — This causes the drain-source voltage V of the PMOS transistor PM1 to... ds1 Satisfying Formula II: Formula II.

7. The controllable resistor module according to claim 6, characterized in that: Controlling the value of the resistor R1 to make V ds1 The voltage is kept below 100mV, so that both PMOS transistors PM1 and PM2 are in the deep linear region.

8. The current-controlled resistor module according to claim 7, characterized in that: The equivalent resistance of the PMOS transistor PM1 is R. ds1 And satisfying Formula III, when the PMOS transistor PM1 is in the deep linear region, it satisfies Formula IV: Formula III, Formula IV, The equivalent resistance of the PMOS transistor PM2 is R. ds2 And satisfy formulas V, VI, VII. Official V, Formula VI, Formula VII, Where μ P C represents hole mobility. ox For the gate oxide capacitance, (W / L) PM1 The width-to-length ratio (W / L) of PMOS transistor PM1 PM2 V represents the aspect ratio of PMOS transistor PM2. GS V is the gate-source voltage of PMOS transistor PM1. th Threshold voltage; The R ds1 and R ds2 All with I sense Linear correlation.

9. The current-controlled resistor module according to claim 1, characterized in that: The equivalent resistance R of the PMOS transistor PM2 ds2 The error rate is ±10% within the temperature range of -40℃ to 125℃. And the equivalent resistance R of the PMOS transistor PM2 ds2 At any process angle of TT, FF, or SS, the error rate is ±20%.

10. An application of the current-controlled resistor module according to any one of claims 1 to 9, characterized in that: The current-controlled resistor module is used in current-controlled oscillators or automatic gain control circuits.

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