Processing method of log likelihood ratio value table, soft decoding method and related device
By obtaining the optimal hard read voltage and corrected log-likelihood ratio table for flash memory storage devices, the problem of decreased data reliability in flash memory cells was solved, and the error correction performance of the software decoder and the reliability of the storage system were improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HUIYIWEI (SHANGHAI) TECHNOLOGY CO LTD
- Filing Date
- 2026-04-10
- Publication Date
- 2026-05-29
AI Technical Summary
In existing technologies, the data reliability of flash memory cells decreases as storage density increases, and low-density parity check code soft decoding technology leads to reduced data read reliability and increased latency when hard voltage shifts.
By obtaining the optimal hard read voltage of the storage device, performing multiple read operations to obtain the initial log-likelihood ratio table, and dynamically updating the LLR table using the corrected log-likelihood ratio and read voltage offset value when the hard read voltage deviates, the log-likelihood ratio table is corrected.
It improves the error correction performance of the software decoder and the reliability of the storage system, and reduces latency.
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Figure CN122111750A_ABST
Abstract
Description
Technical Field
[0001] The embodiments disclosed in this application relate to the field of storage technology, and more specifically, to a method for processing a log-likelihood ratio table, a software decoding method, and related equipment. Background Technology
[0002] With advancements in semiconductor technology, the storage density of flash memory cells has continuously increased, from single-level cells (SLC), multi-level cells (MLC), to triple-level cells (TLC) and quad-level cells (QLC). The number of bits of data stored in a single cell has increased significantly, leading to a corresponding decrease in data reliability. To maintain data reliability, low-density parity-check code (LDPC) soft decoding technology is typically employed. Soft decoding requires acquiring soft information through multiple read operations and designing a log-likelihood ratio (LLR) lookup table based on a preset hard read voltage to guide the soft decision decoding of the LLC code. However, if the hard voltage shifts and the preset LLR lookup table continues to be used, it will result in reduced data read reliability and increased latency. Summary of the Invention
[0003] According to embodiments of this application, this application proposes a method for processing log-likelihood ratio tables, a software decoding method, and related equipment to solve the above-mentioned problems.
[0004] The first aspect of this application discloses a method for processing a log-likelihood ratio table, comprising: obtaining an optimal hard read voltage of a storage device; performing a multi-read operation using the optimal hard read voltage as the initial soft read voltage to obtain an initial log-likelihood ratio table corresponding to the multi-read operation; obtaining an optimal read voltage offset value corresponding to the optimal hard read voltage in response to an offset of the optimal hard read voltage; obtaining a corrected log-likelihood ratio value corresponding to the storage device; and correcting the initial log-likelihood ratio table using the corrected log-likelihood ratio value and the optimal read voltage offset value to obtain an offset log-likelihood ratio table corresponding to the offset optimal hard read voltage.
[0005] In some embodiments, the step of correcting the initial log-likelihood ratio table using the corrected log-likelihood ratio and the optimal read voltage offset includes: obtaining a target log-likelihood ratio sequence corresponding to the initial log-likelihood ratio table; correcting the target log-likelihood ratio sequence using the corrected log-likelihood ratio and the optimal read voltage offset to obtain the offset log-likelihood ratio table.
[0006] In some embodiments, the step of correcting the target log-likelihood ratio sequence using the corrected log-likelihood ratio and the optimal read voltage offset includes: obtaining the target log-likelihood ratio in the target log-likelihood ratio sequence; and calculating the sum of the products of the target log-likelihood ratio, the corrected log-likelihood ratio, and the optimal read voltage offset to obtain the corrected log-likelihood ratio.
[0007] In some embodiments, the modified log-likelihood ratio is rounded to generate the offset log-likelihood ratio table.
[0008] In some embodiments, obtaining the corrected log-likelihood ratio corresponding to the storage device includes: obtaining the storage state of the storage cells in the storage device and the corresponding multiple threshold voltages; calculating the log-likelihood ratio change values of adjacent threshold voltages among the multiple threshold voltages; and calculating the average value of the multiple log-likelihood ratio changes as the corrected log-likelihood ratio value.
[0009] In some embodiments, obtaining the optimal read voltage offset value corresponding to the optimal hard read voltage in response to the offset of the optimal hard read voltage includes: obtaining the current hard read voltage in response to the offset of the optimal hard read voltage; and calculating the difference between the current hard read voltage and the optimal hard read voltage as the optimal read voltage offset value.
[0010] In some embodiments, obtaining the initial log-likelihood ratio table corresponding to the multiple read operation includes: obtaining the threshold voltage of multiple soft read voltage intervals corresponding to the multiple read operation; calculating the initial log-likelihood ratio corresponding to the multiple soft read voltage intervals based on a preset channel noise value and the threshold voltage, and then obtaining the initial log-likelihood ratio table.
[0011] The second aspect of this application discloses a soft decoding method, comprising: performing a soft read operation based on the current hard read voltage to obtain corresponding soft information; mapping the soft information to a corresponding log-likelihood ratio according to an offset log-likelihood ratio table, and inputting it into a soft decoder for decoding; wherein the offset log-likelihood ratio table is generated by the log-likelihood ratio table processing method described in the first aspect.
[0012] A third aspect of this application discloses an electronic device including a memory and a processor coupled to each other, the processor being configured to execute program instructions stored in the memory to implement the log-likelihood ratio table processing method described in the first aspect, or to implement the software decoding method described in the second aspect.
[0013] The fourth aspect of this application discloses a non-volatile computer-readable storage medium storing program instructions thereon, which, when executed by a processor, implement the log-likelihood ratio table processing method described in the first aspect, or implement the software decoding method described in the second aspect.
[0014] The beneficial effects of this application are as follows: obtaining the optimal hard read voltage of the storage device, using the optimal hard read voltage as the first soft read voltage to perform a multi-read operation, obtaining the initial log-likelihood ratio table corresponding to the multi-read operation, obtaining the optimal read voltage offset value corresponding to the optimal hard read voltage in response to the offset of the optimal hard read voltage, and obtaining the corrected log-likelihood ratio value corresponding to the storage device, further, using the corrected log-likelihood ratio value and the optimal read voltage offset value to correct the initial log-likelihood ratio table, obtaining the offset log-likelihood ratio table corresponding to the offset optimal hard read voltage, so as to realize dynamic updating of the LLR table, thereby improving the error correction performance of the soft decoder and the reliability of the storage system. Attached Figure Description
[0015] The present application will be further described below with reference to the accompanying drawings and embodiments. In the drawings: Figure 1 This is a flowchart illustrating the method for processing the log-likelihood ratio table according to an embodiment of this application. Figure 2 This is a schematic diagram of the optimal hard read voltage offset according to an embodiment of this application; Figure 3 This is a schematic diagram of the read voltage range offset according to an embodiment of this application; Figure 4 This is a schematic diagram of the hardness reading voltage offset according to another embodiment of this application; Figure 5 This is a flowchart illustrating the software decoding method according to an embodiment of this application; Figure 6 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application; Figure 7 This is a schematic diagram of the structure of a non-volatile computer-readable storage medium according to an embodiment of this application. Detailed Implementation
[0016] In this application, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0017] In this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. Additionally, the character " / " generally indicates that the preceding and following related objects are in an "or" relationship. Furthermore, "many" in this application means two or more. Moreover, the term "at least one" in this application means any combination of at least two of any one or more of a plurality of objects. For example, including at least one of A, B, and C can mean including any one or more elements selected from the set consisting of A, B, and C. Furthermore, the terms "first," "second," and "third" in this application are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features.
[0018] LDPC soft decoding requires acquiring soft information through multiple voltage read operations and mapping it to a log-likelihood ratio (LLR) value for probabilistic decoding. The accuracy of the LLR value directly affects the decoding success rate; therefore, the generation of the LLR value mapping table is crucial to soft decoding performance. However, NAND flash memory contains various types of noise, such as erase / write cycles, retention time, read interference, and inter-cell interference, all of which cause variations in the number of electrons held in the flash memory cell, resulting in changes in the optimal read voltage. When the preset optimal hard read voltage differs significantly from the actual optimal hard read voltage, the LLR lookup table designed based on the preset optimal hard read voltage cannot match the actual LLR distribution. Continuing to use the preset LLR lookup table will reduce the error correction performance of soft decoding, decrease system reliability, and increase latency.
[0019] To address these issues, this application proposes a method for processing log-likelihood ratio tables, a software decoding method, and related equipment.
[0020] To enable those skilled in the art to better understand the technical solution of this application, the technical solution of this application will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0021] Please see Figure 1 , Figure 1 This is a flowchart illustrating the method for processing the log-likelihood ratio table according to an embodiment of this application. The subject executing this method can be an electronic device with computing capabilities, such as a microcomputer, a server, and mobile devices such as laptops and tablets.
[0022] It should be noted that if substantially the same result is obtained, the method of this application is not based on... Figure 1 The sequence of processes shown is limited.
[0023] In some possible implementations, this method can be implemented by the processor calling computer-readable instructions stored in memory, such as... Figure 1 As shown, the method may include the following steps: S11: Obtain the optimal hard read voltage for the storage device.
[0024] In some examples, storage devices can be incorporated into the aforementioned electronic devices. These storage devices can be based on NAND flash memory technology, such as solid-state drives (SSDs), USB flash drives, flash memory cards (e.g., SD cards), eMMC (embedded Multi Media Card), UFS (Universal Flash Storage), etc.
[0025] Obtain the optimal hard read voltage of the storage device, such as the preset optimal hard read voltage of the storage cell in the storage device. The optimal hard read voltage can be the voltage point that minimizes the error rate between adjacent threshold voltage states (e.g., the erase state and program state of the storage cell), which can be calculated and determined by the storage controller (e.g., the SSD controller).
[0026] S12: Use the optimal hard read voltage as the first soft read voltage to perform a multi-read operation, in order to obtain the initial log-likelihood ratio table corresponding to the multi-read operation.
[0027] The optimal hard read voltage is used as the first soft read voltage to perform multiple read operations, so as to obtain the initial log-likelihood ratio table corresponding to the multiple read operations. For example, after hard decoding fails based on the preset optimal hard read voltage, the preset optimal hard read voltage is used as the first soft read voltage to perform multiple read operations, thereby obtaining the initial log-likelihood ratio table LLR Table1 corresponding to the multiple read operations, that is, obtaining the LLR value when there is no offset in the read interval corresponding to the storage multiple read operations.
[0028] S13: In response to the offset of the optimal hard read voltage, obtain the optimal read voltage offset value corresponding to the optimal hard read voltage.
[0029] If the optimal hard read voltage shifts, for example, if the preset optimal hard read voltage is optiaml_Vth and the shifted optimal hard read voltage is current_Vth, then by calculating optiaml_Vth and current_Vth, the optimal read voltage offset value delta_Vth corresponding to the optimal hard read voltage can be obtained.
[0030] S14: Obtain the corrected log-likelihood ratio corresponding to the storage device.
[0031] Obtain the modified log-likelihood ratio corresponding to the storage device, for example, obtain the modified log-likelihood ratio delta_LLR. The modified log-likelihood ratio delta_LLR can be pre-stored in the storage device.
[0032] S15: The initial log-likelihood ratio table is corrected using the corrected log-likelihood ratio and the optimal read voltage offset value, thereby obtaining the offset log-likelihood ratio table corresponding to the optimal hard read voltage after offset.
[0033] After the optimal hard read voltage shifts, the optimal read voltage shift value delta_Vth and the corrected log-likelihood ratio delta_LLR are obtained. Then, the initial log-likelihood ratio table LLR Table 1 is corrected using the optimal read voltage shift value delta_Vth and the corrected log-likelihood ratio delta_LLR, thereby obtaining the offset log-likelihood ratio table LLR Table 2 corresponding to the shifted optimal hard read voltage.
[0034] In this embodiment, the optimal hard read voltage of the storage device is obtained, and a multi-read operation is performed using the optimal hard read voltage as the first soft read voltage to obtain an initial log-likelihood ratio table corresponding to the multi-read operation. In response to the offset of the optimal hard read voltage, the optimal read voltage offset value corresponding to the optimal hard read voltage is obtained, as well as the corrected log-likelihood ratio value corresponding to the storage device is obtained. Furthermore, the initial log-likelihood ratio table is corrected using the corrected log-likelihood ratio value and the optimal read voltage offset value to obtain an offset log-likelihood ratio table corresponding to the offset optimal hard read voltage, so as to realize dynamic updating of the LLR table, thereby improving the error correction performance of the soft decoder and the reliability of the storage system.
[0035] In some embodiments, obtaining the corrected log-likelihood ratio corresponding to the storage device includes: obtaining the storage state of the storage cells in the storage device and the corresponding multiple threshold voltages; calculating the log-likelihood ratio change values of adjacent threshold voltages among the multiple threshold voltages; and calculating the average value of the multiple log-likelihood ratio changes as the corrected log-likelihood ratio value.
[0036] Obtain the corrected log-likelihood ratio (LLR) value corresponding to the storage device. This involves determining the storage state of the storage cells within the storage device. Storage cells can include SLC, MLC, TLC, and QLC, etc. SLC corresponds to 2 storage states, MLC to 4, TLC to 8, and QLC to 16. Obtain multiple threshold voltages corresponding to the storage states of the storage cells. For example, TLC storage states can correspond to 8 threshold voltages, and QLC storage states can correspond to 16 threshold voltages. Calculate the change in the log-likelihood ratio of adjacent threshold voltages among these threshold voltages. The average of these changes is used as the corrected log-likelihood ratio (delta_LLR). For example, calculate the LLR values corresponding to n threshold voltages, and then calculate the differences between the LLR values corresponding to adjacent threshold voltages to obtain n-1 LLR change values. The average of these n-1 LLR change values is used as the corrected log-likelihood ratio (delta_LLR) value corresponding to the storage cell.
[0037] Taking TLC as an example, TLC has 8 states, which can store 3 bits of information. Different states can represent different stored information. Due to various noise influences, the state distribution in NAND flash memory resembles a Gaussian distribution. The threshold voltage distribution between adjacent states is similar to the signal distribution of an AWGN (Additive White Gaussian Noise Channel) channel modulated by BPSK (Binary Phase Shift Keying). The LLR calculation formula for a BPSK modulated signal is: LLR = y is the channel received value. This refers to channel noise, meaning the LLR value is linearly related to y. Understandably, the voltage value in the state is also linearly related to the LLR. The corrected log-likelihood ratio delta_LLR is determined by estimating the LLR changes of adjacent voltages, i.e., LLR(x) - LLR(x-1), where x is the threshold voltage. For example, in a TLC, there are 7 corresponding LLR changes (differences) between adjacent voltages, and the average of these 7 adjacent voltage LLR differences can be used as delta_LLR.
[0038] In some embodiments, in response to an offset in the optimal hard read voltage, obtaining the optimal read voltage offset value corresponding to the optimal hard read voltage includes: in response to an offset in the optimal hard read voltage, obtaining the current hard read voltage; and calculating the difference between the current hard read voltage and the optimal hard read voltage as the optimal read voltage offset value.
[0039] In some examples, the optimal hard read voltage shifts, for example, SCL. Figure 2 As shown, Figure 2This is a schematic diagram of the optimal hard read voltage offset according to an embodiment of this application. The soft read operation increases the number of reads on both sides of the hard read voltage. If the current threshold voltage is less than the read voltage, the current cell is determined to be 1; otherwise, it is 0. Figure 2 The diagram illustrates five read voltage distributions; five read operations can divide the threshold voltage into six intervals. For example... Figure 2 As shown in (a), the applied hard read voltage coincides with the position of the actual optimal hard read voltage (the intersection of the distribution). At this time, the soft read voltage is symmetrically distributed on both sides of the optimal hard read voltage, and the LLR lookup table can match the actual LLR distribution. Figure 2 As shown in (b), due to the influence of noise, the actual optimal hard read voltage is shifted to the left by N voltage positions. At this time, the preset LLR lookup table cannot match the true LLR distribution. For example, the true LLR values of the two intervals on the left and right sides of the optimal read voltage should be -1 and +1, while the preset LLR values are -7 and -1. The deviation is large, which will reduce the decoding success rate and system reliability.
[0040] Furthermore, in response to an offset in the optimal hard read voltage, the optimal read voltage offset value corresponding to the optimal hard read voltage is obtained. In some examples, in response to an offset in the optimal hard read voltage, the current hard read voltage current_Vth is obtained, which is the offset optimal hard read voltage. The difference between the current hard read voltage and the optimal hard read voltage is calculated as the optimal read voltage offset value, where the optimal hard read voltage is a preset optimal hard read voltage optiaml_Vth, i.e., the optimal read voltage offset value delta_Vth = current_Vth – optiaml_Vth. In other examples, the optimal read voltage offset value delta_Vth can be calculated by a DSP (Digital Signal Processing) chip.
[0041] In some embodiments, the initial log-likelihood ratio table is modified using the modified log-likelihood ratio and the optimal read voltage offset, including: obtaining the target log-likelihood ratio sequence corresponding to the initial log-likelihood ratio table; modifying the target log-likelihood ratio sequence using the modified log-likelihood ratio and the optimal read voltage offset, thereby obtaining the offset log-likelihood ratio table.
[0042] In some examples, the target log-likelihood ratio sequence may include floating-point log-likelihood ratio sequences, fixed-point log-likelihood ratio sequences, and integer log-likelihood ratio sequences. To obtain the corresponding target log-likelihood ratio sequence, for example, to obtain the floating-point LLR values (float_LLR) for multiple read intervals without offset corresponding to multiple read operations, such as performing n read operations, generating n+1 read intervals, and thus obtaining the corresponding n+1 float_LLR values. To obtain the corresponding fixed-point log-likelihood ratio sequence, for example, to obtain the fixed-point LLR values (Qm.n_LLR) for multiple read intervals without offset corresponding to multiple read operations, such as performing n read operations, generating n+1 read intervals, and thus obtaining the corresponding n+1 Qm.n_LLR values. To obtain the corresponding integer log-likelihood ratio sequence, for example, to obtain the integer LLR values (int_LLR) for multiple read intervals without offset corresponding to multiple read operations, such as performing n read operations, generating n+1 read intervals, and thus obtaining the corresponding n+1 int_LLR values. It should be noted that multiple read operations include n read operations for different memory units, such as n=5, 6, 7, 8, 9, etc., which means that the initial log-likelihood ratio table corresponding to different numbers of read operations can be corrected.
[0043] The initial log-likelihood ratio table is corrected using the modified log-likelihood ratio and the optimal read voltage offset. Taking the floating-point log-likelihood ratio sequence as an example, the modified log-likelihood ratio delta_LLR and the optimal read voltage offset delta_Vth corresponding to the memory cell are determined, and the floating-point log-likelihood ratio sequence corresponding to the initial log-likelihood ratio table LLR Table 1 is obtained. Further, the floating-point log-likelihood ratio sequence corresponding to LLR Table 1 is corrected using the modified log-likelihood ratio delta_LLR and the optimal read voltage offset delta_Vth, thus obtaining the offset log-likelihood ratio table LLRTable 2. In other words, delta_LLR and delta_Vth can be used to correct n+1 float_LLR values respectively.
[0044] In this embodiment, the target log-likelihood ratio sequence corresponding to the initial log-likelihood ratio table is obtained. The target log-likelihood ratio sequence is corrected using the modified log-likelihood ratio and the optimal read voltage offset value, thereby obtaining the offset log-likelihood ratio table. This enables dynamic adjustment of the LLR table to match the true LLR distribution under different hard read voltage offsets, thereby improving soft decoding performance and increasing system reliability.
[0045] In some embodiments, the target log-likelihood ratio sequence is corrected using the corrected log-likelihood ratio and the optimal read voltage offset, including: obtaining the target log-likelihood ratio in the target log-likelihood ratio sequence; and calculating the sum of the products of the target log-likelihood ratio, the corrected log-likelihood ratio, and the optimal read voltage offset to obtain the corrected log-likelihood ratio.
[0046] The target log-likelihood ratio sequence is corrected using the modified log-likelihood ratio and the optimal read voltage offset. Taking a floating-point log-likelihood ratio sequence as an example, the floating-point log-likelihood ratios in the sequence are obtained. The sum of the products of the floating-point log-likelihood ratio, the modified log-likelihood ratio, and the optimal read voltage offset is calculated as the corrected log-likelihood ratio. For example, given the floating-point log-likelihood ratio `float_LLR`, the modified log-likelihood ratio `delta_LLR`, and the optimal read voltage offset `delta_Vth`, the corrected log-likelihood ratio is `shift_LLR = float_LLR + delta_Vth × delta_LLR`.
[0047] In some examples, LLR= y is the channel received value. This is channel noise; the LLR value is linearly related to y, and the voltage value of the stored state in the memory cell is also linearly related to LLR. By calculating the LLR change value of adjacent voltages, the corrected log-likelihood ratio delta_LLR is obtained, which can then correct the LLR value after the offset. For example... Figure 3 As shown, Figure 3 This is a schematic diagram of the read voltage range offset according to an embodiment of this application. The read voltage range is offset by delta_Vth, and the LLR value after offset is equal to the initial LLR value plus delta_Vth × delta_LLR.
[0048] Furthermore, in some embodiments, the modified log-likelihood ratio is rounded to generate an offset log-likelihood ratio table.
[0049] Continuing with the example of the floating-point log-likelihood ratio sequence, we obtain the floating-point log-likelihood ratios in the sequence, and calculate the sum of the products of the floating-point log-likelihood ratio, the corrected log-likelihood ratio, and the optimal read voltage offset. This sum is used as the corrected log-likelihood ratio. For example, given a floating-point log-likelihood ratio of float_LLR, a corrected log-likelihood ratio of delta_LLR, and an optimal read voltage offset of delta_Vth, the corrected log-likelihood ratio shift_LLR = float_LLR + delta_Vth × delta_LLR.
[0050] In some examples, the corrected log-likelihood ratio can also be rounded, for example, the corrected log-likelihood ratio shift_LLR = round(float_LLR + delta_Vth × delta_LLR), where round(x) indicates rounding x. By correcting the floating-point log-likelihood ratio sequence, multiple corrected log-likelihood ratios shift_LLR are obtained, and thus an offset log-likelihood ratio table can be obtained.
[0051] In some embodiments, obtaining the initial log-likelihood ratio table corresponding to multiple read operations includes: obtaining the threshold voltage of multiple soft read voltage intervals corresponding to multiple read operations; calculating the initial log-likelihood ratio corresponding to multiple soft read voltage intervals based on preset channel noise values and threshold voltages, and then obtaining the initial log-likelihood ratio table.
[0052] To obtain the initial log-likelihood ratio table for multiple read operations, in some examples, the optimal hard read voltage is used as the initial soft read voltage for multiple read operations. The threshold voltages for multiple soft read voltage intervals corresponding to the multiple read operations are obtained, and the initial log-likelihood ratios for multiple soft read voltage intervals are calculated based on a preset channel noise value and the threshold voltages, thus obtaining the initial log-likelihood ratio table. For example, a multiple read operation includes performing n read operations, where n read operations correspond to n read voltages, and there are n+1 interval threshold voltages for soft read voltage intervals. Given a channel noise value... Integrating with the interval threshold voltage, we obtain the initial log-likelihood ratios corresponding to the n+1 soft-read voltage intervals, and then generate the initial log-likelihood ratio table.
[0053] To facilitate understanding, an example is provided to illustrate the process of obtaining a shifted log-likelihood ratio table by modifying the initial log-likelihood ratio table. For example... Figure 4 As shown, Figure 4 This is a schematic diagram of the hardness reading voltage offset according to another embodiment of this application. For example... Figure 4 As shown in (a), the floating-point LLR sequence when the optimal read voltage has no offset corresponds to {-9.3,-4.3,-1.2,1.2,4.3,9.3}, as follows. Figure 4 As shown in (b), the actual optimal hard read voltage is shifted to the left by delta_Vth due to noise. If delta_Vth = 4 and delta_LLR = 0.3, the log-likelihood ratio table is shown below:
[0054] Specifically, the LLR values for X intervals when there is no offset during NX read can be pre-stored: float_LLR, and an LLR correction value: delta_LLR. The DSP calculates the optimal read voltage offset value delta_Vth. Based on the optimal read voltage offset value delta_Vth, the optimal read voltage offset value delta_LLR, and the floating-point LLR sequence, the LLRtable after the read voltage offset is calculated, which yields shift_LLR. During soft decoding, the soft information is mapped using shift_LLR to obtain the input information for the soft decoder.
[0055] In some examples, functional models of the LLR table and the read voltage offset were established. Through these functional models, the LLR lookup table corresponding to multiple read operations under any voltage offset can be designed in real time with low complexity.
[0056] Please see Figure 5 , Figure 5 This is a flowchart illustrating a software decoding method according to an embodiment of this application. This method can be applied to electronic devices with computing or other functions. It should be noted that if substantially the same result is obtained, the method of this application does not necessarily require further clarification. Figure 5 The sequence of processes shown is limited.
[0057] In some possible implementations, this method can be implemented by the processor calling computer-readable instructions stored in memory, such as... Figure 5 As shown, the method may include the following steps: S51: Perform a soft read operation based on the current hard read voltage to obtain the corresponding soft information.
[0058] A soft read operation is performed based on the current hard read voltage to obtain the corresponding soft information. For example, by increasing the number of reads on both sides of the current hard read voltage, the DSP can generate soft information based on the result of the read operation to distinguish different sub-intervals. The soft information includes the number of 0s or 1s read.
[0059] S52: Based on the offset log-likelihood ratio table, map the soft information to the corresponding log-likelihood ratio value, and input it into the soft decoder for decoding.
[0060] Based on the offset log-likelihood ratio table, the soft information is mapped to the corresponding log-likelihood ratio, and the determined log-likelihood ratio is then input into the soft decoder for decoding.
[0061] The offset log-likelihood ratio table is generated using the aforementioned processing method. In some examples, the optimal hard read voltage of the storage device is obtained, and a multi-read operation is performed using this optimal hard read voltage as the initial soft read voltage to obtain an initial log-likelihood ratio table corresponding to the multi-read operation. In response to an offset in the optimal hard read voltage, the optimal read voltage offset value corresponding to the optimal hard read voltage is obtained, as well as the corrected log-likelihood ratio corresponding to the storage device. Furthermore, the initial log-likelihood ratio table is corrected using the corrected log-likelihood ratio and the optimal read voltage offset value to obtain the offset log-likelihood ratio table corresponding to the offset optimal hard read voltage. This enables dynamic updating of the LLR table, thereby improving the error correction performance of the soft decoder and the reliability of the storage system.
[0062] Those skilled in the art will understand that, in the above-described method of the specific implementation, the order in which each step is written does not imply a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of each step should be determined by its function and possible internal logic.
[0063] Please see Figure 6 , Figure 6 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application. The electronic device 60 includes a memory 61 and a processor 62 coupled to each other. The processor 62 is used to execute program instructions stored in the memory 61 to implement the steps of the above-described log-likelihood ratio table processing method embodiment, or to implement the steps of the above-described software decoding method embodiment. In a specific implementation scenario, the electronic device 60 may include, but is not limited to, a microcomputer or a server.
[0064] Specifically, processor 62 controls itself and memory 61 to implement the steps of the above-described log-likelihood ratio table processing method embodiment, or to implement the steps of the above-described soft decoding method embodiment. Processor 62 can also be called a CPU (Central Processing Unit), and may be an integrated circuit chip with signal processing capabilities. Processor 62 can also be a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. A general-purpose processor can be a microprocessor or any conventional processor. Furthermore, processor 62 can be implemented using integrated circuit chips.
[0065] Please see Figure 7 , Figure 7 This is a schematic diagram of the structure of a non-volatile computer-readable storage medium according to an embodiment of this application. The non-volatile computer-readable storage medium 70 is used to store a computer program 701. When the computer program 701 is executed by a processor, for example, by the aforementioned... Figure 6 When the processor 62 in the embodiment is executed, it is used to implement the steps of the above-described processing method embodiment for the log-likelihood ratio table, or to implement the steps of the above-described soft decoding method embodiment.
[0066] The description of the various embodiments above tends to emphasize the differences between the various embodiments. The similarities or similarities between them can be referred to, and for the sake of brevity, they will not be repeated here.
[0067] In the several embodiments provided in this application, it should be understood that the disclosed methods and related devices can be implemented in other ways. For example, the related device implementations described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication disconnection shown or discussed may be indirect coupling or communication disconnection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.
[0068] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0069] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods of various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0070] Those skilled in the art will readily recognize that numerous modifications and variations can be made to the apparatus and method while maintaining the teachings of this application. Therefore, the above disclosure should be considered limited only by the scope of the appended claims.
Claims
1. A method for processing log-likelihood ratio tables, characterized in that, include: Obtain the optimal hard read voltage for the storage device; The optimal hard read voltage is used as the first soft read voltage to perform a multi-read operation, so as to obtain the initial log-likelihood ratio table corresponding to the multi-read operation; In response to the shift of the optimal hard read voltage, the optimal read voltage shift value corresponding to the optimal hard read voltage is obtained; Obtain the corrected log-likelihood ratio corresponding to the storage device; The initial log-likelihood ratio table is corrected using the corrected log-likelihood ratio and the optimal read voltage offset value, thereby obtaining the offset log-likelihood ratio table corresponding to the optimal hard read voltage after offset.
2. The method according to claim 1, characterized in that, The step of correcting the initial log-likelihood ratio table using the corrected log-likelihood ratio and the optimal read voltage offset includes: Obtain the target log-likelihood ratio sequence corresponding to the initial log-likelihood ratio table; The target log-likelihood ratio sequence is corrected using the corrected log-likelihood ratio and the optimal read voltage offset value, thereby obtaining the offset log-likelihood ratio table.
3. The method according to claim 2, characterized in that, The step of correcting the target log-likelihood ratio sequence using the corrected log-likelihood ratio and the optimal read voltage offset includes: Obtain the target log-likelihood ratio from the target log-likelihood ratio sequence; The corrected log-likelihood ratio is obtained by summing the products of the target log-likelihood ratio, the corrected log-likelihood ratio, and the optimal read voltage offset.
4. The method according to claim 3, characterized in that, Further includes: The corrected log-likelihood ratio is rounded down to generate the offset log-likelihood ratio table.
5. The method according to claim 1, characterized in that, The step of obtaining the corrected log-likelihood ratio corresponding to the storage device includes: Obtain the storage status of the storage cells in the storage device and the corresponding multiple threshold voltages; Calculate the log-likelihood ratio change among adjacent threshold voltages in the plurality of threshold voltages; The average of the multiple log-likelihood ratio changes is calculated as the corrected log-likelihood ratio value.
6. The method according to claim 1, characterized in that, The step of obtaining the optimal read voltage offset value corresponding to the optimal hard read voltage in response to the offset of the optimal hard read voltage includes: In response to a shift in the optimal hard read voltage, the current hard read voltage is obtained; The difference between the current hard read voltage and the optimal hard read voltage is calculated and used as the optimal read voltage offset value.
7. The method according to claim 1, characterized in that, The step of obtaining the initial log-likelihood ratio table corresponding to the multiple read operations includes: Obtain the threshold voltage of multiple soft read voltage ranges corresponding to the multi-read operation; Based on the preset channel noise value and the threshold voltage, the initial log-likelihood ratio corresponding to the multiple soft read voltage intervals is calculated, and then the initial log-likelihood ratio table is obtained.
8. A software decoding method, characterized in that, The method includes: Perform a soft read operation based on the current hard read voltage to obtain the corresponding soft information; Based on the offset log-likelihood ratio table, the soft information is mapped to the corresponding log-likelihood ratio value and input into the soft decoder for decoding; The offset log-likelihood ratio table is generated by the log-likelihood ratio table processing method according to any one of claims 1 to 7.
9. An electronic device, characterized in that, The device includes a memory and a processor coupled to each other, the processor being configured to execute program instructions stored in the memory to implement the log-likelihood ratio table processing method of any one of claims 1 to 7, or to implement the soft decoding method of claim 8.
10. A non-volatile computer-readable storage medium storing program instructions thereon, characterized in that, When the program instructions are executed by the processor, they implement the method for adjusting the log-likelihood ratio table as described in any one of claims 1 to 7, or the software decoding method as described in claim 8.
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