high frequency circuit

Abstract

A high-frequency circuit (1) is provided with: a transmission filter (31) connected to selection terminals (512 and 513), having a passband of a transmission frequency band including a frequency band (A); a reception filter (33) connected to a selection terminal (516), having a passband of a reception frequency band including the frequency band (A); and paths (P1 and P2) connecting the transmission filter (31) to the selection terminals (512 and 513), respectively, wherein a first reflection phase of the reception frequency band of the frequency band (A) when the transmission filter (31) is observed from a common terminal (511) via the path (P1) is different from a second reflection phase of the reception frequency band of the frequency band (A) when the transmission filter (31) is observed from the common terminal (511) via the path (P2), and in the transmission frequency band of the frequency band (A), a phase variation amount between the common terminal (511) and the transmission filter (31) connected via the path (P1) is smaller than a phase variation amount between the common terminal (511) and the transmission filter (31) connected via the path (P2).

Description

Technical Field

[0001] This invention relates to a high-frequency circuit. Background Technology

[0002] Patent document 1 discloses a high-frequency front-end circuit (high-frequency circuit) that can operate in both carrier aggregation mode and single mode, and can suppress insertion loss caused by multiplexer when operating in single mode.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2019 / 154025 Summary of the Invention

[0006] The problem the invention aims to solve

[0007] However, in conventional high-frequency circuits such as the aforementioned Patent Document 1, the receiving sensitivity sometimes decreases in the Frequency Division Duplex (FDD) band.

[0008] Therefore, the present invention provides a high-frequency circuit capable of suppressing the decrease in receiver sensitivity in the FDD band.

[0009] Solution for solving the problem

[0010] One aspect of the present invention relates to a high-frequency circuit comprising: a first switching circuit including a first common terminal connected to an antenna connection terminal, and a first selection terminal, a second selection terminal, and a third selection terminal; a first transmit filter connected to the first selection terminal and the second selection terminal, having a passband including a transmit band of a first FDD frequency band; a first receive filter connected to the third selection terminal, having a passband including a receive band of the first FDD frequency band; a first path connecting the first transmit filter to the first selection terminal; and a second path connecting the first transmit filter to the second selection terminal, wherein, when the first common terminal is connected to the first selection terminal, the first reflection phase of the receive band of the first FDD frequency band observed from the first common terminal via the first path is different from the second reflection phase of the receive band of the first FDD frequency band observed from the first common terminal via the second path when the first common terminal is connected to the second selection terminal, and in the transmit band of the first FDD frequency band, the phase variation between the first common terminal and the first transmit filter connected via the first path is less than the phase variation between the first common terminal and the first transmit filter connected via the second path.

[0011] One aspect of the present invention relates to a high-frequency circuit comprising: a first switching circuit including a first common terminal connected to an antenna connection terminal, and a first selection terminal, a second selection terminal, and a third selection terminal; a first transmit filter connected to the first selection terminal and the second selection terminal, having a passband that includes a transmit frequency band of a first FDD band; a first receive filter connected to the third selection terminal, having a passband that includes a receive frequency band of the first FDD band; and a surface-mount inductor or surface-mount capacitor connected between the second selection terminal and the first transmit filter, wherein no surface-mount inductor or surface-mount capacitor is connected between the first selection terminal and the first transmit filter.

[0012] One aspect of the present invention relates to a high-frequency circuit comprising: a first switching circuit including a first common terminal connected to an antenna connection terminal, a first selection terminal, and a second selection terminal; a first transmit filter connected to the first selection terminal and having a passband including a transmit band of a first FDD frequency band; a first receive filter connected to the second selection terminal and having a passband including a receive band of the first FDD frequency band; an inductor or capacitor connected between the path connecting the first transmit filter and the first selection terminal and ground; and a switch connected between the inductor or capacitor and the path or ground, wherein, when a first power level defined by a first maximum output power is applied to the first FDD frequency band, the first switching circuit connects the first common terminal to the first selection terminal and the switch is open; when a second power level defined by a second maximum output power lower than the first maximum output power is applied to the first FDD frequency band, the first switching circuit connects the first common terminal to the first selection terminal and the second selection terminal and the switch is closed.

[0013] The effects of the invention

[0014] According to the present invention, the decrease in receiver sensitivity in the FDD band can be suppressed. Attached Figure Description

[0015] Figure 1 This is a circuit structure diagram of the high-frequency circuit involved in Implementation Method 1.

[0016] Figure 2A This is an example of the circuit structure diagram of the phase adjustment circuit involved in Implementation Method 1.

[0017] Figure 2B This is an example of the circuit structure diagram of the phase adjustment circuit involved in Implementation Method 1.

[0018] Figure 2C This is an example of the circuit structure diagram of the phase adjustment circuit involved in Implementation Method 1.

[0019] Figure 2DThis is an example of the circuit structure diagram of the phase adjustment circuit involved in Implementation Method 1.

[0020] Figure 2E This is an example of the circuit structure diagram of the phase adjustment circuit involved in Implementation Method 1.

[0021] Figure 2F This is an example of the circuit structure diagram of the phase adjustment circuit involved in Implementation Method 1.

[0022] Figure 3 This is a Smith chart used to illustrate the phase adjustment performed by the phase adjustment circuit according to Embodiment 1.

[0023] Figure 4 This is a circuit structure diagram showing the first communication mode of the high-frequency circuit involved in Embodiment 1.

[0024] Figure 5 This is a circuit structure diagram showing the second communication mode of the high-frequency circuit involved in Embodiment 1.

[0025] Figure 6 This is a circuit structure diagram showing the third communication mode of the high-frequency circuit involved in Embodiment 1.

[0026] Figure 7 This is a circuit structure diagram showing the fourth communication mode of the high-frequency circuit involved in Embodiment 1.

[0027] Figure 8 This is a circuit structure diagram of the high-frequency circuit involved in Implementation Method 2.

[0028] Figure 9A This is an example of the circuit structure diagram of the phase adjustment circuit involved in Embodiment 2.

[0029] Figure 9B This is an example of the circuit structure diagram of the phase adjustment circuit involved in Embodiment 2.

[0030] Figure 10 This is a circuit structure diagram showing the first communication mode of the high-frequency circuit involved in Embodiment 2.

[0031] Figure 11 This is a circuit structure diagram showing the second communication mode of the high-frequency circuit involved in Embodiment 2.

[0032] Figure 12 This is a circuit structure diagram showing the third communication mode of the high-frequency circuit involved in Embodiment 2.

[0033] Figure 13 This is a circuit structure diagram showing the fourth communication mode of the high-frequency circuit involved in Embodiment 2. Detailed Implementation

[0034] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings. Furthermore, the embodiments described below are general or specific examples. The numerical values, shapes, materials, structural elements, arrangements of structural elements, and connection methods shown in the following embodiments are examples and are not intended to limit the present invention.

[0035] Furthermore, the figures are schematic diagrams that have been appropriately emphasized, omitted, or proportionally adjusted for the purpose of illustrating the invention, and are not necessarily strictly illustrative, sometimes differing from the actual shapes, positional relationships, and proportions. In the figures, substantially identical structures are labeled with the same reference numerals, and sometimes repeated descriptions are omitted or simplified.

[0036] In this disclosure, "connection" includes not only direct connections via connecting terminals and / or wiring conductors, but also electrical connections via other circuit elements. "A connected between B and C" means that A is connected in series along the path connecting B and C; specifically, it means that one end of A is connected to B and the other end of A is connected to C. "Terminal" refers to the point where a conductor within an element terminates. Furthermore, where the impedance of the conductors between elements is sufficiently low, a terminal can be interpreted as any point on the conductors between elements or the entire conductor, rather than just a single point.

[0037] The "passband of a filter" is a portion of the spectrum transmitted through the filter, defined as the frequency band where the output power is no more than 3dB lower than the maximum output power. Therefore, the high-frequency and low-frequency ends of the passband of a bandpass filter are determined as the higher and lower frequencies of the two points where the output power is 3dB lower than the maximum output power.

[0038] "Receive band" refers to the frequency band used for receiving in a communication device, while "transmit band" refers to the frequency band used for transmitting in a communication device. For example, in the frequency band used for Frequency Division Duplex (FDD), different frequency bands (uplink band and downlink band) are used as the transmit and receive bands. Conversely, in the frequency band used for Time Division Duplex (TDD), the transmit and receive bands use the same frequency band.

[0039] (Implementation Method 1)

[0040] First, let's describe Embodiment 1. The communication device 5 involved in this embodiment can be used to provide wireless connectivity. For example, the communication device 5 can be installed in a user equipment (UE) in a cellular network (also called a mobile network), such as a portable phone, smartphone, tablet computer, or wearable device. In another example, by installing the communication device 5, wireless connectivity can be provided to IoT (Internet of Things) sensor devices, medical / healthcare devices, automobiles, unmanned aerial vehicles (UAVs), and automated guided vehicles (AGVs). In yet another example, by installing the communication device 5, wireless connectivity can also be provided using a wireless access point or a wireless hotspot.

[0041] Reference Figure 1 The circuit structure of the communication device 5 and the high-frequency circuit 1 involved in this embodiment will be explained. Figure 1 This is a circuit diagram of the communication device 5 involved in this embodiment.

[0042] also, Figure 1 This is an illustrative circuit structure; the communication device 5 and the high-frequency circuit 1 can be installed using any of a variety of circuit mounting methods and circuit techniques. Therefore, the following description of the communication device 5 and the high-frequency circuit 1 should not be interpreted restrictively.

[0043] [1.1 Circuit structure of communication device 5]

[0044] First, refer to Figure 1 The circuit structure of the communication device 5 according to this embodiment will be explained. The communication device 5 includes a high-frequency circuit 1, an antenna 2, an RFIC (Radio Frequency Integrated Circuit) 3, and a BBIC (Baseband Integrated Circuit) 4.

[0045] High-frequency circuit 1 is capable of transmitting high-frequency signals between antenna 2 and RFIC 3. The circuit structure of high-frequency circuit 1 will be described later.

[0046] Antenna 2 is connected to antenna connection terminal 101 of high-frequency circuit 1. Antenna 2 can receive high-frequency signals from high-frequency circuit 1 and output them to the outside of communication device 5. Alternatively, antenna 2 can also receive high-frequency signals from outside of communication device 5 and output them to high-frequency circuit 1. Furthermore, antenna 2 may not be included in communication device 5. Alternatively, communication device 5 may have one or more antennas in addition to antenna 2.

[0047] RFIC 3 is an example of a signal processing circuit that processes high-frequency signals. Specifically, RFIC 3 can process the transmit signal input from BBIC 4 through up-conversion or the like, and output the resulting high-frequency transmit signal to high-frequency circuit 1. Furthermore, RFIC 3 can process the high-frequency receive signal input via the receive path of high-frequency circuit 1 through down-conversion or the like, and output the resulting receive signal to BBIC 4. Additionally, RFIC 3 may also have a control unit that controls the switches and power amplifiers in high-frequency circuit 1. Moreover, some or all of the functions of the control unit in RFIC 3 may be included externally, for example, within BBIC 4 or high-frequency circuit 1.

[0048] BBIC 4 is a baseband signal processing circuit that uses an intermediate frequency band (IF) with a frequency lower than that of the high-frequency signal transmitted by the high-frequency circuit 1 for signal processing. Signals processed by BBIC 4 may be used, for example, as image signals to display images and / or as sound signals to make calls via a speaker. Alternatively, BBIC 4 may not be included in the communication device 5.

[0049] [1.2 Circuit Structure of High-Frequency Circuit 1]

[0050] Next, refer to Figure 1 The circuit structure of the high-frequency circuit 1 according to this embodiment will be described below. The high-frequency circuit 1 includes a power amplifier 11, low-noise amplifiers 21 and 22, transmitting filters 31 and 32, receiving filters 33 and 34, phase adjustment circuits 41 and 42, switching circuits 51 and 52, antenna connection terminal 101, high-frequency input terminal 111, and high-frequency output terminals 121 and 122.

[0051] Antenna connection terminal 101 is an external connection terminal of high-frequency circuit 1. Antenna connection terminal 101 is connected to antenna 2 externally to high-frequency circuit 1 and to switching circuit 51 internally to high-frequency circuit 1. Thus, high-frequency circuit 1 can supply transmission signals to antenna 2 via antenna connection terminal 101 and can receive signals from antenna 2.

[0052] The high-frequency input terminal 111 is an external connection terminal of the high-frequency circuit 1. The high-frequency input terminal 111 is connected externally to the RFIC 3 and internally to the power amplifier 11 of the high-frequency circuit 1. Thus, the high-frequency circuit 1 can supply the transmission signals of frequency bands A and B received from the RFIC 3 via the high-frequency input terminal 111 to the power amplifier 11.

[0053] High-frequency output terminals 121 and 122 are external connection terminals of the high-frequency circuit 1. They are externally connected to the RFIC 3 and internally connected to low-noise amplifiers 21 and 22, respectively. Thus, the high-frequency circuit 1 can supply received signals for frequency bands A and B from the low-noise amplifiers 21 and 22 to the RFIC 3 via the high-frequency output terminals 121 and 122.

[0054] Power amplifier 11 is connected between high-frequency input terminal 111 and switching circuit 52. Specifically, the input terminal of power amplifier 11 is connected to high-frequency input terminal 111, and the output terminal of power amplifier 11 is connected to switching circuit 52. Power amplifier 11 can amplify the transmitted signals of frequency bands A and B supplied from RFIC 3 via high-frequency input terminal 111 using power supplied from a power source (not shown).

[0055] The power amplifier 11 can be constructed from a heterojunction bipolar transistor (HBT) and can be manufactured using semiconductor materials. For example, silicon germanium (SiGe) or gallium arsenide (GaAs) can be used as semiconductor materials. Furthermore, the amplifying transistor of the power amplifier 11 is not limited to an HBT. For example, the power amplifier 11 can also be constructed from a high-electron-mobility transistor (HEMT) or a metal-semiconductor field-effect transistor (MESFET). In this case, gallium nitride (GaN) or silicon carbide (SiC) can also be used as semiconductor materials.

[0056] Furthermore, power amplifier 11 may be partially or entirely excluded from high-frequency circuit 1. In this case, power amplifier 11 may also be partially or entirely connected between RFIC 3 and high-frequency input terminal 111, or it may be included in RFIC 3.

[0057] A low-noise amplifier 21 is connected between the receiving filter 33 and the high-frequency output terminal 121. Specifically, the input terminal of the low-noise amplifier 21 is connected to the receiving filter 33, and the output terminal of the low-noise amplifier 21 is connected to the high-frequency output terminal 121. The low-noise amplifier 21 can amplify the received signal in frequency band A that has passed through the receiving filter 33 using power supplied from a power source (not shown).

[0058] A low-noise amplifier 22 is connected between the receiving filter 34 and the high-frequency output terminal 122. Specifically, the input terminal of the low-noise amplifier 22 is connected to the receiving filter 34, and the output terminal of the low-noise amplifier 22 is connected to the high-frequency output terminal 122. The low-noise amplifier 22 can amplify the received signal in frequency band B that has passed through the receiving filter 34 using power supplied from a power source (not shown).

[0059] Low-noise amplifiers 21 and 22 can be constructed using field-effect transistors (FETs) and can be manufactured using semiconductor materials. Examples of semiconductor materials include single-crystal silicon, gallium nitride (GaN), or silicon carbide (SiC). Furthermore, the amplifying transistors in low-noise amplifiers 21 and 22 are not limited to FETs. For example, some or all of low-noise amplifiers 21 and 22 can also be constructed using bipolar transistors.

[0060] Furthermore, some or all of the low-noise amplifiers 21 and / or 22 may not be included in the high-frequency circuit 1. In this case, some or all of the low-noise amplifier 21 may be connected between the high-frequency output terminal 121 and the RFIC 3, and some or all of the low-noise amplifier 22 may be connected between the high-frequency output terminal 122 and the RFIC 3. Alternatively, some or all of the low-noise amplifiers 21 and / or 22 may also be included in the RFIC 3.

[0061] Transmit filter 31 is an example of a first transmit filter and has a passband that includes the transmit frequency band A. Transmit filter 31 is connected between switching circuits 51 and 52. Specifically, one end of transmit filter 31 is connected to the selection terminal 512 of switching circuit 51 via path P1, and to the selection terminal 513 of switching circuit 51 via path P2. The other end of transmit filter 31 is connected to the selection terminal 522 of switching circuit 52.

[0062] As the transmitting filter 31, a bulk acoustic wave (BAW) filter can be used. In addition, as the transmitting filter 31, a surface acoustic wave (SAW) filter, an LC resonant filter, or a dielectric resonant filter, or any combination of BAW filter, SAW filter, LC resonant filter and dielectric resonant filter can also be used, and it is not limited to them.

[0063] Transmit filter 32 is an example of a second transmit filter, having a passband that includes the transmit frequency band B. Transmit filter 32 is connected between switching circuits 51 and 52. Specifically, one end of transmit filter 32 is connected to the selection terminal 514 of switching circuit 51 via path P3, and to the selection terminal 515 of switching circuit 51 via path P4. The other end of transmit filter 32 is connected to the selection terminal 523 of switching circuit 52.

[0064] SAW filters can be used as the transmitting filter 32. Alternatively, BAW filters, LC resonant filters, dielectric resonant filters, or any combination of SAW filters, BAW filters, LC resonant filters, and dielectric resonant filters can be used as the transmitting filter 32, and it is not limited to these.

[0065] The receiving filter 33 is an example of the first receiving filter and has a passband that includes the receiving frequency band A. The receiving filter 33 is connected between the switching circuit 51 and the low-noise amplifier 21. Specifically, one end of the receiving filter 33 is connected to the selection terminal 516 of the switching circuit 51, and the other end of the receiving filter 33 is connected to the input terminal of the low-noise amplifier 21. A SAW filter can be used as the receiving filter 33. Furthermore, a BAW filter, an LC resonant filter, or a dielectric resonant filter, or any combination of SAW filters, BAW filters, LC resonant filters, and dielectric resonant filters can also be used as the receiving filter 33, and it is not limited to these.

[0066] The receiving filter 34 is an example of a second receiving filter, having a passband that includes the receiving frequency band B. The receiving filter 34 is connected between the switching circuit 51 and the low-noise amplifier 22. Specifically, one end of the receiving filter 34 is connected to the selection terminal 516 of the switching circuit 51, and the other end of the receiving filter 34 is connected to the input terminal of the low-noise amplifier 22. Alternatively, the receiving filter 34 may not be connected to the selection terminal 516, or it may be connected to an additional selection terminal of the switching circuit 51. A SAW filter can be used as the receiving filter 34. Furthermore, a BAW filter, an LC resonant filter, or a dielectric resonant filter, or any combination of SAW filters, BAW filters, LC resonant filters, and dielectric resonant filters can also be used as the receiving filter 34, and it is not limited to these.

[0067] Furthermore, the transmitting filter 32 and / or the receiving filter 34 may not be included in the high-frequency circuit 1. That is, the high-frequency circuit 1 may not support the transmission and / or reception of signals in frequency band B.

[0068] Frequency bands A and B are frequency bands used in communication systems built using Radio Access Technology (RAT). Frequency bands A and B are predefined by standardization organizations such as 3GPP (3rd Generation Partnership Project) and IEEE (Institute of Electrical and Electronics Engineers). Examples of communication systems include 5G NR (5th Generation New Radio) systems, LTE (Long Term Evolution) systems, and WLAN (Wireless Local Area Network) systems.

[0069] Frequency bands A and B are examples of a first FDD band and a second FDD band, respectively. Frequency bands A and B each support a first power level. The first power level is defined by a first maximum output power that is higher than the second maximum output power of the second power level. Specifically, the first power level is, for example, power level 2, in which case the first maximum output power is 26 dBm. The second power level is, for example, power level 3, in which case the second maximum output power is 23 dBm. Furthermore, the first and second power levels are not limited to power levels 2 and 3. For example, the first power level could also be power level 1.5, and the second power level could also be power level 5.

[0070] As an example of such a combination of frequency bands A and B, a combination of Band 1 for LTE or n1 for 5G NR with Band 3 for LTE or n3 for 5G NR can be cited. However, the combination of frequency bands A and B is not limited to this. For example, the combination of frequency bands A and B could also be a combination of Band 1 for LTE or n1 for 5G NR with Band 40 for LTE or n40 for 5G NR. Additionally, for example, the combination of frequency bands A and B could also be a combination of Band 3 for LTE or n3 for 5G NR with Band 40 for LTE or n40 for 5G NR.

[0071] Power class is a classification of the output power of a terminal based on its maximum output power. The smaller the power class value, the higher the maximum allowable output power. For example, in 3GPP, the maximum output power for power class 1 is specified as 31 dBm, for power class 1.5 it is specified as 29 dBm, for power class 2 it is specified as 26 dBm, for power class 3 it is specified as 23 dBm, and for power class 5 it is specified as 20 dBm.

[0072] The maximum output power of the terminal is defined by the maximum output power at the antenna end. The maximum output power of the UE is determined using methods defined by 3GPP, etc. For example, in... Figure 1 In this method, the maximum output power is determined by measuring the radiated power at antenna 2. Alternatively, instead of measuring the radiated power, a terminal can be placed near antenna 2, and a measuring instrument (such as a spectrum analyzer) can be connected to that terminal to measure the maximum output power of antenna 2. The power rating is then determined based on the maximum output power measured in this way.

[0073] A phase adjustment circuit 41 is connected between the selection terminal 513 of the switching circuit 51 and the transmitting filter 31. The phase adjustment circuit 41 includes an inductor and / or a capacitor. The phase adjustment circuit 41 is capable of adjusting the reflection phase of the receiving band of frequency band A when the common terminal 511 and the selection terminal 513 are connected, as observed from the common terminal 511 via path P2. The reflection phase adjusted by the phase adjustment circuit 41 (second reflection phase) is different from the reflection phase of the receiving band of frequency band A when the common terminal 511 and the selection terminal 512 are connected in the switching circuit 51, as observed from the common terminal 511 via path P1 (first reflection phase).

[0074] Phase adjustment circuit 42 is connected between selection terminal 515 of switching circuit 51 and transmit filter 32. Phase adjustment circuit 42 includes an inductor and / or a capacitor. Phase adjustment circuit 42 is capable of adjusting the reflection phase of the receive band of frequency band B when the transmit filter 32 is observed from the common terminal 511 via path P4 with the common terminal 511 and selection terminal 515 connected. The reflection phase adjusted by phase adjustment circuit 42 (fourth reflection phase) is different from the reflection phase of the receive band of frequency band B when the transmit filter 32 is observed from the common terminal 511 via path P3 with the common terminal 511 and selection terminal 514 connected in switching circuit 51 (third reflection phase).

[0075] The inductors and / or capacitors included in the phase adjustment circuits 41 and 42 can be mounted as surface mount devices (SMDs) or using wiring within or on the module substrate. The inductors and capacitors mounted on surface mount devices are referred to as surface mount inductors and surface mount capacitors, respectively. Alternatively, the phase adjustment circuits 41 and / or 42 may also not include inductors and capacitors, and may be constructed from transmission lines, for example.

[0076] Switching circuit 51 is an example of a first switching circuit and is sometimes referred to as an antenna switch. Switching circuit 51 is connected between antenna connection terminal 101 and transmit filters 31 and 32, and receive filters 33 and 34. Specifically, switching circuit 51 includes a common terminal 511 and select terminals 512-516. Common terminal 511 is an example of a first common terminal and is connected to antenna connection terminal 101. Select terminal 512 is an example of a first select terminal and is connected to transmit filter 31 via path P1. Select terminal 513 is an example of a second select terminal and is connected to transmit filter 31 via path P2. Select terminal 514 is an example of a fourth select terminal and is connected to transmit filter 32 via path P3. Select terminal 515 is an example of a fifth select terminal and is connected to transmit filter 32 via path P4. Select terminal 516 is an example of a third select terminal and is connected to receive filters 33 and 34.

[0077] In this connection structure, the switching circuit 51 can connect the common terminal 511 to at least one of the selection terminals 512-516 based on a control signal, for example, from RFIC 3. That is, the switching circuit 51 can connect the common terminal 511 to any one of the selection terminals 512-516, and can also connect it to at least two of the selection terminals 512-516 simultaneously. The switching circuit 51 is, for example, a multi-connection type switching circuit.

[0078] Switching circuit 52 is an example of a second switching circuit and is sometimes referred to as a band selection switch. Switching circuit 52 is connected between power amplifier 11 and transmit filters 31 and 32. Specifically, switching circuit 52 includes a common terminal 521 and selection terminals 522 and 523. Common terminal 521 is an example of a second common terminal and is connected to the output of power amplifier 11. Selection terminal 522 is an example of a sixth selection terminal and is connected to transmit filter 31. Selection terminal 523 is an example of a seventh selection terminal and is connected to transmit filter 32.

[0079] In this connection structure, the switching circuit 52 can exclusively connect the common terminal 521 to the selection terminals 522 and 523 based on, for example, a control signal from the RFIC 3. The switching circuit 52 is, for example, constructed from an SPDT (Single-Pole Double-Throw) type switching circuit.

[0080] Switching circuits 51 and 52 can be mounted on a single integrated circuit, for example, which includes multiple MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), but the mounting method of switching circuits 51 and 52 is not limited thereto. For example, switching circuits 51 and 52 can also be mounted individually on two integrated circuits. Alternatively, switching circuit 51 can also be mounted together with phase adjustment circuits 41 and 42 on a single integrated circuit.

[0081] Path P1 is an example of the first path, connecting the select terminal 512 and the transmit filter 31. Path P1 allows the transmit filter 31 to be connected to the select terminal 512 without going through the phase adjustment circuit 41. In other words, path P1 is a transmit path that bypasses the phase adjustment circuit 41.

[0082] Path P2 is an example of the second path, connecting the select terminal 513 and the transmit filter 31. Path P2 can connect the transmit filter 31 to the select terminal 513 via the phase adjustment circuit 41. That is, path P2 is the transmit path through the phase adjustment circuit 41.

[0083] Thus, the phase adjustment circuit 41 is connected only on path P2 of paths P1 and P2. Consequently, in the transmission band of frequency band A, the phase variation between the common terminal 511 connected via path P1 and the transmission filter 31 is less than the phase variation between the common terminal 511 connected via path P2 and the transmission filter 31. In other words, the loss of the transmitted signal in frequency band A can be suppressed more effectively in path P1 than in path P2.

[0084] Path P3 is an example of a third path, connecting the select terminal 514 and the transmit filter 32. Path P3 allows the transmit filter 32 to be connected to the select terminal 514 without going through the phase adjustment circuit 42. In other words, path P3 is a transmit path that bypasses the phase adjustment circuit 42.

[0085] Path P4 is an example of a fourth path, connecting the select terminal 515 and the transmit filter 32. Path P4 connects the transmit filter 32 to the select terminal 515 via the phase adjustment circuit 42. In other words, path P4 is a transmit path via the phase adjustment circuit 42.

[0086] Thus, the phase adjustment circuit 42 is connected only on path P4 of paths P3 and P4. Consequently, in the transmission band of frequency band B, the phase variation between the common terminal 511 connected via path P3 and the transmission filter 32 is less than the phase variation between the common terminal 511 connected via path P4 and the transmission filter 32. In other words, the loss of the transmitted signal in frequency band B can be suppressed more effectively in path P3 than in path P4.

[0087] Phase variation refers to the phase difference between the input signal and the output signal. For example, the phase variation between the common terminal 511 and the transmitting filter 31 connected via path P1 is determined by the phase difference between the input signal from the output terminal of the transmitting filter 31 to path P1 and the output signal from the common terminal 511. The phase variation can be detected using a phase detector.

[0088] [1.3 Circuit structure of phase adjustment circuits 41 and 42]

[0089] Next, refer to Figures 2A-2F Here are a few examples to illustrate the circuit structure of phase adjustment circuits 41 and 42. Figures 2A-2F Each of these is an exemplary circuit diagram of the phase adjustment circuits 41 and 42 involved in this embodiment.

[0090] also, Figures 2A-2F The circuit structures described below are illustrative. Phase adjustment circuits 41 and 42 can be installed using a wide variety of circuit mounting and circuit techniques. Therefore, the descriptions of phase adjustment circuits 41 and 42 provided below should not be interpreted restrictively.

[0091] First, let me explain Figure 2A .exist Figure 2A In the circuit, phase adjustment circuits 41 and / or 42 include inductor L1.

[0092] In the phase adjustment circuit 41, inductor L1 is connected in series with path P2. Specifically, in the phase adjustment circuit 41, one end of inductor L1 is connected to the selection terminal 513 of the switching circuit 51, and the other end of inductor L1 is connected to the transmitting filter 31.

[0093] In the phase adjustment circuit 42, inductor L1 is connected in series with path P4. Specifically, in the phase adjustment circuit 42, one end of inductor L1 is connected to the selection terminal 515 of the switching circuit 51, and the other end of inductor L1 is connected to the transmitting filter 32.

[0094] Next, the explanation Figure 2B .exist Figure 2B In the circuit, phase adjustment circuits 41 and / or 42 include capacitor C1.

[0095] In the phase adjustment circuit 41, capacitor C1 is connected in series with path P2. Specifically, in the phase adjustment circuit 41, one end of capacitor C1 is connected to the selection terminal 513 of the switching circuit 51, and the other end of capacitor C1 is connected to the transmitting filter 31.

[0096] In the phase adjustment circuit 42, capacitor C1 is connected in series with path P4. Specifically, in the phase adjustment circuit 42, one end of capacitor C1 is connected to the selection terminal 515 of the switching circuit 51, and the other end of capacitor C1 is connected to the transmitting filter 32.

[0097] Next, the explanation Figure 2C .exist Figure 2C In the circuit, phase adjustment circuits 41 and / or 42 include inductor L1, capacitors C1 and C2, and switch S1.

[0098] In the phase adjustment circuit 41, inductor L1 and switch S1 are connected in series with path P2, and capacitors C1 and C2 are connected in parallel with path P2 (branch connection). Specifically, in the phase adjustment circuit 41, one end of inductor L1 is connected to the selection terminal 513 of switch circuit 51, and the other end of inductor L1 is switchably connected to transmitting filter 31 via switch S1. Capacitor C1 is connected between the node between one end of inductor L1 on path P2 and the selection terminal 513 of switch circuit 51 and ground, and capacitor C2 is connected between the node between the other end of inductor L1 on path P2 and one end of switch S1 and ground. One end of switch S1 is connected to the other end of inductor L1, and the other end of switch S1 is connected to transmitting filter 31. When the common terminal 511 in switch circuit 51 is connected to the selection terminal 513, switch S1 is closed (on); when the common terminal 511 in switch circuit 51 is not connected to the selection terminal 513, switch S1 is open (off).

[0099] In the phase adjustment circuit 42, inductor L1 and switch S1 are connected in series with path P4, and capacitors C1 and C2 are connected in parallel with path P4. Specifically, in the phase adjustment circuit 42, one end of inductor L1 is connected to the selection terminal 515 of switch circuit 51, and the other end of inductor L1 is switchably connected to transmitting filter 32 via switch S1. Capacitor C1 is connected between the node between one end of inductor L1 on path P4 and the selection terminal 515 of switch circuit 51 and ground, and capacitor C2 is connected between the node between the other end of inductor L1 on path P4 and one end of switch S1 and ground. One end of switch S1 is connected to the other end of inductor L1, and the other end of switch S1 is connected to transmitting filter 32. Switch S1 is closed when the common terminal 511 in switch circuit 51 is connected to the selection terminal 515, and open when the common terminal 511 in switch circuit 51 is not connected to the selection terminal 515.

[0100] Next, the explanation Figure 2D .exist Figure 2D In the circuit, phase adjustment circuits 41 and / or 42 include capacitor C1, inductors L1 and L2, and switch S1.

[0101] In phase adjustment circuit 41, capacitor C1 and switch S1 are connected in series with path P2, and inductors L1 and L2 are connected in parallel with path P2. Specifically, in phase adjustment circuit 41, one end of capacitor C1 is connected to the selection terminal 513 of switch circuit 51, and the other end of capacitor C1 is switchably connected to transmitting filter 31 via switch S1. In phase adjustment circuit 41, inductor L1 is connected between the node between one end of capacitor C1 on path P2 and the selection terminal 513 of switch circuit 51 and ground, and inductor L2 is connected between the node between the other end of capacitor C1 on path P2 and one end of switch S1 and ground. In phase adjustment circuit 41, one end of switch S1 is connected to the other end of capacitor C1, and the other end of switch S1 is connected to transmitting filter 31. Switch S1 is closed when common terminal 511 is connected to selection terminal 513 in switch circuit 51, and open when common terminal 511 is not connected to selection terminal 513 in switch circuit 51.

[0102] In the phase adjustment circuit 42, capacitor C1 and switch S1 are connected in series with path P4, and inductors L1 and L2 are connected in parallel with path P4. Specifically, in the phase adjustment circuit 42, one end of capacitor C1 is connected to the selection terminal 515 of switch circuit 51, and the other end of capacitor C1 is switchably connected to transmitting filter 32 via switch S1. In the phase adjustment circuit 42, inductor L1 is connected between the node between one end of capacitor C1 on path P4 and the selection terminal 515 of switch circuit 51 and ground, and inductor L2 is connected between the node between the other end of capacitor C1 on path P4 and one end of switch S1 and ground. In the phase adjustment circuit 42, one end of switch S1 is connected to the other end of capacitor C1, and the other end of switch S1 is connected to transmitting filter 32. Switch S1 is closed when the common terminal 511 of switch circuit 51 is connected to the selection terminal 515, and open when the common terminal 511 of switch circuit 51 is not connected to the selection terminal 515.

[0103] Next, the explanation Figure 2E .exist Figure 2E In the circuit, phase adjustment circuits 41 and / or 42 include inductors L1 and L2, capacitor C1, and switch S1.

[0104] In the phase adjustment circuit 41, inductors L1 and L2, along with switch S1, are connected in series with path P2, and capacitor C1 is connected in parallel with path P2. Specifically, in the phase adjustment circuit 41, one end of inductor L1 is connected to the selection terminal 513 of the switch circuit 51, and the other end of inductor L1 is connected to one end of inductor L2. One end of inductor L2 is connected to the other end of inductor L1, and the other end of inductor L2 is switchably connected to the transmitting filter 31 via switch S1. Capacitor C1 is connected between the node on path P2 between the other end of inductor L1 and one end of inductor L2 and ground. One end of switch S1 is connected to the other end of inductor L2, and the other end of switch S1 is connected to the transmitting filter 31. Switch S1 is closed when the common terminal 511 is connected to the selection terminal 513 in the switch circuit 51, and open when the common terminal 511 is not connected to the selection terminal 513 in the switch circuit 51.

[0105] In the phase adjustment circuit 42, inductors L1 and L2, along with switch S1, are connected in series with path P4, and capacitor C1 is connected in parallel with path P4. Specifically, in the phase adjustment circuit 42, one end of inductor L1 is connected to the selection terminal 515 of switch circuit 51, and the other end of inductor L1 is connected to one end of inductor L2. One end of inductor L2 is connected to the other end of inductor L1, and the other end of inductor L2 is switchably connected to transmitting filter 32 via switch S1. Capacitor C1 is connected between the node on path P4 between the other end of inductor L1 and one end of inductor L2 and ground. One end of switch S1 is connected to the other end of inductor L2, and the other end of switch S1 is connected to transmitting filter 32. Switch S1 is closed when the common terminal 511 in switch circuit 51 is connected to the selection terminal 515, and open when the common terminal 511 is not connected to the selection terminal 515.

[0106] Next, the explanation Figure 2F .exist Figure 2F In the circuit, phase adjustment circuits 41 and / or 42 include capacitors C1 and C2, inductor L1, and switch S1.

[0107] In the phase adjustment circuit 41, capacitors C1 and C2, and switch S1 are connected in series with path P2, and inductor L1 is connected in parallel with path P2. Specifically, in the phase adjustment circuit 41, one end of capacitor C1 is connected to the selection terminal 513 of the switch circuit 51, and the other end of capacitor C1 is connected to one end of capacitor C2. One end of capacitor C2 is connected to the other end of capacitor C1, and the other end of capacitor C2 is switchably connected to the transmitting filter 31 via switch S1. Inductor L1 is connected between the node between the other end of capacitor C1 and one end of capacitor C2 on path P2 and ground. One end of switch S1 is connected to the other end of capacitor C2, and the other end of switch S1 is connected to the transmitting filter 31. Switch S1 is closed when the common terminal 511 in the switch circuit 51 is connected to the selection terminal 513, and open when the common terminal 511 in the switch circuit 51 is not connected to the selection terminal 513.

[0108] In the phase adjustment circuit 42, capacitors C1 and C2, as well as switch S1, are connected in series with path P4, and inductor L1 is connected in parallel with path P4. Specifically, in the phase adjustment circuit 42, one end of capacitor C1 is connected to the selection terminal 515 of switch circuit 51, and the other end of capacitor C1 is connected to one end of capacitor C2. One end of capacitor C2 is connected to the other end of capacitor C1, and the other end of capacitor C2 is switchably connected to transmitting filter 32 via switch S1. Inductor L1 is connected between the node on path P4 between the other end of capacitor C1 and one end of capacitor C2 and ground. One end of switch S1 is connected to the other end of capacitor C2, and the other end of switch S1 is connected to transmitting filter 32. Switch S1 is closed when the common terminal 511 in switch circuit 51 is connected to the selection terminal 515, and open when the common terminal 511 in switch circuit 51 is not connected to the selection terminal 515.

[0109] Furthermore, the circuit structures of phase adjustment circuits 41 and 42 can be different. For example, the circuit structure of phase adjustment circuit 41 could be... Figures 2A-2F One of the circuit structures, the phase adjustment circuit 42, is... Figures 2A-2F The other one in the circuit structure. Alternatively, the circuit structures of phase adjustment circuits 41 and 42 can also be the same.

[0110] [1.4 Phase adjustment performed by phase adjustment circuit 41]

[0111] Next, refer to Figure 3 This will illustrate the phase adjustment performed by the phase adjustment circuit 41. Figure 3 This is a Smith chart illustrating the phase adjustment performed by the phase adjustment circuit 41 according to this embodiment. The phase adjustment performed by the phase adjustment circuit 42 is the same as that of the phase adjustment circuit 41, therefore its description is omitted. Furthermore, Figure 3 The Smith chart is an illustrative one, and the description of the phase adjustment performed by the phase adjustment circuit 41 provided below should not be interpreted restrictively.

[0112] exist Figure 3 In this context, impedance Z1 represents the impedance of the receiving band of frequency band A when the common terminal 511 and the selection terminal 512 are connected, as observed from the common terminal 511 via path P1 to the transmit filter 31. Furthermore, impedance Z2 represents the impedance of the receiving band of frequency band A when the common terminal 511 and the selection terminal 513 are connected, as observed from the common terminal 511 via path P2 to the transmit filter 31.

[0113] like Figure 3As shown, the phase (reflection phase) of impedance Z2 is adjusted by phase adjustment circuit 41 to become a phase different from the phase (reflection phase) of impedance Z1. Specifically, the phase of impedance Z2 is closer to 0 degrees than the phase of impedance Z1. Therefore, the impedance of the receiving band of frequency band A when viewed from common terminal 511 via path P2 is made close to an open circuit, thus suppressing leakage of the received signal from common terminal 511 via path P2 into the transmitting filter 31.

[0114] The reflection phase refers to the phase difference between the high-frequency signal and the reflected wave signal detected from the port where the high-frequency signal was incident. Furthermore, the reflection phase of the receiving band of frequency band A when the common terminal 511 and the select terminal 512 are connected, observed from the common terminal 511 via path P1, and the reflection phase of the receiving band of frequency band A when the common terminal 511 and the select terminal 513 are connected, observed from the common terminal 511 via path P2, can be determined by measuring the impedance of frequency band A using a network analyzer.

[0115] [1.5 Communication Mode of High-Frequency Circuit 1]

[0116] Next, the frequency band used in the communication and the communication mode of the high-frequency circuit 1 that supports the power level applied to the frequency band will be explained.

[0117] [1.5.1 First Communication Mode]

[0118] First, refer to Figure 4 This will illustrate the first communication mode of high-frequency circuit 1. Figure 4 This is a circuit structure diagram showing the first communication mode of the high-frequency circuit 1 according to this embodiment. In this figure and the following figures, dashed arrows indicate the flow of high-frequency signals.

[0119] The first communication mode is a communication mode for transmitting signals in frequency band A at a first power level (e.g., power level 2). In the first communication mode, the transmission of signals in the transmit band of frequency band A is not simultaneous with the reception of signals in the receive band of frequency band A.

[0120] In the first communication mode, the switching circuit 51 connects the common terminal 511 to the selection terminal 512, but not to the selection terminals 513-516. Furthermore, the switching circuit 52 connects the common terminal 521 to the selection terminal 522, but not to the selection terminal 523. Thus, one end of the transmitting filter 31 is connected to the antenna connection terminal 101 via path P1, and the other end of the transmitting filter 31 is connected to the power amplifier 11.

[0121] As a result, the transmit signal of band A is transmitted from RFIC 3 to antenna 2 via high-frequency input terminal 111, power amplifier 11, switching circuit 52, transmit filter 31, path P1, switching circuit 51 and antenna connection terminal 101.

[0122] [1.5.2 Second Communication Mode]

[0123] Next, refer to Figure 5 This will illustrate the second communication mode of high-frequency circuit 1. Figure 5 This is a circuit structure diagram showing the second communication mode of the high-frequency circuit 1 involved in this embodiment.

[0124] The second communication mode is a communication mode for transmitting and receiving signals in frequency band A at a second power level (e.g., power level 3). In the second communication mode, the transmission of signals in the transmission band of frequency band A is performed simultaneously with the reception of signals in the reception band of frequency band A.

[0125] In the second communication mode, switch circuit 51 connects common terminal 511 to selection terminals 513 and 516, but not to selection terminals 512, 514, and 515. Furthermore, switch circuit 52 connects common terminal 521 to selection terminal 522, but not to selection terminal 523. Thus, one end of the transmitting filter 31 is connected to antenna connection terminal 101 via path P2, and the other end of the transmitting filter 31 is connected to power amplifier 11.

[0126] As a result, the transmit signal of band A is transmitted from RFIC 3 to antenna 2 via high-frequency input terminal 111, power amplifier 11, switching circuit 52, transmit filter 31, path P2, switching circuit 51, and antenna connection terminal 101. Meanwhile, the receive signal of band A is transmitted from antenna 2 to RFIC 3 via antenna connection terminal 101, switching circuit 51, receive filter 33, low-noise amplifier 21, and high-frequency output terminal 121.

[0127] [1.5.3 Third Communication Mode]

[0128] First, refer to Figure 6 This will illustrate the third communication mode of high-frequency circuit 1. Figure 6 This is a circuit structure diagram showing the third communication mode of the high-frequency circuit 1 according to this embodiment. In this figure and the following figures, dashed arrows indicate the flow of high-frequency signals.

[0129] The third communication mode is a communication mode used to transmit signals in band B at a first power level (e.g., power level 2). In the third communication mode, the transmission of signals in the transmit band of band B is not simultaneous with the reception of signals in the receive band of band B.

[0130] In the third communication mode, switch circuit 51 connects common terminal 511 to selection terminal 514, but not to selection terminals 512, 513, 515, and 516. Furthermore, switch circuit 52 connects common terminal 521 to selection terminal 523, but not to selection terminal 522. Thus, one end of the transmitting filter 32 is connected to antenna connection terminal 101 via path P3, and the other end of the transmitting filter 32 is connected to power amplifier 11.

[0131] As a result, the transmit signal of band B is transmitted from RFIC 3 to antenna 2 via high-frequency input terminal 111, power amplifier 11, switching circuit 52, transmit filter 32, path P3, switching circuit 51 and antenna connection terminal 101.

[0132] [1.5.4 Fourth Communication Mode]

[0133] Next, refer to Figure 7 This will illustrate the fourth communication mode of high-frequency circuit 1. Figure 7 This is a circuit structure diagram showing the fourth communication mode of the high-frequency circuit 1 involved in this embodiment.

[0134] The fourth communication mode is a communication mode used for transmitting and receiving signals in band B at a second power level (e.g., power level 3). In the fourth communication mode, the transmission of signals in the transmit band of band B is performed simultaneously with the reception of signals in the receive band of band B.

[0135] In the fourth communication mode, switch circuit 51 connects common terminal 511 to selection terminals 515 and 516, but not to selection terminals 512-514. Furthermore, switch circuit 52 connects common terminal 521 to selection terminal 523, but not to selection terminal 522. Thus, one end of the transmitting filter 32 is connected to antenna connection terminal 101 via path P4, and the other end of the transmitting filter 32 is connected to power amplifier 11.

[0136] As a result, the transmit signal of band B is transmitted from RFIC 3 to antenna 2 via high-frequency input terminal 111, power amplifier 11, switching circuit 52, transmit filter 32, path P4, switching circuit 51, and antenna connection terminal 101. Conversely, the receive signal of band B is transmitted from antenna 2 to RFIC 3 via antenna connection terminal 101, switching circuit 51, receive filter 34, low-noise amplifier 22, and high-frequency output terminal 122.

[0137] [1.6 Summary]

[0138] As described above, the high-frequency circuit 1 according to this embodiment includes: a switching circuit 51, which includes a common terminal 511 connected to the antenna connection terminal 101, and selection terminals 512, 513, and 516; a transmit filter 31, which is connected to the selection terminals 512 and 513 and has a passband including the transmit band of frequency band A; a receive filter 33, which is connected to the selection terminal 516 and has a passband including the receive band of frequency band A; a path P1, which connects the transmit filter 31 to the selection terminal 512; and a path P2, which connects the transmit filter 31 to the selection terminal 513, wherein, in When the common terminal 511 and the select terminal 512 are connected, the first reflection phase of the receiving band of frequency band A when the transmit filter 31 is observed from the common terminal 511 via path P1 is different from the second reflection phase of the receiving band of frequency band A when the common terminal 511 and the select terminal 513 are connected, the phase variation between the common terminal 511 and the transmit filter 31 via path P2 is smaller than the phase variation between the common terminal 511 and the transmit filter 31 via path P2 in the transmit band of frequency band A.

[0139] Accordingly, the high-frequency circuit 1 can selectively utilize two paths, P1 and P2, for transmitting signals in frequency band A. Therefore, when only transmitting signals in frequency band A is required, path P1, with smaller phase shifts in the transmission band of frequency band A, can be selected to reduce signal loss, thus achieving a reduction in transmission signal loss. Furthermore, when simultaneously transmitting and receiving signals in frequency band A, path P2, with a more suitable reflection phase in the receiving band, can be selected to reduce leakage of the received signal to the transmission path and improve receiving sensitivity.

[0140] Alternatively, for example, in the high-frequency circuit 1 involved in this embodiment, the second reflection phase may be closer to 0 degrees than the first reflection phase.

[0141] Accordingly, the high-frequency circuit 1 can make the impedance of the receiving band of frequency band A when viewed from the common terminal 511 via path P2 to the transmitting filter 31 close to the open circuit state, and can suppress the leakage of the received signal of frequency band A from the common terminal 511 to the transmitting filter 31 via path P2.

[0142] Additionally, for example, in the high-frequency circuit 1 of this embodiment, when a first power level (e.g., power level 2) defined by a first maximum output power is applied to frequency band A, the switching circuit 51 may connect the common terminal 511 to the selection terminal 512. When a second power level (e.g., power level 3) defined by a second maximum output power lower than the first maximum output power is applied to frequency band A, the switching circuit 51 may connect the common terminal 511 to the selection terminals 513 and 516.

[0143] Accordingly, in the first power level, the common terminal 511 is connected to the selection terminal 512, enabling the transmission of the signal in frequency band A using the path P1 with a smaller phase shift. Therefore, the high-frequency circuit 1 can reduce the loss of the transmitted signal in frequency band A. On the other hand, in the second power level, the common terminal 511 is connected to the selection terminals 513 and 516, enabling the transmission of the signal in frequency band A using the path P2, where the reflection phase of the receiving band of frequency band A is closer to 0 degrees. Therefore, the high-frequency circuit 1 can suppress leakage of the received signal in frequency band A to the transmission path, thereby improving the receiving sensitivity. Thus, the high-frequency circuit 1 can reduce the loss of the transmitted signal when transmitting the signal in frequency band A at the first power level, and suppress leakage of the received signal when transmitting and receiving the signal in frequency band A at the second power level. In particular, in the first power level, where a higher maximum output power is allowed, the output capability of the power amplifier 11 has no margin, therefore the reduction in the loss of the transmitted signal is significant.

[0144] Alternatively, for example, in the high-frequency circuit 1 involved in this embodiment, frequency band A may be Band 1 or Band 3 for LTE, or n1 or n3 for 5G NR.

[0145] Accordingly, the high-frequency circuit 1 can support the transmission and reception of signals for Band 1 or Band 3 for LTE, or n1 or n3 for 5G NR.

[0146] Alternatively, for example, the high-frequency circuit 1 according to this embodiment may also include a power amplifier 11 connected to the transmitting filter 31.

[0147] Accordingly, high-frequency circuit 1 can amplify the transmitted signal of frequency band A.

[0148] Alternatively, for example, the high-frequency circuit 1 involved in this embodiment may also include a receiving filter 34, which is connected to the selection terminal 516 and has a passband that includes the receiving frequency band B.

[0149] Therefore, the high-frequency circuit 1 can support the transmission and reception of signals in frequency band A, as well as the reception of signals in frequency band B.

[0150] Alternatively, for example, in the high-frequency circuit 1 according to this embodiment, the switching circuit 51 may also include selection terminals 514 and 515, and the high-frequency circuit 1 may also include: a transmitting filter 32 connected to the selection terminals 514 and 515, having a passband that includes the transmitting frequency band of frequency band B; a path P3 that connects the transmitting filter 32 to the selection terminal 514; and a path P4 that connects the transmitting filter 32 to the selection terminal 515. Alternatively, when the common terminal 511 is connected to the selection terminal 514, the third reflection phase of the receiving frequency band of frequency band B when the transmitting filter 32 is observed from the common terminal 511 via the path P3 may be different from the fourth reflection phase of the receiving frequency band of frequency band B when the transmitting filter 32 is observed from the common terminal 511 via the path P4 when the common terminal 511 is connected to the selection terminal 515.

[0151] Accordingly, the high-frequency circuit 1 can selectively utilize two paths, P3 and P4, for transmitting signals in frequency band B. Therefore, when transmitting and receiving signals in frequency band B simultaneously, for example, a path with a more suitable reflection phase in the receiving band (e.g., path P4) can be used, reducing leakage of the received signal to the transmitting path and improving receiving sensitivity. Conversely, when transmitting signals in frequency band B only, for example, a path suitable for transmitting signals in frequency band B (e.g., path P3) can be selected without considering the reflection phase in the receiving band, reducing transmission signal loss, etc.

[0152] Alternatively, for example, in the high-frequency circuit 1 of this embodiment, the phase variation between the common terminal 511 and the transmitting filter 32 connected via path P3 in the transmission band of frequency band B may be less than the phase variation between the common terminal 511 and the transmitting filter 32 connected via path P4.

[0153] Accordingly, high-frequency circuit 1 can reduce the loss of transmitted signals in frequency band B by selecting path P3.

[0154] Alternatively, for example, in the high-frequency circuit 1 involved in this embodiment, the fourth reflection phase may be closer to 0 degrees than the third reflection phase.

[0155] Accordingly, the high-frequency circuit 1 can make the impedance of the receiving band of frequency band B when viewed from the common terminal 511 via path P4 to the transmitting filter 32 close to an open circuit state, and can suppress the leakage of the received signal of frequency band B from the common terminal 511 to the transmitting filter 32 via path P4.

[0156] Additionally, for example, in the high-frequency circuit 1 according to this embodiment, when a first power level defined by a first maximum output power is applied to frequency band B, the switching circuit 51 may connect the common terminal 511 to the selection terminal 514. When a second power level defined by a second maximum output power lower than the first maximum output power is applied to frequency band B, the switching circuit 51 may connect the common terminal 511 to the selection terminals 515 and 516.

[0157] Accordingly, in the first power level, the common terminal 511 is connected to the selection terminal 514, enabling the transmission of the band B signal using the path P3 with a smaller phase shift. Therefore, the high-frequency circuit 1 can reduce the loss of the transmitted signal in band B. On the other hand, in the second power level, the common terminal 511 is connected to the selection terminals 515 and 516, enabling the transmission of the band B signal using the path P4, where the reflection phase of the received band B is closer to 0 degrees. Therefore, the high-frequency circuit 1 can suppress leakage of the received signal from band B to the transmission path, thereby improving the receiving sensitivity. Thus, the high-frequency circuit 1 can reduce the transmission signal loss when transmitting the band B signal at the first power level, and suppress the leakage of the received signal when transmitting and receiving the band B signal at the second power level. In particular, in the first power level, where a higher maximum output power is allowed, the output capability of the power amplifier 11 has no margin, therefore the reduction in transmission signal loss is significant.

[0158] Alternatively, for example, in the high-frequency circuit 1 involved in this embodiment, the combination of frequency band A and frequency band B may be a combination of Band 1 for LTE or n1 for 5G NR and Band 3 for LTE or n3 for 5G NR.

[0159] Accordingly, the high-frequency circuit 1 can support the transmission and reception of signals for Band 1 of LTE or n1 of 5G NR, as well as the transmission and reception of signals for Band 3 of LTE or n3 of 5G NR.

[0160] Alternatively, for example, in the high-frequency circuit 1 according to this embodiment, the transmitting filter 31 may also be a bulk acoustic wave filter, and the transmitting filter 32 may also be a surface acoustic wave filter.

[0161] Accordingly, a BAW filter is used in the transmit filter 31 that supports the first power level, thereby improving the power tolerance of the transmit filter 31. On the other hand, a SAW filter is used in the receive filter 33, thereby enabling miniaturization and cost reduction of the receive filter 33.

[0162] Additionally, for example, the high-frequency circuit 1 according to this embodiment may also include: a power amplifier 11; and a switching circuit 52, which includes a common terminal 521 connected to the power amplifier 11, a selection terminal 522 connected to the transmitting filter 31, and a selection terminal 523 connected to the transmitting filter 32.

[0163] Accordingly, the power amplifier 11 can be used to amplify the transmitted signals of frequency bands A and B, and the circuit size of the high-frequency circuit 1 can be reduced compared to the case where power amplifiers are prepared separately for frequency bands A and B.

[0164] In addition, the high-frequency circuit 1 involved in this embodiment includes: a switching circuit 51, which includes a common terminal 511 connected to the antenna connection terminal 101, and selection terminals 512, 513 and 516; a transmit filter 31, which is connected to the selection terminals 512 and 513 and has a passband that includes the transmit band of frequency band A; a receive filter 33, which is connected to the selection terminal 516 and has a passband that includes the receive band of frequency band A; and a surface mount inductor (L1) or a surface mount capacitor (C1) connected between the selection terminal 513 and the transmit filter 31, wherein no surface mount inductor or surface mount capacitor is connected between the selection terminal 512 and the transmit filter 31.

[0165] Accordingly, the high-frequency circuit 1 can connect the transmitting filter 31 to the common terminal 511 of the switching circuit 51 without using a surface-mount inductor and a surface-mount capacitor by connecting the common terminal 511 of the switching circuit 51 to the selection terminal 512. Furthermore, the high-frequency circuit 1 can connect the transmitting filter 31 to the common terminal 511 of the switching circuit 51 via a surface-mount inductor (L1) or a surface-mount capacitor (C1) by connecting the common terminal 511 of the switching circuit 51 to the selection terminal 513. Therefore, when only transmitting signals in frequency band A, connecting the transmitting filter 31 to the common terminal 511 without using a surface-mount inductor and a surface-mount capacitor avoids signal loss caused by surface-mount inductors and surface-mount capacitors. On the other hand, when transmitting and receiving signals in band A are performed simultaneously, the transmitting filter 31 is connected to the common terminal 511 via a surface-mount inductor (L1) or a surface-mount capacitor (C1). This allows the impedance of the receiving band of band A when viewed from the common terminal 511 to be close to an open circuit state via the surface-mount inductor (L1) or the surface-mount capacitor (C1), thereby suppressing leakage of the received signal of band A to the transmitting path.

[0166] (Implementation Method 2)

[0167] Next, Embodiment 2 will be described. In this embodiment, the main difference from Embodiment 1 is that the phase adjustment circuit is connected separately from the transmission path, and each transmission filter is connected to a single selection terminal of the antenna switch. Hereinafter, this embodiment will be described with reference to the accompanying drawings, focusing on aspects that differ from Embodiment 1.

[0168] The communication device 5A involved in this embodiment, like that in Embodiment 1, can be used to provide wireless connectivity.

[0169] Reference Figure 8 The circuit structure of the communication device 5A and the high-frequency circuit 1A involved in this embodiment will be explained. Figure 8 This is a circuit diagram of the communication device 5A involved in this embodiment.

[0170] also, Figure 8 The circuit structures described below are illustrative. The communication device 5A and the high-frequency circuit 1A can be installed using a wide variety of circuit mounting methods and techniques. Therefore, the descriptions of the communication device 5A and the high-frequency circuit 1A provided below should not be interpreted restrictively.

[0171] [2.1 Circuit structure of communication device 5A]

[0172] The communication device 5A is the same as that in embodiment 1 except that it includes a high-frequency circuit 1A instead of a high-frequency circuit 1, so its detailed description is omitted.

[0173] [2.2 Circuit Structure of High-Frequency Circuit 1A]

[0174] Reference Figure 8 The circuit structure of the high-frequency circuit 1A according to this embodiment will be described below. The high-frequency circuit 1A includes a power amplifier 11, low-noise amplifiers 21 and 22, transmitting filters 31 and 32, receiving filters 33 and 34, phase adjustment circuits 41A and 42A, switching circuits 51A and 52, antenna connection terminal 101, high-frequency input terminal 111, and high-frequency output terminals 121 and 122.

[0175] Phase adjustment circuit 41A is connected between the path P5 connecting the selection terminal 512A of switch circuit 51A and the transmitting filter 31 and ground, and includes an inductor or capacitor and a switch. Phase adjustment circuit 41A can adjust the reflected phase of the receiving band of frequency band A when the transmitting filter 31 is viewed from the common terminal 511A with the selection terminal 512A connected, by opening and closing the switch. The reflected phase when the switch of phase adjustment circuit 41A is closed is closer to 0 degrees than the reflected phase when the switch is open. Therefore, by closing the switch, the impedance of the receiving band of frequency band A when the transmitting filter 31 is viewed from the common terminal 511A can be made close to an open circuit state, suppressing leakage of the received signal of frequency band A from the common terminal 511A to the transmitting filter 31.

[0176] Phase adjustment circuit 42A is connected between the path P6 connecting the selection terminal 513A of switch circuit 51A and the transmitting filter 32 and ground, and includes an inductor or capacitor and a switch. Phase adjustment circuit 42A can adjust the reflected phase of the receiving band of frequency band B when the transmitting filter 32 is viewed from the common terminal 511A with the selection terminal 513A connected, by opening and closing the switch. The reflected phase when the switch of phase adjustment circuit 42A is closed is closer to 0 degrees than the reflected phase when the switch is open. Therefore, by closing the switch, the impedance of the receiving band of frequency band B when the transmitting filter 32 is viewed from the common terminal 511A can be made close to an open circuit state, suppressing leakage of the received signal of frequency band B from the common terminal 511A to the transmitting filter 32.

[0177] Switching circuit 51A is an example of a first switching circuit and is sometimes referred to as an antenna switch. Switching circuit 51A is connected between antenna connection terminal 101 and transmit filters 31 and 32, and receive filters 33 and 34. Specifically, switching circuit 51A includes a common terminal 511A and selection terminals 512A to 514A. Common terminal 511A is an example of a first common terminal and is connected to antenna connection terminal 101. Selection terminal 512A is an example of a first selection terminal and is connected to transmit filter 31. Selection terminal 513A is connected to transmit filter 32. Selection terminal 514A is an example of a second selection terminal and is connected to receive filters 33 and 34.

[0178] In this connection structure, the switching circuit 51A can connect the common terminal 511A to at least one of the selection terminals 512A to 514A based on a control signal, for example, from RFIC 3. That is, the switching circuit 51A can connect the common terminal 511A to any one of the selection terminals 512A to 514A, and can simultaneously connect to at least two of the selection terminals 512A to 514A. The switching circuit 51A is, for example, a multi-connection type switching circuit.

[0179] [2.3 Circuit structure of phase adjustment circuits 41A and 42A]

[0180] Next, refer to Figure 9A and Figure 9B Here are a few examples to illustrate the circuit structure of phase adjustment circuits 41A and 42A. Figure 9A and Figure 9B These are exemplary circuit structure diagrams of the phase adjustment circuits 41A and 42A involved in this embodiment.

[0181] also, Figure 9A and Figure 9B The circuit structures provided are illustrative, and the phase adjustment circuits 41A and 42A can be installed using a wide variety of circuit mounting methods and techniques. Therefore, the descriptions of the phase adjustment circuits 41A and 42A provided below should not be interpreted restrictively.

[0182] First, let me explain Figure 9A .exist Figure 9A In the circuit, the phase adjustment circuit 41A and / or 42A includes an inductor L1 and a switch S1.

[0183] In the phase adjustment circuit 41A, inductor L1 is connected between path P5, which connects the selection terminal 512A of switch circuit 51A and transmitting filter 31, and ground. Specifically, in phase adjustment circuit 41A, one end of inductor L1 is connected to path P5, and the other end of inductor L1 is connected to ground via switch S1. Switch S1 is connected between inductor L1 and ground. Alternatively, switch S1 can also be connected between inductor L1 and path P5.

[0184] In the phase adjustment circuit 42A, inductor L1 is connected to ground via path P6, which connects the selection terminal 513A of switch circuit 51A to the transmitting filter 32. Specifically, in phase adjustment circuit 42A, one end of inductor L1 is connected to path P6, and the other end of inductor L1 is connected to ground via switch S1. Switch S1 is connected between inductor L1 and ground. Alternatively, switch S1 can also be connected between inductor L1 and path P6.

[0185] Next, the explanation Figure 9B.exist Figure 9B In the circuit, phase adjustment circuits 41A and / or 42A include capacitor C1 and switch S1.

[0186] In the phase adjustment circuit 41A, capacitor C1 is connected between path P5, which connects the selection terminal 512A of the switching circuit 51A and the transmitting filter 31, and ground. Specifically, in the phase adjustment circuit 41A, one end of capacitor C1 is connected to path P5, and the other end of capacitor C1 is connected to ground via switch S1. Switch S1 is connected between capacitor C1 and ground. Alternatively, switch S1 can also be connected between capacitor C1 and path P5.

[0187] In the phase adjustment circuit 42A, capacitor C1 is connected between path P6, which connects the selection terminal 513A of the switching circuit 51A and the transmitting filter 32, and ground. Specifically, in the phase adjustment circuit 42A, one end of capacitor C1 is connected to path P6, and the other end of capacitor C1 is connected to ground via switch S1. Switch S1 is connected between capacitor C1 and ground. Alternatively, switch S1 can also be connected between capacitor C1 and path P6.

[0188] [2.4 Communication Mode of High-Frequency Circuit 1A]

[0189] Next, the frequency band used and the communication mode of the high-frequency circuit 1A that supports the power level applied to this frequency band will be explained.

[0190] [2.4.1 First Communication Mode]

[0191] First, refer to Figure 10 This will illustrate the first communication mode of the high-frequency circuit 1A. Figure 10 This is a circuit structure diagram showing the first communication mode of the high-frequency circuit 1A according to this embodiment. Furthermore, in Figure 10 In the following diagrams, it is used as phase adjustment circuit 41A. Figure 9A The phase adjustment circuit 41A can also be used. Figure 9B The phase adjustment circuit 41A.

[0192] The first communication mode is a communication mode for transmitting signals in frequency band A at a first power level (e.g., power level 2). In the first communication mode, the transmission of signals in the transmit band of frequency band A is not simultaneous with the reception of signals in the receive band of frequency band A.

[0193] In the first communication mode, switch circuit 51A connects common terminal 511A to selection terminal 512A, but not to selection terminal 514A. Switch circuit 52 connects common terminal 521 to selection terminal 522, but not to selection terminal 523. Phase adjustment circuit 41A disconnects switch S1. As a result, one end of transmit filter 31 is connected to antenna connection terminal 101, and the other end of transmit filter 31 is connected to power amplifier 11. Furthermore, path P5 is not connected to ground via inductor L1 or capacitor C1 of phase adjustment circuit 41A.

[0194] As a result, the transmit signal of band A is transmitted from RFIC 3 to antenna 2 via high-frequency input terminal 111, power amplifier 11, switching circuit 52, transmit filter 31, path P5, switching circuit 51A and antenna connection terminal 101.

[0195] [2.4.2 Second Communication Mode]

[0196] Next, refer to Figure 11 This will illustrate the second communication mode of the high-frequency circuit 1A. Figure 11 This is a circuit structure diagram showing the second communication mode of the high-frequency circuit 1A involved in this embodiment.

[0197] The second communication mode is a communication mode for transmitting and receiving signals in frequency band A at a second power level (e.g., power level 3). In the second communication mode, the transmission of signals in the transmission band of frequency band A is performed simultaneously with the reception of signals in the reception band of frequency band A.

[0198] In the second communication mode, switch circuit 51A connects common terminal 511A to select terminals 512A and 514A. Switch circuit 52 connects common terminal 521 to select terminal 522, but not to select terminal 523. Phase adjustment circuit 41A closes switch S1. Thus, one end of transmit filter 31 is connected to antenna connection terminal 101, and the other end of transmit filter 31 is connected to power amplifier 11. Furthermore, path P5 is connected to ground via inductor L1 or capacitor C1 of phase adjustment circuit 41A, and the reflected phase of transmit filter 31 as observed from common terminal 511A is adjusted by phase adjustment circuit 41A.

[0199] As a result, the transmit signal of band A is transmitted from RFIC 3 to antenna 2 via high-frequency input terminal 111, power amplifier 11, switching circuit 52, transmit filter 31, path P5, switching circuit 51A, and antenna connection terminal 101. Conversely, the receive signal of band A is transmitted from antenna 2 to RFIC 3 via antenna connection terminal 101, switching circuit 51A, receive filter 33, low-noise amplifier 21, and high-frequency output terminal 121.

[0200] [2.4.3 Third Communication Mode]

[0201] First, refer to Figure 12 This will illustrate the third communication mode of the high-frequency circuit 1A. Figure 12 This is a circuit structure diagram showing the third communication mode of the high-frequency circuit 1A involved in this embodiment.

[0202] The third communication mode is a communication mode used to transmit signals in band B at a first power level (e.g., power level 2). In the third communication mode, the transmission of signals in the transmit band of band B is not simultaneous with the reception of signals in the receive band of band B.

[0203] In the third communication mode, switch circuit 51A connects common terminal 511A to selection terminal 513A, but not to selection terminal 514A. Switch circuit 52 connects common terminal 521 to selection terminal 523, but not to selection terminal 522. Phase adjustment circuit 42A disconnects switch S1. Therefore, one end of transmit filter 32 is connected to antenna connection terminal 101, and the other end of transmit filter 32 is connected to power amplifier 11. Furthermore, path P6 is not connected to ground via inductor L1 or capacitor C1 of phase adjustment circuit 42A.

[0204] As a result, the transmit signal of band B is transmitted from RFIC 3 to antenna 2 via high-frequency input terminal 111, power amplifier 11, switching circuit 52, transmit filter 32, path P6, switching circuit 51A and antenna connection terminal 101.

[0205] [2.4.4 Fourth Communication Mode]

[0206] Next, refer to Figure 13 This will illustrate the fourth communication mode of the high-frequency circuit 1A. Figure 13 This is a circuit structure diagram showing the fourth communication mode of the high-frequency circuit 1A involved in this embodiment.

[0207] The fourth communication mode is a communication mode used for transmitting and receiving signals in band B at a second power level (e.g., power level 3). In the fourth communication mode, the transmission of signals in the transmit band of band B is performed simultaneously with the reception of signals in the receive band of band B.

[0208] In the fourth communication mode, switch circuit 51A connects common terminal 511A to select terminals 513A and 514A. Switch circuit 52 connects common terminal 521 to select terminal 523, but not to select terminal 522. Phase adjustment circuit 42A closes switch S1. Thus, one end of transmit filter 32 is connected to antenna connection terminal 101, and the other end of transmit filter 32 is connected to power amplifier 11. Furthermore, path P6 is connected to ground via inductor L1 or capacitor C1 of phase adjustment circuit 42A, and the reflected phase of transmit filter 32 observed from common terminal 511A is adjusted by phase adjustment circuit 42A.

[0209] As a result, the transmit signal of band B is transmitted from RFIC 3 to antenna 2 via high-frequency input terminal 111, power amplifier 11, switching circuit 52, transmit filter 32, path P6, switching circuit 51A, and antenna connection terminal 101. Conversely, the receive signal of band B is transmitted from antenna 2 to RFIC 3 via antenna connection terminal 101, switching circuit 51A, receive filter 34, low-noise amplifier 22, and high-frequency output terminal 122.

[0210] [2.5 Summary]

[0211] As described above, the high-frequency circuit 1A according to this embodiment includes: a switching circuit 51A, which includes a common terminal 511A connected to the antenna connection terminal 101, and selection terminals 512A and 514A; a transmitting filter 31, which is connected to the selection terminal 512A and has a passband that includes the transmitting frequency band of frequency band A; a receiving filter 33, which is connected to the selection terminal 514A and has a passband that includes the receiving frequency band of frequency band A; and an inductor L1 or a capacitor C1, which is connected to the path P5 that connects the transmitting filter 31 to the selection terminal 512A. Between the inductor L1 or capacitor C1 and path P5 or ground; and switch S1, which is connected between the inductor L1 or capacitor C1 and path P5 or ground, wherein, when a first power level defined by a first maximum output power is applied to frequency band A, the switch circuit 51A connects the common terminal 511A to the selection terminal 512A and switch S1 is open; when a second power level defined by a second maximum output power lower than the first maximum output power is applied to frequency band A, the switch circuit 51A connects the common terminal 511A to the selection terminals 512A and 514A and switch S1 is closed.

[0212] Accordingly, in the first power level, the common terminal 511A is connected to the selection terminal 512A, and the switch S1 is open. Therefore, the high-frequency circuit 1A can suppress the increase in transmission path loss through the inductor L1 or the capacitor C1, thereby reducing the loss of the transmitted signal in band A. On the other hand, in the second power level, the common terminal 511A is connected to the selection terminals 512A and 514A, and the switch S1 is closed. Therefore, the high-frequency circuit 1A can adjust the reflection phase of the received band of band A when observing the transmit filter 31 from the common terminal 511A through the inductor L1 or the capacitor C1, thereby suppressing the leakage of the received signal of band A into the transmission path. Thus, the high-frequency circuit 1A can reduce the transmission signal loss when transmitting a signal in band A at the first power level, and suppress the leakage of the received signal when transmitting and receiving a signal in band A at the second power level.

[0213] (Other implementation methods)

[0214] The above description of the high-frequency circuit according to the present invention is based on embodiments; however, the high-frequency circuit according to the present invention is not limited to the above embodiments. Other embodiments implemented by combining any structural elements in the above embodiments, variations of the above embodiments that can be conceived by those skilled in the art without departing from the spirit of the present invention, and various devices incorporating the above high-frequency circuit are also included in the present invention.

[0215] For example, in the circuit structure of the high-frequency circuits according to the above embodiments, other circuit elements and wiring may be inserted between the paths connecting the circuit elements and signal paths disclosed in the drawings. For example, an impedance matching circuit may be inserted between the filter and the switching circuit.

[0216] Additionally, for example, the high-frequency circuits described in the above embodiments may also include one or more transmit filters and / or receive filters. In this case, the switching circuits 51 and 51A may also include one or more additional selection terminals for connecting one or more transmit filters and / or receive filters.

[0217] The features of the high-frequency circuit described below based on the above embodiments are shown below.

[0218] <1>

[0219] A high-frequency circuit, comprising:

[0220] The first switching circuit includes a first common terminal connected to the antenna connection terminal, and a first selection terminal, a second selection terminal and a third selection terminal;

[0221] A first transmitting filter, which is connected to the first selection terminal and the second selection terminal, has a passband that includes the transmitting frequency band of the first FDD band;

[0222] A first receiving filter, which is connected to the third selection terminal, has a passband that includes the receiving frequency band of the first FDD band;

[0223] A first path connects the first transmitting filter to the first selection terminal; and

[0224] The second path connects the first transmitting filter to the second selection terminal.

[0225] Specifically, when the first common terminal is connected to the first select terminal, the first reflection phase of the receiving frequency band of the first FDD band observed from the first common terminal via the first path when viewing the first transmit filter is different from the second reflection phase of the receiving frequency band of the first FDD band observed from the first common terminal via the second path when the first common terminal is connected to the second select terminal.

[0226] In the transmission band of the first FDD band, the phase variation between the first common terminal and the first transmission filter connected via the first path is less than the phase variation between the first common terminal and the first transmission filter connected via the second path.

[0227] <2>

[0228] according to <1> The high-frequency circuit, wherein,

[0229] The second reflection phase is closer to 0 degrees than the first reflection phase.

[0230] <3>

[0231] according to <1> or <2> The high-frequency circuit, wherein,

[0232] When a first power level, defined by a first maximum output power, is applied to the first FDD frequency band, the first switching circuit connects the first common terminal to the first select terminal.

[0233] When a second power level, defined by a second maximum output power lower than the first maximum output power, is applied to the first FDD band, the first switching circuit connects the first common terminal to the second selection terminal and the third selection terminal.

[0234] <4>

[0235] according to <1> ~ <3> The high-frequency circuit described in any one of the above, wherein,

[0236] The first FDD band is Band1 or Band3 for LTE, or n1 or n3 for 5G NR.

[0237] <5>

[0238] according to <1> ~ <4> The high-frequency circuit described in any one of the above, wherein,

[0239] The high-frequency circuit also includes a power amplifier connected to the first transmitting filter.

[0240] <6>

[0241] according to <1> ~ <4> The high-frequency circuit described in any one of the above, wherein,

[0242] The high-frequency circuit also includes a second receiving filter, which is connected to the third selection terminal and has a passband that includes the receiving frequency band of the second FDD band.

[0243] <7>

[0244] according to <6> The high-frequency circuit, wherein,

[0245] The first switching circuit also has a fourth selection terminal and a fifth selection terminal.

[0246] The high-frequency circuit also features:

[0247] The second transmit filter, which is connected to the fourth selection terminal and the fifth selection terminal, has a passband that includes the transmit frequency band of the second FDD band;

[0248] The third path connects the second transmitting filter to the fourth selection terminal; and

[0249] The fourth path connects the second transmitting filter to the fifth selection terminal.

[0250] Specifically, when the first common terminal is connected to the fourth select terminal, the third reflection phase of the receiving band of the second FDD band observed from the first common terminal via the third path when viewing the second transmit filter is different from the fourth reflection phase of the receiving band of the second FDD band observed from the first common terminal via the fourth path when the first common terminal is connected to the fifth select terminal.

[0251] <8>

[0252] according to <7> The high-frequency circuit, wherein,

[0253] In the transmission band of the first FDD band, the phase variation between the first common terminal and the second transmission filter connected via the third path is less than the phase variation between the first common terminal and the second transmission filter connected via the fourth path.

[0254] <9>

[0255] according to <7> or <8> The high-frequency circuit, wherein,

[0256] The fourth reflection phase is closer to 0 degrees than the third reflection phase.

[0257] <10>

[0258] according to <7> ~ <9> The high-frequency circuit described in any one of the above, wherein,

[0259] When the first power level, defined by the first maximum output power, is applied to the second FDD band, the first switching circuit connects the first common terminal to the fourth selection terminal.

[0260] When a second power level, defined by a second maximum output power lower than the first maximum output power, is applied to the second FDD band, the first switching circuit connects the first common terminal to the third selection terminal and the fifth selection terminal.

[0261] <11>

[0262] according to <7> ~ <10> The high-frequency circuit described in any one of the above, wherein,

[0263] The combination of the first FDD band and the second FDD band is a combination of Band 1 for LTE or n1 for 5G NR and Band 3 for LTE or n3 for 5G NR.

[0264] <12>

[0265] according to <7> ~ <11> The high-frequency circuit described in any one of the above, wherein,

[0266] The first transmitting filter is a bulk acoustic wave filter.

[0267] The second transmitting filter is a surface acoustic wave filter.

[0268] <13>

[0269] according to <7> ~ <12> The high-frequency circuit described in any one of the above, wherein,

[0270] The high-frequency circuit also features:

[0271] Power amplifiers; and

[0272] The second switching circuit includes a second common terminal connected to the power amplifier, a sixth selection terminal connected to the first transmitting filter, and a seventh selection terminal connected to the second transmitting filter.

[0273] <14>

[0274] A high-frequency circuit, comprising:

[0275] The first switching circuit includes a first common terminal connected to the antenna connection terminal, and a first selection terminal, a second selection terminal and a third selection terminal;

[0276] A first transmitting filter, which is connected to the first selection terminal and the second selection terminal, has a passband that includes the transmitting frequency band of the first FDD band;

[0277] A first receiving filter, connected to the third selection terminal, has a passband that includes the receiving frequency band of the first FDD band; and

[0278] A surface-mount inductor or surface-mount capacitor is connected between the second selection terminal and the first transmitting filter.

[0279] There is no surface-mount inductor or surface-mount capacitor connected between the first selection terminal and the first transmitting filter.

[0280] <15>

[0281] A high-frequency circuit, comprising:

[0282] The first switching circuit includes a first common terminal connected to the antenna connection terminal, and a first selection terminal and a second selection terminal;

[0283] A first transmitting filter, connected to the first selection terminal, has a passband that includes the transmitting frequency band of the first FDD band;

[0284] A first receiving filter, which is connected to the second selection terminal, has a passband that includes the receiving frequency band of the first FDD band;

[0285] An inductor or capacitor connected between the path connecting the first transmitting filter and the first selection terminal and ground; and

[0286] A switch, which is connected between the inductor or the capacitor and the path or ground,

[0287] Specifically, when a first power level defined by a first maximum output power is applied to the first FDD frequency band, the first switching circuit connects the first common terminal to the first selected terminal, and the switch is turned off.

[0288] When a second power level, defined by a second maximum output power lower than the first maximum output power, is applied to the first FDD band, the first switching circuit connects the first common terminal to the first selection terminal and the second selection terminal, and the switch is closed.

[0289] Industrial availability

[0290] As a high-frequency circuit configured in the front end, this invention can be widely used in communication devices such as portable telephones.

[0291] Explanation of reference numerals in the attached figures

[0292] 1. 1A: High-frequency circuit

[0293] 2: Antenna

[0294] 3: RFIC

[0295] 4: BBIC

[0296] 5. 5A: Communication device

[0297] 11: Power Amplifier

[0298] 21, 22: Low-noise amplifiers

[0299] 31, 32: Transmit filters

[0300] 33, 34: Receiver filters

[0301] 41, 41A, 42, 42A: Phase adjustment circuit

[0302] 51, 51A, 52: Switching circuits

[0303] 101: Antenna connection terminal

[0304] 111: High-frequency input terminal

[0305] 121, 122: High-frequency output terminals

[0306] 511, 511A, 521: Common Terminals

[0307] 512, 512A, 513, 513A, 514, 514A, 515, 516, 522, 523: Select terminal

[0308] C1, C2: Capacitors

[0309] L1, L2: Inductors

[0310] P1, P2, P3, P4, P5, P6: Path

[0311] S1: Switch

Claims

1. A high-frequency circuit, comprising: The first switching circuit includes a first common terminal connected to the antenna connection terminal, and a first selection terminal, a second selection terminal and a third selection terminal; A first transmitting filter, which is connected to the first selection terminal and the second selection terminal, has a passband that includes the transmitting frequency band of the first frequency division duplex band, i.e., the first FDD band; A first receiving filter, which is connected to the third selection terminal, has a passband that includes the receiving frequency band of the first FDD band; The first path connects the first transmitting filter to the first selection terminal; as well as The second path connects the first transmitting filter to the second selection terminal. Specifically, when the first common terminal is connected to the first select terminal, the first reflection phase of the receiving frequency band of the first FDD band observed from the first common terminal via the first path when viewing the first transmit filter is different from the second reflection phase of the receiving frequency band of the first FDD band observed from the first common terminal via the second path when the first common terminal is connected to the second select terminal. In the transmission band of the first FDD band, the phase variation between the first common terminal and the first transmission filter connected via the first path is less than the phase variation between the first common terminal and the first transmission filter connected via the second path.

2. The high-frequency circuit according to claim 1, wherein, The second reflection phase is closer to 0 degrees than the first reflection phase.

3. The high-frequency circuit according to claim 1 or 2, wherein, When a first power level, defined by a first maximum output power, is applied to the first FDD frequency band, the first switching circuit connects the first common terminal to the first select terminal. When a second power level, defined by a second maximum output power lower than the first maximum output power, is applied to the first FDD band, the first switching circuit connects the first common terminal to the second selection terminal and the third selection terminal.

4. The high-frequency circuit according to any one of claims 1 to 3, wherein, The first FDD band is Band1 or Band3 for LTE, or n1 or n3 for 5G NR.

5. The high-frequency circuit according to any one of claims 1 to 4, wherein, The high-frequency circuit also includes a power amplifier connected to the first transmitting filter.

6. The high-frequency circuit according to any one of claims 1 to 4, wherein, The high-frequency circuit also includes a second receiving filter, which is connected to the third selection terminal and has a passband that includes the receiving frequency band of the second frequency division duplex band, i.e., the second FDD band.

7. The high-frequency circuit according to claim 6, wherein, The first switching circuit also includes a fourth selection terminal and a fifth selection terminal. The high-frequency circuit also features: The second transmit filter, which is connected to the fourth selection terminal and the fifth selection terminal, has a passband that includes the transmit frequency band of the second FDD band; The third path connects the second transmitting filter to the fourth selection terminal; as well as The fourth path connects the second transmitting filter to the fifth selection terminal. Specifically, when the first common terminal is connected to the fourth select terminal, the third reflection phase of the receiving band of the second FDD band observed from the first common terminal via the third path when viewing the second transmit filter is different from the fourth reflection phase of the receiving band of the second FDD band observed from the first common terminal via the fourth path when the first common terminal is connected to the fifth select terminal.

8. The high-frequency circuit according to claim 7, wherein, In the transmission band of the first FDD band, the phase variation between the first common terminal and the second transmission filter connected via the third path is less than the phase variation between the first common terminal and the second transmission filter connected via the fourth path.

9. The high-frequency circuit according to claim 7 or 8, wherein, The fourth reflection phase is closer to 0 degrees than the third reflection phase.

10. The high-frequency circuit according to any one of claims 7 to 9, wherein, When the first power level, defined by the first maximum output power, is applied to the second FDD band, the first switching circuit connects the first common terminal to the fourth selection terminal. When a second power level, defined by a second maximum output power lower than the first maximum output power, is applied to the second FDD band, the first switching circuit connects the first common terminal to the third selection terminal and the fifth selection terminal.

11. The high-frequency circuit according to any one of claims 7 to 10, wherein, The combination of the first FDD band and the second FDD band is a combination of Band 1 for LTE or n1 for 5G NR and Band 3 for LTE or n3 for 5G NR.

12. The high-frequency circuit according to any one of claims 7 to 11, wherein, The first transmitting filter is a bulk acoustic wave filter. The second transmitting filter is a surface acoustic wave filter.

13. The high-frequency circuit according to any one of claims 7 to 12, wherein, The high-frequency circuit also features: Power amplifiers; and The second switching circuit includes a second common terminal connected to the power amplifier, a sixth selection terminal connected to the first transmitting filter, and a seventh selection terminal connected to the second transmitting filter.

14. A high-frequency circuit, comprising: The first switching circuit includes a first common terminal connected to the antenna connection terminal, and a first selection terminal, a second selection terminal and a third selection terminal; A first transmitting filter, which is connected to the first selection terminal and the second selection terminal, has a passband that includes the transmitting frequency band of the first frequency division duplex band, i.e., the first FDD band; A first receiving filter, connected to the third selection terminal, has a passband that includes the receiving frequency band of the first FDD band; and A surface-mount inductor or surface-mount capacitor is connected between the second selection terminal and the first transmitting filter. There is no surface-mount inductor or surface-mount capacitor connected between the first selection terminal and the first transmitting filter.

15. A high-frequency circuit, comprising: The first switching circuit includes a first common terminal connected to the antenna connection terminal, and a first selection terminal and a second selection terminal; A first transmitting filter, which is connected to the first selection terminal, has a passband that includes the transmitting frequency band of the first frequency division duplex band, i.e., the first FDD band. A first receiving filter, which is connected to the second selection terminal, has a passband that includes the receiving frequency band of the first FDD band; An inductor or capacitor connected between the path connecting the first transmitting filter and the first selection terminal at the same ground; as well as A switch, which is connected between the inductor or the capacitor and the path or ground, Specifically, when a first power level defined by a first maximum output power is applied to the first FDD frequency band, the first switching circuit connects the first common terminal to the first selected terminal, and the switch is turned off. When a second power level, defined by a second maximum output power lower than the first maximum output power, is applied to the first FDD band, the first switching circuit connects the first common terminal to the first selection terminal and the second selection terminal, and the switch is closed.

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