A CS101 testing device and method suitable for GJB151 standard
The CS101 testing device, with its integrated control module and optimized algorithms, solves the problems of long testing time, complex procedures, and high costs, and achieves automated and accurate electromagnetic compatibility testing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI LINGSHI ELECTROMAGNETIC TECH
- Filing Date
- 2026-04-03
- Publication Date
- 2026-06-09
AI Technical Summary
The existing CS101 testing process is time-consuming, complex, costly, and has low accuracy, making it difficult to meet the requirements of the GJB151 standard.
The test device, consisting of a control module, waveform generation module, analog-to-digital conversion module, and high-speed multiplier module, uses automated algorithms to output, sample, and calculate frequency ripple, replacing manual operation and high-cost instruments.
It has achieved automated CS101 testing, reducing manpower and time costs, lowering equipment costs, improving measurement accuracy and efficiency, and simplifying the testing process.
Smart Images

Figure CN122171912A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a CS101 testing device and method suitable for the GJB151 standard, and belongs to the technical field of electromagnetic compatibility testing equipment. Background Technology
[0002] The People's Republic of China National Military Standard GJB151B-2013 specifies the requirements and test methods for electromagnetic emission and sensitivity of military electronic, electrical and electromechanical equipment and subsystems. Among them, the CS101 test is applicable to the installation platform of all equipment and subsystems, and has a wide range of applications and an important position.
[0003] In previous CS101 testing processes, testers needed to manually measure whether the power source output reached the limit. If it did not reach the limit, an oscilloscope or spectrum analyzer was used to measure the ripple on the power line. Based on the ripple magnitude, the signal source output was slowly adjusted until the standard requirement was met. This process has the following problems:
[0004] 1. The testing process is time-consuming and complex: The standard requires a frequency testing range of 25Hz to 150kHz. Testers need to test a large number of frequency points and make constant adjustments and processing, which consumes a lot of manpower and time.
[0005] 2. High Testing Costs and Barriers: Due to standard requirements, ripple with a frequency range of 25Hz~150kHz (DC power line) / 100Hz~150kHz (220V, 50Hz AC power line) and a voltage range of 17.85Vpp~0.19Vpp needs to be applied to the power line. Accurately measuring the ripple magnitude by eliminating this 50Hz interference signal becomes crucial. To accurately identify the ripple, practical applications typically use oscilloscopes in FFT mode or a measurement receiver combined with a ripple probe sensor for analysis. These measuring instruments are expensive, and require professional testers to continuously manually control and record measurements, resulting in high testing barriers and operating costs.
[0006] 3. Low accuracy and high error rate in the readings: The standard mentions that band-stop or high-pass filters can be used to suppress the fundamental power supply signal. However, this method requires correction of the measurement data based on the filter's insertion loss coefficient. In practice, band-stop filters are used for low-frequency measurements, while high-frequency measurements require manual replacement with high-pass filters. High-precision filters are not only expensive, but also require manual replacement for different test frequencies, and the error problem becomes more pronounced after filter correction. Summary of the Invention
[0007] The technical problem to be solved by the present invention is to provide a CS101 testing device and method applicable to the GJB151 standard, which solves the problems of long testing time and complex process.
[0008] The technical problem to be solved by this invention is achieved by the following technical solution: This invention provides a CS101 testing device suitable for the GJB151 standard, comprising a control module, a waveform generation module, an analog-to-digital converter module, and a high-speed multiplier module, wherein... The control module is connected to the waveform generation module, the analog-to-digital conversion module, and the high-speed multiplier module; The waveform generation module and the analog-to-digital conversion module are respectively connected to the high-speed multiplier module, wherein, The high-speed multiplier module is used to output ripple.
[0009] As a preferred embodiment of the present invention, the control module includes GD32H737VM, the waveform generation module includes AD9833, the analog-to-digital conversion module includes TPC112, and the high-speed multiplier module includes AD633.
[0010] As a preferred embodiment of the present invention, the high-speed multiplier module is further connected to an operational amplifier to generate output ripple.
[0011] This invention also provides a CS101 test method applicable to the GJB151 standard, applicable to the aforementioned CS101 test apparatus applicable to the GJB151 standard, comprising the following steps: S1, Output frequency ripple; S2, Configure sampling parameters; S3 samples the waveform and uses an algorithm to calculate the amplitude and output power. S4, adjust the ripple output size; S5, conforms to the standard, record and change to the next frequency point.
[0012] As a preferred embodiment of the present invention, if the standard is not met in step S4, the process returns to step S3 and the calculation of amplitude and output power is repeated.
[0013] As a preferred embodiment of the present invention, step S4 further includes the following steps: S41, output minimum ripple value; S42, perform sampling calculations to obtain the k value; S43, determine whether it is within the tolerance range; If it is within the tolerance range, proceed to step S5, record and change to the next frequency point; If it is not within the tolerance range, adjust the output power, return to step S3, and repeat the calculation of amplitude and output power.
[0014] As a preferred embodiment of the present invention, step S2, configuring the sampling parameters, includes the following configuration: Expected sampling rate According to the maximum value of the power line frequency and the applied ripple frequency. Set the multiplier, with a minimum of four times. The calculation formula is: , where n represents a positive integer; Actual sampling rate calculation formula In this case, the frequency division coefficient K is the master clock. For the desired sampling rate Remainder: ; Frequency resolution The calculation formula is , ,in, The sampling time is T, and the number of sampling points is N; Window function: The choice between the Blackman window and the Hanning window depends on the frequency being measured. If the frequency difference between the two is less than three times the frequency resolution, the Hanning window should be used instead.
[0015] As a preferred embodiment of the present invention, in step S3... The steps for sampling the superimposed waveform and the output voltage and current of the power amplifier, and calculating the algorithm, include the following: S31 uses a timer to control the ADC sampling and stores the obtained voltage data; S32, after the number of sampling points is reached, the original sampled data is processed according to the window function used to obtain the windowed sequence, and then the precise Fourier transform is performed on it; In S32, after the accurate Fourier calculation, the amplitude of the applied ripple can be obtained by correcting it according to the compensation coefficient and sampling ratio of the selected window function. In step S32, performing the accurate Fourier calculation includes the following steps: S321: Calculate the angle coefficient based on the target frequency. and sampling frequency Calculate the angle increment coefficient: .in, This represents the angular increment corresponding to a unit sampling point, used to subsequently generate a reference signal synchronized with the target frequency; S322: Traverse all points Based on the correlation between the reference signal and the sampled data, the real and imaginary energy of the target frequency component are accumulated: , ; S323: Based on the square root of the sum of the squares of the real and imaginary energies, the relative energy of the target frequency component is obtained, and then converted into a voltage physical quantity by combining hardware sampling parameters. Where K is the compensation coefficient of the window function.
[0016] As a preferred embodiment of the present invention, the value of k is the maximum value among the ratio of ripple amplitude to standard required amplitude and the ratio of power amplifier output power to standard limited power, which is the percentage of current output to expected output.
[0017] As a preferred embodiment of the present invention, the tolerance range can be customized, wherein... In step S43, if the signal source is not within the tolerance range, the adjustment includes either the first strategy or the second strategy, and one of them shall be executed. The first strategy is a slow growth strategy: when the value of k is not within the tolerance range, if the number of currently recorded points is less than 3, the value of the signal source output is adjusted in stages according to its value. That is, when the value of k is 0.1 different from 1, the current signal source output is changed by 10%, and the change value is not less than 0.1% of the maximum output of the signal source and does not exceed 2% of the maximum output of the signal source.
[0018] The second strategy is a linear regression strategy: if the number of currently recorded points is greater than 3, a linear regression curve can be fitted. Based on the residuals calculated using ordinary linear regression, weighted linear regression, robust linear regression, etc., the curve with the smallest residual is selected as the optimal fitted curve, and the theoretical output value of the signal source when its k value equals 1 is obtained. Similarly, each change to the current signal source output does not exceed 10% of the maximum output of the signal source.
[0019] In the second strategy, weighted linear regression effectively solves the nonlinearity problem of the system, and robust linear regression effectively solves the problem of invalid data caused by interference in the sampled data. Adjustments not exceeding 10% of the maximum output of the signal source effectively prevent erroneous outputs caused by incorrect sampling analysis results, thus avoiding damage to the device under test. The beneficial effects of this invention are: the testing device and method of this invention replace the tedious manual control of parameters such as the measurement range of the oscilloscope or receiver by the test personnel, saving a significant amount of manpower and time costs; it eliminates the need to change different filters according to different test frequencies, not only reducing costs and saving time but also avoiding measurement errors caused by changing different filters; it reduces the cost of purchasing signal sources, and simultaneously eliminates the need for manual operation, achieving fully automatic signal control. Attached Figure Description
[0020] Figure 1 This is a schematic diagram of the structure of the present invention; Figure 2 This is one of the schematic diagrams of the method flow of the present invention; Figure 3 This is a second schematic diagram of the method flow of the present invention; Figure 4 This is the algorithm logic flow of the present invention for adjusting the signal source output using a regression curve; Figure 5 , 6 This is an actual test diagram of the test example in Embodiment 2 of the present invention; In the diagram: 100, control module; 200, waveform generation module; 300, analog-to-digital conversion module; 400, high-speed multiplier module. Detailed Implementation
[0021] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.
[0022] Example 1 like Figure 1 As shown, this embodiment provides a CS101 testing device suitable for the GJB151 standard, including a control module 100, a waveform generation module 200, an analog-to-digital converter module 300, and a high-speed multiplier module 400. The control module 100 is connected to the waveform generation module 200, the analog-to-digital converter module 300, and the high-speed multiplier module 400. In this embodiment, the waveform generation module 200 controls a programmable waveform generator chip to emit a sine wave of a specific frequency; the analog-to-digital converter module 300 controls an analog-to-digital converter chip to output a DC voltage of a specific value. After passing through the high-speed multiplier, a programmable ripple output of arbitrary frequency and amplitude can be provided. This reduces the cost of purchasing a signal source and eliminates the need for manual operation, achieving fully automatic signal control. Specifically, in this embodiment, the control module 100 is selected from models including GD32H737VM, which has a floating-point unit (FPU) for accelerated calculation, a built-in analog-to-digital converter (ADC) for voltage sampling, and multiple communication modules such as SPI / USART / I2C for easy control; 1MB of RAM can store a large amount of data. The waveform generation module 200 is selected from models including the programmable waveform generator chip AD9833, which is controlled via the SPI protocol and has a maximum output frequency of up to 12.5 MHz, meeting the standard ripple requirements. The analog-to-digital converter module 300 includes TPC112, which is controlled via the SPI protocol and outputs a 12-bit precision DC signal. The high-speed multiplier module 400 includes AD633.
[0023] The waveform generation module 200 and the analog-to-digital conversion module 300 are respectively connected to the high-speed multiplier module 400, wherein the high-speed multiplier module 400 is used to output ripple.
[0024] Preferably, in other embodiments of the present invention, the high-speed multiplier module 400 is also connected to an operational amplifier to reduce output ripple and adjust the maximum output.
[0025] Specifically, the sampling section uses a built-in analog-to-digital converter with a maximum sampling rate of 4MHz. An eight-fold sampling rate is used to eliminate interference from the first and second harmonics. To ensure frequency resolution, 65,536 sampling points are selected, effectively distinguishing the amplitude of DC power, the inherent frequency of the 50Hz power line, and the applied ripple frequency. The voltage on the power line is amplified by a differential probe, filtered by an operational amplifier, and protected by DC bias and a Zener diode, ensuring that waveforms greater than 0V and less than 3.3V are input to the chip's sampling pins. The automatic sampling parameter configuration section uses automated program logic to replace manual control of oscilloscope or receiver measurement range parameters by the tester. In the data processing section, a fast FFT transform is used to quickly obtain the amplitude at each frequency point, followed by precise Fourier calculation to obtain the accurate value of the required frequency point.
[0026] Example 2 like Figure 2-3 As shown, this embodiment provides a CS101 test method applicable to the GJB151 standard, applied to a CS101 test apparatus applicable to the GJB151 standard in Embodiment 1, including the following steps: S1, output frequency ripple, that is, the automatic control signal source (the test device in Example 1 is the signal source) outputs ripple at a specific frequency; S2, configure sampling parameters, that is, automatically configure parameters such as sampling rate, sampling resolution, and window function according to the current output ripple frequency; S3 samples the waveform and uses algorithms to calculate the amplitude and output power. Specifically, it samples the superimposed waveform and the output voltage and current of the power amplifier, processes the sampling results using window functions, and applies algorithms such as fast Fourier transform to the processed data to calculate the ripple amplitude and output power of the power amplifier at the current frequency. S4, Adjust the ripple output size. Specifically, based on the ripple amplitude and the power amplifier's output power, automatically adjust the ripple output until the standard requirements are met, record the data, and complete the test at that frequency point. S5, if it meets the standard, record and change to the next frequency point, that is, continue to return to S1, repeat the process until all frequencies have been tested.
[0027] If the standard is not met in step S4, return to step S3 and repeat the calculation of amplitude and output power.
[0028] Specifically, step S4 also includes the following steps: S41, output minimum ripple value; S42, perform sampling calculations to obtain the k value; S43, determine whether it is within the tolerance range; If it is within the tolerance range, proceed to step S5, record and change to the next frequency point; If it is not within the tolerance range, adjust the output power, return to step S3, and repeat the calculation of amplitude and output power.
[0029] In step S2, configuring the sampling parameters includes the following configuration: Expected sampling rate According to the maximum value of the power line frequency and the applied ripple frequency. Set the multiplier, with a minimum of four times. The calculation formula is: Where n represents a positive integer, capable of completely and accurately separating the nth harmonic; specifically, the multiple here must be a power of 2, and must be set to at least four times to satisfy the Nyquist sampling theorem. If the chip's sampling capability allows, a higher multiple, such as eight times or sixteen times, can be set to more clearly distinguish the higher harmonics of the ripple and reduce confusion; Actual sampling rate calculation formula In this case, the frequency division coefficient K is the master clock. For the desired sampling rate Remainder: Specifically, the formula for calculating the frequency division factor K is to correct for integer issues. Specifically, since the chip's timer clock is the master clock... The frequency is formed by frequency division, and the frequency division coefficient stored in the register must be an integer. Therefore, the sampling rate that is not a factor of the master clock cannot be accurately implemented and needs to be precisely corrected.
[0030] Frequency resolution The calculation formula is , Where the sampling time is T and the number of sampling points is N; In the signal processing of this test device, in order to meet the monitoring requirements of GJB151 standard, the system needs to convert the voltage physical quantity collected by the analog-to-digital converter module (300) into a level value in dBuV. The specific conversion logic is as follows: 1. Peak-to-peak value to RMS value conversion: Since the ripple output by the waveform generation module (200) is a sine wave, the system first converts the ripple amplitude Vpp obtained by accurate Fourier calculation into the RMS voltage value. The calculation formula is: ; 2. Logarithmic level conversion: According to the general definition of electromagnetic compatibility testing, voltage level... (Unit is dBuV) is based on 1 The logarithmic ratio of the reference voltage is calculated using the following formula: ; 3. Contextual Consistency: In the description of this invention, the terms "voltage," "level," and the dimension "dBuV" all refer to the ripple intensity characterization after the algorithmic conversion described above. They all refer to units of 1... The unit for reference level.
[0031] Specifically, the number of sampling points should be chosen as a power of 2 to accelerate the Fourier transform calculation. Increasing the number of sampling points N is beneficial for improving frequency resolution. However, this increases the sampling time T and the RAM required for data storage. To ensure excellent anti-aliasing performance, the frequency resolution needs to be more than three times the frequency difference to be distinguished; otherwise, the amplitude of each frequency cannot be accurately determined.
[0032] Window function: The choice between a Blackman window and a Hanning window depends on the current measurement frequency. To obtain the most accurate ripple amplitude, a Blackman window with extremely low sidelobes is typically chosen. However, the Blackman window has a relatively wide main lobe, making it difficult to handle superimposed waveforms with similar frequencies. If the frequency difference between the two is less than three times the frequency resolution, a Hanning window should be used instead.
[0033] In step S3, The steps for sampling the superimposed waveform and the output voltage and current of the power amplifier, and calculating the algorithm, include the following: S31 uses a timer to control the ADC sampling and stores the obtained voltage data; S32, after the number of sampling points is reached, the original sampled data is processed according to the window function used to obtain the windowed sequence, and then the precise Fourier transform is performed on it; In S32, the sampled amplitude obtained by precise Fourier calculation can be corrected according to the compensation coefficient of the selected window function and the sampling ratio to obtain the amplitude of the applied ripple.
[0034] The value of k is the maximum of the ratio of ripple amplitude to standard required amplitude and the ratio of amplifier output power to standard limited power, which is the percentage of current output to expected output.
[0035] The tolerance range can be customized, among which, In step S43, if the signal source is not within the tolerance range, the adjustment of the signal source includes either the first strategy or the second strategy, and one of them shall be executed; that is, the user can use a custom tolerance range, and when the tolerance range is within the tolerance range, the output amplitude of the signal source does not change; when it is not within the tolerance range, the adjustment strategy of the signal source can be configured as either the first strategy or the second strategy, based on the principle of refunding excess and supplementing deficiency. The first strategy is a slow growth strategy: when the value of k is not within the tolerance range, if the number of currently recorded points is less than 3, the value of the signal source output is adjusted in stages according to its value. That is, when the value of k is 0.1 different from 1, the current signal source output is changed by 10%, and the change value is not less than 0.1% of the maximum output of the signal source and does not exceed 2% of the maximum output of the signal source.
[0036] The second strategy is a linear regression strategy: if the number of currently recorded points is greater than 3, a linear regression curve can be fitted. Based on the residuals calculated using ordinary linear regression, weighted linear regression, robust linear regression, etc., the curve with the smallest residual is selected as the optimal fitted curve, and the theoretical output value of the signal source when its k value equals 1 is obtained. Similarly, each change to the current signal source output does not exceed 10% of the maximum output of the signal source.
[0037] If the residuals of multiple regression models are all greater than the set threshold, the system defaults to the "first strategy" to ensure safety and demonstrate better robustness.
[0038] In the second strategy, weighted linear regression can effectively solve the nonlinearity problem of the system, and robust linear regression can effectively solve the problem of invalid data caused by interference in the sampling data. Each adjustment does not exceed 10% of the maximum output of the signal source, which effectively prevents the problem of erroneous output caused by incorrect sampling analysis results and damage to the device under test.
[0039] Specifically, in step S32, performing the precise Fourier calculation includes the following steps: S321: Calculate the angle coefficient based on the target frequency. and sampling frequency Calculate the angle increment coefficient: .in, This represents the angular increment corresponding to a unit sampling point, used to subsequently generate a reference signal synchronized with the target frequency; S322: Traverse all points Based on the correlation between the reference signal and the sampled data, the real and imaginary energy of the target frequency component are accumulated: , ; S323: Based on the square root of the sum of the squares of the real and imaginary energies, the relative energy of the target frequency component is obtained, and then converted into a voltage physical quantity by combining hardware sampling parameters. Where K is the compensation coefficient of the window function.
[0040] like Figure 4 As shown, the ripple at the test frequency of the control signal source output, after considering the power amplifier amplification factor and the coupling transformer turns ratio, should initially be applied to the device at a safe voltage of 0.01Vpp. Each time the signal source output value and the ripple amplitude obtained by precise Fourier transform are recorded as a point (x, y). Linear regression analysis is performed on these points to obtain the theoretical output value of the signal source at the desired ripple amplitude. Based on this theoretical value, the signal source output is adjusted, and the measurement and calculation are repeated. This process will continue until the result infinitely approaches the desired ripple amplitude.
[0041] Specifically, in a specific test example of this invention, a microcontroller chip GD32H737VM with a control core of 600MHz is used. It has a floating-point unit (FPU) for accelerated calculation, a built-in analog-to-digital converter for voltage sampling, multiple communication modules such as SPI / USART / I2C for easy control, and 1MB of RAM for storing a large amount of data.
[0042] The ripple output section uses the programmable waveform generator chip AD9833, controlled via SPI protocol, with a maximum output frequency of up to 12.5 MHz, meeting the standard ripple requirements; the digital-to-analog converter chip is TPC112, controlled via SPI protocol, outputting a 12-bit precision DC signal; the high-speed multiplier chip is AD633; the maximum output can be adjusted via operational amplifiers in the subsequent stage.
[0043] The sampling section uses an analog-to-digital converter with a maximum sampling rate of 4MHz. The sampling rate is increased by eight times to eliminate interference from the first and second harmonics; to ensure frequency resolution, 65,536 sampling points are selected; the voltage on the power line is reduced by the differential probe, filtered by the operational amplifier, and protected by DC bias and Zener diode, so that the waveform greater than 0V and less than 3.3V is input to the sampling pin of the chip.
[0044] The automatic sampling parameter configuration section uses automated program logic to replace manual control of parameters such as the measurement range of the oscilloscope or receiver by the tester. The data processing section uses precise Fourier transform to quickly obtain the amplitude at the desired frequency point.
[0045] In a specific test scenario, in accordance with the CS101 standard, a 0.5-ohm resistor is used as the DUT (Device Under Test). On its 220V, 50Hz AC power line, the test of Curve 1 in the standard is applied: the frequency steps logarithmically from 100Hz to 150kHz in 2% steps. The expected voltage is 136 dBuV (i.e., 17.85Vpp) from 100Hz to 5kHz, and logarithmically decreases to 106.5 dBuV (i.e., 0.6Vpp) from 5kHz to 150kHz. The dwell time is set to 2 seconds, and the tolerance is set to ±5%.
[0046] At the start of the test, the system first outputs 100Hz and an initial safety voltage of 0.01Vpp. The measured ripple is 0.005Vpp. The k value calculated with the expected voltage of 17.85Vpp is 0.00028. Then it outputs 0.05Vpp again. The measured ripple is 0.025Vpp, and the k value is 0.0014. Then it outputs 0.09Vpp again. The measured ripple is 0.045Vpp, and the k value is 0.0025. At this time, the system records 3 valid data points and calculates ordinary linear regression, weighted linear regression, and robust linear regression. According to the calculation results of the curve with the smallest residual, the theoretical output value should be 35.7Vpp. To prevent sudden interference in sampling, the system has an output growth limit. At this time, the system outputs 8.09Vpp. The measured ripple is 4Vpp, and the k value is 0.224. The regression curve is updated, and the theoretical output value is 36.1Vpp. Then the system outputs 16Vpp. The measured ripple is 8.1Vpp, and the k value is 0.224. The regression curve is updated, and the theoretical output value is 35.39Vpp. Then the system outputs 32Vpp. The measured ripple is 15.9Vpp, and the k value is 0.89. The regression curve is updated, and the theoretical output value is 35.82Vpp. Finally, the system outputs 35.82Vpp. The measured ripple is 17.8Vpp, and the k value is 0.997, which is between the tolerances of 0.95 and 1.05, and is determined to be qualified. After continuing this adjustment process for 2 seconds, it enters the next frequency point of 102Hz.
[0047] This method reaches the tolerance range and completes convergence after only 7 adjustments. If the traditional fixed-step method is used, it usually requires more than 20 repeated adjustments to adjust from 0.01Vpp to 17.8Vpp, which proves the significant effect of this algorithm in improving test efficiency.
[0048] In another test with a 200-ohm resistor as the DUT, Standard Test Curve 2 is selected: the frequency steps logarithmically from 100Hz to 150kHz in 2% steps. The expected voltage is 126 dBuV (i.e., 5.66Vpp) from 100Hz to 5kHz, and logarithmically decreases to 96.5 dBuV (i.e., 0.19Vpp) from 5kHz to 150kHz. The dwell time is set to 2 seconds, and the tolerance is set to ±5%. The final machine test diagram is as Figure 5 , 6 : The figure shows the host computer interface and the waveform analysis image of the oscilloscope at this time. As shown in the figure, the output frequency is 1kHz and the expected voltage is 126dBuV. At this time, the measured voltage of this test example is 126.00dBuV. Compared with the 126.26dBuV analyzed by the oscilloscope, it shows extremely high ripple analysis accuracy, which proves the accuracy of the precise DFT algorithm in measurement accuracy. Figure 5 The result of 126.00 dBuV, calculated and displayed in real time by the host computer of this device, is shown. Figure 6 The comparison results of external high-precision oscilloscopes used within the same time period show an error of only 0.26 dBuV, demonstrating the reliability of this algorithm. Since the gain of the power amplifier and coupling transformer is nonlinear at different frequencies, the traditional fixed step method is extremely inefficient, while the linear regression algorithm of this scheme can automatically fit this nonlinear characteristic.
[0049] The testing apparatus and testing method of Embodiments 1 and 2 of the present invention have the following advantages: 1. The experimental parameters are set by the host computer and transmitted to the microcontroller (control module 100) via USART communication. The microcontroller can then run the test automatically. Testers no longer need to manually control the instruments, read data, or replace filters, which saves manpower and time and reduces the high level of professionalism required of testers.
[0050] 2. The signal source output ripple section and sampling calculation section controlled by the control module 100 are highly integrated, economical and practical, replacing the previously expensive signal sources and oscilloscopes and other instruments and equipment, thus greatly reducing the experimental cost.
[0051] 3. The filtering algorithm in data processing replaces the use of traditional filters, eliminating the errors of the filters themselves, and the calculation results are accurate and reliable.
[0052] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments, and various changes and modifications can be made without departing from the spirit and scope of the invention, all of which fall within the scope of protection claimed by the present invention. The scope of protection of the present invention is defined by the appended claims and their equivalents.
Claims
1. A CS101 testing device suitable for the GJB151 standard, characterized in that, It includes a control module (100), a waveform generation module (200), an analog-to-digital converter module (300), and a high-speed multiplier module (400), among which, The control module (100) is connected to the waveform generation module (200), the analog-to-digital conversion module (300), and the high-speed multiplier module (400). The waveform generation module (200) and the analog-to-digital conversion module (300) are respectively connected to the high-speed multiplier module (400), wherein, The high-speed multiplier module (400) is used to output ripple.
2. The CS101 testing device suitable for the GJB151 standard according to claim 1, characterized in that, The control module (100) includes GD32H737VM, the waveform generation module (200) includes AD9833, the analog-to-digital conversion module (300) includes TPC112, and the high-speed multiplier module (400) includes AD633.
3. The CS101 testing device suitable for the GJB151 standard according to claim 1, characterized in that, The high-speed multiplier module (400) is also connected to an operational amplifier to generate output ripple.
4. A CS101 test method applicable to the GJB151 standard, applied to a CS101 test apparatus applicable to the GJB151 standard as described in any one of claims 1 to 3, characterized in that, Includes the following steps: S1, Output frequency ripple; S2, Configure sampling parameters; S3 samples the waveform and calculates the amplitude and output power; S4, adjust the ripple output size; S5, conforms to the standard, record and change to the next frequency point.
5. The CS101 test method applicable to the GJB151 standard according to claim 4, characterized in that, If the standard is not met in step S4, return to step S3 and repeat the calculation of amplitude and output power.
6. The CS101 test method applicable to the GJB151 standard according to claim 5, characterized in that, Step S4 further includes the following steps: S41, output minimum ripple value; S42, perform sampling calculation to obtain the k value, and record the current signal source output value and the k value; S43, determine whether it is within the tolerance range; If it is within the tolerance range, proceed to step S5, record and change to the next frequency point; If it is not within the tolerance range, adjust the output power, return to step S3, and repeat the calculation of amplitude and output power.
7. The CS101 test method applicable to the GJB151 standard according to claim 6, characterized in that, In step S2, configuring the sampling parameters includes configuring as follows: Expected sampling rate According to the maximum value of the power line frequency and the applied ripple frequency. Set the multiplier, with a minimum of four times. The calculation formula is: , where n represents a positive integer; Actual sampling rate calculation formula In this case, the frequency division coefficient K is the master clock. For the desired sampling rate The remainder: ; Frequency resolution The calculation formula is , ,in, The sampling time is T, and the number of sampling points is N; Window function: The choice between the Blackman window and the Hanning window depends on the frequency being measured. If the frequency difference between the two is less than three times the frequency resolution, the Hanning window should be used instead.
8. The CS101 test method applicable to the GJB151 standard according to claim 7, characterized in that, In step S3 The steps for sampling the superimposed waveform and the output voltage and current of the power amplifier, and calculating the algorithm, include the following: S31 uses a timer to control the ADC sampling and stores the obtained voltage data; S32, after the number of sampling points is reached, the original sampled data is processed according to the window function used to obtain the windowed sequence, and then the precise Fourier transform is performed on it; In S32, after the precise Fourier calculation algorithm is used, the amplitude of the applied ripple can be obtained by correcting it according to the compensation coefficient and sampling ratio of the selected window function. In step S32, performing the accurate Fourier calculation includes the following steps: S321: Calculate the angle coefficient based on the target frequency. and sampling frequency Calculate the angle increment coefficient: .in, This represents the angular increment corresponding to a unit sampling point, used to subsequently generate a reference signal synchronized with the target frequency; S322: Traverse all points Based on the correlation between the reference signal and the sampled data, the real and imaginary energy of the target frequency component are accumulated: , ; S323: Based on the square root of the sum of the squares of the real and imaginary energies, the relative energy of the target frequency component is obtained, and then converted into a voltage physical quantity by combining hardware sampling parameters. Where K is the compensation coefficient of the window function.
9. The CS101 test method applicable to the GJB151 standard according to claim 6, characterized in that, The value of k is the maximum of the ratio of ripple amplitude to standard required amplitude and the ratio of power amplifier output power to standard limited power, which is the percentage of current output to expected output.
10. A CS101 test method applicable to the GJB151 standard according to claim 9, characterized in that, The tolerance range can be customized, among which, In step S43, if the signal source is not within the tolerance range, the adjustment includes either the first strategy or the second strategy, and one of them shall be executed. The first strategy is a slow growth strategy: when the value of k is not within the tolerance range, if the number of currently recorded points is less than 3, the output value of the control signal source is adjusted in stages according to the magnitude of the value. The second strategy is a linear regression strategy: if the number of currently recorded points is greater than 3, a linear regression curve can be fitted, the residual is calculated, and the curve with the smallest residual is selected as the optimal fitted curve. The theoretical output value of the signal source when its k value is equal to 1 is obtained.