Multi-port charger, flyback converter and control circuit and control method thereof

Abstract

This disclosure provides a multi-port charger, a flyback converter, and their control circuit and control method. The control circuit includes: a primary-side control circuit for generating a primary-side control signal to control the main power transistor to turn on or off; and a secondary-side control circuit for generating a synchronous rectification control signal to control the synchronous rectifier transistor to turn on or off, and generating an output switching enable signal to control the n-channel output circuit to switch and output different output voltages during the secondary-side freewheeling phase. This disclosure avoids the technical problem of overvoltage stress caused by the output switching enable being later than the freewheeling turn-on or earlier than the freewheeling turn-off, and achieves a low-cost, simple, and reliable multi-port charger and flyback converter.

Description

Technical Field

[0001] This disclosure relates to the field of power electronics technology, and in particular to a multi-port charger, a flyback converter, and their control circuits and control methods. Background Technology

[0002] With the increasing popularity of portable electronic devices, consumers have a growing demand for multi-port chargers. Multi-port chargers charge multiple devices. Flyback converters are widely used in chargers due to their simple circuit structure, input-output electrical isolation, wide voltage regulation range, and ease of multi-output.

[0003] Existing multi-port chargers use flyback converters for AC-DC conversion and multiple secondary windings in the transformer to achieve multiple outputs. However, this method results in a complex transformer structure and high cost. To address these issues, a common approach is to combine a single-stage flyback converter with multiple buck converters to achieve multiple outputs. However, this solution has a complex circuit structure, lower efficiency due to the multiple converter stages, and higher system cost. Summary of the Invention

[0004] In view of the above problems, the purpose of this disclosure is to provide a low-cost, simple and reliable multi-port charger, flyback converter and its control circuit and control method.

[0005] According to a first aspect of this disclosure, a control circuit for a flyback converter is provided. The flyback converter includes an input voltage circuit, a transformer, a main power transistor, a synchronous rectifier transistor, n output circuits, and a control circuit. The n output circuits are connected in parallel to one end of the secondary winding of the transformer and output corresponding output voltages in a time-sharing manner. n is an integer and n>1. The control circuit includes:

[0006] The primary-side control circuit is used to generate a primary-side control signal to control the main power transistor to turn on or off.

[0007] The secondary-side control circuit is used to generate a synchronous rectification control signal to control the synchronous rectifier tube to turn on or off, and to generate an output switching enable signal to control the n-channel output circuit to switch the output voltages at different output voltages during the secondary-side freewheeling phase.

[0008] Optionally, in each switching cycle, the secondary-side control circuit controls the first edge of the output switching enable signal to be earlier than the start time of the secondary-side freewheeling, and controls the second edge of the output switching enable signal to be equal to or later than the end time of the secondary-side freewheeling.

[0009] Optionally, the secondary control circuit acquires the volt-second product of the voltage across the secondary winding in each switching cycle, and generates the first edge of the output switching enable signal when the volt-second product reaches the volt-second product threshold. The volt-second product threshold is the product of the enable coefficient k and the preset volt-second reference of the secondary freewheeling, where k is a positive number and k≤1.

[0010] Optionally, the secondary-side control circuit generates the second edge of the output switching enable signal at the turn-off moment of the synchronous rectifier in each switching cycle; or,

[0011] The second edge of the output switching enable signal is generated at a time after a first time delay from the turn-off time of the synchronous rectifier; or,

[0012] At the moment when the drain-source voltage of the synchronous rectifier reaches the switching enable turn-off reference, the second edge of the output switching enable signal is generated, wherein the switching enable turn-off reference is greater than or equal to the secondary freewheeling turn-off reference.

[0013] Optionally, the enabling coefficient k ≥ 0.5.

[0014] Optionally, the enabling coefficient k is in the interval [0.8, 0.9].

[0015] Optionally, the secondary-side control circuit includes:

[0016] A synchronous rectification control circuit is used to generate the synchronous rectification control signal, set the corresponding volt-second reference for the secondary freewheeling based on the resistance value of the volt-second setting resistor, and generate the output switching enable signal; and

[0017] The output control circuit is connected to the synchronous rectification control circuit and controls the n-channel output circuit to switch and output different output voltages during the secondary freewheeling stage according to the output switching enable signal.

[0018] Optionally, the synchronous rectification control circuit includes a multiplexed pin, which outputs the volt-second reference of the secondary freewheeling current and the output switching enable signal in a time-division multiplexing manner.

[0019] According to a second aspect of this disclosure, a control method for a flyback converter is provided. The flyback converter includes an input voltage circuit, a transformer, a main power transistor, a synchronous rectifier transistor, n output circuits, and a control circuit. The n output circuits are connected in parallel to one end of the secondary winding of the transformer and output corresponding output voltages in a time-sharing manner. n is an integer and n>1. The control method includes:

[0020] Generate a primary-side control signal to control the main power transistor to turn on or off;

[0021] A synchronous rectification control signal is generated to control the synchronous rectifier tube to turn on or off, and an output switching enable signal is generated to control the n-channel output circuit to switch the output voltages to different output voltages during the secondary freewheeling phase.

[0022] Optionally, generating the output switching enable signal includes:

[0023] In each switching cycle, the first edge of the output switching enable signal is earlier than the start time of the secondary side freewheeling, and the second edge of the output switching enable signal is equal to or later than the end time of the secondary side freewheeling.

[0024] Optionally, controlling the first edge of the output switching enable signal in each switching cycle to occur earlier than the start of the secondary freewheeling includes:

[0025] Obtain the volt-second product of the voltage across the secondary winding;

[0026] When the volt-second product reaches the volt-second product threshold, the first edge of the output switching enable signal is generated. The volt-second product threshold is the product of the enable coefficient k and the preset volt-second reference of the secondary side freewheeling. k is a positive number and k≤1.

[0027] Optionally, controlling the second edge of the output switching enable signal in each switching cycle to be equal to or later than the end of the secondary freewheeling includes:

[0028] The second edge of the output switching enable signal is generated at the turn-off moment of the synchronous rectifier diode; or,

[0029] The second edge of the output switching enable signal is generated at a time after a first time delay from the turn-off time of the synchronous rectifier; or,

[0030] At the moment when the drain-source voltage of the synchronous rectifier reaches the switching enable turn-off reference, the second edge of the output switching enable signal is generated, wherein the switching enable turn-off reference is greater than or equal to the secondary freewheeling turn-off reference.

[0031] Optionally, it also includes:

[0032] A time-division multiplexing pin is used to output the volt-second reference of the secondary freewheeling current and the output switching enable signal.

[0033] According to a third aspect of this disclosure, a flyback converter is provided, the flyback converter including an input voltage circuit, a transformer, a main power transistor, a synchronous rectifier transistor, n output circuits, and a control circuit, wherein the n output circuits are connected in parallel to one end of the secondary winding of the transformer and output corresponding output voltages in a time-sharing manner, where n is an integer and n>1, and the control circuit is the control circuit described above.

[0034] According to a fourth aspect of this disclosure, a multi-port charger is provided, including the flyback converter described above.

[0035] The beneficial effects of this disclosure include at least the following:

[0036] The multi-port charger, flyback converter, and their control circuit and method disclosed herein control the n-channel output circuits to switch different output voltages during the secondary-side freewheeling phase by generating an output switching enable signal. Furthermore, in each switching cycle, the first edge of the output switching enable signal is earlier than the start of the secondary-side freewheeling, and the second edge of the output switching enable signal is equal to or later than the end of the secondary-side freewheeling. This avoids the technical problem of overvoltage stress caused by the output switching enable being later than the freewheeling turn-on or earlier than the freewheeling turn-off. A low-cost, simple, and reliable multi-port charger and flyback converter are achieved.

[0037] Furthermore, by setting multiplexed pins in the synchronous rectification control circuit, this disclosure can simultaneously realize the functions of synchronous rectification control and providing output switching enable signals, and can also achieve miniaturized packaging.

[0038] It should be noted that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this disclosure. Attached Figure Description

[0039] The above and other objects, features, and advantages of this disclosure will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0040] Figure 1 This diagram shows a circuit schematic of a flyback converter provided in an embodiment of the present disclosure;

[0041] Figure 2 This diagram illustrates the timing of a flyback converter according to an embodiment of the present disclosure.

[0042] Figure 3 This diagram illustrates the timing of yet another flyback converter provided in an embodiment of the present disclosure.

[0043] Figure 4 This diagram illustrates a waveform of the volt-second reference of the secondary freewheeling current generated by the synchronous rectification control circuit in a flyback converter according to an embodiment of this disclosure.

[0044] Figure 5 The diagram shows a pinout of a synchronous rectification control circuit in a flyback converter according to an embodiment of the present disclosure.

[0045] Figure 6 The diagram shows a flow chart of a control method for a flyback converter provided in an embodiment of this disclosure. Detailed Implementation

[0046] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0047] This disclosure provides a multi-port charger, including a flyback converter that supports multiple outputs, wherein the flyback converter is a flyback converter with multiple time-division outputs.

[0048] Figure 1 A circuit diagram of a flyback converter provided in an embodiment of this disclosure is shown. Figure 4 This diagram illustrates the waveform of the volt-second reference of the secondary freewheeling current generated by the synchronous rectification control circuit in a flyback converter according to an embodiment of this disclosure. Figure 5 The diagram shows a pinout of a synchronous rectification control circuit in a flyback converter according to an embodiment of the present disclosure.

[0049] like Figure 1 As shown, the flyback converter 100 includes an input voltage circuit 120, a transformer T, a main power transistor Qp, a synchronous rectifier transistor Qs, n output circuits, and a control circuit 110.

[0050] The transformer T includes a primary winding Np and a secondary winding Ns. The voltage input circuit 120 and the main power transistor Qp are connected to the primary winding Np, while the synchronous rectifier transistor Qs and the n-way output circuit are connected to the secondary winding Ns.

[0051] For example, the voltage input circuit 120 includes a rectifier circuit 121, a capacitor EC1, a capacitor EC2, and an inductor L. DM Resistor Rrcd, capacitor Crcd, diode Drcd. Capacitor EC1, capacitor EC2, inductor L DM An energy recovery circuit (exemplarily including resistor Rrcd, capacitor Crcd, and diode Drcd) connected between the first and second terminals of the primary winding Np is connected between the rectifier circuit 121 and the primary winding Np. Capacitor EC1, capacitor EC2, and inductor L... DM Used to realize the output signal V of rectifier circuit 121 DC It provides filtering and power factor calibration functions. In alternative embodiments, the filtering and power factor calibration functions can also be implemented using other common filtering circuits and power factor correction circuits.

[0052] n output circuits are connected in parallel to one end of the secondary winding Ns of transformer T, and output their corresponding output voltages in a time-sharing manner, where n is an integer and n>1.

[0053] For example, the n-channel output circuit includes a first output circuit 131 and a second output circuit 132. The first output circuit 131 includes switches Q1 and Q2, a capacitor Co1, a resistor Rl1, a resistor Rs1, and a switch Ql1 connected between the secondary winding N of the transformer T and the first output voltage Vbus1. Switches Q1, Q2, and Ql1 are controlled by control circuit 110 to output the first output voltage Vbus1. The second output circuit 132 includes switches Q3 and Q4, a capacitor Co2, a resistor Rl2, a resistor Rs2, and a switch Ql2 connected between the secondary winding N of the transformer T and the second output voltage Vbus2. Switches Q3, Q4, and Ql2 are controlled by control circuit 110 to output the second output voltage Vbus2.

[0054] Furthermore, a sampling resistor Rcs is also included. The main power transistor Qp and the sampling resistor Rcs are connected in series between the primary winding Np and the reference ground, and the synchronous rectifier Qs is connected between the secondary winding Ns and the reference ground. Exemplarily, the main power transistor Qp and the synchronous rectifier Qs are, for example, N-type field-effect transistors. In an alternative embodiment, the sampling resistor Rcs may not be provided in the flyback converter 100.

[0055] The control circuit 110 includes a primary-side control circuit 111 and a secondary-side control circuit 112.

[0056] For example, the primary-side control circuit 111 is connected to the control terminal of the main power transistor Qp and the sampling resistor Rcs. Based on the secondary-side feedback signal and the sampled primary-side current signal, it provides a primary-side control signal GON to the control terminal of the main power transistor Qp to control the main power transistor Qp to turn on or off.

[0057] For example, the secondary control circuit 112 is connected to the control terminal, drain, and connection terminal between the secondary winding Ns and the output circuit of the synchronous rectifier Qs. Based on the output voltage Vo of the secondary winding Ns and the drain-source voltage Vds_SR of the synchronous rectifier Qs, the synchronous rectifier Qs is provided with a synchronous rectification control signal SR to the control terminal of the synchronous rectifier Qs to control the synchronous rectifier Qs to be turned on or off.

[0058] Furthermore, the secondary-side control circuit 112 is also used to generate an output switching enable signal FLAG to control the n-way output circuits to switch different output voltages during the secondary-side freewheeling phase.

[0059] Furthermore, in each switching cycle, the secondary-side control circuit 112 controls the first edge (e.g., rising edge) of the control output switching enable signal FLAG earlier than the start time of the secondary-side freewheeling, and the second edge (e.g., falling edge) of the control output switching enable signal FLAG is equal to or later than the end time of the secondary-side freewheeling.

[0060] Furthermore, in each switching cycle, the secondary-side control circuit 112 acquires the volt-second product of the voltage across the secondary winding, and generates the first edge of the output switching enable signal FLAG when the volt-second product is greater than the volt-second product threshold. The volt-second product threshold is the product of the enable coefficient k and the preset volt-second reference for the secondary freewheeling, where k is a positive number and k≤1. The volt-second reference is the volt-second threshold for the secondary freewheeling to conduct.

[0061] Furthermore, the enabling coefficient k ≥ 0.5. In a preferred embodiment, the enabling coefficient k is in the interval [0.8, 0.9].

[0062] Furthermore, in each switching cycle, the secondary-side control circuit 112 generates the second edge of the output switching enable signal FLAG at the turn-off time of the synchronous rectifier Qs, or at a time after a first delay from the turn-off time of the synchronous rectifier Qs, or at the time when the drain-source voltage Vds_SR of the synchronous rectifier Qs reaches the switching enable turn-off reference. The switching enable turn-off reference is greater than or equal to the secondary-side freewheeling turn-off reference.

[0063] For example, the secondary-side control circuit 112 includes a synchronous rectification control circuit 113 and an output control circuit 114.

[0064] The synchronous rectification control circuit 113 is used to generate a synchronous rectification control signal SR, set the corresponding secondary freewheeling reference according to the resistance value of the volt-second setting resistor, and generate an output switching enable signal FLAG.

[0065] For example, the synchronous rectification control circuit 113 includes a volt-second integration circuit, a volt-second reference configuration circuit, a first comparator circuit, and a first drive circuit. The volt-second integration circuit acquires the volt-second product of the voltage across the secondary winding in each switching cycle. The volt-second reference configuration circuit sets the corresponding volt-second reference for the secondary freewheeling based on the resistance value of the volt-second setting resistor. Further, see... Figure 4When the volt-second reference configuration circuit detects that the resistance value of the volt-second setting resistor is R1, it generates a volt-second reference VT1 for the secondary freewheeling. When the volt-second reference configuration circuit detects that the resistance value of the volt-second setting resistor is R2, it generates a volt-second reference VT2 for the secondary freewheeling. When the volt-second reference configuration circuit detects that the resistance value of the volt-second setting resistor is R3, it generates a volt-second reference VT3 for the secondary freewheeling. For example, the volt-second setting resistor is located outside the synchronous rectification control circuit 113. The first comparator circuit compares the volt-second product output by the volt-second integrator circuit with the volt-second reference for the secondary freewheeling output by the volt-second reference configuration circuit, and generates a freewheeling on-control signal when the current volt-second product reaches the volt-second reference for the secondary freewheeling. The first comparator circuit also generates a freewheeling off-control signal when the secondary current reaches the secondary freewheeling off-control reference. The first drive circuit generates a synchronous rectification control signal SR to control the synchronous rectifier tube Qs based on the freewheeling on-control signal and the freewheeling off-control signal output by the first comparator circuit.

[0066] Exemplarily, the synchronous rectification control circuit 113 further includes a second comparator circuit and a second drive circuit. The second comparator circuit compares the volt-second product output by the volt-second integrator circuit with a volt-second product threshold, and generates a first edge of the output switching enable signal FLAG by the second drive circuit when the current volt-second product reaches the volt-second product threshold. The volt-second product threshold is the product of the enable coefficient k and a preset volt-second reference for the secondary freewheeling. The second comparator circuit also generates a second edge of the output switching enable signal FLAG when the drain-source voltage Vds_SR of the synchronous rectifier diode Qs reaches a switching enable turn-off reference. The switching enable turn-off reference is greater than or equal to the secondary freewheeling turn-off reference. In an alternative embodiment, the synchronous rectification control circuit 113 further includes a detection circuit, which detects, for example, the synchronous rectification control signal SR, and generates a second edge of the output switching enable signal FLAG by the second drive circuit when the synchronous rectifier diode Qs is detected to be off, or at the time the synchronous rectifier diode Qs is off and a first time delay has elapsed.

[0067] The output control circuit 114 is connected to the synchronous rectification control circuit 113, and controls the n output circuits to switch and output different output voltages during the secondary freewheeling phase according to the output switching enable signal FLAG. Furthermore, during the effective state maintenance phase represented by the output switching enable signal FLAG (e.g., a continuous high level phase), the output control circuit 114 enables the switching of different output circuits to output the corresponding output voltage. The output control circuit 114 is used to generate the drive signals required by the switching transistors in the n output circuits.

[0068] In a preferred embodiment, such as Figure 5As shown, the synchronous rectification control circuit 113 is a 6-pin chip structure. Exemplarily, pin 1 is the feedback pin VO, connected to the connection point between the secondary winding Ns and the output circuit to receive the output voltage Vo of the secondary winding Ns. Pin 2 is the reference ground pin GND. Pin 3 is the multiplexed pin VT / FLAG, which outputs the volt-second reference VT for the secondary freewheeling and the output switching enable signal FLAG in a time-division multiplexing manner. Pin 4 is the power supply pin VCC. Pin 5 is the feedback pin GT, connected to the drain of the synchronous rectifier Qs to receive the drain-source voltage Vds_SR of the synchronous rectifier Qs. Pin 6 is the output pin SW, used to output the synchronous rectification control signal SR to the control terminal of the synchronous rectifier Qs.

[0069] This embodiment can achieve synchronous rectification control and provide the output switching enable signal FLAG simultaneously by reusing pins, and can also achieve miniaturized packaging.

[0070] Figure 2 A timing diagram of a flyback converter provided in an embodiment of this disclosure is shown.

[0071] like Figure 2 The figure shows the timing diagram of the flyback converter with quasi-resonant control scheme.

[0072] For example, t0-t9 is one switching cycle. At time t0, the primary-side control signal GON generated by the primary-side control circuit 111 controls the main power transistor Qp to turn on, the primary-side current Ip rises, and the drain-source voltage Vds_SR of the synchronous rectifier transistor Qs rises.

[0073] At time t1, the current volt-second product reaches the volt-second product threshold, and the synchronous rectification control circuit 113 in the secondary control circuit 112 generates the first edge of the output switching enable signal FLAG. The output control circuit 114 controls the switching transistor Q1 to turn on and the switching transistors Q2-Q4 to turn off.

[0074] At time t2, the primary-side current Ip rises to its peak value, and the primary-side control signal GON generated by the primary-side control circuit 111 controls the main power transistor Qp to turn off. Furthermore, the current volt-second product reaches the volt-second reference for the secondary-side freewheeling current, and the synchronous rectification control signal SR generated by the synchronous rectification control circuit 113 in the secondary-side control circuit 112 controls the synchronous rectifier transistor Qs to turn on, causing the secondary-side current I_SR to decrease and the leakage voltage Vdrain of the main power transistor Qp to increase. The output control circuit 114 controls the switches Q1 and Q2 to turn on and the switches Q3-Q4 to turn off, correspondingly switching the first output circuit 131 to output the intermediate voltage Vo1 of the first output voltage. When the load requires the first output voltage Vbus1, it controls the switch Q11 to turn on and output the first output voltage Vbus1.

[0075] Between times t2 and t7, the secondary side is in the freewheeling conduction phase. For example, at time t3, the output control circuit 114 controls switch Q1 to turn on and switches Q2-Q4 to turn off. At time t4, the output control circuit 114 controls switches Q1 and Q3 to turn on and switches Q2 and Q4 to turn off. At time t5, the output control circuit 114 controls switches Q3 and Q4 to turn on and switches Q1 and Q2 to turn off. Correspondingly, the second output circuit 132 outputs the intermediate voltage Vo2 of the second output voltage, and when the load requires the second output voltage Vbus2, it controls switch Q12 to turn on and output the second output voltage Vbus2. At time t6, the output control circuit 114 still controls switches Q3 and Q4 to turn on and switches Q1 and Q2 to turn off. At time t7, the secondary current I_SR drops to zero, and the drain-source voltage Vds_SR of the synchronous rectifier Qs reaches the turn-off reference for the secondary freewheeling. The synchronous rectification control signal SR generated by the synchronous rectification control circuit 113 in the secondary control circuit 112 controls the synchronous rectifier Qs to turn off. The output control circuit 114 controls the switching transistor Q3 to turn on and the switching transistors Q1, Q2, and Q4 to turn off, correspondingly maintaining the intermediate voltage Vo2 of the second output voltage output by the second output circuit 132.

[0076] At time t8, the drain-source voltage Vds_SR of the synchronous rectifier Qs reaches the switching enable turn-off reference, wherein the switching enable turn-off reference is greater than the secondary freewheeling turn-off reference; or at the turn-off time of the synchronous rectifier Qs and after a delay of the first time, the synchronous rectification control circuit 113 in the secondary control circuit 112 generates the second edge of the output switching enable signal FLAG.

[0077] At time t9, the next switching cycle begins.

[0078] In an alternative embodiment, the drain-source voltage Vds_SR of the synchronous rectifier Qs reaches the switching enable turn-off reference (or the secondary freewheeling turn-off reference), wherein the switching enable turn-off reference is equal to the secondary freewheeling turn-off reference; or, at the moment the synchronous rectifier Qs is turned off, the synchronous rectification control circuit 113 in the secondary control circuit 112 generates the second edge of the output switching enable signal FLAG. That is, at time t7, the synchronous rectification control circuit 113 in the secondary control circuit 112 not only controls the synchronous rectifier Qs to turn off, but also generates the second edge of the output switching enable signal FLAG.

[0079] Figure 3 A timing diagram of another flyback converter provided in an embodiment of this disclosure is shown.

[0080] like Figure 3 The figure shows the timing diagram of the flyback converter with zero-voltage switching control scheme.

[0081] Zero-voltage switching control scheme in Figure 1 The circuit shown has an auxiliary winding added to the primary side, as well as an auxiliary switch connected between the two ends of the auxiliary winding.

[0082] This embodiment does not elaborate on the control scheme of the output control circuit, but mainly describes the generation scheme of the output switching enable signal FLAG during the switching cycle.

[0083] For example, t0-t6 is one switching cycle. At time t0, the primary-side control signal GON generated by the primary-side control circuit 111 controls the main power transistor Qp to turn on, the primary-side current Ip rises, and the drain-source voltage Vds_SR of the synchronous rectifier transistor Qs rises.

[0084] At time t1, the current volt-second product is greater than the volt-second product threshold, and the synchronous rectification control circuit 113 in the secondary control circuit 112 generates the first edge of the output switching enable signal FLAG.

[0085] At time t2, the primary-side current Ip rises to its peak value, and the primary-side control signal GON generated by the primary-side control circuit 111 controls the main power transistor Qp to turn off. Furthermore, the current volt-second product reaches the volt-second reference for the secondary-side freewheeling, and the synchronous rectification control signal SR generated by the synchronous rectification control circuit 113 in the secondary-side control circuit 112 controls the synchronous rectifier transistor Qs to turn on. The secondary-side current I_SR decreases, and the leakage voltage Vdrain of the main power transistor Qp increases.

[0086] At time t3, the secondary current I_SR drops to zero, and the drain-source voltage Vds_SR of the synchronous rectifier Qs reaches the turn-off reference for the secondary freewheeling. The synchronous rectification control signal SR generated by the synchronous rectification control circuit 113 in the secondary control circuit 112 controls the synchronous rectifier Qs to turn off. Furthermore, the drain-source voltage Vds_SR of the synchronous rectifier Qs reaches the turn-off reference for switching enable, where the turn-off reference for switching enable is equal to the turn-off reference for the secondary freewheeling; or, at the moment the synchronous rectifier Qs turns off, the synchronous rectification control circuit 113 in the secondary control circuit 112 generates the second edge of the output switching enable signal FLAG.

[0087] At time t4, the primary control circuit 112 generates an auxiliary switch control signal GAC to control the auxiliary switch to turn on. At time t5, the primary control circuit 112 generates an auxiliary switch control signal GAC to control the auxiliary switch to turn off.

[0088] At time t6, the next switching cycle begins.

[0089] In this embodiment, the output switching enable signal is turned off at the synchronous rectification shutdown time to avoid circulating discharge problems in the auxiliary winding capacitor and the output capacitor, which would reduce efficiency.

[0090] In an alternative embodiment, the drain-source voltage Vds_SR of the synchronous rectifier Qs reaches the switching enable turn-off reference, wherein the switching enable turn-off reference is greater than the secondary freewheeling turn-off reference; or at the turn-off time of the synchronous rectifier Qs, delayed by a first time interval. Before the auxiliary switch is turned on, the synchronous rectification control circuit 113 in the secondary control circuit 112 generates the second edge of the output switching enable signal FLAG. That is, at time t3, the synchronous rectification control circuit 113 in the secondary control circuit 112 only controls the synchronous rectifier Qs to turn off. At a certain time after time t3 and before time t4, when the drain-source voltage Vds_SR of the synchronous rectifier Qs reaches the switching enable turn-off reference, wherein the switching enable turn-off reference is greater than the secondary freewheeling turn-off reference; or at the turn-off time of the synchronous rectifier Qs, delayed by a first time interval, the synchronous rectification control circuit 113 in the secondary control circuit 112 generates the second edge of the output switching enable signal FLAG. This embodiment ensures that the output switching enable signal is turned off after the synchronous rectification is turned off and before the auxiliary switch is turned on, in order to avoid the circulating discharge problem of the auxiliary winding capacitor and the output capacitor, which would reduce efficiency.

[0091] This application also provides a control method for a flyback converter.

[0092] Figure 6 The diagram shows a flow chart of a control method for a flyback converter provided in an embodiment of this disclosure.

[0093] like Figure 6 As shown, the control method includes the following steps:

[0094] Step S410: Generate a primary-side control signal to control the main power transistor to turn on or off.

[0095] Step S420: Generate a synchronous rectification control signal to control the synchronous rectifier tube to turn on or off, and generate an output switching enable signal to control the n-way output circuit to switch different output voltages during the secondary freewheeling phase.

[0096] Furthermore, generating the output switching enable signal includes: in each switching cycle, controlling the first edge of the output switching enable signal to be earlier than the start time of the secondary side freewheeling, and controlling the second edge of the output switching enable signal to be equal to or later than the end time of the secondary side freewheeling.

[0097] Furthermore, in each switching cycle, the first edge of the control output switching enable signal is earlier than the start of the secondary freewheeling, including: acquiring the volt-second product of the voltage across the secondary winding; when the volt-second product reaches the volt-second product threshold, generating the first edge of the output switching enable signal, where the volt-second product threshold is the product of the enable coefficient k and the preset volt-second reference of the secondary freewheeling, k is a positive number and k≤1.

[0098] Furthermore, controlling the second edge of the output switching enable signal in each switching cycle to be equal to or later than the end time of the secondary freewheeling includes: generating the second edge of the output switching enable signal at the turn-off time of the synchronous rectifier; or generating the second edge of the output switching enable signal after a first time delay from the turn-off time of the synchronous rectifier; or generating the second edge of the output switching enable signal at the moment when the drain-source voltage of the synchronous rectifier reaches the turn-off reference of the switching enable, wherein the turn-off reference of the switching enable is greater than or equal to the turn-off reference of the secondary freewheeling.

[0099] Furthermore, the enabling coefficient k ≥ 0.5. Preferably, the enabling coefficient k is in the interval [0.8, 0.9].

[0100] Furthermore, the control method also includes: using a multiplexed pin to output a volt-second reference and an output switching enable signal for the secondary side freewheeling.

[0101] The multi-port charger, flyback converter, and their control circuit and method disclosed herein control the n-channel output circuits to switch different output voltages during the secondary-side freewheeling phase by generating an output switching enable signal. Furthermore, in each switching cycle, the first edge of the output switching enable signal is earlier than the start of the secondary-side freewheeling, and the second edge of the output switching enable signal is equal to or later than the end of the secondary-side freewheeling. This avoids the technical problem of overvoltage stress caused by the output switching enable being later than the freewheeling turn-on or earlier than the freewheeling turn-off. A low-cost, simple, and reliable multi-port charger and flyback converter are achieved.

[0102] Furthermore, by setting multiplexed pins in the synchronous rectification control circuit, this disclosure can simultaneously realize the functions of synchronous rectification control and providing output switching enable signals, and can also achieve miniaturized packaging.

[0103] As described above, these embodiments of the present disclosure do not exhaustively cover all details, nor do they limit the disclosure to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the present disclosure, thereby enabling those skilled in the art to make good use of the present disclosure and modifications based on it. This disclosure is limited only by the claims and their full scope and equivalents.

Claims

1. A control circuit for a flyback converter, the flyback converter comprising an input voltage circuit, a transformer, a main power transistor, a synchronous rectifier transistor, n output circuits, and a control circuit, wherein the n output circuits are connected in parallel to one end of the secondary winding of the transformer and output corresponding output voltages in a time-sharing manner, where n is an integer and n>1, characterized in that, The control circuit includes: The primary-side control circuit is used to generate a primary-side control signal to control the main power transistor to turn on or off. The secondary-side control circuit is used to generate a synchronous rectification control signal to control the synchronous rectifier tube to turn on or off, and to generate an output switching enable signal to control the n-channel output circuit to switch the output voltages at different output voltages during the secondary-side freewheeling phase.

2. The control circuit according to claim 1, characterized in that, In each switching cycle, the secondary-side control circuit controls the first edge of the output switching enable signal to be earlier than the start time of the secondary-side freewheeling, and controls the second edge of the output switching enable signal to be equal to or later than the end time of the secondary-side freewheeling.

3. The control circuit according to claim 2, characterized in that, In each switching cycle, the secondary control circuit acquires the volt-second product of the voltage across the secondary winding, and generates the first edge of the output switching enable signal when the volt-second product reaches the volt-second product threshold. The volt-second product threshold is the product of the enable coefficient k and the preset volt-second reference of the secondary freewheeling, where k is a positive number and k≤1.

4. The control circuit according to claim 2, characterized in that, The secondary-side control circuit generates the second edge of the output switching enable signal at the turn-off moment of the synchronous rectifier tube during each switching cycle; or, The second edge of the output switching enable signal is generated at a time after a first time delay from the turn-off time of the synchronous rectifier; or, At the moment when the drain-source voltage of the synchronous rectifier reaches the switching enable turn-off reference, the second edge of the output switching enable signal is generated, wherein the switching enable turn-off reference is greater than or equal to the secondary freewheeling turn-off reference.

5. The control circuit according to claim 3, characterized in that, The enabling coefficient k ≥ 0.

5.

6. The control circuit according to claim 3, characterized in that, The enabling coefficient k is in the interval [0.8, 0.9].

7. The control circuit according to any one of claims 2-6, characterized in that, The secondary control circuit includes: A synchronous rectification control circuit is used to generate the synchronous rectification control signal, set the corresponding volt-second reference for the secondary freewheeling based on the resistance value of the volt-second setting resistor, and generate the output switching enable signal; and The output control circuit is connected to the synchronous rectification control circuit and controls the n-channel output circuit to switch and output different output voltages during the secondary freewheeling stage according to the output switching enable signal.

8. The control circuit according to claim 7, characterized in that, The synchronous rectification control circuit includes a multiplexed pin, which outputs the volt-second reference of the secondary freewheeling current and the output switching enable signal in a time-division multiplexing manner.

9. A control method for a flyback converter, the flyback converter comprising an input voltage circuit, a transformer, a main power transistor, a synchronous rectifier transistor, n output circuits, and a control circuit, wherein the n output circuits are connected in parallel to one end of the secondary winding of the transformer and output corresponding output voltages in a time-sharing manner, where n is an integer and n>1, characterized in that... The control method includes: Generate a primary-side control signal to control the main power transistor to turn on or off; A synchronous rectification control signal is generated to control the synchronous rectifier tube to turn on or off, and an output switching enable signal is generated to control the n-channel output circuit to switch the output voltages to different output voltages during the secondary freewheeling phase.

10. The control method according to claim 9, characterized in that, The output switching enable signal includes: In each switching cycle, the first edge of the output switching enable signal is earlier than the start time of the secondary side freewheeling, and the second edge of the output switching enable signal is equal to or later than the end time of the secondary side freewheeling.

11. The control method according to claim 10, characterized in that, The first edge of the output switching enable signal, which is controlled in each switching cycle, precedes the start of the secondary freewheeling current, including: Obtain the volt-second product of the voltage across the secondary winding; When the volt-second product reaches the volt-second product threshold, the first edge of the output switching enable signal is generated. The volt-second product threshold is the product of the enable coefficient k and the preset volt-second reference of the secondary side freewheeling. k is a positive number and k≤1.

12. The control method according to claim 10, characterized in that, The second edge of the output switching enable signal, which controls the switching in each switching cycle, being equal to or later than the end of the secondary freewheeling current includes: The second edge of the output switching enable signal is generated at the turn-off moment of the synchronous rectifier diode; or, The second edge of the output switching enable signal is generated at a time after a first time delay from the turn-off time of the synchronous rectifier; or, At the moment when the drain-source voltage of the synchronous rectifier reaches the switching enable turn-off reference, the second edge of the output switching enable signal is generated, wherein the switching enable turn-off reference is greater than or equal to the secondary freewheeling turn-off reference.

13. The control method according to any one of claims 10-12, characterized in that, Also includes: A time-division multiplexing pin is used to output the volt-second reference of the secondary freewheeling current and the output switching enable signal.

14. A flyback converter, the flyback converter comprising an input voltage circuit, a transformer, a main power transistor, a synchronous rectifier transistor, n output circuits, and a control circuit, wherein the n output circuits are connected in parallel to one end of the secondary winding of the transformer and output corresponding output voltages in a time-sharing manner, where n is an integer and n>1, characterized in that, The control circuit is the control circuit according to any one of claims 1-8.

15. A multi-port charger, characterized in that, Includes the flyback converter as described in claim 14.

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