Antenna array based on integrated circuit antenna

Abstract

The application discloses an antenna array based on circuit antenna integration. The antenna array comprises a substrate, a first antenna, a second antenna and a transistor. The substrate comprises a base layer and a ground layer. The base layer has a first surface and a second surface arranged oppositely. The ground layer is arranged on the first surface. The first antenna and the second antenna are arranged on the second surface at intervals. The transistor is arranged on the second surface and located between the first antenna and the second antenna. The transistor has a gate, a drain and a source. The first antenna is formed with a groove on a side facing the transistor. The first antenna is connected with a first connecting line extending towards the transistor. One end of the first connecting line is connected to a groove bottom surface of the groove. The other end of the first connecting line is electrically connected with the gate. The drain is electrically connected with the second antenna. The substrate is provided with a conductive hole. The source is arranged in the conductive hole and electrically connected with the ground layer. Thus, the design of an amplification circuit is cancelled, and the loss under a microwave frequency band is reduced.

Description

[0001] This application claims priority to Chinese Patent Application No. 202620903597.9, filed on June 17, 2026, entitled "An antenna array based on integrated circuit antenna", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of antenna technology, and in particular to an antenna array based on integrated circuit antenna. Background Technology

[0003] In related technologies, in the integration scheme of antenna and amplifier circuit, the amplifier circuit and the wire are two independent parts. They are designed separately using different design methods and then connected through interconnection structures or electromagnetic coupling, which will bring greater losses in the microwave frequency band. Summary of the Invention

[0004] This application provides an antenna array based on integrated circuit and antenna. By replacing the amplifier circuit with a first antenna, the design of the amplifier circuit is eliminated, the loss in the microwave frequency band is reduced, and a low reflection coefficient and high gain are achieved, thereby at least partially solving the above-mentioned technical problems.

[0005] To achieve the above objectives, according to a first aspect of this application, an antenna array based on integrated circuit and antenna is provided, comprising: A substrate includes a base layer and a ground layer, wherein the base layer has a first surface and a second surface disposed opposite to each other, and the ground layer is disposed on the first surface; The first antenna and the second antenna are disposed at intervals on the second surface; A transistor is disposed on the second surface and located between the first antenna and the second antenna, the transistor having a gate, a drain and a source; The first antenna has a groove on the side facing the transistor, and the first antenna is connected to a first connecting line extending in the direction of the transistor. One end of the first connecting line is connected to the bottom surface of the groove, and the other end is electrically connected to the gate. The drain is electrically connected to the second antenna. The substrate has a conductive hole, and the source is electrically connected to the ground layer through the conductive hole.

[0006] Optionally, along the first direction, the groove width is D1, satisfying: 6 mm ≤ D1 ≤ 7 mm; and / or, along the second direction, the groove depth is D2, satisfying: 0.2 mm ≤ D2 ≤ 0.3 mm, wherein the second direction is set at an angle to the first direction.

[0007] Optionally, the first connecting line protrudes beyond the plane of the groove opening.

[0008] Optionally, along the second direction, the length of the first connecting line is L1, satisfying: 2 mm ≤ L1 ≤ 3 mm.

[0009] Optionally, the spacing between the gate and the drain is the same as the spacing between the first connection line and the second antenna.

[0010] Optionally, the antenna array further includes: A first DC bias circuit is fan-shaped and disposed on the second surface. The first DC bias circuit and the first antenna are spaced apart along the second direction. The first antenna is connected to a second connecting line extending along the second direction. The second connecting line is connected to the first DC bias circuit.

[0011] Optionally, the operating wavelength of the antenna array is λ, and along the second direction, the length of the second connecting line is L2, satisfying: L2 = 1 / 4 λ; and / or, the radius of the first DC bias circuit is R1, satisfying: R1 = 1 / 4 λ.

[0012] Optionally, the antenna array further includes: A second DC bias circuit, fan-shaped and disposed on the second surface, is spaced apart from the second antenna along the second direction. The second DC bias circuit and the first DC bias circuit are spaced apart along the first direction. The second antenna is connected to a third connecting line extending along the second direction. The third connecting line is connected to the second DC bias circuit. The second direction is at an angle to the first direction. The first DC bias circuit extends along the direction from the third connecting line to the second connecting line, and the second DC bias circuit extends along the direction from the second connecting line to the third connecting line.

[0013] Optionally, the operating wavelength of the antenna array is λ, and along the second direction, the length of the third connecting line is L3, satisfying: L3 = 1 / 4 λ; and / or, the radius of the second DC bias circuit is R2, satisfying: R2 = 1 / 4 λ.

[0014] Optionally, the antenna array further includes: A capacitor is disposed on the second surface; A signal source connector is disposed on the base layer, and the signal source connector is connected to one end of the capacitor; The first antenna is connected to a fourth connecting line on the side facing away from the transistor, and the fourth connecting line is connected to the other end of the capacitor.

[0015] In the antenna array based on integrated circuit and antenna in this application embodiment, a groove is formed on the first antenna and connected to a first connecting line, so that the first antenna can not only serve as an input matching antenna, but also as an amplifier after being combined with a transistor, replacing the amplifier circuit. This eliminates the need for an amplifier circuit and reduces losses in the microwave band. Beam scanning is achieved by adjusting the operating state of the heterojunction field effect using a transistor. The source of the transistor is connected to the ground plane after passing through a conductive hole to ground the transistor. Based on the above configuration, not only can losses in the microwave band be reduced, but also a low reflection coefficient and high gain can be achieved, along with beam control.

[0016] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0018] Figure 1 This is a schematic diagram of the structure of an antenna array based on integrated circuit and antenna provided in an exemplary embodiment of this disclosure; Figure 2 This is a schematic diagram of the structure of the first antenna provided in an exemplary embodiment of this disclosure; Figure 3 The antenna array based on circuit-antenna integration provided in the exemplary embodiments of this disclosure is in S 11 Comparison curves of simulation results and measured results of the modulus; Figure 4 This is a comparison curve between the simulation results and the measured results of the normalized radiation pattern of the far field of the antenna array E-plane from -90° to 90° when no transistors are installed in the antenna array based on the integrated circuit antenna in the exemplary embodiment of this disclosure. Figure 5 This is a comparison curve between the simulation results and the measured results of the normalized radiation pattern of the far field of the antenna array E-plane from -90° to 90° when the antenna array based on the integrated circuit antenna is equipped with transistors, according to an exemplary embodiment of this disclosure.

[0019] Explanation of reference numerals in the attached figures: 1. Substrate; 11. Base layer; 12. Grounding layer; 2. First antenna; 21. Groove; 22. First connecting line; 23. Second connecting line; 24. Fourth connecting line; 3. Second line; 31. Third connecting line; 4. Transistor; 5. First DC bias circuit; 6. Second DC bias circuit; 7. Capacitors; 8. Signal source connector. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0021] Among related technologies, microwave technology, with its advantages of abundant spectrum resources, high transmission rate, and compact device size, has shown great potential in many fields such as wireless communication and radar sensing and detection. It has also driven the rapid development of transmitter and receiver systems towards higher frequencies, larger bandwidths, higher integration, and smaller system sizes.

[0022] However, microwave signals suffer significant path loss during transmission in space and are easily blocked by obstacles, placing high demands on the gain and noise suppression capabilities of the antennas and amplifiers in the front-end system. In traditional front-end system transmitter architectures, the transmitting antenna and amplifier circuits are interconnected via cables, which introduces substantial losses in the microwave frequency band. Furthermore, in highly integrated systems, the antenna and circuitry are very close together, and parasitic radiation from the circuitry to the antenna can affect the performance of the receiving antenna and even the entire system. These issues pose a serious challenge to the integration methods of antennas and circuitry in microwave front-end systems.

[0023] Phased array technology can improve the gain of an antenna in a specific radiation direction. Specifically, by synchronously changing the feed amplitude and phase of each element in the antenna array, the radiation pattern of the antenna array is controlled, resulting in a significant increase in the antenna gain in a particular direction. However, this method leads to a narrower beamwidth. Meanwhile, to ensure real-time beam control, the control of element feed amplitude and phase requires a large number of adjustable power dividers and phase-shifting circuits. If the circuit structure and antenna structure are on the same plane, in highly integrated systems, mutual coupling between the circuit and the antenna is inevitable, affecting the antenna's radiation performance. If the circuit structure is placed on the back of the antenna to achieve isolation between the circuit and the antenna, a multi-layer vertical integration structure is formed. Achieving multi-layer vertical integration requires higher processing precision and procedures, leading to a significant increase in production costs.

[0024] Active integrated antenna technology, by introducing active devices into passive radiating elements, can reduce the size of the front-end system while meeting certain performance requirements. In the microwave band, with the development and maturity of monolithic microwave integrated circuits (MMICs), technologies such as antenna in package (AiP), antenna on chip (AoC), and active integrated antenna array (AIAA) have been frequently used in recent years to solve the loss problems caused by interconnect structures.

[0025] AiP technology originated from the development of SiP (System in Package) technology. It involves vertically stacking circuits and antennas, then using advanced packaging techniques to interconnect or electromagnetically couple the design units, thereby compressing the size of the interconnect structure. AiP technology offers a wider range of substrate material choices, avoiding the drawbacks of silicon substrates. Furthermore, with the maturity of ceramic-based multilayer vertical interconnect packaging technology, the corresponding cost has significantly decreased, leading to its widespread application in the microwave frequency band. However, the structure and fabrication requirements of AiP technology are also more complex, resulting in greater difficulty and higher manufacturing costs for antennas.

[0026] AoC (Aspect-on-Chip) technology originated from the development of SoC (System-on-Chip) technology, integrating antennas with active circuitry using mature silicon-based technology. With the significant increase in operating frequencies of modern CMOS (Complementary Metal-Oxide-Semiconductor) processes, AoC technology is increasingly used in terahertz frequency devices and systems. Furthermore, due to the absence of a global ground reference in CMOS processes, it is often used for integrating differential input antennas. However, the low resistivity and high dielectric constant of silicon substrates cause electromagnetic waves radiated towards the substrate by the antenna to be absorbed rather than reflected into the propagation medium. This results in antennas manufactured using AoC technology performing worse than off-chip antennas. Moreover, existing silicon process design rules for integrated circuits are not applicable to antenna design and require additional adjustments.

[0027] AIAA technology integrates phased array technology by designing the feed amplitude and phase for each of the multiple radiating elements in the array. In some specialized integrated architectures, the antenna and circuitry can be interconnected via electromagnetic coupling through coordinated circuit and antenna design. However, the impact of mutual coupling between the circuitry and antenna in these interconnections on the antenna's radiation performance is difficult to calculate accurately.

[0028] As can be seen from the above, in current antenna and circuit integration schemes, the circuit and the wires are always two independent parts of a system. They are designed separately using different design methods and then connected through interconnection structures or electromagnetic coupling. Even if the size of the circuit and interconnection structure is shortened, this connection method cannot eliminate the impact of parasitic radiation on system performance.

[0029] Reference Figures 1 to 5 This disclosure provides an antenna array based on integrated circuit and antenna. The integrated circuit and antenna antenna array includes a substrate 1, a first antenna 2, a second antenna 3, and a transistor 4. The substrate 1 includes a base layer 11 and a ground layer 12. The base layer 11 has a first surface and a second surface disposed opposite to each other. The ground layer 12 is disposed on the first surface. The first antenna 2 and the second antenna 3 are disposed on the second surface at intervals. The transistor 4 is disposed on the second surface and located between the first antenna 2 and the second antenna 3. The transistor 4 has a gate, a drain, and a source. A groove 21 is formed on the side of the first antenna 2 facing the transistor 4. The first antenna 2 is connected to a first connecting line 22 extending towards the transistor 4. One end of the first connecting line 22 is connected to the bottom surface of the groove 21, and the other end is electrically connected to the gate. The drain is electrically connected to the second antenna 3. A conductive hole is provided on the substrate 1, and the source passes through the conductive hole and is electrically connected to the ground layer 12.

[0030] Through the above technical solution, by forming a groove 21 on the first antenna 2 and connecting it with the first connecting line 22, the first antenna 2 can not only serve as an input matching antenna, but also as an amplifier after cooperating with the transistor 4, replacing the amplifier circuit. This eliminates the need for an amplifier circuit and reduces losses in the microwave band. Beam scanning is achieved by adjusting the operating state of the heterojunction field effect through the transistor 4. The source of the transistor 4 is connected to the ground layer 12 after passing through a conductive hole to ground the transistor 4. Based on the above configuration, not only can losses in the microwave band be reduced, but also a low reflection coefficient and high gain can be achieved, along with beam control.

[0031] In some embodiments, the base layer 11 and the ground layer 12 have the same dimensions. Specifically, both are rectangular, with the base layer 11 and the ground layer 12 having the same length and the same width.

[0032] The base layer 11 has a relative permittivity of 3, a thickness of 0.762 mm, a length of 58 mm, and a width of 42 mm. The base layer 11 can be made of a low-loss material at microwave frequencies; for example, it can be made of Teflon.

[0033] Both the first antenna 2 and the second antenna 3 are microstrip patch antennas. The first antenna 2, the second antenna 3, and the ground layer 12 are all made of copper, and the thickness of the first antenna 2, the second antenna 3, and the ground layer 12 is set to 1 mil (one-thousandth of an inch).

[0034] In some embodiments, the first antenna 2 has an irregular shape, with its main body being rectangular. A groove 21 is provided on the side facing the transistor 4, and the groove 21 is located at the center of that side of the first antenna 2. The first antenna 2 is connected to a first connecting line 22 in the groove 21, thereby achieving an electrical connection with the transistor 4. A fourth connecting line 24 is also connected to the side of the first antenna 2 facing away from the transistor 4. Thus, the rectangular structure with the groove 21, the first connecting line 22, and the fourth connecting line 24 form an irregularly shaped first antenna 2.

[0035] The size of the groove 21 can correspond to the impedance matching of the first antenna 2, and the size of the groove 21 can be selected for different frequencies.

[0036] In some embodiments, the second antenna 3 is configured as a rectangle. The length of the second antenna 3 is the same as the length of the rectangular main body of the first antenna 2, for example, both are set to 17.22 mm; the width of the second antenna 3 is the same as the width of the rectangular main body of the first antenna 2.

[0037] In this embodiment, the length of the second antenna 3 is set to be the same as the length of the first antenna 2, and the width of the second antenna 3 is set to be the same as the width of the first antenna 2. Compared with the different sizes of the two antennas, when the first antenna 2 and the second antenna 3 are both in a resonant state, higher radiation efficiency can be achieved.

[0038] Transistor 4 is a heterojunction field-effect transistor, which can be an N-channel heterojunction field-effect transistor such as NS3512S02. The supply voltages VDS and VGS of transistor 4 are adjustable. For example, the DC bias voltage of transistor 4 can be changed to achieve beam scanning.

[0039] In some embodiments, the conductive hole is a circular hole with a diameter of 12 mil. The hole wall may be electroplated with a copper layer, the thickness of which is 1 mil.

[0040] In some embodiments, the antenna array based on integrated circuit and antenna in this application can be applied to a microwave front-end system. For example, it can be applied to a transmitter in a microwave front-end system.

[0041] In some embodiments, the center of the structure formed by the first antenna 2, the second antenna 3, and the transistor 4 is offset from the center of the substrate 1. Specifically, as... Figure 1As shown, the center of the structure formed by the first antenna 2, the second antenna 3, and the transistor 4 is located to the right of the center of the substrate 1. Compared with the arrangement where the centers coincide, this arrangement can reduce the volume of the substrate 1, thereby reducing the material consumption of the substrate 1 and enabling the miniaturization of the antenna design.

[0042] It should be noted that when designing the antenna array based on the integration of circuit and antenna in the embodiments of this application, the size of the second antenna 3 can be determined first based on the output impedance, and the input impedance can be determined based on the output impedance. Then, the size of the first antenna 2 can be determined based on the input impedance.

[0043] like Figure 2 As shown, in some embodiments, along the first direction, the groove width of the groove 21 is D1, which satisfies: 6 mm ≤ D1 ≤ 7 mm.

[0044] Understandably, the groove width of the groove 21 is set to be in the range of 6 mm to 7 mm to achieve impedance matching and ensure that the first antenna 2 can match the frequency of the antenna.

[0045] In some embodiments, the groove width of the groove 21 is set to 6 mm, 6.1 mm, 6.2 mm, 6.3 mm, 6.4 mm, 6.5 mm, 6.6 mm, 6.7 mm, 6.8 mm, 6.9 mm, 7 mm, or any value between any two.

[0046] Preferably, the groove width of the groove 21 is set to 6.05 mm.

[0047] like Figure 2 As shown, in some embodiments, along the second direction, the groove depth of the groove 21 is D2, satisfying: 0.2 mm ≤ D2 ≤ 0.3 mm, wherein the second direction is set at an angle to the first direction.

[0048] Understandably, the groove depth of the groove 21 is set to be in the range of 0.2 mm to 0.3 mm to achieve impedance matching and ensure that the first antenna 2 can match the frequency of the antenna.

[0049] In some embodiments, the groove depth of the groove 21 is set to 0.2 mm, 0.25 mm, 0.3 mm, or any value between the two.

[0050] Preferably, the groove depth of the groove 21 is set to 0.28 mm.

[0051] In some embodiments, the second direction is set at an obtuse angle to the first direction; or, the second direction is set at a right angle to the first direction; or, the second direction is set at an acute angle to the first direction.

[0052] For example, the first direction is the width direction of the substrate 1, and the second direction is the length direction of the substrate 1.

[0053] In some embodiments, the first connecting line 22 protrudes from the plane of the groove 21.

[0054] It is understandable that by making the first connecting line 22 protrude from the plane of the groove 21, the connection between the first connecting line 22 and the transistor 4 is achieved outside the groove 21, and impedance matching is realized. At the same time, a certain gap can be made between the transistor 4 and the main body of the first antenna 2, which can isolate and suppress interference and reduce the possibility of harmonic / spurious radiation from the transistor 4 coupling to the first antenna 2.

[0055] like Figure 2 As shown, in some embodiments, the length of the first connecting line 22 along the second direction is L1, which satisfies: 2 mm ≤ L1 ≤ 3 mm.

[0056] Understandably, the length of the first connecting line 22 is set to be in the range of 2 mm to 3 mm to match the shape of the first antenna 2 and the transistor 4 to achieve impedance matching, ensuring that the first antenna 2 can match the frequency of the antenna.

[0057] In some embodiments, the length of the first connecting line 22 is set to 2 mm, 2.1 mm, 2.2 mm, 2.3 mm, 2.4 mm, 2.5 mm, 2.6 mm, 2.7 mm, 2.8 mm, 2.9 mm, 3 mm, or any value between any two.

[0058] Preferably, the length of the first connecting line 22 is set to 2.1 mm.

[0059] In this embodiment, the groove width of the groove 21 is set to 6.05 mm, the groove depth of the groove 21 is set to 0.28 mm, and the length of the first connecting line 22 is set to 2.1 mm, which can enable the antenna array to have higher radiation efficiency.

[0060] In some embodiments, transistor 4 has a drain and a gate, the other end of the first connection line 22 is electrically connected to the gate, the drain is electrically connected to the second antenna 3, and the spacing between the gate and the drain is the same as the spacing between the first connection line 22 and the second antenna 3.

[0061] It is understandable that the spacing between the gate and the drain is the same as the spacing between the first connection line 22 and the second antenna 3, so that the connection between the transistor 4 and the first connection line 22 and the second antenna 3 is more compact, thereby achieving a miniaturized antenna design.

[0062] In some embodiments, the drain and gate are soldered to the substrate 11, and the first antenna 2, transistor 4, and second antenna 3 are also soldered to the substrate 11. To ensure that the spacing between the gate and drain is the same as the spacing between the first connecting line 22 and the second antenna 3, the drain and the second antenna 3 can be soldered at the same location on the substrate 11, and the gate and the first connecting line 22 can be soldered at the same location on the substrate 11.

[0063] In some embodiments, the spacing between the gate and the drain is set to 2.7 mm, and therefore, the spacing between the first connection line 22 and the second connection line 3 is also set to 2.7 mm.

[0064] like Figure 1 As shown, in some embodiments, the antenna array further includes a first DC bias circuit 5, which is fan-shaped and disposed on the second surface. The first DC bias circuit 5 and the first antenna 2 are spaced apart along the second direction. The first antenna 2 is connected to a second connecting line 23 extending along the second direction, and the second connecting line 23 is connected to the first DC bias circuit 5.

[0065] It is understandable that the first antenna 2 and the first DC bias circuit 5 will be connected using the second connecting line 23 to achieve the function of passing DC and blocking AC. The first DC bias circuit 5 is configured as a fan shape, with its apex connected to the second connecting line 23.

[0066] In some embodiments, the first DC bias circuit 5 is a fan-shaped metal sheet. For example, the first DC bias circuit 5 is made of copper, and the thickness of the first DC bias circuit 5 is set to 1 mil.

[0067] like Figure 1 As shown, in some embodiments, the operating wavelength of the antenna array is λ, the length of the second connecting line 23 along the second direction is L2, satisfying: L2=1 / 4 λ; and / or, the radius of the first DC bias circuit 5 is R1, satisfying: R1=1 / 4 λ.

[0068] It is understandable that the length of the second connecting line 23 and the radius of the first DC bias circuit 5 are both set near 1 / 4 wavelength of the operating frequency to avoid data leakage and other phenomena.

[0069] In some embodiments, the apex angle of the first DC bias circuit 5 is 60°.

[0070] In some embodiments, the length of the second connection line 23 and the radius of the first DC bias circuit 5 can fluctuate around a value of 1 / 4λ, so that the length of the second connection line 23 and the radius of the first DC bias circuit 5 are slightly different. For example, the length of the second connection line 23 is set to 7.1 mm and the radius of the first DC bias circuit 5 is set to 6.95 mm.

[0071] like Figure 1 As shown, in some embodiments, the antenna array further includes a second DC bias circuit 6, which is fan-shaped and disposed on the second surface. The second DC bias circuit 6 and the second antenna 3 are spaced apart along a second direction, and the second DC bias circuit 6 and the first DC bias circuit 5 are spaced apart along a first direction. The second antenna 3 is connected to a third connecting line 31 extending along the second direction, and the third connecting line 31 is connected to the second DC bias circuit 6. The second direction is at an angle to the first direction. The first DC bias circuit 5 extends along the direction from the third connecting line 31 to the second connecting line 23, and the second DC bias circuit 6 extends along the direction from the second connecting line 23 to the third connecting line 31.

[0072] It is understandable that the second antenna 3 and the second DC bias circuit 6 will be connected by the third connecting line 31 to achieve the function of passing DC and blocking AC. The second DC bias circuit 6 is configured as a fan shape, with its apex connected to the third connecting line 31.

[0073] In some embodiments, the second connecting line 23 and the third connecting line 31 are arranged in parallel, the first DC bias circuit 5 is located on the side of the second connecting line 23 away from the third connecting line 31, and the second DC bias circuit 6 is located on the side of the third connecting line 31 away from the second connecting line 23. The first DC bias circuit 5 and the second DC bias circuit 6 are arranged symmetrically about an axis.

[0074] In some embodiments, the first DC bias circuit 5 and the second DC bias circuit 6 have the same dimensions.

[0075] In some embodiments, the second DC bias circuit 6 is a fan-shaped metal sheet. For example, the second DC bias circuit 6 is made of copper, and the thickness of the second DC bias circuit 6 is set to 1 mil.

[0076] like Figure 1 As shown, in some embodiments, the operating wavelength of the antenna array is λ, and along the second direction, the length of the third connecting line 31 is L3, satisfying: L3=1 / 4 λ; and / or, the radius of the second DC bias circuit 6 is R2, satisfying: R2=1 / 4 λ.

[0077] It is understandable that the length of the third connecting line 31 and the radius of the second DC bias circuit 6 are both set at 1 / 4 wavelength of the operating frequency to avoid data leakage and other phenomena.

[0078] In some embodiments, the apex angle of the second DC bias circuit 6 is 60°.

[0079] In some embodiments, the length of the third connection line 31 and the radius of the second DC bias circuit 6 may fluctuate around a value of 1 / 4λ, so that the length of the third connection line 31 and the radius of the second DC bias circuit 6 are slightly different. For example, the length of the third connection line 31 is set to 7.1 mm and the radius of the second DC bias circuit 6 is set to 6.95 mm.

[0080] like Figure 1 As shown, in some embodiments, the antenna array further includes a capacitor 7 and a signal source connector 8. The capacitor 7 is disposed on the second surface, and the signal source connector 8 is disposed on the base layer 11. The signal source connector 8 is connected to one end of the capacitor 7. The first antenna 2 is connected to a fourth connecting line 24 on the side facing away from the transistor 4, and the fourth connecting line 24 is connected to the other end of the capacitor 7.

[0081] Understandably, a signal source can be connected via signal source connector 8 to achieve signal input. Capacitor 7 can suppress low-frequency interference and block low-frequency harmonics. The fourth connecting line 24 connects capacitor 7 to the first antenna 2, thereby using capacitor 7 and the fourth connecting line 24 to input the signal to the first antenna 2, achieving signal transmission.

[0082] In some embodiments, capacitor 7 is a lumped-parameter capacitor, which may be a surface-mount capacitor in a 0204 package. Capacitor 7 has a large capacitance and a small size. For example, capacitor 7 has a capacitance of 30pF (picofarad), thereby reducing the loss of radio frequency signals. The signal source connector 8 adopts a 50Ω (ohm) standard SMA connector.

[0083] like Figures 3 to 5 As shown, the antenna array in this embodiment achieves an input reflection coefficient S at a working frequency of 5 GHz. 11 The digital-to-analog ratio is less than -20dB, and the measured results are in high agreement with the simulation results. Beam deflection is achieved by aligning the first antenna 2 and the second antenna 3. A signal gain exceeding 10dB is achieved by using transistor 4 in conjunction with the first antenna 2 and the second antenna 3.

[0084] In this embodiment, the antenna radiation structure and the circuit impedance matching network are integrated to achieve an integrated circuit antenna design. The active device is integrated between the first antenna 2 and the second antenna 3, thus realizing an integrated design of microwave amplifier and antenna array.

[0085] In summary, after designing, simulating, and testing the antenna array in the embodiments of this application, it has been proven that the antenna array can achieve low reflection coefficient and high gain, and realize beam control. The complete integration of the antenna radiation structure, amplifier circuit impedance matching network, and DC bias network into an antenna array verifies the feasibility of the integrated circuit antenna concept in the application of active integrated circuits in microwave front-end systems, and improves the integration level of the microwave front-end transmitter system.

[0086] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0087] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0088] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.

[0089] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. An antenna array based on integrated circuit and antenna, characterized in that, include The substrate (1) includes a base layer (11) and a ground layer (12), wherein the base layer (11) has a first surface and a second surface disposed opposite to each other, and the ground layer (12) is disposed on the first surface; The first antenna (2) and the second antenna (3) are disposed at intervals on the second surface; A transistor (4) is disposed on the second surface and located between the first antenna (2) and the second antenna (3), the transistor (4) having a gate, a drain and a source; The first antenna (2) has a groove (21) on the side facing the transistor (4), and the first antenna (2) is connected to a first connecting line (22) extending in the direction of the transistor (4). One end of the first connecting line (22) is connected to the bottom surface of the groove (21), and the other end is electrically connected to the gate. The drain is electrically connected to the second antenna (3). The substrate (1) is provided with a conductive hole, and the source is electrically connected to the ground layer (12) through the conductive hole.

2. The antenna array based on integrated circuit and antenna as described in claim 1, characterized in that, Along the first direction, the groove width of the groove (21) is D1, satisfying: 6 mm ≤ D1 ≤ 7 mm; and / or, along the second direction, the groove depth of the groove (21) is D2, satisfying: 0.2 mm ≤ D2 ≤ 0.3 mm, wherein the second direction is set at an angle to the first direction.

3. The antenna array based on integrated circuit and antenna as described in claim 2, characterized in that, The first connecting line (22) protrudes from the plane where the groove (21) is located.

4. The antenna array based on integrated circuit and antenna as described in claim 3, characterized in that, Along the second direction, the length of the first connecting line (22) is L1, which satisfies: 2 mm ≤ L1 ≤ 3 mm.

5. The antenna array based on integrated circuit and antenna as described in claim 1, characterized in that, The spacing between the gate and the drain is the same as the spacing between the first connecting line (22) and the second antenna (3).

6. The antenna array based on integrated circuit and antenna as described in claim 1, characterized in that, The antenna array also includes: The first DC bias circuit (5) is fan-shaped and disposed on the second surface. The first DC bias circuit (5) and the first antenna (2) are spaced apart along the second direction. The first antenna (2) is connected to a second connecting line (23) extending along the second direction. The second connecting line (23) is connected to the first DC bias circuit (5).

7. The antenna array based on integrated circuit and antenna as described in claim 6, characterized in that, The operating wavelength of the antenna array is λ, and along the second direction, the length of the second connecting line (23) is L2, satisfying: L2=1 / 4 λ; and / or, the radius of the first DC bias circuit (5) is R1, satisfying: R1=1 / 4 λ.

8. The antenna array based on integrated circuit and antenna as described in claim 6, characterized in that, The antenna array also includes: The second DC bias circuit (6) is fan-shaped and disposed on the second surface. The second DC bias circuit (6) and the second antenna (3) are spaced apart along the second direction. The second DC bias circuit (6) and the first DC bias circuit (5) are spaced apart along the first direction. The second antenna (3) is connected to a third connecting line (31) extending along the second direction. The third connecting line (31) is connected to the second DC bias circuit (6). The second direction is set at an angle to the first direction. The first DC bias circuit (5) extends along the direction from the third connecting line (31) to the second connecting line (23). The second DC bias circuit (6) extends along the direction from the second connecting line (23) to the third connecting line (31).

9. The antenna array based on integrated circuit and antenna as described in claim 8, characterized in that, The operating wavelength of the antenna array is λ, and along the second direction, the length of the third connecting line (31) is L3, satisfying: L3=1 / 4 λ; and / or, the radius of the second DC bias circuit (6) is R2, satisfying: R2=1 / 4 λ.

10. The antenna array based on integrated circuit and antenna according to any one of claims 1 to 9, characterized in that, The antenna array also includes: A capacitor (7) is disposed on the second surface; A signal source connector (8) is provided on the base layer (11), and the signal source connector (8) is connected to one end of the capacitor (7); The first antenna (2) is connected to a fourth connecting line (24) on the side facing away from the transistor (4), and the fourth connecting line (24) is connected to the other end of the capacitor (7).

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