BMC module based on Loongson processor and hardware equipment

Abstract

The utility model provides a BMC module based on a Loongson processor and hardware equipment, and relates to the technical field of computers.The BMC module based on the Loongson processor comprises the Loongson processor, a memory chip, a memory module, an analog-digital conversion module, a network module, a power module and a connector; the Loongson processor is electrically connected with the memory chip, the memory module, the analog-digital conversion module, the network module and the connector. According to the BMC module provided by the invention, based on the Loongson processor, peripherals such as a memory, a display and a network can be integrated in the BMC module, various peripheral interfaces are connected, and the function diversity of the BMC module is improved. Meanwhile, the BMC module is independent of a server mainboard and is interconnected by adopting a connector, so that independent maintenance and management are facilitated; and abundant peripheral interfaces are reserved through the connector, so that secondary development is facilitated, and the universality and practicability of the BMC module are improved.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a BMC module and hardware device based on a Loongson processor. Background Art

[0002] In the prior art, the detection of current, voltage, temperature and other items on the motherboard is performed by observing them through an external monitor connected to the motherboard. When debugging the motherboard, a dedicated connection cable is required between the terminal and the motherboard. That is, different connection cables are used for each debugging interface on the motherboard, and special debugging interfaces also require customized connection cables. In addition, the terminal also needs different debugging programs for different debugging interfaces. When resetting the motherboard, the reset button needs to be manually pressed. Therefore, when monitoring, debugging and resetting the motherboard, the user needs to be near the motherboard to perform operations, and the operation is also cumbersome for different connection cables and different debugging programs.

[0003] Therefore, for some devices with higher requirements, such as servers, it is necessary to integrate the above-mentioned monitoring, debugging, and reset functions into a controller. This controller is called a baseboard management controller (BMC), which is referred to as a BMC module in this disclosure. The BMC module is a small operating system independent of the server system, mainly used to manage and monitor the physical status of the server.

[0004] In related technologies, BMC modules require redesign for different technical specifications, resulting in cumbersome, time-consuming, and labor-intensive design work. Furthermore, in some solutions, the BMC module hardware is integrated onto the server motherboard, making soldering and development extremely difficult and difficult to maintain.

[0005] Therefore, how to solve the above technical problems has become one of the technical problems that need to be solved urgently at this stage. Utility Model Content

[0006] In order to solve the above technical problems, the present disclosure provides a BMC module and hardware device based on the Loongson processor to improve the versatility of the BMC module.

[0007] In a first aspect, the present disclosure provides a BMC module based on a Loongson processor, comprising:

[0008] Loongson processors, memory chips, storage modules, analog-to-digital conversion modules, network modules, power modules, and connectors;

[0009] The Loongson processor is electrically connected to the memory chip, the memory module, the analog-to-digital conversion module and the network module respectively;

[0010] The connector is electrically connected to the analog-to-digital conversion module, the network module and the Loongson processor respectively, and the power supply module supplies power to the BMC module based on the Loongson processor through the interface of the connector.

[0011] Optionally, where:

[0012] The Loongson processor is the Loongson LS2K0500 processor.

[0013] Optionally, where:

[0014] The Loongson processor includes a MEM interface, and the memory chip is electrically connected to the Loongson processor via the MEM interface. The memory chip is a third-generation double data rate synchronous dynamic random access memory, and its model is SCB13H8G162BF.

[0015] Optionally, where:

[0016] The Loongson processor includes an SPI interface, and the memory module includes a first non-volatile memory and a second non-volatile memory;

[0017] The first non-volatile memory and the second non-volatile memory are electrically connected to the Loongson processor through different SPI interfaces respectively;

[0018] The first non-volatile memory is a non-volatile memory used to store programs and data required for system startup, and the second non-volatile memory is a memory used to store data.

[0019] Optionally, where:

[0020] The Loongson processor includes an RGMII interface, and the network module includes an Ethernet physical layer chip, which is electrically connected to the Loongson processor via the RGMII interface, and the model of the Ethernet physical layer chip is YT8521SH;

[0021] The Ethernet physical layer chip is electrically connected to the connector to form an Ethernet interface.

[0022] Optionally, where:

[0023] The Loongson processor includes an I2C interface, the analog-to-digital conversion module includes two analog-to-digital converters, the analog-to-digital converters are electrically connected to the Loongson processor via the I2C interface, and the model of the analog-to-digital converter is ADX111QAMSOP10;

[0024] The analog-to-digital converter is also electrically connected to the connector to form an 8-way ADC interface.

[0025] Optionally, where:

[0026] The connector is electrically connected to the Loongson processor to form a plurality of peripheral interfaces.

[0027] Optionally, where:

[0028] The peripheral interfaces include 1 PCIE interface, 1 VGA interface, 2 USB interfaces, 3 UART interfaces, 10 I2C interfaces, 1 LPC interface, 1 CAN interface, 2 SPI interfaces, 8 FAN interfaces, 20 GPIO interfaces and 1 EJTAG interface.

[0029] In a second aspect, based on the same inventive concept, the present disclosure provides a hardware device, including the BMC module based on the Loongson processor described in the first aspect.

[0030] The technical solution provided by the embodiments of the present disclosure has the following advantages over the prior art:

[0031] The present disclosure provides a BMC module and hardware device based on the Loongson processor, wherein the BMC module based on the Loongson processor includes a Loongson processor, a memory chip, a memory module, an analog-to-digital conversion module, a network module, a power module and a connector; the Loongson processor is electrically connected to the memory chip, the memory module, the analog-to-digital conversion module and the network module respectively; the connector is electrically connected to the analog-to-digital conversion module, the network module and the Loongson processor respectively, and the power module supplies power to the BMC module based on the Loongson processor through the interface of the connector. The BMC module provided by the present disclosure is based on the Loongson processor and can integrate peripherals such as memory, display, and network into the BMC module. Connecting multiple peripheral interfaces through connectors is conducive to improving the functional diversity of the BMC module, thereby realizing the functions of the BMC module required in various fields. At the same time, the BMC module provided by the present disclosure is independent of the server motherboard and is interconnected using connectors, which is convenient for separate maintenance and management; the abundant peripheral interfaces reserved by the connector are conducive to secondary development, thereby helping to improve the versatility and practicality of the BMC module. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0033] In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0034] Figure 1 FIG2 is a schematic diagram showing a principle of a BMC module based on a Loongson processor provided by an embodiment of the present disclosure;

[0035] Figure 2 The figure shows a principle block diagram of a BMC module based on a Loongson processor provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0036] In order to more clearly understand the above-mentioned objectives, features and advantages of the present disclosure, the scheme of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features therein can be combined with each other in the absence of conflict.

[0037] In the following description, many specific details are set forth to facilitate a full understanding of the present disclosure, but the present disclosure may also be implemented in other ways different from those described herein; it is obvious that the embodiments in the specification are only part of the embodiments of the present disclosure, rather than all of the embodiments.

[0038] First, the terms involved in the embodiments of the present disclosure are explained. BMC module: The full name in English is Baseboard Management Controller, also known as Baseboard Management Controller.

[0039] Figure 1 The figure shows a schematic diagram of a BMC module based on a Loongson processor provided by an embodiment of the present disclosure. Figure 1 The present disclosure provides a BMC module 100 based on a Loongson processor, comprising:

[0040] Loongson processor 10, memory chip 20, memory module 30, analog-to-digital conversion module 40, network module 50, power module 60 and connector 70;

[0041] The Loongson processor 10 is electrically connected to the memory chip 20, the memory module 30, the analog-to-digital conversion module 40, and the network module 50 respectively;

[0042] The connector 70 is electrically connected to the analog-to-digital conversion module 40 , the network module 50 and the Loongson processor 10 respectively. The power module 60 supplies power to the BMC module 100 based on the Loongson processor through the interface of the connector 70 .

[0043] It should be noted that the Loongson processor 10 is a general-purpose processor independently developed by the Institute of Computing Technology of the Chinese Academy of Sciences. The BMC module 100 provided in the present disclosure is developed based on the Loongson processor 10, which is conducive to promoting the localization of the BMC module 100 and further realizing the independent controllability of the BMC module 100.

[0044] Specifically, the present disclosure provides a BMC module 100 based on a Loongson processor. The BMC module 100 includes a Loongson processor 10, a memory chip 20, a memory module 30, an analog-to-digital conversion module 40, a network module 50, a power module 60, and a connector 70. The memory chip 20 and the memory module 30 are electrically connected to the Loongson processor 10. Thus, the Loongson processor 10 provides control processing capabilities, and the memory chip 20 and the memory module 30 are onboard. The power module 60 provides power to the BMC module 100, enabling independent operation. The analog-to-digital conversion module 40 is electrically connected to the Loongson processor 10 and the connector 70, respectively, to provide eight analog-to-digital single-ended input signals, enabling real-time voltage, current, and power monitoring of each power supply on the server board. The network module 50 is electrically connected to the Loongson processor 10 and the connector 70, respectively, to implement an onboard Ethernet interface, thereby enabling web interface management of server data and providing visual interface management, which is conducive to improving the user experience. The BMC module 100 provided herein, based on the Loongson processor 10, can integrate peripherals such as memory, display, and network into the BMC module 100. Connecting to a variety of peripheral interfaces via connector 70 enhances the functional diversity of the BMC module 100, thereby enabling the BMC module 100 to meet the requirements of various fields. Furthermore, the BMC module 100 provided herein is independent of the server motherboard and interconnects via connector 70, facilitating independent maintenance and management. The abundant peripheral interfaces reserved by connector 70 facilitate secondary development, thereby enhancing the versatility and practicality of the BMC module 100.

[0045] Figure 2 The figure shows a principle block diagram of a BMC module based on a Loongson processor provided by an embodiment of the present disclosure. Figure 2 The present disclosure provides an optional implementation scheme in which the Loongson processor 10 is a Loongson LS2K0500 processor.

[0046] Specifically, the Loongson LS2K0500 processor is a highly integrated processor chip based on the Loongson autonomous instruction system (loongarch) architecture, with an integrated 64-bit LA264 processor core on-chip. It has the advantages of autonomous control, high integration, low power consumption and rich functions. The present disclosure builds a BMC module 100 based on the Loongson LS2K0500 processor, which can integrate peripherals such as memory, display, and network in the BMC module 100. A variety of peripheral interfaces are connected through the connector 70, which is conducive to improving the functional diversity of the BMC module 100, thereby realizing the functions of the BMC module 100 required in various fields. At the same time, the BMC module 100 provided by the present disclosure is independent of the server motherboard and is interconnected using the connector 70, which is convenient for separate maintenance and management; the abundant peripheral interfaces reserved by the connector 70 are conducive to secondary development, thereby helping to improve the versatility and practicality of the BMC module 100.

[0047] Please continue to refer to Figure 2 The present disclosure provides an optional implementation scheme in which the Loongson processor 10 includes a MEM interface, and the memory chip 20 is electrically connected to the Loongson processor 10 through the MEM interface. The memory chip 20 is a third-generation double data rate synchronous dynamic random access memory, and its model is SCB13H8G162BF.

[0048] It should be noted that the MEM interface (Memory Interface) is an interface for data interaction and communication with the memory. In this embodiment, the memory chip 20 is electrically connected to the Loongson processor 10 via the MEM interface. The memory chip 20 is a third-generation double data rate synchronous dynamic random access memory (Double Data Rate 3, DDR3). DDR3 is a type of memory used to store data in a computer system. DDR3 memory has higher performance and lower power consumption than its predecessor. The Loongson LS2K0500 processor has an on-chip 32-bit DDR3 controller that supports DDR3-1066 memory specifications. This enables the processor to interact effectively with the DDR3 memory, thereby improving the efficiency of data processing and transmission, and meeting the needs of application fields such as industrial control and network security. Optionally, the model of the memory chip 20 is SCB13H8G162BF, which is a DDR3 memory model SCB13H8G162BF produced by Unisplendour.

[0049] Please continue to refer to Figure 2 , the present disclosure provides an optional implementation manner in which the Loongson processor 10 includes an SPI interface, and the memory module 30 includes a first non-volatile memory 31 and a second non-volatile memory 32;

[0050] The first non-volatile memory 31 and the second non-volatile memory 32 are electrically connected to the Loongson processor 10 via different SPI interfaces respectively;

[0051] The first non-volatile memory 31 is a non-volatile memory for storing programs and data required for system startup, and the second non-volatile memory 32 is a memory for storing data.

[0052] Specifically, the memory module 30 includes two memories, a first non-volatile memory 31 and a second non-volatile memory 32. The Loongson processor 10 also includes an SPI interface. The SPI interface (Serial Peripheral Interface) is a synchronous serial communication interface used for data transmission between a microcontroller and external devices (such as sensors, FLASH memory, analog-to-digital converter, etc.). In this embodiment, the first non-volatile memory 31 and the second non-volatile memory 32 are electrically connected to the Loongson processor 10 through different SPI interfaces. For example, the first non-volatile memory 31 is electrically connected to the Loongson processor 10 through the SPI0 interface, and the second non-volatile memory 32 is electrically connected to the Loongson processor 10 through the SPI3 interface. The first non-volatile memory 31 is a non-volatile memory for storing programs and data required for system startup. For example, the first non-volatile memory 31 is a GigaDevice Boot Flash, model GD25B512M. The second non-volatile memory 32 is a memory for storing data. For example, the second non-volatile memory 32 is a memory chip of model FS35ND04G produced by Longsys Corporation.

[0053] It should be noted that non-volatile memory (NVM) is a type of computer memory that can retain stored data even when the power is turned off or the system is powered off, ensuring data security and system reliability.

[0054] Please continue to refer to Figure 2 The present disclosure provides an optional implementation scheme, in which the Loongson processor 10 includes an RGMII interface, the network module 50 includes an Ethernet physical layer chip PHY, the Ethernet physical layer chip PHY is electrically connected to the Loongson processor 10 through the RGMII interface, and the model of the Ethernet physical layer chip PHY is YT8521SH; the Ethernet physical layer chip PHY is electrically connected to the connector 70 to form an Ethernet interface.

[0055] Specifically, the Loongson processor 10 includes an RGMII interface. The RGMII interface (Reduced Gigabit Media Independent Interface) is a gigabit media independent interface and a network interface standard for communication between the MAC (Media Access Control) layer and the PHY (Physical Layer) layer. The network module 50 includes an Ethernet physical layer chip PHY, which is electrically connected to the Loongson processor 10 through the RGMII interface. Optionally, the Ethernet physical layer chip PHY uses an Ethernet physical layer chip model YT8521SH produced by Yutai Company. The chip supports 10 / 100 / 1000Mbps transmission speeds and has an adaptive function. It can automatically detect and adjust to the optimal network speed. In this embodiment, the BMC module 100 based on the Loongson processor has an onboard 1-way 10 / 100 / 1000Mbps adaptive Ethernet port, which is conducive to the WEB management of server data.

[0056] Please continue to refer to Figure 2 The present disclosure provides an optional implementation scheme in which the Loongson processor 10 includes an I2C interface, the analog-to-digital conversion module 40 includes two analog-to-digital converters ADC, the analog-to-digital converters ADC are electrically connected to the Loongson processor 10 via the I2C interface, and the model of the analog-to-digital converter ADC is ADX111QAMSOP10; the analog-to-digital converter ADC is also electrically connected to the connector 70 to form an 8-way ADC interface.

[0057] Specifically, the Loongson processor 10 also includes an I2C interface. The I2C interface (Inter-Integrated Circuit) is also called IC or IIC. It is a simple bidirectional two-wire synchronous serial bus interface. The analog-to-digital conversion module 40 includes two analog-to-digital converters ADC, and the analog-to-digital converter ADC is electrically connected to the Loongson processor 10 via the I2C interface. It should be noted that an analog-to-digital converter (ADC) is an electronic device or circuit for converting a continuous analog signal into a discrete digital signal. Optionally, the analog-to-digital converter ADC uses an analog-to-digital converter with the signal ADX111QAMSOP10 of Analog Semiconductor. The analog-to-digital converter ADC is electrically connected to the connector 70 to form an ADC interface, which monitors the status of the server board by collecting parameters such as voltage, current, and power of the server board.

[0058] Please continue to refer to Figure 2 The present disclosure provides an optional implementation scheme in which the connector 70 is electrically connected to the Loongson processor 10 to form multiple peripheral interfaces.

[0059] Specifically, the BMC module 100 based on the Loongson processor provided in the embodiment of the present disclosure expands multiple commonly used peripheral interfaces by providing a connector 70, thereby meeting the requirements of various fields for the BMC module 100, which is conducive to improving the versatility and adaptability of the BMC module 100.

[0060] Furthermore, the present disclosure provides an optional implementation scheme in which the peripheral interface includes 1 PCIE interface, 1 VGA interface, 2 USB interfaces, 3 UART interfaces, 10 I2C interfaces, 1 LPC interface, 1 CAN interface, 2 SPI interfaces, 8 FAN interfaces, 20 GPIO interfaces and 1 EJTAG interface.

[0061] First, the terms involved in the above embodiments are explained:

[0062] PCIE: The full name of PCIE is Peripheral Component Interconnect Express, which is a high-speed serial computer expansion bus standard.

[0063] VGA: The full name of VGA is Video Graphics Array. VGA interface is an interface standard for transmitting video signals.

[0064] USB: The full name of the English name is Universal Serial Bus. USB interface is a universal serial bus interface used for data transmission, charging and communication between computers and external devices.

[0065] UART: The full name of English is Universal Asynchronous Receiver / Transmitter, UART interface, that is, universal asynchronous receiver and transmitter interface.

[0066] I2C: The full name of I2C is Inter-Integrated Circuit, also known as IC or IIC. The I2C interface is a simple bidirectional two-wire synchronous serial bus interface.

[0067] LPC: The full name of LPC is Low-Pin-Count. LPC interface is an interface standard for inter-chip communication.

[0068] CAN: The full name of CAN is Controller Area Network. CAN interface is a serial communication interface used in fieldbus control systems.

[0069] SPI: The full name of English is Serial Peripheral Interface. SPI interface is a synchronous serial communication interface.

[0070] FAN port: used to connect and control the cooling fan.

[0071] GPIO: The full name of English is General-Purpose Input / Output. GPIO interface is a general-purpose input and output interface, which is a group of pins on a microcontroller (such as a single-chip microcomputer) or chip.

[0072] EJTAG: The full name of EJTAG is Enhanced Joint Test Action Group. EJTAG interface is an interface standard used for chip testing and debugging.

[0073] It should be noted that in the embodiments of the present application, the relevant English abbreviations are not case-sensitive and have the same meaning. For example, "USB" and "usb" have the same meaning, and "PCIE" and "PCIe" also have the same meaning, which is not limited in the embodiments of the present application.

[0074] Specifically, the peripheral interface includes 1 PCIE interface and 1 VGA interface. The PCIE interface is used to connect to the server CPU, collect server image data, send images through the network, and realize the KVM function. KVM (Keyboard-Video-Mouse) is a technology that allows multiple computers to be controlled by a set of keyboards, video displays and mice. The peripheral interface also includes 2 USB interfaces for connecting to the server USB interface, which is conducive to the user using the local keyboard and mouse to control the remote device on the client. The peripheral interface also includes 3 UART interfaces, 1 UART interface as the debug serial port of the BMC module 100; 1 UART interface is connected to the debug serial port of the server CPU to realize the SOL function. SOL (Serial-over-LAN) refers to the serial communication function based on the local area network; the other UART is used as a reserved interface. The peripheral interfaces also include 10 I2C interfaces, four of which are used for IPMB communication. IPMB (Intelligent Platform Management Bus) is an interface standard for communication between a computer system's management controller and other devices. One I2C interface collects board temperature. The remaining five interfaces are reserved for policy adjustment based on demand. The peripheral interfaces also include one LPC interface for master-slave communication with the server's LPC interface. The peripheral interfaces also include one CAN interface for communication with the server's CAN interface. The peripheral interfaces also include two SPI interfaces, one for server BIOS (Basic Input / Output System) upgrades, and the other two reserved for use. The peripheral interfaces also include eight FAN interfaces, configured as PWM (Pulse-Width Modulation) / TACH (Tachometer) interfaces for controlling and monitoring fan speed based on ambient temperature. The peripheral interface also includes 20 GPIO interfaces. Among the 20 GPIO interfaces, 6 GPIO interfaces serve as the standard VPX chassis slot address input signal VPX_GAn[4:0] / GAPn; 1 GPIO interface serves as the switching output signal (SOL_UART); 1 GPIO interface serves as the SPI bus switching output signal (SPI_SEL); 1 GPIO interface serves as the power-on start input signal (SIO_POWER_GOOD); 1 GPIO interface serves as the power-on completion input signal (POST_COMPLETE); 1 GPIO interface serves as the server power on / off output signal (PWR_ON / OFF); 1 GPIO interface serves as the server restart output signal (CPU_RESET); and the remaining 8 interfaces serve as spare GPIO interfaces.The peripheral interface also includes an EJTAG interface for debugging the BMC module 100 .

[0075] The BMC module 100 provided in the embodiment of the present disclosure is connected through the connector 70 to commonly used mainstream peripherals such as adaptive Gigabit Ethernet, PCIE, USB, ADC, I2C, SPI, GPIO, LPC, FAN, and UART interfaces. Its design realizes a BMC module 100 that meets the requirements of various domestic fields.

[0076] Please refer to Figure 2 The present disclosure provides an optional embodiment in which a BMC module 100 based on a Loongson processor includes: a Loongson processor 10, a memory chip 20, a memory module 30, an analog-to-digital conversion module 40, a network module 50, a power module 60, and a connector 70. The Loongson processor 10 is a Loongson LS2K0500 processor. The memory chip 20 is electrically connected to the Loongson processor 10 via the Loongson processor's MEM interface. The memory chip 20 is a third-generation double data rate synchronous dynamic random access memory (DDR3), and its model number is SCB13H8G162BF. The memory module 30 includes a first non-volatile memory 31 and a second non-volatile memory 32. The first non-volatile memory 31 is a GigaDevice Boot Flash chip, model GD25B512M, and is electrically connected to the Loongson processor 10 via the SPI0 interface. The second non-volatile memory 32 is a memory chip, model FS35ND04G, produced by Longsys, and is electrically connected to the Loongson processor 10 via the SPI3 interface. The network module 50 includes an Ethernet physical layer chip, model YT8521SH, and is electrically connected to the Loongson processor 10 via the RGMII interface. The analog-to-digital conversion module 40 includes two analog-to-digital converters (ADCs), which are electrically connected to the Loongson processor 10 via the I2C interface. The ADCs are model ADX111QAMSOP10. A connector 70 is electrically connected to the Loongson processor 10 to form multiple peripheral interfaces.

[0077] The BMC module 100 based on the Loongson processor in this embodiment is equipped with the Loongson LS2K0500 to provide control processing capabilities, 2GB DDR3 memory and various non-volatile memories on board, and can operate independently with a single 3.3V power supply; it provides PCIE interface and VGA interface to realize visual monitoring of the server system operation status; it provides 8-way PWM interface / TACH interface to realize up to 8-way fan speed control and wind speed sensing; it provides 8-way high-precision ADC (14-bit) analog single-ended input signal to perform real-time voltage, current and power monitoring of each power supply of the server board; it provides 10-way I2C interface to realize FRU (Field-Replaceable Unit) management, temperature monitoring, current monitoring, network monitoring and other functions; it has an onboard RTC (Real-Time Clock (real-time clock) function can provide accurate real-time time data; it provides 20 dedicated GPIO signals, and the remaining GPIOs are multiplexed with various interfaces to realize hot-swap control of the motherboard, chassis slot management, power management, interrupt reporting, indicator light alarm and other single-ended signal control functions; it provides 2 USB channels for connecting to the server and providing remote control of the keyboard and mouse; it has an onboard 10 / 100 / 1000Mbps adaptive Ethernet port for WEB management of server data; among them, all components are domestically produced, with a localization rate of 100%.

[0078] Based on the same inventive concept, the present disclosure provides a hardware device, including any one of the Loongson processor-based BMC modules 100 provided in the embodiments of the present disclosure.

[0079] It should be noted that the embodiments of the hardware device provided in the present disclosure may refer to the embodiments of the BMC module 100 based on the Loongson processor provided in the present disclosure, and will not be repeated here.

[0080] It can be seen from the above embodiments that the BMC module and hardware device based on the Loongson processor provided by the present disclosure achieve at least the following beneficial effects:

[0081] The present disclosure provides a BMC module and hardware device based on the Loongson processor, wherein the BMC module based on the Loongson processor includes a Loongson processor, a memory chip, a memory module, an analog-to-digital conversion module, a network module, a power module and a connector; the Loongson processor is electrically connected to the memory chip, the memory module, the analog-to-digital conversion module and the network module respectively; the connector is electrically connected to the analog-to-digital conversion module, the network module and the Loongson processor respectively, and the power module supplies power to the BMC module based on the Loongson processor through the interface of the connector. The BMC module provided by the present disclosure is based on the Loongson processor and can integrate peripherals such as memory, display, and network into the BMC module. Connecting multiple peripheral interfaces through connectors is conducive to improving the functional diversity of the BMC module, thereby realizing the functions of the BMC module required in various fields. At the same time, the BMC module provided by the present disclosure is independent of the server motherboard and is interconnected using connectors, which is convenient for separate maintenance and management; the abundant peripheral interfaces reserved by the connector are conducive to secondary development, thereby helping to improve the versatility and practicality of the BMC module.

[0082] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0083] The foregoing description is intended only to provide specific embodiments of the present disclosure, intended to enable those skilled in the art to understand and implement the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the embodiments described herein, but rather to be construed in the broadest manner consistent with the principles and novel features disclosed herein.

Claims

1. A BMC module based on a Loongson processor, characterized in that: include: Loongson processors, memory chips, storage modules, analog-to-digital conversion modules, network modules, power modules, and connectors; The Loongson processor is electrically connected to the memory chip, the memory module, the analog-to-digital conversion module and the network module respectively; The connector is electrically connected to the analog-to-digital conversion module, the network module and the Loongson processor respectively, and the power supply module supplies power to the BMC module based on the Loongson processor through the interface of the connector.

2. The BMC module based on the Loongson processor according to claim 1, characterized in that: The Loongson processor is the Loongson LS2K0500 processor.

3. The BMC module based on the Loongson processor according to claim 1, characterized in that: The Loongson processor includes a MEM interface, and the memory chip is electrically connected to the Loongson processor via the MEM interface. The memory chip is a third-generation double data rate synchronous dynamic random access memory, and its model is SCB13H8G162BF.

4. The BMC module based on the Loongson processor according to claim 1, characterized in that: The Loongson processor includes an SPI interface, and the memory module includes a first non-volatile memory and a second non-volatile memory; The first non-volatile memory and the second non-volatile memory are electrically connected to the Loongson processor through different SPI interfaces respectively; The first non-volatile memory is a non-volatile memory used to store programs and data required for system startup, and the second non-volatile memory is a memory used to store data.

5. The BMC module based on the Loongson processor according to claim 1, characterized in that: The Loongson processor includes an RGMII interface, and the network module includes an Ethernet physical layer chip, which is electrically connected to the Loongson processor via the RGMII interface, and the model of the Ethernet physical layer chip is YT8521SH; The Ethernet physical layer chip is electrically connected to the connector to form an Ethernet interface.

6. The BMC module based on the Loongson processor according to claim 1, characterized in that: The Loongson processor includes an I2C interface, the analog-to-digital conversion module includes two analog-to-digital converters, the analog-to-digital converters are electrically connected to the Loongson processor via the I2C interface, and the model of the analog-to-digital converter is ADX111QAMSOP10; The analog-to-digital converter is also electrically connected to the connector to form an 8-way ADC interface.

7. The BMC module based on the Loongson processor according to claim 1, characterized in that: The connector is electrically connected to the Loongson processor to form a plurality of peripheral interfaces.

8. The BMC module based on the Loongson processor according to claim 7, characterized in that: The peripheral interfaces include 1 PCIE interface, 1 VGA interface, 2 USB interfaces, 3 UART interfaces, 10 I2C interfaces, 1 LPC interface, 1 CAN interface, 2 SPI interfaces, 8 FAN interfaces, 20 GPIO interfaces and 1 EJTAG interface.

9. A hardware device, characterized in that: The invention comprises a BMC module based on a Loongson processor according to any one of claims 1 to 8.

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