Sampling circuit, analog circuit and electronic equipment

Abstract

The utility model provides a sampling circuit, an analog circuit and electronic equipment, and the sampling circuit comprises an input processing unit which is connected with the output end of a target circuit, and is used for collecting the common-mode output voltage of the target circuit, and carrying out the sampling input processing of the common-mode output voltage, and obtaining a first operational amplifier in-phase sampling signal and a first operational amplifier anti-phase sampling signal; the signal amplification unit is connected with the input processing unit and is used for respectively amplifying the first operational amplifier in-phase sampling signal and the first operational amplifier anti-phase sampling signal to obtain a second operational amplifier in-phase sampling signal and a second operational amplifier anti-phase sampling signal; and the signal stabilization unit is connected with the signal amplification unit and the control circuit, and is used for keeping the second operational amplifier in-phase sampling signal and the second operational amplifier anti-phase sampling signal, generating a feedback signal according to the second operational amplifier in-phase sampling signal and the second operational amplifier anti-phase sampling signal, and outputting the feedback signal to the control circuit. In this way, the input impedance and the sampling precision are improved.

Description

[0001] Sampling circuit, analog circuit and electronic device TECHNICAL FIELD

[0002] The application belongs to the technical field of sampling circuits, and particularly relates to a sampling circuit, an analog circuit and an electronic device. BACKGROUND

[0003] At present, with the development of science and technology, the processing requirements for analog signals are higher and higher, especially in terms of precision and stability. The traditional sampling circuit far-end sampling is missing or has problems such as resistance open circuit, which will affect the precision of circuit sampling, cause the voltage deviation between the far-end and near-end collection to be relatively large, and often cannot meet the demand of modern electronic devices for high precision and low noise. CONTENT OF THE INVENTION

[0004] The application provides a sampling circuit, an analog circuit and an electronic device, so as to improve the sampling precision of analog signals.

[0005] In a first aspect, the application provides a sampling circuit, comprising:

[0006] an input processing unit connected to an output end of a target circuit, configured to collect a common-mode output voltage of the target circuit, and perform sampling input processing on the common-mode output voltage to obtain a first operational amplifier non-inverting sampling signal and a first operational amplifier inverting sampling signal;

[0007] a signal amplification unit connected to the input processing unit, configured to perform amplification processing on the first operational amplifier non-inverting sampling signal and the first operational amplifier inverting sampling signal respectively to obtain a second operational amplifier non-inverting sampling signal and a second operational amplifier inverting sampling signal;

[0008] a signal stabilization unit connected to the signal amplification unit and a control circuit, configured to maintain the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, generate a feedback signal according to the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, and output the feedback signal to the control circuit.

[0009] In a second aspect, the application provides an analog circuit, comprising a control circuit, a reference circuit and the sampling circuit of the first aspect, wherein the sampling circuit is connected to the control circuit and the reference circuit respectively.

[0010] In a third aspect, the application provides an electronic device, comprising the sampling circuit of the first aspect or the analog circuit of the second aspect.

[0011] It can be seen that, in the present application, firstly, the common-mode output voltage of the target circuit is collected by the input processing unit, and the common-mode output voltage is sampled and input processed to obtain a first operational amplifier non-inverting sampling signal and a first operational amplifier inverting sampling signal; secondly, the first operational amplifier non-inverting sampling signal and the first operational amplifier inverting sampling signal are amplified by the signal amplification unit to obtain a second operational amplifier non-inverting sampling signal and a second operational amplifier inverting sampling signal; finally, the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal are maintained by the signal stabilization unit, a feedback signal is generated according to the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, and the feedback signal is output to the control circuit. In this way, the input impedance and sampling accuracy of the sampling circuit are improved. BRIEF DESCRIPTION OF DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort.

[0013] Figure 1 is a circuit diagram of a sampling circuit provided by an embodiment of the present application;

[0014] Figure 2 is a structure schematic diagram of an analog circuit provided by an embodiment of the present application;

[0015] Figure 3 is a structure schematic diagram of a first electronic device provided by an embodiment of the present application;

[0016] Figure 4 is a structure schematic diagram of a second electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0017] In order to make the person skilled in the art better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely in the following with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present application.

[0018] The terms "first", "second", and the like in the description and in the claims of the present application and above-described drawings are used to distinguish different objects, and are not used to describe a particular order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device including a series of steps or units is not limited to the listed steps or units, but can optionally include steps or units not listed, or can optionally include other steps or units inherent to the process, method, system, product, or device.

[0019] Reference herein to "embodiments" means that the particular features, structures, or characteristics described in connection with the embodiments can be included in at least one embodiment of the present application. The appearance of the phrase in various places in the specification does not necessarily all refer to the same embodiment, nor is it necessarily independent or alternative to other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0020] At present, with the development of science and technology, the processing requirements for analog signals are getting higher and higher, especially in terms of precision and stability. The problems such as missing or open resistance of the traditional sampling circuit far-end sampling will affect the precision of circuit sampling, resulting in a large voltage deviation between the far-end and near-end collected voltages, which often cannot meet the demand of modern electronic devices for high precision and low noise.

[0021] To solve the above problems, the embodiments of the present application provide a sampling circuit. The sampling circuit can be applied to the scene of analog signal sampling. The common-mode output voltage of the target circuit can be collected by the input processing unit, and the common-mode output voltage can be sampled and input processed to obtain a first operational amplifier non-inverting sampling signal and a first operational amplifier inverting sampling signal. Then, the first operational amplifier non-inverting sampling signal and the first operational amplifier inverting sampling signal are amplified by the signal amplification unit to obtain a second operational amplifier non-inverting sampling signal and a second operational amplifier inverting sampling signal. Finally, the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal are maintained by the signal stabilization unit, and a feedback signal is generated according to the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, and the feedback signal is output to the control circuit. In this way, the input impedance and sampling precision of the sampling circuit are improved. The present scheme can be applied to various scenes, including but not limited to the application scenes mentioned above.

[0022] The specific sampling circuit structure will be described in detail below.

[0023] Please refer to Figure 1 and Figure 2 The present application also provides a sampling circuit 100, comprising:

[0024] The input processing unit 110 is connected to the output end of the target circuit 200, and is configured to collect a common-mode output voltage of the target circuit 200 and perform sampling input processing on the common-mode output voltage to obtain a first operational amplifier non-inverting sampling signal and a first operational amplifier inverting sampling signal.

[0025] The signal amplification unit 120 is connected to the input processing unit 110, and is configured to perform amplification processing on the first operational amplifier non-inverting sampling signal and the first operational amplifier inverting sampling signal respectively to obtain a second operational amplifier non-inverting sampling signal and a second operational amplifier inverting sampling signal.

[0026] The signal stabilization unit 130 is connected to the signal amplification unit 120 and the control circuit 400, and is configured to maintain the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, generate a feedback signal VOUT3 according to the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, and output the feedback signal VOUT3 to the control circuit 400.

[0027] In an example, the target circuit 200 can be any analog circuit 10 as long as the output signal is an analog signal, which is not limited herein.

[0028] In a specific implementation, the input processing unit 110 is connected to the output end of the target circuit 200, and when the output end of the target circuit 200 outputs an analog signal, the input processing unit 110 collects the analog signal in a common-mode input manner, that is, collects a common-mode output voltage. By sampling the target circuit 200 in a common-mode input manner, high-frequency common-mode interference signals can be filtered out. Then, the signal amplification unit 120 performs amplification processing on the first operational amplifier non-inverting sampling signal and the first operational amplifier inverting sampling signal sampled by the input processing unit 110 to obtain a second operational amplifier non-inverting sampling signal and a second operational amplifier inverting sampling signal. The second operational amplifier non-inverting sampling signal, the second operational amplifier inverting sampling signal, and a reference signal RefV in the reference circuit 300 are input into the signal stabilization unit 130 to generate a feedback signal VOUT3, which is output to the control circuit 400. Finally, the control circuit 400 generates a corresponding control signal according to the feedback signal VOUT3 to control the target circuit 200, for example, voltage regulation, current regulation, etc.

[0029] It can be seen that in the embodiment, the common-mode output voltage of the target circuit 200 is collected by the input processing unit 110, and the common-mode output voltage is sampled and input processed to obtain the first operational amplifier non-inverting sampling signal and the first operational amplifier inverting sampling signal; then the first operational amplifier non-inverting sampling signal and the first operational amplifier inverting sampling signal are amplified by the signal amplification unit 120 to obtain the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal; finally, the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal are maintained by the signal stabilization unit 130, the feedback signal VOUT3 is generated according to the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, and the feedback signal VOUT3 is output to the control circuit 400. In this way, the input impedance and sampling accuracy of the sampling circuit 100 are improved.

[0030] In one possible embodiment, the common-mode output voltage includes a non-inverting output signal and an inverting output signal; the input processing unit 110 includes: a first input subunit 111 connected to the output end of the target circuit 200 and the input end of the signal amplification unit 120, configured to receive the non-inverting output signal of the target circuit 200 and perform sampling input processing on the non-inverting output signal to obtain the first operational amplifier non-inverting sampling signal; and a second input subunit 112 connected to the output end of the target circuit 200 and the input end of the signal amplification unit 120, configured to receive the inverting output signal of the target circuit 200 and perform sampling input processing on the inverting output signal to obtain the first operational amplifier inverting sampling signal.

[0031] In a specific implementation, the target circuit 200 can be a power supply or a remote circuit, and the input processing unit 110 includes two groups of input ports. The first group of input ports is connected to the power supply output for accessing the power supply output voltage, and the second group of input ports is connected to the remote circuit for remotely sampling the remote circuit. The common-mode output voltage output by the output end of the target circuit 200 is divided into non-inverting output voltage and inverting output voltage, and the two voltages are collected by the first input subunit 111 and the second input subunit 112 respectively to realize common-mode input of the output voltage. Specifically, the first group of input ports includes a first input port and a third input port, and the second group of input ports includes a second input port and a fourth input port. The first input port and the second input port are connected to the first input subunit for accessing the non-inverting output voltage, and the third input port and the fourth input port are connected to the second input subunit for accessing the inverting output voltage.

[0032] Specifically, the first input unit and the second input unit can be RC circuits, which sample the input non-inverting output voltage and inverting output voltage to obtain the first sampling signal and the second sampling signal.

[0033] In one example, the first input subunit includes a first input port, a second input port, a first resistor R1, a second resistor R2, and a first capacitor C1, the first input port connects one end of the first resistor R1 and one end of the first capacitor C1, the second input port connects the other end of the first resistor R1 and one end of the second resistor R2, the other end of the second resistor R2 and the other end of the first capacitor C1 are both connected to the input end of the first amplification subunit. The second input subunit includes a third input port, a fourth input port, a third resistor R3, a fourth resistor R4, and a second capacitor C2; a first inverting output port is connected to the third input port, and a second inverting output port is connected to the fourth input port; the third input port connects one end of the third resistor R3 and one end of the second capacitor C2, the fourth input port connects the other end of the third resistor R3 and one end of the fourth resistor R4, the other end of the fourth resistor R4 and the other end of the second capacitor C2 are both connected to the input end of the second amplification subunit.

[0034] In a specific implementation, when the target circuit 200 is a power supply, the first non-inverting output port and the first inverting output port are included. The first non-inverting output port is connected to the first input port to input the first non-inverting output voltage VOUT1+ into the first input subunit, the first non-inverting output voltage VOUT1+ is input through the first input port, and then the RC network composed of the first resistor R1, the second resistor R2, and the first capacitor C1 performs input preprocessing on the first non-inverting output voltage VOUT1+ to obtain the first op-amp non-inverting sampling signal; similarly, the first inverting output voltage VOUT1- is input through the third input port, and then the RC network composed of the third resistor R3, the fourth resistor R4, and the second capacitor C2 performs input preprocessing on the first inverting output voltage VOUT1- to obtain the first op-amp inverting sampling signal.

[0035] Similarly, when the target circuit 200 is a remote circuit, the second non-inverting output port and the second inverting output port are included. The second non-inverting output port is connected to the second input port to input the second non-inverting output voltage VOUT2+ into the first input subunit, the second non-inverting output voltage VOUT2+ is input through the second input port, and then the RC network composed of the first resistor R1, the second resistor R2, and the first capacitor C1 performs input preprocessing on the second non-inverting output voltage VOUT2+ to obtain the first op-amp non-inverting sampling signal; similarly, the second inverting output voltage VOUT2- is input through the fourth input port, and then the RC network composed of the third resistor R3, the fourth resistor R4, and the second capacitor C2 performs input preprocessing on the second inverting output voltage VOUT2- to obtain the first op-amp inverting sampling signal.

[0036] It can be seen that, in the embodiment, the inputted in-phase output voltage and the inputted inverse-phase output voltage are preprocessed by the input processing unit 110, so that the high-frequency noise can be effectively removed and the authenticity of the signal can be maintained; in addition, the in-phase output voltage and the inverse-phase output voltage are connected in a common mode, so that the high-frequency common-mode interference signal can be filtered out; since the input resistance has a relatively large value, and the operational amplifier has a high-impedance input characteristic, the input impedance of the remote sampling line is relatively high, so that the influence on the acquisition circuit is small, and the stability of the circuit is ensured.

[0037] In one possible embodiment, the signal amplification unit 120 comprises: a first amplification sub-unit 121 connected with the first input sub-unit 111 and the signal stabilization unit 130, and configured to amplify the first operational amplifier in-phase sampling signal to obtain the second operational amplifier in-phase sampling signal; and a second amplification sub-unit 122 connected with the second input sub-unit 112 and the signal stabilization unit 130, and configured to amplify the first operational amplifier inverse-phase sampling signal to obtain the second operational amplifier inverse-phase sampling signal.

[0038] Specifically, the first amplification sub-unit 121 comprises a first amplifier U1; the in-phase input end of the first amplifier U1 is connected with the other end of the second resistor R2 and the other end of the first capacitor C1; the reverse input end of the first amplifier U1 and the output end of the first amplifier U1 are both connected with the signal stabilization unit 130. The second amplification sub-unit comprises a second amplifier U2; the in-phase input end of the second amplifier U2 is connected with the other end of the fourth resistor R4 and the other end of the second capacitor C2; the reverse input end of the second amplifier U2 and the output end of the second amplifier U2 are both connected with the signal stabilization unit 130.

[0039] In a specific implementation, after the first operational amplifier in-phase sampling signal and the second operational amplifier inverse-phase sampling signal are obtained by the first amplification unit and the second amplification unit, the first operational amplifier in-phase sampling signal and the first operational amplifier inverse-phase sampling signal are respectively output to the first amplifier and the second amplifier, and then enter the operational amplification stage. In the operational amplification stage, the first amplifier U1 as a high-precision operational amplifier amplifies the collected first operational amplifier in-phase sampling signal to obtain the amplified second operational amplifier in-phase sampling signal; the second amplifier U2 amplifies the first operational amplifier inverse-phase sampling signal to obtain the amplified second operational amplifier inverse-phase sampling signal. The high input impedance of the first amplifier U1 and the second amplifier U2 ensures that the amplitude of the input signal will not be significantly changed in the conversion process, and at the same time, the low offset voltage characteristic ensures that accurate sampling values can be maintained even in a high dynamic range.

[0040] In one possible embodiment, the signal stabilization unit 130 includes a third amplifier U3, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, and a third capacitor C3; one end of the fifth resistor R5 is connected to the output end of the first amplifier U1 and the inverting output end of the first amplifier U1, the other end of the fifth resistor R5 and one end of the sixth resistor R6 are both connected to the non-inverting input end of the third amplifier U3; the other end of the sixth resistor R6 is connected to the reference circuit 300; one end of the eighth resistor R8 is connected to the output end of the second amplifier U2 and the inverting input end of the second amplifier U2, one end of the seventh resistor R7 is connected to the output end of the third amplifier U3 and one end of the ninth resistor R9, the other end of the seventh resistor R7 and the other end of the eighth resistor R8 are both connected to the inverting input end of the third amplifier U3, the other end of the ninth resistor R9 is connected to one end of the third capacitor C3 and the control circuit 400, and the other end of the third capacitor C3 is connected to the reference circuit 300.

[0041] In a specific implementation, after the sample and hold phase, the circuit enters the stabilization phase. At this time, the first amplifier U1 and the second amplifier U2 sample and hold the current input signal value unchanged until the next sampling period starts. The fifth resistor R5, the sixth resistor R6, the seventh resistor R7, and the eighth resistor R8 constitute a low-temperature drift low-voltage differential linear resistor, which provides a stable sampling voltage for the sampling circuit 100. This ensures the stability and accuracy of the sampling voltage of the entire circuit, especially keeping the output voltage unchanged under high load and temperature changes.

[0042] As can be seen, in the embodiment, the sampling circuit 100 achieves ultra-low noise, high linearity, and good stability, which makes the circuit very suitable for applications that require high precision and low noise performance.

[0043] Referring to Figure 2 The application also provides an analog circuit 10, which includes a control circuit 400, a reference circuit 300, and the sampling circuit 100 described in the embodiments of the application, and the sampling circuit 100 is connected to the control circuit 400 and the reference circuit 300, respectively.

[0044] The sampling circuit 100 comprises: an input processing unit 110 connected to an output end of the target circuit 200, configured to collect a common-mode output voltage of the target circuit 200, and perform sampling input processing on the common-mode output voltage to obtain a first operational amplifier non-inverting sampling signal and a first operational amplifier inverting sampling signal; a signal amplification unit 120 connected to the input processing unit 110, configured to perform amplification processing on the first operational amplifier non-inverting sampling signal and the first operational amplifier inverting sampling signal respectively to obtain a second operational amplifier non-inverting sampling signal and a second operational amplifier inverting sampling signal; and a signal stabilization unit 130 connected to the signal amplification unit 120 and a control circuit 400, configured to maintain the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, generate a feedback signal VOUT3 according to the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, and output the feedback signal VOUT3 to the control circuit 400. In this way, the input impedance and the sampling precision are improved.

[0045] The specific scheme of the sampling circuit has been described in detail in other embodiments of the present application, and will not be described here.

[0046] Please refer to Figure 3 The present application also provides an electronic device 1 comprising the sampling circuit 100 or the analog circuit 10 described in the embodiments of the present application. The sampling circuit 100 comprises: an input processing unit 110 connected to an output end of the target circuit 200, configured to collect a common-mode output voltage of the target circuit 200, and perform sampling input processing on the common-mode output voltage to obtain a first operational amplifier non-inverting sampling signal and a first operational amplifier inverting sampling signal; a signal amplification unit 120 connected to the input processing unit 110, configured to perform amplification processing on the first operational amplifier non-inverting sampling signal and the first operational amplifier inverting sampling signal respectively to obtain a second operational amplifier non-inverting sampling signal and a second operational amplifier inverting sampling signal; and a signal stabilization unit 130 connected to the signal amplification unit 120 and a control circuit 400, configured to maintain the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, generate a feedback signal VOUT3 according to the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, and output the feedback signal VOUT3 to the control circuit 400. In this way, the input impedance and the sampling precision are improved.

[0047] In addition, please refer to Figure 4The electronic device 1 comprises at least one processor 11, a display screen 12, and a memory 13, and can further comprise a communications interface 15 and a bus 14.

[0048] Optionally, the electronic device 1 can be a mobile electronic device, or an electronic device or other device, which is not limited herein.

[0049] In addition, the logic instructions in the memory 13 can be implemented in the form of a software function unit and sold or used as an independent product, which can be stored in a computer readable storage medium.

[0050] The memory 13, as a computer readable storage medium, can be configured to store software programs, computer executable programs, such as program instructions or modules corresponding to the method in the embodiments of the present disclosure. The processor 11 executes the functions of the application and data processing by running the software programs, instructions or modules stored in the memory 13, that is, implements the method in the above embodiments.

[0051] The memory 13 can include a program storage area and a data storage area, wherein the program storage area can store an operating system and at least one application required by a function; the data storage area can store data created according to the use of the electronic device 1, etc. In addition, the memory 13 can include a high-speed random access memory, and can further include a non-volatile memory. For example, a variety of media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc., can also be a transitory storage medium.

[0052] Although the present utility model is disclosed as above, the present utility model is not limited thereto. Any person skilled in the art can easily think of changes or replacements without departing from the spirit and scope of the present utility model, and can make various changes and modifications, including combinations of different functions, implementation steps, software and hardware implementation manners, which are all within the protection scope of the present utility model.

Claims

1. A sampling circuit, characterized by comprising: The application relates to a signal processing circuit for a target circuit, which comprises the following parts: an input processing unit connected to the output end of the target circuit, used for collecting the common-mode output voltage of the target circuit and performing sampling input processing on the common-mode output voltage to obtain a first operational amplifier non-inverting sampling signal and a first operational amplifier inverting sampling signal; a signal amplification unit connected to the input processing unit, used for performing amplification processing on the first operational amplifier non-inverting sampling signal and the first operational amplifier inverting sampling signal respectively to obtain a second operational amplifier non-inverting sampling signal and a second operational amplifier inverting sampling signal; a signal stabilization unit connected to the signal amplification unit and a control circuit, used for maintaining the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, generating a feedback signal according to the second operational amplifier non-inverting sampling signal and the second operational amplifier inverting sampling signal, and outputting the feedback signal to the control circuit.

2. The sampling circuit of claim 1, wherein, The common-mode output voltage comprises a non-inverting output signal and an inverting output signal; the input processing unit comprises: a first input subunit connected to the output end of the target circuit and the input end of the signal amplification unit, used for receiving the non-inverting output signal of the target circuit and performing sampling input processing on the non-inverting output signal to obtain the first operational amplifier non-inverting sampling signal; a second input subunit connected to the output end of the target circuit and the input end of the signal amplification unit, used for receiving the inverting output signal of the target circuit and performing sampling input processing on the inverting output signal to obtain the first operational amplifier inverting sampling signal.

3. The sampling circuit of claim 2, wherein, The signal amplification unit comprises: a first amplification subunit connected to the first input subunit and the signal stabilization unit, used for performing amplification processing on the first operational amplifier non-inverting sampling signal to obtain the second operational amplifier non-inverting sampling signal; a second amplification subunit connected to the second input subunit and the signal stabilization unit, used for performing amplification processing on the first operational amplifier inverting sampling signal to obtain the first operational amplifier inverting sampling signal.

4. The sampling circuit of claim 3, wherein, The output end of the target circuit comprises a first non-inverting output end and a second non-inverting output port; the first input subunit comprises a first input port, a second input port, a first resistor, a second resistor and a first capacitor; the first non-inverting output end is connected to the first input port, and the second non-inverting output end is connected to the second input port; the first input port is connected to one end of the first resistor and one end of the first capacitor, the second input port is connected to the other end of the first resistor and one end of the second resistor, and the other end of the second resistor and the other end of the first capacitor are both connected to the input end of the first amplification subunit.

5. The sampling circuit of claim 4, wherein, The output end of the target circuit comprises a first inverting output end and a second inverting output port, and the second input subunit comprises a third input port, a fourth input port, a third resistor, a fourth resistor and a second capacitor. The first inverting output port is connected with the third input port, and the second inverting output port is connected with the fourth input port; the third input port is connected with one end of the third resistor and one end of the second capacitor, the fourth input port is connected with the other end of the third resistor and one end of the fourth resistor, and the other end of the fourth resistor and the other end of the second capacitor are both connected with the input end of the second amplification subunit.

6. The sampling circuit of claim 5, wherein, The first amplification subunit comprises a first amplifier; the non-inverting input end of the first amplifier is connected with the other end of the second resistor and the other end of the first capacitor; the inverting input end of the first amplifier and the output end of the first amplifier are both connected with the signal stabilization unit.

7. The sampling circuit of claim 6, wherein, The second amplification subunit comprises a second amplifier; the non-inverting input end of the second amplifier is connected with the other end of the fourth resistor and the other end of the second capacitor; the inverting input end of the second amplifier and the output end of the second amplifier are both connected with the signal stabilization unit.

8. The sampling circuit of claim 7, wherein, The signal stabilization unit comprises a third amplifier, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor and a third capacitor; One end of the fifth resistor is connected with the output end of the first amplifier and the inverting output end of the first amplifier, and the other end of the fifth resistor and one end of the sixth resistor are both connected with the non-inverting input end of the third amplifier; the other end of the sixth resistor is connected with a reference circuit; One end of the eighth resistor is connected with the output end of the second amplifier and the inverting input end of the second amplifier, one end of the seventh resistor is connected with the output end of the third amplifier and one end of the ninth resistor, the other end of the seventh resistor and the other end of the eighth resistor are both connected with the inverting input end of the third amplifier, the other end of the ninth resistor is connected with one end of the third capacitor and a control circuit, and the other end of the third capacitor is connected with the reference circuit.

9. An analog circuit, characterized by The analog circuit comprises a control circuit, a reference circuit and a sampling circuit as claimed in any one of claims 1-8, wherein the sampling circuit is connected with the control circuit and the reference circuit respectively.

10. An electronic device, comprising: The analog circuit comprises a sampling circuit as claimed in any one of claims 1-8 or the analog circuit as claimed in claim 9.

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