Dynamic cache loading and verification

GB2631975AInactive Publication Date: 2025-01-22INTERNATIONAL BUSINESS MACHINE CORPORATION

Patent Information

Application Number
GB2023011093
Authority / Receiving Office
GB · GB
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-07-20
Publication Date
2025-01-22
Estimated Expiration
Not applicable · inactive patent

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Abstract

A verification environment VE monitors accesses to a cache by a device under test DUT via an interface. In response to a cache access, the verification environment modifies the cache memory to give a predefined result from the cache access. The predefined result is then returned to the device under test via the interface. The verification environment may modify the data content of the cache by generating the predetermined value. It may modify the directory state assigned to the target of the cache access. The state may be valid, dirty, speculation or coherency. It may modify the least recently used state, or a most recently used state of the target. It may modify a memory reference model of the device under test. The device under test may be a software simulation or a hardware device. The verification environment may generate a pass or a fail signal dependent on the returned result.
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Citation Information

Patent Citations

  • Multi-core processor memory access data detection and verification system and method

    CN109032879A

  • Cache diagnostic techniques

    US20200174903A1

  • Constrained random error injection for functional verification

    US8595680B1

Cited By

  • Dynamic cache loading and verification

    US12561252B2