Voltage supply for mass spectrometer

Abstract

To provide a multi-reflection time-of-flight (MR-ToF) mass analyzer for a mass spectrometer.SOLUTION: A mass analyzer includes first and second mirror electrodes operating at a first and second polarity, respectively. The mass analyzer further includes: a first regulator coupled to one or more first HV switches and providing an electric potential to first mirror electrode; and one or more second regulators which each provide an electric potential to a respective second mirror electrode. The first and second HV switches swap the polarity supplied to the first regulator and the one or more second regulators. A regulator including a feedback circuit arranged to monitor voltages supplied at an output part includes: a first feedback path to monitor AC coupled currents on the output part; and a second feedback path to monitor DC level on the output part.SELECTED DRAWING: Figure 5A

Description

[Technical field]

[0001] The present invention relates to a voltage supply for a mass analyser of a mass spectrometer, in particular to an HV supply for a mass analyser, such as a multi-reflection time of flight (MR-ToF) analyser, the HV supply adapted to supply electrodes of the mass analyser for positive and negative polarity scanning of ions. [Background technology]

[0002] Mass spectrometry is a long-established technique for the identification and quantification of a wide range of biological and non-biological materials, often containing complex mixtures of large organic molecules.

[0003] Although the majority of mass spectrometry studies are performed via positive ion detection, many analytes, such as acidic peptides and entire classes of lipids, are amenable to negative ionization and detection. For analytes that contain a mixture of species, some of which are better detected by positive ion detection and some of which are better detected by negative ion detection, it is desirable to switch between positive and negative ionization modes in the mass spectrometer as the species elute from the chromatographic system.

[0004] Some commercially available mass spectrometer instruments can switch between positive and negative ionization modes within the duration of a chromatographic peak; these are generally low-resolution triple quadrupole instruments. Fast polarity switching is more difficult in more accurate mass spectrometers, including time-of-flight (ToF) analyzers and High Resolution Accurate Mass (HRAM) analyzers such as Orbitrap. This is because they require very stable ppm high voltage potentials, which are often heavily filtered with corresponding long time delays to charge the capacitance and stabilize the voltage output after switching. During this time, which can be several minutes, the mass analyzer cannot be used. It is therefore not possible to switch within the duration of a chromatographic peak, as a large portion of the analysis time of the peak is lost due to the mass analyzer switching polarity and the time it takes for the voltage to stabilize.

[0005] Efforts have been made in the prior art to provide high resolution, high accuracy mass spectrometers operable to detect positive and negative ions from a sample without the need for polarity switching.

[0006] Furutani in US Patent No. 7,170,052 (B2) uses the property that the force acting on an ion is reversed for the opposite polarity of the ion. Both ion polarities are analyzed simultaneously using two analyzers in a hybrid instrument, one operating per polarity. The two analyzers are formed from a doubled orthogonal Time-of-Flight (ToF) analyzer, but the positive and negative ions generated by the power source are separated by their opposite direction of ion mobility for the different polarities. The separated positive and negative ions are analyzed by the respective polarity analyzers. Polarity switching is avoided, so that problem is also avoided. A similar instrument is described by Wang in US Patent No. 7,649,170 (B2).

[0007] US Patent 10,699,888 (B2) by Giannakopulos describes an instrument combining an orbital trap mass analyzer and a multi-reflecting time-of-flight (MR-ToF) analyzer with a quadrupole mass filter and collision cell for tandem mass analysis. It describes using a slow high-precision orbital trap mass analyzer to generate a total mass (MS1) scan, while a fast high-sensitivity MR-ToF analyzer simultaneously provides fragment (MS2) spectra. The MR-ToF analyzer is of the opposed mirror type, as described by Grinfeld in US Patent 9,136,101 (B2), but it is less susceptible to fast polarity switching than the orbital trap mass analyzer. The mirror electrode structure requires four stable high voltages, still higher than the 5 KV of the central electrode of the orbital trap mass analyzer.

[0008] Few commercially available HRAM instruments support pulsed polarity switching within a single experiment. A notable exception is the latest orbitrap mass analyzer instruments, such as the Orbitrap™ Exploris™ series (Thermo Fisher Scientific), which can switch polarity within 500 ms. The Orbitrap™ Exploris™ instrument achieves relatively fast polarity switching by maintaining both positive and negative stable HV supplies to its critical central pole and switching between them via high voltage transistor switches. Such an arrangement is shown in FIG. 1, where a positive HV supply and a negative HV supply are shown, each connected to a transistor switch via a regulator. The output of the switch is connected to the central electrode of the orbitrap mass analyzer. The outer electrodes do not require such high voltages and can be virtual ground.

[0009] The approach for orbital trap mass analyzers that switches between stable HV power supplies allows the number of components and capacitances coupled between the switch and the analyzer electrodes to be limited, thereby providing a relatively fast rate of polarity switching. However, the fast switching power supplies described for orbital trap mass analyzer instruments are relatively complex and expensive. For analyzers such as MR-ToF that have multiple stable HV power supplies, the size and complexity is increased, and this is further exacerbated by higher voltages that require more expensive components. Summary of the Invention

[0010] The present invention provides an electronic circuitry for polarity switching of the HV power supply supplied to a mass analyzer that is fast and does not increase the number of components required. First, the present invention provides a new configuration of regulators and switches to provide the switching. Second, the present invention provides a new regulator that can better accommodate HV switching and quickly settles to reach the desired low ppm voltage error after a polarity switch occurs. By HV, we mean voltages greater than about 1000V.

[0011] Conventionally, in an Orbitrap HV supply arrangement such as that described above in FIG. 1, each positive HV supply is followed by a respective fixed polarity adjuster. HV transistor switches then allow the Orbitrap to be switched between the adjusted HV positive and negative sources. Using the same approach for mass analyzers such as MR-ToF analyzers that require multiple high voltages would result in multiple fixed polarity adjusters.

[0012] The present invention provides a multi-reflection time-of-flight (MR-ToF) mass analyzer for a mass spectrometer, the MR-ToF mass analyzer comprising a plurality of mirror electrodes, a first mirror electrode configured to operate at a first polarity and one or more second mirror electrodes configured to operate at a second polarity opposite the first polarity, the mass analyzer configured for polarity switching, a first power supply configured to provide a first HV supply, a second power supply configured to provide a second HV supply, at least two HV switches, and one or more first HV switches. The present invention provides an MR-ToF mass analyzer, further comprising: a first regulator coupled to the HV switch, the first regulator configured to supply a potential to the first mirror electrode; and one or more second regulators each coupled to one or more second HV switches, each of the one or more second regulators configured to provide a potential to a respective second mirror electrode, wherein the first HV switch and the second HV switch are configured to alternate polarities of the potentials supplied to the first regulator and the one or more second regulators.

[0013] The first power source may be configured in a first bridge configuration, such as a floating polarity power source. One or more first HV switches may be arranged in the first bridge configuration to reverse a coupling of the first power source in the first bridge configuration to swap a polarity of the potential output to the first regulator. The second power source may be configured in a second bridge configuration, such as a floating polarity power source. One or more second HV switches may be arranged in the second bridge configuration to reverse a coupling of the second power source in the second bridge configuration to swap a polarity of the potential output to the one or more second regulators.

[0014] The first bridge configuration may be an H-bridge arrangement, and the one or more first HV switches may include four first HV switches. The first power source may be coupled to the center of the H-bridge arrangement, and the four first HV switches may be switchable in two pairs to selectively define a first circuit path coupling the first power source to provide a positive HV voltage to the first regulator and a second circuit path coupling the first power source to provide a negative HV voltage to the first regulator.

[0015] The second bridge configuration may be an H-bridge arrangement, and the one or more second HV switches may include four second HV switches. The second power source may be coupled to a center of the H-bridge arrangement, and the four second HV switches may be switchable in two pairs to selectively define a third circuit path coupling the second power source to supply a positive HV voltage to the one or more second regulators and a fourth circuit path coupling the second power source to supply a negative HV voltage to the one or more second regulators.

[0016] The circuit path may be further coupled to ground or to a virtual ground.

[0017] The HV switches in the bridge arrangement may be configured to be switchable to decouple the power source from the regulator.

[0018] The HV switches in the bridge arrangement may be configured to be switchable to discharge the regulator to ground or to a virtual ground.

[0019] In an alternative arrangement, the first power supply may be configured to provide a positive HV supply and the second power supply may be configured to provide a negative HV supply. The at least two switches may include a first HV switch and a second HV switch, each having an output. The first regulator may be coupled to the output from the first HV switch and the one or more second regulators may each be coupled to the output from the second HV switch. The first HV switch and the second HV switch may be configured to switch between the first power supply and the second power supply to swap polarities of the potentials at the first mirror electrode and the second mirror electrode.

[0020] The MR-ToF mass analyzer may include a first voltage prescaler arranged to receive a positive HV supply or a negative HV supply from the first switch and may be configured to provide an HV output having a reduced voltage magnitude to the first regulator.

[0021] The MR-ToF mass analyzer may include a second voltage prescaler arranged to receive a positive HV supply or a negative HV supply from the second switch and may be configured to provide one or more respective HV outputs having reduced voltage magnitudes to one or more second regulators.

[0022] The first voltage prescaler and / or the second voltage prescaler may comprise a chain of bipolar diodes to step down a voltage in magnitude from a voltage or potential provided by the positive HV supply and / or the negative HV supply to a voltage magnitude that is reduced.

[0023] The second voltage prescaler may be arranged to provide at least two HV outputs. A first HV output may be tapped off between a first bipolar diode group of the chain of bipolar diodes and a second bipolar diode group of the chain of bipolar diodes to step down the voltage to a first voltage magnitude. A second HV output may be tapped off between a second bipolar diode group of the chain of bipolar diodes and a third bipolar diode group of the chain of bipolar diodes or between the second bipolar diode group of the chain of bipolar diodes and one or more resistors to step down the voltage to a second voltage magnitude less than the first voltage magnitude.

[0024] The second voltage prescaler may be arranged to provide at least three HV outputs, the second HV output being tapped off between the second bipolar diode group of the chain of bipolar diodes and the third bipolar diode group of the chain of bipolar diodes to step down the voltage to a second voltage magnitude less than the first voltage magnitude, and the third HV output being tapped off between the third bipolar diode group of the chain of bipolar diodes and the fourth bipolar diode group of the chain of bipolar diodes or between the third bipolar diode group of the chain of bipolar diodes and one or more resistors to step down the voltage to a third voltage magnitude less than the second voltage magnitude. The one or more resistors may be used to settle the current through the diodes.

[0025] The MR-ToF analyzer may include three second mirror electrodes. For example, the MR-ToF may include one first mirror electrode, three second mirror electrodes, and a ground electrode. Alternatively, the MR-ToF may include other numbers of first and second electrodes.

[0026] The present invention provides a regulator or regulator circuit for providing a regulated HV voltage to an electrode of a mass analyzer of a mass spectrometer, the regulator configured to accept a positive or negative polarity HV voltage, the regulator comprising an input for receiving the HV voltage from a power supply, an output for providing the regulated HV voltage to the electrode, one or more reference inputs for receiving one or more reference voltages, a tuning unit for adjusting the HV voltage provided at the output, and a feedback circuit coupled between the output and the tuning unit. The feedback circuit is arranged to monitor one or more voltages indicative of the regulated HV voltage provided at the output, the feedback circuit comprising a capacitor and a first feedback path configured to monitor an AC coupled current on the output and provide a first feedback signal, and a second feedback path configured to monitor a DC level on the output and provide a second feedback signal. The tuning unit adjusts the HV output voltage based on the one or more reference voltages and the first and second feedback signals. Accepting a positive or negative polarity HV voltage means that the input of the regulator can accept a positive or negative polarity HV voltage. The positive or negative polarity of the HV voltage can be with respect to a ground or a virtual ground, which can also be applied to the regulator, for example at a ground terminal.

[0027] The tuning unit may comprise a transistor, such as a MOSFET, connected between the input and the output.

[0028] The first feedback path may be configured to filter out DC current and / or low frequency leakage current from the capacitor when the polarity of the HV voltage is switched.

[0029] The first feedback signal and the second feedback signal may be combined into a combined feedback signal, such as before being provided to the tuning unit.

[0030] The regulator, or regulator circuit, may further comprise a summing integrator configured to sum one or more reference voltages with the one or more feedback signals and perform an integration of the sum.

[0031] The one or more reference voltages and the one or more feedback signals may each be scaled relative to one another before being summed.

[0032] The regulator, i.e., the regulator circuit, may further comprise a bridge rectifier, in which the tuning unit is coupled such that current from the input to the output flows in the same direction through the tuning unit regardless of whether the HV output signal is positive or negative polarity.

[0033] The feedback circuit may be protected from HV by being coupled to the tuning unit through an isolation coupler, such as an optocoupler.

[0034] The regulator, i.e., regulator circuit, may further comprise one or more voltage suppression devices connected across the tuning unit or bridge rectifier to limit the voltage dropped across the tuning unit to a maximum predetermined voltage. The one or more voltage suppression devices may be bipolar suppression diodes. The maximum predetermined voltage may be up to 1000v, such as 800, 880 or 900V.

[0035] The one or more reference voltages may be generated from a reference voltage unit comprising a first voltage reference power supply configured to provide a first reference voltage and a second voltage reference power supply configured to provide a second reference voltage. The first voltage reference power supply may be configured to provide a more accurate voltage output than the second voltage reference power supply, and the second voltage reference power supply may be configured to provide a more stable voltage output than the first voltage reference power supply.

[0036] The regulator, or regulator circuit, may further include a digital-to-analog converter (DAC) for scaling the output from the second voltage reference to match or correspond in magnitude to the output from the first voltage reference.

[0037] The regulator, i.e., the regulator circuit, may further comprise a polarity detector configured to detect whether the regulated HV voltage at the output is positive or negative polarity, or to detect whether the combined feedback signal is positive or negative polarity, or to detect whether the first feedback signal is positive or negative polarity, and to reverse the polarity of the combined feedback signal when the HV voltage switches polarity.

[0038] The polarity detector may include an analog switch that switches between the combined feedback signal and a polarity-inverted combined feedback signal, which may be triggered to switch between the polarity-inverted combined feedback signal and the combined feedback signal when the regulated HV output switches polarity, such as based on the polarity of the combined feedback signal.

[0039] The regulator, i.e., the regulator circuit, may further comprise a discharge detection circuit for detecting a discharge of the HV output voltage. The detection may be based on detecting a sudden voltage change on the output. Alternatively, the detection may be based on an increase in current flow through the regulator from the combined feedback signal.

[0040] The discharge detection circuit may include a window comparator for detecting whether a voltage based on the combined feedback signal is outside a predetermined range, and a threshold of the window comparator may be adjustable to determine the magnitude of the discharge.

[0041] The regulator, or regulator circuit, may further include an output device to alert a user that a discharge has occurred when a voltage based on the combined feedback signal is outside a predetermined range. Alternatively or additionally, a counter may be implemented to determine the number and / or frequency of discharges and alert a user when the number or frequency exceeds a threshold.

[0042] The regulator, i.e., regulator circuit, may further comprise a feedback attenuation circuit having a switch for receiving an input for selecting between a first combined feedback signal and a second combined feedback signal, the first combined feedback signal and the second combined feedback signal being generated from the combined feedback signal, the second signal having a greater attenuation than the first signal, and a selected one of the first combined feedback signal and the second combined feedback signal being provided to the tuning unit.

[0043] In the MR-ToF analyzers described herein, either the first regulator or the one or more second regulators include an embodiment of a regulator or regulator circuit described herein.

[0044] The invention further provides a mass spectrometer comprising an MR-ToF analyser as described herein and / or a regulator, i.e. a regulator circuit, as described herein.

[0045] The present disclosure provides a polarity detector for a regulator, i.e., regulator circuit, of a mass analyzer, the polarity detector being configured to detect whether a regulated HV voltage at an output is positive or negative polarity, or to detect whether a combined feedback signal is positive or negative polarity, or to detect whether a first feedback signal is positive or negative polarity, and to reverse the polarity of the combined feedback signal when the HV voltage switches polarity.

[0046] The present disclosure provides a discharge detection circuit for a regulator, i.e., regulator circuit, of a mass spectrometer, the discharge detection circuit being configured to detect a discharge of an HV output voltage based on detecting an increase in current flow through the regulator from a combined feedback signal.

[0047] The present disclosure provides a feedback attenuation circuit for a regulator, i.e., regulator circuit, of a mass analyzer, the feedback attenuation circuit having a switch for receiving an input that selects between a first combined feedback signal and a second combined feedback signal, the first combined feedback signal and the second combined feedback signal being generated from a combined feedback signal, the second signal having a greater attenuation than the combined feedback signal of the first signal, and the selected one of the first and second combined feedback signals being provided to a tuning unit. Hereinafter, embodiments of the present invention and aspects of the prior art will be described with reference to the accompanying drawings. [Brief description of the drawings]

[0048] [Figure 1] FIG. 1 is a schematic diagram of a prior art HV supply configuration for an orbital trap mass analyzer that is switchable between positive and negative operation. [Diagram 2] FIG. 1 is a schematic diagram of a dual analyzer mass spectrometer comprising a multi-reflecting time-of-flight (MR-ToF) mass analyzer. [Diagram 3] FIG. 1 is a schematic diagram of a conventional circuit for generating four voltages for a fixed polarity MR-ToF mass analyzer having four mirror electrodes. [Figure 4] FIG. 4 is a schematic diagram showing how the switchable HV supply configuration of the orbital trap analyzer of FIG. 1 can be applied to a MR-ToF mass analyzer requiring four regulated high voltages as in FIG. 3. [Figure 5A] FIG. 2 is a schematic diagram of a HV supply circuit for an MR-ToF analyzer with polarity switching according to the present invention. [Figure 5B] FIG. 2 is a schematic diagram of an alternative HV supply switching scheme for an MR-ToF analyzer, according to an embodiment of the present invention. [Figure 6] FIG. 2 is a schematic circuit diagram of a voltage prescaler. [Figure 7] FIG. 2 is a circuit diagram of an exemplary voltage prescaler. [Figure 8] 5B is a simplified diagram of a regulator circuit such as may be used in one of the regulators of FIG. 5A. [Figure 9] 2 is a schematic block diagram of an improved regulator circuit in accordance with an embodiment of the present invention; [Figure 10A] An exemplary detailed circuit diagram is formed based on the schematic block diagram of FIG. [Figure 10B] An exemplary detailed circuit diagram is formed based on the schematic block diagram of FIG. [Figure 11] FIG. 2 is a schematic diagram showing how a bridge rectifier can be connected to a regulator transistor of a regulator circuit. [Figure 12] FIG. 2 is an example circuit diagram of a full-bridge rectifier around a regulator transistor. [Figure 13] FIG. 2 is a schematic diagram of a circuit for detecting and switching the polarity of a feedback signal. [Figure 14] FIG. 13 is a schematic block diagram of how a feedback signal with increased attenuation may be selectively provided. [Figure 15] FIG. 2 is a circuit diagram of a discharge detector for detecting unwanted discharges in a mass spectrometer. [Figure 16] FIG. 13 is an example circuit diagram illustrating combining a DAC voltage and a REF reference voltage with a feedback signal to control a regulator transistor. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0049] The present disclosure aims to address the problem of slow settling of polarity switching of HV supplies for HRAM analyzers, particularly for HRAM analyzers that require multiple high voltages, such as multi-reflection time-of-flight (MR-ToF) analyzers.

[0050] Figure 2 is a schematic diagram of a dual analyzer mass spectrometer in which one of the mass analyzers is a multi-reflecting time-of-flight (MR-ToF) mass analyzer. Before describing the MR-ToF analyzer, the mass spectrometer of Figure 2 will be briefly described.

[0051] The dual analyzer mass spectrometer 10 of FIG. 2 includes an ion source 20, which may be an electrospray ionization source (ESI source). Sample molecules received, for example, from an HPLC column, are ionized in the ion source 20. Ions produced from the sample then enter the vacuum chamber of the mass spectrometer 10 and are directed by a capillary 25 to a lens 30, which may be an RF-only S-lens 30. The ions are focused by the lens 30 and directed around a curved path such that undesired molecules such as contaminating solvent molecules are removed. Ion focusing may be by an injection flatapole 40, which injects ions into a bent flatapole 50 with an axial electric field that guides the ions (charged) along a curved path. An ion gate (TK lens) 60 is located at the distal end of the bent flatapole 50. The ion gate may be an ion lens with a static field that provides good fringe field characteristics and neatly transmits the ions to a quadrupole mass filter 70. In some embodiments, the ion gate may control the passage of ions from the bent flatapole 50 to the quadrupole mass filter 70. The quadrupole mass filter 70 is typically, but not necessarily, segmented and acts as a bandpass filter, allowing the passage of selected mass numbers or limited mass ranges while rejecting ions of other mass-to-charge ratios (m / z). The mass filter may also be operated in a non-mass selective, RF-only mode, i.e., transmitting substantially all m / z ions. For example, the quadrupole mass filter 70 may be controlled by the controller 195 to select a mass-to-charge range for the passage of precursor ions that are passed, while other ions in the precursor ion stream are filtered (i.e., not passed). Alternatively, the S-lens 30 may operate as the ion gate and the ion gate (TK lens) 60 may be an electric field lens.

[0052] Although a quadrupole mass filter is shown in Figure 2, those skilled in the art will appreciate that other types of mass selection devices may also be suitable for selecting precursor ions within the mass range of interest, where the selected ions may be considered to be precursor ions for subsequent fragmentation.

[0053] Following mass selection, the ions pass through a quadrupole exit lens arrangement / split lens arrangement 80 and enter a first transfer multipole 90. The quadrupole exit lens arrangement / split lens arrangement 80 may be used to control the entry of the ions into the mass analyzer. The first transfer multipole 90 directs the mass filtered ions from the quadrupole mass filter 70 into a curved linear ion trap (C-trap) 100. The C-trap (first ion trap) 100 has curved electrodes extending in the longitudinal direction that are supplied with an RF voltage and end caps that are supplied with a DC voltage. The result is a potential well that extends along the curved longitudinal axis of the C-trap 100. In a first mode of operation, a DC end cap voltage is set on the C-trap so that ions arriving from the first transfer multipole 90 are trapped in the potential well of the C-trap 100 and cooled there. The injection time (IT) of the ions into the C-trap determines the number of ions (ion population) that are subsequently ejected from the C-trap into the mass analyzer.

[0054] The cooled ions stay in a cloud towards the bottom of the potential well and are then ejected orthogonally from the C-trap towards the first mass analyzer 110. As shown in FIG. 2, the first mass analyzer is an orbital trap mass analyzer 110, for example an Orbitrap® mass analyzer sold by Thermo Fisher Scientific. The orbital trap mass analyzer 110 has an off-center injection aperture through which ions are injected as a coherent packet into the orbital trap mass analyzer 110. The ions are then trapped in the orbital trap mass analyzer by a hyperlogarithmic electric field and undergo a longitudinal back and forth motion as they orbit around the inner electrode. The axial (z) component of the motion of the ion packet in the orbital trap mass analyzer is defined as (more or less) simple harmonic motion, with the angular frequency about the z-axis being related to the square root of the mass-to-charge of a given ion species. Thus, ions separate over time according to mass-to-charge. Ions in the orbital trap mass analyzer 110 are detected using an imaging detector (not shown) which produces a "transient" in the time domain containing information about all ion species as they pass through the imaging detector. The transient is then subjected to a Fast Fourier Transform (FFT) resulting in a series of peaks in the frequency domain. From these peaks, a mass spectrum can be produced which represents the presence / ion intensity versus m / z. This analysis of the sample / precursor ions is called an MS1 ​​scan since the ions are analyzed without fragmentation. In a second mode of operation, the ions are first fragmented and then sent to a mass analyzer such as the MR-ToF analyzer 150. Scanning the fragmented ions is known as an MS2 scan.

[0055] In this second mode of operation, ions continue their path through the quadrupole exit lens arrangement / split lens arrangement 80 and the first transfer multipole 90 into the C-trap 100, through the C-trap into the fragmentation chamber 120. Thus, in the second mode of operation, the C-trap effectively operates as an ion guide. The fragmentation chamber 120 is a Higher energy Collisional Dissociation (HCD) device that is supplied with a collision gas such as an inert gas, for example argon, nitrogen or helium. Precursor ions arriving at the fragmentation chamber 120 collide with collision gas molecules, resulting in the precursor ions being fragmented into fragment ions. The fragmented ions may be ejected from the fragmentation chamber 120 at the opposite axial end of the C-trap 100 into the second transfer multipole 130. The second transfer multipole 130 guides the fragmented ions into the extraction trap (second ion trap) 140. The extraction trap 140 is a radio frequency voltage controlled trap containing a buffer gas. For example, a suitable buffer gas is 5×10 -4 mBar to 1×10 -2 Argon at a pressure in the mBar range. Extraction traps have the ability to quickly switch off the applied RF voltage and apply a DC voltage to extract the trapped ions.

[0056] An extraction trap 140 is provided to form ion packets of fragmented ions prior to injection into the second analyzer. The extraction trap 140 accumulates the fragmented ions prior to injection into a time-of-flight mass analyzer 150.

[0057] A multi-reflecting time-of-flight mass analyzer (MR-ToF) 150, shown diagrammatically in FIG. 2, is built around two opposing ion mirrors 160, 162 that are elongated in the drift direction. The mirrors face each other in a direction perpendicular to the drift direction. An extraction trap 140 injects ions into the first mirror 160, which then oscillate between the two mirrors 160, 162. The angle of ejection of the ions from the extraction trap 140 and additional deflectors 170, 172 allows control of the energy of the ions in the drift direction, so that as they oscillate, they are directed down the length of the mirrors 160, 162, creating a zigzag trajectory. The mirrors 160, 162 themselves are tilted relative to each other to create a potential gradient that slows the drift velocity of the ions and reflects them into the drift dimension and focuses them onto the detector 180. Tilting the opposing mirrors usually has the negative side effect of changing the period of ion oscillation as they move through the drift dimension. This is compensated for by stripe electrodes 190 (acting as compensation electrodes) which vary the length of the opposing mirrors 160, 162 downwards to modify the flight potential over a portion of the inter-mirror space. The combination of the varying width of the stripe electrodes 190 and the varying distance between the mirrors 160, 162 allows for maintaining good temporal focusing as well as reflection and spatial focusing of the ions onto the detector 180. Further details of the MR-ToF analyzer 150 are described in U.S. Patent Application Publication No. 2015 / 028197(A1), the contents of which are incorporated herein by reference in their entirety.

[0058] The mass spectrometer 10 is under the control of a controller 195 configured to, for example, control the timing of release of trapping components, set suitable potentials on electrodes such as the quadrupole to focus and filter ions, acquire mass spectral data from the orbital trap device 110, control sequences of MS1 and MS2 scans, etc. to acquire mass spectral data from the MR-ToF 150. It will be appreciated that the controller 195 may comprise a computer operable according to a computer program including instructions to cause the mass spectrometer to perform steps of a method according to the present invention.

[0059] A multi-reflection time-of-flight (MR-ToF) analyzer may be of the opposed mirror type with a pair of mirror electrode structures. The mirror electrode structures may require four stable high voltages. For example, each mirror electrode structure may comprise a series of five electrodes (only three are shown at 160, 162 for each of the electrode structures in FIG. 2). The five electrodes include a ground electrode closest to the axis or drift region on the MR-ToF analyzer. For ions with approximately 4 keV, examples of values ​​that the electrode potentials may take are as follows: Ground electrode 0V First electrode -7341V Second electrode +4607V Third electrode +3663V 4th electrode +6005V

[0060] A high negative potential is used to significantly slow down ions entering the mirror region from the drift region, and a positive potential reflects ions away from the mirror region (this assumes that the ions entering the mirror region are positive).

[0061] FIG. 3 is a schematic diagram of a conventional circuit that generates four voltages. Negative and positive polarity HV power supplies are provided, such as having a voltage of + / -10 kV. Regulators are provided between the power supplies and the mirror electrodes to adjust and set the required voltages. Since only one negative voltage is required, there is a single regulator from the -10 kV power supply that supplies the required voltage to the first mirror electrode. For example, the negative regulator may supply -7341V to the first mirror electrode. The +10 kV power supply is used to supply three different voltages to the second mirror electrode, the third mirror electrode, and the fourth mirror electrode, respectively. Since the mirror electrodes require different voltages, regulators operating at positive voltages are provided for each of the mirror electrodes.

[0062] In general, different voltages and different numbers of electrodes may be used, for example at least one mirror electrode is supplied with a negative voltage and at least two mirror electrodes are supplied with a positive voltage.

[0063] The arrangement of power supplies, regulators and mirror electrodes shown in Figure 3 does not include the possibility of switching polarity to analyze ions of the opposite polarity. To achieve polarity switching, a switch is required to switch the polarity of the voltage applied to the mirror electrodes, similar to that shown for the orbital trap analyzer of Figure 1.

[0064] One approach to including a switch is to include a switch following the regulator in a manner similar to that shown for the orbital trap analyzer of FIG. 1. In the case of the orbital trap analyzer, fast polarity switching is provided by maintaining both positive and negative high voltages to its central electrode and switching between them via a high voltage transistor switch. The number of components and capacitance between the switch and the electrodes are limited to achieve fast switching. For example, a positive regulator and a negative regulator are provided on the HV supply side of the switch to avoid the need to switch polarity of a slow response regulator. By providing a positive and negative polarity HV supply compared to a system that switches polarity of an unregulated HV supply, the number of components is doubled.

[0065] FIG. 4 shows a similar approach applied to an MR-ToF analyzer requiring four regulated high voltages as in FIG. 3, but now with switched polarity. The increase in the number of regulated voltages significantly increases the complexity. As in FIG. 1 and FIG. 3, one positive HV power supply and one negative HV power supply are provided, for example at −10 kV and +10 kV. Four regulators are provided connected to the negative HV power supply and four regulators are provided connected to the positive HV power supply. HV switches are provided between the regulators and the mirror electrodes. A switch is provided for each mirror electrode. The switches switch between connecting the mirror electrodes to the negative or positive voltages provided by the regulators. When the switches are in the position shown in FIG. 4, the first mirror electrode is provided with a negative voltage and the second, third and fourth electrodes are provided with different positive voltages. Here, the same voltage configuration as in FIG. 3 is provided. However, if all of the switches in FIG. 4 are switched, the polarity of the voltage supplied to the mirror electrodes is reversed and can therefore be used to analyze ions of opposite polarity. By maintaining the voltages and regulators at positive and negative voltages for each electrode, they can be switched quickly and dead time is minimized. However, when four voltages are required, doubling the number of regulators and components therein is a significant increase in component count and cost. For example, the HV or high stability feedback resistors in the regulators are expensive and require eight sets for eight regulators.

[0066] The present invention provides an improved HV supply circuit for MR-ToF mass analyzers. The circuit and its principles can also be used for other mass analyzers that require some regulated high voltage.

[0067] Figure 5A is a schematic diagram of a HV supply circuit for an MR-ToF analyzer according to the present invention. The circuit includes two switches and four regulators, and therefore requires fewer components than that of Figure 4. The switches are placed after the HV power supply and before the regulators, which output to the mirror electrodes.

[0068] The schematic diagram of FIG. 5A is for supplying a single HV voltage of a first polarity and three HV voltages of a second polarity to the MR-ToF. Other combinations of the number of HV voltages of each polarity are possible. For example, only one or two voltages of the second polarity may be provided if sufficient for the mass analyzer. In one embodiment, the MR-ToF mass analyzer may include multiple mirror electrodes, such as a first mirror electrode configured to operate with a first polarity and one or more second mirror electrodes configured to operate with a second polarity opposite to the first polarity.

[0069] The arrangement of FIG. 5A comprises a first power supply configured to provide an HV supply of a first polarity, such as negative polarity, and a second power supply configured to provide an HV supply of a second polarity, such as positive polarity. A first HV switch and a second HV switch are provided. Each HV switch has two inputs and one output. The two inputs are connected to the first power supply and the second power supply, respectively. The switches are configured to switch between connecting the first power supply to an output of the switch and connecting the second power supply to an output of the switch, such that the switches are configured to switch between providing a positive HV and providing a negative HV. The switches are preferably configured to be switched together such that at any one time, no more than one output of the switches is connected to the first power supply and no more than one output of the switches is connected to the second power supply.

[0070] The schematic diagram of FIG. 5 shows four regulators. The first regulator M1 is coupled to an output from the first HV switch and is configured to provide a potential to the first mirror electrode. The second regulator, the third regulator, and the fourth regulator are each coupled to an output from the second HV switch. The second regulator M2, the third regulator M3, and the fourth regulator M4 are each configured to provide a potential to a respective second mirror electrode. For example, the second regulator M2 is coupled to the second switch and is configured to provide a potential to the mirror electrode 2. The third regulator M3 is also coupled to the second switch and is configured to provide a potential to the mirror electrode 3. The fourth regulator M4 is coupled to the second switch and is configured to provide a potential to the mirror electrode 4. When multiple regulators are connected to one of the switches, they are connected in parallel. For example, the regulators M2, M3, and M4 are connected in parallel to the second switch. The potentials provided to the mirror electrodes from the different regulators may have different magnitudes. All regulators connected to a first switch (only one is shown in FIG. 5A) may be considered to be regulators of a first type, and all regulators connected to a second switch may be considered to be regulators of a second type.

[0071] The first and second type regulators are configured to accommodate positive and negative voltages received from the regulators. The first and second HV switches are configured to switch between a first and a second power supply to alternate the polarity of the potential at each of the mirror electrodes. By alternating the polarity of the potential at the mirror electrodes, the mass spectrometer can analyze ions of opposite polarity.

[0072] FIG. 5A shows that regulators M2, M3, and M4 are all coupled to the second HV switch and coupled to different mirror electrodes to provide potentials thereto. As mentioned above, it is desirable for the potentials provided to the mirror electrodes to have different magnitudes. For example, the magnitudes may take values ​​of +4607V, +3663V, and +6005V. The regulators themselves may scale the voltage to the required value from the voltage received from the power supply, which may be 10kV. However, since transistors can typically only handle up to about 1500V, a prescaler (not shown in FIG. 5A) may be used to reduce the voltage magnitude to the required range. The regulators and / or prescalers should be able to accommodate switching of the polarity of the HV, such as when the HV switches from -10kV to +10kV.

[0073] FIG. 5B is a schematic circuit diagram of an alternative switching scheme. The diagram shows the same circuit switched differently to provide three modes, as indicated by i), ii) and iii). The circuit comprises a floating HV voltage source arranged in the center of a bridge circuit. The bridge circuit shown is an H-bridge circuit with four switches, each of which is arranged in a leg of the bridge circuit. The four switches thus form two parallel paths from the output, indicated by the arrows at the top of the diagram, to ground or virtual ground, indicated by the triangles at the bottom of the diagram. The two parallel paths are linked between the two switch pairs by the HV voltage source. The voltage source has terminals or outputs of positive and negative polarity. The four switches are arranged to swap the polarity outputs or terminals coupled to the regulator and ground, respectively, to swap the polarity voltages supplied to the regulator.

[0074] A first power supply may be used to supply a HV voltage to a first mirror electrode and a second power supply may be used to supply a HV voltage to one or more second mirror electrodes, In other arrangements, each HV power supply may supply one or a group of mirror electrodes.

[0075] Referring to Figure 5A, the switching scheme of Figure 5B replaces the power supplies and HV switches of Figure 5A. The outputs from the switches may be coupled to the regulator and mirror electrodes of Figure 5A at nodes N1 and N2. For example, a first HV power supply and bridge circuit may feed a first regulator and be coupled to node N1, and a second HV power supply and bridge circuit may feed one or more second regulators and be coupled to node N2. The power supplies may be 10KV supplies, but each is dedicated to one set of regulators and mirrors.

[0076] The switching circuit of Figure 5B may be preferred over the switching configuration of Figure 5A because the HV voltage sources can be selected to match the power requirements of the set of mirror electrodes to which they are dedicated. This differs from the configuration of Figure 5A, where each voltage source must be able to supply the maximum power of any one set of mirror electrodes. Thus, both voltage sources must be able to supply sufficient power to the three second mirror electrodes, whereas in the configuration of Figure 5B, only the dedicated voltage source is required to supply sufficient power.

[0077] In the switching circuit of Figure 5B, the switches only need to handle 10 kV, while the switches of Figure 5A must handle 20 kV. Although the arrangement of Figure 5B requires twice the number of switches as Figure 5A, the number of transistors is the same, and the advantage of the lower voltage requirements of the switches outweighs the disadvantage of having more switches.

[0078] As mentioned above, FIG. 5B shows three switch modes of the circuit. The four switches are labeled S1-S4. In circuit mode (i), switches S1 and S4 are open and switches S2 and S3 are closed such that the positive terminal of the voltage source is coupled to the regulator and the negative terminal is coupled to ground. In circuit mode (iii), switches S2 and S3 are open and switches S1 and S4 are closed such that the negative terminal of the voltage source is coupled to the regulator and the positive terminal is coupled to ground. In the third mode, shown as (ii), switches S1 and S3 are closed and S2 and S4 are open. In this way, the regulator is directly connected to ground and the voltage source is decoupled from the output. This allows the regulator to discharge to ground, for example when switching polarity, while the HV voltage source remains on for fast response.

[0079] Now, compare the circuits of FIG. 5A and FIG. 5B. In the configuration of FIG. 5A, referring to the regulator circuit shown in FIG. 8, during polarity switching, such as from -10 kV to +10 kV, the capacitor C2 is charged to -10 kV, and then the input of resistor R is connected to +10 kV, while C2 is still charged to -10 kV. This means that R also needs to be able to handle 20 kV, which not only makes R much larger, but also the surrounding electronic circuitry. Another problem is that the +10 kV voltage source not only needs to charge C2 to +10 kV, but also needs to discharge C2 from -10 kV in the first step. The circuit of FIG. 5B avoids this problem. In the case of FIG. 5B, switching polarity may include the following steps: 1. Disconnect the HV power supply from the output. 2. Connect the output to ground by closing S1 and S3 (possibly S2 and S4) and wait for the regulator (and electrode) circuitry to discharge. 3. Connect a power supply of opposite polarity to the output.

[0080] The configuration of FIG. 5B allows for a much higher discharge current than the HV power supply can provide, which leads to faster switching times.

[0081] FIG. 6 is a schematic diagram of a prescaler. The prescaler operates like a voltage divider. However, it must be able to accommodate high voltages and must be able to switch quickly. The prescaler shown in FIG. 6 can scale the HV received from the power supply and output three reduced magnitude voltages to supply the second to fourth mirror electrodes, respectively. To supply three different voltages, the prescaler comprises four elements X1, X2, X3, and Xn for scaling the voltages. The three outputs are tapped from between the four elements. The highest magnitude voltage is tapped from between the first element X1, which receives the HV from the switch, and the next element X2. The second highest magnitude voltage is tapped from between the second element X2 and the third element X3. The third highest magnitude voltage is tapped from between the third element X3 and the next element Xn, which may be connected to ground. Other numbers of elements and voltages output to the mirrors may be provided depending on the mass analyzer electrode requirements etc. Elements X1-Xn may be resistive or may be diodes.

[0082] FIG. 7 is an exemplary circuit diagram of a prescaler. In this embodiment, the element between the HV received from the HV switch and the lowest of the HV outputs is provided by a bipolar transient suppression diode chain. Such diodes are typically used to protect circuits from high voltage transients and therefore can handle high voltages. They are also bipolar, so can handle high voltages of both polarities. The bipolar transient suppression diodes limit or clamp the voltage applied across them. In the embodiment shown in FIG. 7, eight transient suppression diodes are coupled in series between the + / -10 kV received from the HV switch and the maximum magnitude scaled voltage. The number and rating of the bipolar suppression diodes used are selected to provide the required voltage magnitude at the output. In this embodiment, seven 440V rated diodes and one 300V rated diode are used, resulting in a maximum magnitude output scaled to 6620V. This is about 10% higher than is needed at the mirror electrodes to allow for a voltage drop across the regulator, such as across the regulator transistors. Between the first output voltage and the second output voltage, a second chain of bipolar suppression diodes is provided. In the embodiment of FIG. 7, four bipolar suppression diodes are included to scale the output to 5140V. Between the second output voltage and the third output voltage, a third chain of bipolar suppression diodes is provided. In the embodiment of FIG. 7, three bipolar suppression diodes are included to scale the output to 4100V. Between the third output voltage and ground, a high value resistor chain is provided to set the current flow to ground. The current flow is set to a prescribed level to maintain the operation of the diodes. The current level is set to avoid high currents putting a high load on the HV supply, which requires high power. On the other hand, the current level should not be too low, since a very low current flow would increase the noise generated by the diodes. In the embodiment of FIG. 7, the high value resistor chain includes four 100MΩ resistors. The resistors are coupled to the ground side, not the HV side, and the diodes are on the HV side.The bipolar suppression diode can carry high currents and quickly discharge the output and change it to the opposite polarity without the current limiting that occurs if a resistor is included at the HV end of the path.

[0083] The embodiments of Figures 6 and 7 provide three scaled voltage outputs for three mirror electrodes. Other numbers of outputs may be provided and different values ​​may be provided. For example, only one or two voltage outputs may be provided depending on the requirements of the mass analyzer.

[0084] FIG. 8 is a simplified diagram of a regulator circuit that may be used in one of the regulators of FIG. 5A. The regulator circuit may need to be combined with a bridge circuit to accommodate polarity switching. In the circuit of FIG. 8, HV is received at "in" and is regulated by transistor Q1 and provided to an output "out" that may be coupled to one of the mirror electrodes. Transistor Q1, which regulates the output, is controlled by a feedback loop fed from the output line. Regulator Q1 tunes the output voltage to a desired level and may be considered to be or form part of a tuning unit. In a conventional regulator, an arrangement of resistors R1, R2, and R8 is used to monitor the voltage at the output. Resistor R and capacitor C2 provide low pass filtering for the output signal. R1, R2, and R8 act as a voltage divider, and the voltage from the voltage divider is provided via buffer amplifier A1 to a resistor network and operational amplifier A2 that regulates transistor Q1. Resistors R1, R2 and R8 are large values ​​to limit the current flowing through them. The voltages provided by the DAC and REF are summed with the feedback signal in amplifier A2. The two 100kΩ and two 10kΩ resistors provide weighting to the input voltages so that the voltage from the DAC reference has ten times the weighting of the reference REF and the feedback signal. The top 100KΩ resistor in the diagram is not required. The use of the two references REF and DAC will be described further later in this specification, but in brief, REF is an accurate reference voltage and the DAC is based on a stable reference voltage. The output of amplifier A2 is coupled to the gate of transistor Q1 to regulate the output. In this way, the voltage output from the regulator circuit is kept stable by closed loop feedback against variations.

[0085] The circuit of FIG. 8 includes a capacitor C1 in parallel with resistors R1 and R2. Capacitor C1 provides a non-DC feedback path and stabilizes the regulator. However, capacitor C1 creates problems in this HV switching case, which also requires ppm stability, as will be discussed further below. As mentioned above, a high value resistor is used to limit the current flowing at such high voltages. This high value resistor can only drive the parasitic capacitance on the input of A1 with a very limited bandwidth. The reduced feedback bandwidth should be compensated by a higher regulator time constant, which leads to poor noise reduction and very long settling times. By adding capacitor C1 in parallel with feedback resistors R1, R2, a low impedance feedback path for higher frequencies (AC) is created, which allows the regulator to be stable even with a short time constant. This leads to faster settling times and better noise reduction. The difficulty is that the capacitors used are not ideal and have leakage and problematic dielectric absorption (DA). Dielectric absorption (DA) is caused by delayed polarization of dipoles in dielectric materials. Although to a small extent, the capacitor can be considered to have a voltage memory. This effect depends on the material used for the capacitor. Foil resistors are one of the best capacitors and show a very low DA effect. However, even with this kind of capacitor, the feedback configuration is not effective for accurate polarity switching. When a polarity switch occurs, the capacitor C1 suffers from dielectric absorption (DA) which results in a small DC leakage current through the capacitor after the switch occurs. The leakage current, although small, provides a small additional DC input to A1, causing a drift in the output voltage. It takes many seconds, for example 2000 seconds, for the current through the capacitor to decrease to a level low enough to achieve the required high stability of the output voltage of the HRAM mass analyzer. The required stability can be less than 1 ppm shift in the output voltage.

[0086] 9 is a schematic diagram of an improved regulator circuit according to an embodiment of the present invention. The circuit of the present invention decouples the regulator's AC feedback path from the DC feedback path to overcome the effects of capacitor leakage. This is achieved by providing a separate path for the AC-coupled current, followed by filtering the low frequency portion including the leakage current, and then combining it with any DC feedback or low frequency feedback from the DC feedback path. The combined AC-coupled and DC feedback is then combined with a reference in a manner similar to the circuit shown in FIG.

[0087] Referring more particularly to FIG. 9, regulator 210 corresponds to transistor 210 of FIG. 8. Capacitor C1' of FIG. 9 corresponds to capacitor C1 of FIG. 8. Resistor R12 corresponds to resistors R1 and R2 of FIG. 8. As in FIG. 8, capacitor C1' of FIG. 9 provides an AC feedback path. C1' is a capacitor that suffers from dielectric absorption and has leakage current when polarity is switched. R12 provides a DC or low-frequency feedback path. FIG. 9 also includes two blocks 220 and 230, of which block 220 converts the AC feedback current through the capacitor to a voltage that is then later converted back to a current in block 230. This conversion to a voltage is used to transmit or transport the AC feedback signal across a circuit board or to another circuit board with low interference. Providing such low-interference communication is useful here since some parts of the feedback circuit and voltage control circuit may be located in an oven or otherwise temperature controlled. When the voltage signal is close to the regulator, in block 230 the voltage signal is converted back to a current. Block 240 is a high pass filter, which filters out the DC signal resulting from the polarity switching, including the DC leakage current of the capacitor C1' caused by dielectric absorption (DA). In block 250, the DC feedback from the HV output is combined with the AC feedback with the DA leakage current removed. The AC feedback signal is converted back to a current, thus mimicking the behavior of the capacitor C1 in the circuit of FIG. 8. In block 260, the combined AC feedback signal and the DC feedback signal are combined or integrated with a reference signal VREF, and the resulting signal is fed to the regulator or tuning unit 210 to control the HV output. In FIG. 9, only one reference VREF is mentioned, but alternatively, two references REF and DAC discussed for FIG. 8 may be used.

[0088] Figures 10A and 10B together form a detailed circuit based on the schematic block diagram of Figure 9. Figures 10A and 10B combine to form a single circuit diagram. Signals S1 and S2, which are outputs / inputs from the portion of the circuit shown in Figure 10A, correspond to inputs / outputs to the portion of the circuit shown in Figure 10B.

[0089] In FIG. 10A, a regulated voltage, such as 6500 or 6620V, is illustrated as being provided by a voltage source V1. The signal output from the regulator to the mirror electrode is identified as S1 in FIG. 10A, but with some additional components shown in FIG. 10B, the actual voltage will be slightly different. The regulated voltage may be received from a prescaler as discussed in connection with FIG. 6 and FIG. 7, but is not regulated. Based on the embodiment of FIG. 10A, regulation is performed by a MOSFET transistor M1, an optocoupler U1, a Zener diode D1, and a resistor R1. In the illustrated embodiment, R1 has a value of 10 MΩ, but other values ​​may be used. As mentioned with reference to FIG. 12, additional components may be included to filter the Zener voltage to reduce noise. The input voltage path from V1 is connected to the drain of the transistor and is also connected to a resistor R1. The power source of the transistor is connected to the optocoupler, which is connected to the output line. The resistor R1 is connected to the Zener diode, which is also connected to the output line. A connection is also made between the Zener diode and the gate of the transistor. This configuration is similar to a cascode circuit, which is usually used to minimize the capacitance effect of high-speed transistors. Here, a circuit is used to allow the optocoupler to handle voltages up to about 1500V. The current flow is mostly through the transistor M1 and the optocoupler U1. The current that is allowed to flow through the optocoupler U1 is controlled by a voltage from a feedback loop formed in part by the signal S2 shown as received from the circuit portion shown in FIG. 10B. The resistor R1 and the Zener D1 set the voltage operating point of the transistor, which is approximately fixed but changes slightly with the change in the output current controlled by the optocoupler. The transistor M1 and the optocoupler U1 can be considered as a tuning unit. The resistor R1 and the Zener diode D1 can additionally be considered as part of the tuning unit.

[0090] The optocoupler is used to isolate the feedback loop from HV. The input of the optocoupler works near 0V and the output is HV. The HV potential provided at the transistors M1 and S1 is several kV, for example about 6500 or 6620V. The optocoupler isolates the feedback loop from this HV. The Zener diode D1 provides an approximately fixed point for the operation of the transistors. The other components in FIG. 10A are part of the feedback loop, such as R8, R9, C4, R4 and voltage V3, and will be described after describing FIG. 10B.

[0091] FIG. 10B shows two feedback paths, one for AC and high frequency currents, and the other for DC and low frequency currents. Both paths are connected to the output line to monitor the output voltage. The AC and high frequency paths are coupled to the output line through a capacitor C3, which is equivalent to the capacitors C1 and C1' in FIG. 8 and FIG. 9, respectively. This capacitor suffers from leakage due to dielectric absorption when polarity switching occurs. Following the capacitor C3 is a resistor R6, which forms part of an inverting amplifier formed by an operational amplifier U3 with resistors R15 and R6. The operational amplifier arrangement of U3 also acts as a current-to-voltage converter so that the feedback signal can be transmitted or communicated as a low interference voltage across the circuit board or to another circuit board. A second inverting amplifier arrangement U5 follows U3, which is provided to change the polarity of the signal back to the polarity tapped by C3 from the output line. The AC feedback back path is then coupled by a DC feedback path or a low frequency feedback path at node N1. Resistor R3 is on the path from the output line between node N1 and the output line. R14 and C6 are on the path from operational amplifiers U3 and U5, with capacitor C6 closest to node N1 and R14 in series with C6. Resistor R14 converts the voltage feedback signal back to a current as it passes through the circuit board and approaches the regulator or tuning circuit. C6 and R3 form a high pass filter in one direction, decoupling leakage from capacitor C3 from being carried further into the feedback loop. The filter formed by C6 and R3 also allows low frequency components to pass from the HV output line to the feedback loop (but low frequencies or DC from dielectric absorption in C3 do not pass here). Resistor R3 can be large or a combination of several resistors, such as seven 20MΩ resistors in series. R3 is used to buffer the feedback circuit from the HV on the output line. In principle C6 could also be subject to dielectric absorption and leakage currents, but the low voltage across C6 in the feedback path means that this effect is minor.

[0092] Also connected to node N1 is an operational amplifier U2, connected similarly to A1 in FIG. 8, to buffer or amplify the combined AC and DC feedback voltages, with leakage from HV capacitor C3 filtered out. The feedback voltage, now represented as S2, is fed back to the portion of the circuit shown in FIG. 10A, which will now be described briefly. Also shown on the output line in FIG. 10B are several other components, such as C2, R2, R11, C5, and R10. These represent a mix of filtering and circuit simulation representations used for convenience in simulations such as Spice.

[0093] Returning to FIG. 10A, the combined feedback signal S2 is combined or summed with a reference voltage and input to an integrating amplifier U4. The reference voltage is represented by V3 in the diagram, but can be more complicated than a simple reference, as described in later figures. The voltage from the feedback signal and the voltage from the reference V3 are combined similarly to the voltage combination in amplifier A2 of FIG. 8. Both voltage paths are combined through equal value resistors R8 and R9, here 10 kΩ, so that these voltage paths receive equal weighting in the feedback. Other weightings may be used. U4 sums the combined feedback signal S2 with the reference voltage, and a capacitance C4 across amplifier U4, which may have a value of 10 nF, integrates the signal over a time constant. The integrator configuration is used to create a large amount of gain for low frequencies, allowing for precise regulation. The integrated signal is fed through resistor R4 to the input of optocoupler U1, which controls the current through MOSFET M1 and therefore the voltage on the output line.

[0094] The combination of the optocoupler and large value resistor R3 buffers the feedback circuit from the HV on the output line which may be kV, for example 6500 or 6620 V. This allows the voltage in the feedback circuit to be very low.

[0095] The circuit of Figure 8 is a simplified schematic diagram used to explain the concepts disclosed herein, however, the circuit of Figure 8 can only be used for positive voltages and is shown in this simplified form to explain the principles of how regulation and AC feedback may work.

[0096] 10A and 10B show a more detailed regulator circuit that takes into account the effect of polarity switching on the HV capacitor (C3, C1 or c1') and takes steps to eliminate leakage caused by dielectric absorption. However, a rectifier such as a full bridge rectifier can be built around the tuning unit, i.e., around the regulator transistor Q1 or M1, so that the regulator circuit works for both polarities. FIG. 11 is a schematic diagram showing how such a bridge rectifier can be connected around the regulator transistor Q1 (FIG. 8) or M1 (FIG. 10A). A full bridge rectifier can include four diodes connected in a bridge arrangement. The diodes can be considered as two pairs: bridge diodes BD1 and BD2 that conduct when current flows in the forward direction, and bridge diodes BD3 and BD4 that conduct when current flows in the reverse direction. The input to the bridge rectifier is the unregulated voltage as received from the voltage prescaler, and the output is the regulated voltage as can be supplied to the mirror electrodes of the mass analyzer. The regulator or tuning unit is still controlled by a feedback loop as described herein. In this arrangement, no matter what polarity HV is supplied, current always passes through the transistor in the same direction. A comparator circuit (not shown in FIG. 11) may also be included to detect whether the feedback signal is positive or negative and set the feedback signal to the correct polarity relative to the polarity of HV so that the feedback properly converges the output to the desired level. If the feedback has the wrong polarity, the output will deviate from the desired level.

[0097] FIG. 12 is a circuit diagram of a full bridge rectifier around the regulator transistor. Also shown is an optocoupler U4 and a zener diode D1 controlling the regulator transistor Q1. The diodes of the bridge rectifier are again shown as BD1-BD4. Resistor R1, used in combination with the zener diode D1 to set the operating point of the transistor, is again identified as R1. Several additional components are included in this diagram, such as diode D6, resistor R98 and capacitor C45. These provide additional protection, filtering to eliminate noise in the zener D1, and compatibility for polarity switching. Also shown in FIG. 12 is a pair of series-connected bipolar suppression diodes D12 and D51. Such diodes limit the voltage that can be applied across them. In the embodiment of FIG. 12, each of the pair of diodes limits the voltage across it to 400V, so that the pair of diodes sets the maximum voltage across them to 800V. These diodes are connected in parallel with the bridge rectifiers BD1-BD4 and the transistor regulator arrangement, thus limiting the voltage across them. Other numbers or values ​​of bipolar suppression diodes may be used to provide an appropriate maximum voltage across the bridge rectifier and transistor regulator or tuning unit as required.

[0098] As mentioned above, when the polarity of HV is switched, the polarity of the feedback signal may also need to be switched. Figure 13 is a schematic diagram of a circuit for detecting and switching the polarity of the feedback signal. In block 310, the DC feedback signal and the AC feedback signal are combined. This corresponds to block 250 in Figure 9 and node N1 in Figure 10A. In block 320, the feedback signal, which is a current, is converted to a voltage. This is consistent with Figure 10B. In block 330, the polarity of the feedback signal voltage is detected. In block 350, the feedback voltage V fb is inverted, such as by using an inverting operational amplifier configuration. The feedback voltage V fb13. And the inverted feedback voltage from block 350 is provided as an input to analog switch 360. The analog switch can switch between outputting an inverted feedback voltage and outputting a non-inverted feedback voltage. The signal switched by the analog switch is a low voltage. The switching is used to maintain the feedback signal at the correct polarity for the feedback to converge the HV output to a desired stable value. The switch is controlled by a polarity detector depending on the detected polarity of the feedback signal. For example, if the polarity is negative, the switch can be controlled to output an inverted feedback signal, and if the polarity is positive, a non-inverted feedback signal can be output from switch 360. Alternatively, the feedback switching may be configured the other way around. The output from switch 360 is combined with the VREF signal, such as in block 260 of FIG. 9, and used to control regulator 210. Methods other than those shown in FIG. 13 may be used to detect and switch the polarity of the feedback signal.

[0099] Other functions may be incorporated using circuitry similar to that described for Figure 13. For example, a feedback signal with increased attenuation may be included and / or a discharge detector may be included.

[0100] 14 is a schematic block diagram of how a feedback signal with increased attenuation may be selectively provided. At 410, V resulting from AC feedback is ACA feedback signal such as is received. The signal is directed to an analog switch 440. The signal is also fed into an attenuation unit 420 to generate an attenuated signal. This can be an integrator circuit that integrates over a time constant. The attenuated signal is also fed to a switch 440. A user input received at 430 can be used to control the switch. The switch switches between the attenuated signal and a normal feedback signal based on the user selection. The output of the switch is again combined with the VREF signal and used to control the regulator 210. By using the attenuated signal, the feedback is reduced. Using a similar approach, filters and multiple levels of attenuation can be switched to form the desired feedback signal. By including different types of feedback gain, the feedback can be switched between a very strong feedback that gives better noise performance and a fast mode with less feedback gain that allows for faster settling time.

[0101] FIG. 15 is a circuit diagram of a discharge detector for detecting unwanted discharges in a mass analyzer and / or voltage spikes on the feedback signal. The input signal is the signal from the AC feedback path. That is, the input signal can be that received through HV capacitor C1' in FIG. 9 or C3 and associated resistor R6 in FIG. 10B. The AC signal is first amplified, possibly with some integration or both P and I parts, and then passed to operational amplifier U82 in FIG. 15 to buffer the signal. A network of resistors and capacitors can be connected to form a non-inverting configuration. In this embodiment, on the feedback path, a resistor and a capacitor are connected in parallel and another resistor and a capacitor are connected to ground. These filter the signal and make it in good condition for discharge detection. Multiple stages of a non-inverting amplifier configuration with operational amplifier U82 can be included, but only one stage is shown in FIG. 15. The amplified signal is then fed to a window comparator. The window comparator can have configurable upper and lower trigger levels that can be set by a DAC. The output of the comparator is sent to a counter, such as on an FPGA. A window comparator is used instead of a threshold comparator to have trigger levels for excessive voltage or current for both polarities of operation. The FPGA can count unwanted discharge events and / or the length of time that the discharge occurs and provide a warning to the user, or more preferably, remove or filter out spectra with HV instability. The counter can additionally or alternatively determine the frequency of the discharge to measure how clean the signal is, since a certain level of discharge may be acceptable. The window comparator can be tunable to detect the magnitude of the discharge.

[0102] In connection with FIG. 8, it was mentioned that two voltages, DAC and REF, may be used to provide a reference voltage for controlling the regulator transistors. Although not shown in FIG. 9 and FIG. 10A, these two voltages may also be included in those circuits. The combination of the two voltages, DAC and REF, provides a very stable reference voltage. The same very stable reference voltage may be used across all regulator circuits M1-M4.

[0103] As mentioned above, the reference voltage is derived from two voltages. One reference has a very accurate output (trimmed by the manufacturer) but is too unstable due to drift, noise and temperature dependent variations to provide the required ppm voltage stability required by the current application. The first reference is combined with a second reference which is stable but not accurate. The output voltage of the second reference varies widely from component to component but is very stable, i.e. has low noise, low drift and low temperature dependent variations. To combine the two references into a single stable and accurate reference, a DAC is used. The DAC scales the stable second reference to the same voltage as the accurate first reference. This can be done by logic circuitry in the FPGA firmware. Further details of the very stable and accurate reference are described in the UK patent application published under GB 2591297. Figure 16 shows in more detail how the DAC voltage and the REF voltage are combined with the weighting in the operational amplifier U2, in comparison with Figures 8 and 10A. The arrangement and weighting in the operational amplifier is similar to that shown for the operational amplifier A2 in FIG. 8. The weighting is such that a 10 kΩ resistor feeding the REF signal, compared to a 100 kΩ resistor feeding the DAC signal, means that a very stable REF reference voltage is fed into the operational amplifier, and then the settling value from the DAC is weighted and added with a factor of 1 / 10. This weighting reduces the effects of DAC drift and temperature by a factor of 10. The feedback signal is fed to the operational amplifier with the same weighting as the REF reference. These reference and feedback signals are fed to the operational amplifier configured as a summer. The capacitor across the operational amplifier provides some signal integration. If both proportional and integral parts are required, a resistor can be included. In FIG. 16, resistor R3 is set to zero, so that only integration is provided. The output of the circuit in FIG. 16 is fed to an optocoupler, such as U1 in FIG. 10A, to control the regulator transistor. Op amp U2 in FIG. 16 corresponds to op amp A2 in FIG. 8 and U4 in FIG. 10A.

[0104] Those skilled in the art will readily appreciate that various modifications and changes may be made to the methods and apparatus described above. Modifications may be made without departing from the scope of the appended claims. For example, different components may be used, the order of elements in a circuit may be changed, etc.

[0105] Embodiments of the present invention are described in the following clauses. Clause A1. A multi-reflection time-of-flight (MR-ToF) mass analyzer for a mass spectrometer, the MR-ToF mass analyzer comprising a plurality of mirror electrodes, a first mirror electrode configured to operate at a first polarity and one or more second mirror electrodes configured to operate at a second polarity opposite the first polarity, the mass analyzer configured for polarity switching, a first power supply configured to provide a first HV supply, a second power supply configured to provide a second HV supply, at least two HV switches, and one or more first and one or more second regulators each coupled to the one or more second HV switches, each of the one or more second regulators configured to provide a potential to a respective second mirror electrode, wherein the first HV switch and the second HV switch are configured to alternate polarities of the potentials supplied to the first regulator and the one or more second regulators.

[0106] Clause A2. An MR-ToF mass analyzer as described in clause A1, wherein the first power supply is configured in a first bridge configuration and one or more first HV switches are arranged in the first bridge configuration to reverse a coupling of the first power supply in the first bridge configuration to swap the polarity of the potential output to the first regulator, and the second power supply is configured in a second bridge configuration and one or more second HV switches are arranged in the second bridge configuration to reverse a coupling of the second power supply in the second bridge configuration to swap the polarity of the potential output to the one or more second regulators.

[0107] Clause A3. The MR-ToF of clause A2, wherein the first bridge configuration is an H-bridge arrangement, the one or more first HV switches include four first HV switches, the first power supply is coupled to the center of the H-bridge arrangement, and the four first HV switches are switchable in two pairs to define a first circuit path coupling the first power supply to supply a positive HV voltage to the first regulator and a second circuit path coupling the first power supply to supply a negative HV voltage to the first regulator.

[0108] Clause A4. The MR-ToF of clause A2 or A3, wherein the second bridge configuration is an H-bridge arrangement, the one or more second HV switches comprising four second HV switches, the second power supply coupled to the centre of the H-bridge arrangement, and the four second HV switches switchable in two pairs to define a third circuit path coupling the second power supply to provide a positive HV voltage to the one or more second regulators, and a fourth circuit path coupling the second power supply to provide a negative HV voltage to the one or more second regulators.

[0109] Clause A5. The MR-ToF of clause A3 or clause A4, wherein the circuit path is further coupled to ground or virtual ground.

[0110] Clause A6. The MR-ToF of any one of clauses A3 to A5, wherein the HV switch of the bridge arrangement is configured to be switchable to decouple the power supply from the regulator.

[0111] Clause A7. The MR-ToF of any one of clauses A3 to A5, wherein the HV switch of the bridge arrangement is configured to be switchable to discharge the regulator to ground or to virtual ground.

[0112] Clause A8. An MR-ToF mass analyzer as described in any one of clauses A1 to A7, wherein the first power supply is configured to provide a positive HV supply and the second power supply is configured to provide a negative HV supply, the at least two switches include a first HV switch and a second HV switch, the first HV switch and the second HV switch each having an output, the first regulator is coupled to the output from the first HV switch, and one or more second regulators are each coupled to the output from the second HV switch, and the first HV switch and the second HV switch are configured to switch between the first power supply and the second power supply to swap polarities of the potentials at the first mirror electrode and the second mirror electrode.

[0113] Clause A9. An MR-ToF mass analyzer as described in any one of clauses A1 to A8, comprising a first voltage prescaler arranged to receive a positive HV supply or a negative HV supply from the first switch and configured to provide an HV output having a reduced voltage magnitude to the first regulator.

[0114] Clause A10. An MR-ToF mass analyzer as described in any one of clauses A1 to A9, comprising a second voltage prescaler arranged to receive a positive HV supply or a negative HV supply from the second switch and configured to provide one or more respective HV outputs having reduced voltage magnitudes to one or more second regulators.

[0115] Clause A11. An MR-ToF mass analyzer as described in clause A9 or clause A10, wherein the first voltage prescaler and / or the second voltage prescaler comprises a chain of bipolar diodes for stepping down the voltage in magnitude from the voltage supplied by the positive HV supply and / or the negative HV supply to a reduced voltage magnitude.

[0116] Clause A12. The MR-ToF mass analyzer of clause A11, wherein the second voltage prescaler is arranged to provide at least two HV outputs, a first HV output being tapped off between a first bipolar diode group of the chain of bipolar diodes and a second bipolar diode group of the chain of bipolar diodes to step down the voltage to a first voltage magnitude, and a second HV output being tapped off between a second bipolar diode group of the chain of bipolar diodes and a third bipolar diode group of the chain of bipolar diodes, or between the second bipolar diode group of the chain of bipolar diodes and one or more resistors to step down the voltage to a second voltage magnitude less than the first voltage magnitude.

[0117] Clause A13. The MR-ToF analyzer of clause A12, wherein the second voltage prescaler is arranged to provide at least three HV outputs, the second HV output being tapped off between the second bipolar diode group of the chain of bipolar diodes and the third bipolar diode group of the chain of bipolar diodes to step down the voltage to a second voltage magnitude less than the first voltage magnitude, and the third HV output being tapped off between the third bipolar diode group of the chain of bipolar diodes and the fourth bipolar diode group of the chain of bipolar diodes, or between the third bipolar diode group of the chain of bipolar diodes and the one or more resistors to step down the voltage to a third voltage magnitude less than the second voltage magnitude.

[0118] Clause A14. The MR-ToF analyzer of any one of clauses A1 to A13, comprising three second mirror electrodes.

[0119] Clause B15. A regulator for supplying a regulated HV voltage to an electrode of a mass analyzer of a mass spectrometer, the regulator configured to accept an HV voltage of positive or negative polarity, the regulator comprising: an input for receiving the HV voltage from a power supply; an output for supplying the regulated HV voltage to the electrode; one or more reference inputs for receiving one or more reference voltages; and a feedback circuit coupled between the output and a tuning unit, the feedback circuit being arranged to monitor one or more voltages indicative of the regulated HV voltage supplied at the output, the feedback circuit comprising a capacitor, a first feedback path configured to monitor an AC coupled current on the output and provide a first feedback signal, and a second feedback path configured to monitor a DC level on the output and provide a second feedback signal, the tuning unit adjusting the HV output voltage based on the one or more reference voltages and the first and second feedback signals.

[0120] Clause B16. The regulator of clause B15, wherein the tuning unit comprises a MOSFET connected between the input and the output.

[0121] Clause B17. The regulator of clause B15 or clause B16, wherein the first feedback path is configured to filter out DC current and / or low frequency leakage current from the capacitor when the polarity of the HV voltage is switched.

[0122] Clause B18. The regulator of any one of clauses B15 to B17, wherein the regulator is configured to combine the first feedback signal and the second feedback signal into a combined feedback signal and provide the combined feedback signal to the tuning unit.

[0123] Clause B19. The regulator of any one of clauses B15 to B18, further comprising a summing integrator configured to sum one or more reference voltages with one or more feedback signals and integrate the sum.

[0124] Clause B20. The regulator of clause B19, wherein the one or more reference voltages and the one or more feedback signals are each scaled relative to one another before summing.

[0125] Clause B21. The regulator of any one of clauses B15 to B20, further comprising a bridge rectifier, wherein the tuning unit is coupled within the bridge rectifier such that current from the input to the output flows in the same direction through the tuning unit regardless of whether the HV output signal is positive or negative polarity.

[0126] Clause B22. The regulator of clause B21, wherein the feedback circuit is protected from HV by being coupled to the tuning unit through an isolation coupler, such as an optocoupler.

[0127] Clause B23. The regulator of any one of clauses B15 to B22, further comprising one or more voltage suppression devices connected across the tuning unit to limit the voltage dropped across the tuning unit to a maximum predetermined voltage.

[0128] Clause B24. The regulator of clause B23, wherein the one or more voltage suppression devices are bipolar suppression diodes.

[0129] Clause B25. The regulator according to clause B23 or B24, wherein the maximum predetermined voltage is less than or equal to 1000V.

[0130] Clause B26. The regulator described in any one of clauses B15 to B25, wherein the one or more reference voltages are generated from a reference voltage unit comprising a first voltage reference power supply configured to provide a first reference voltage and a second voltage reference power supply configured to provide a second reference voltage, wherein the first voltage reference power supply is configured to provide a more accurate voltage output than the second voltage reference power supply and the second voltage reference power supply is configured to provide a more stable voltage output than the first voltage reference power supply.

[0131] Clause B27. The regulator of clause B26, further comprising a digital-to-analog converter (DAC) for scaling an output from the second voltage reference to match an output from the first voltage reference.

[0132] Clause B28. The regulator of any one of clauses B18 or B19 to B27 when dependent on clause B18, further comprising a polarity detector configured to detect whether the regulated HV voltage at the output is positive or negative polarity, or whether the combined feedback signal is positive or negative polarity, or whether the first feedback signal is positive or negative polarity, and to reverse the polarity of the combined feedback signal when the HV voltage switches polarity.

[0133] Clause B29. The regulator of clause B28, wherein the polarity detector comprises an analog switch that switches between the combined feedback signal and the polarity-inverted combined feedback signal, and the analog switch is triggered to switch between the polarity-inverted combined feedback signal and the combined feedback signal when the regulated HV output switches polarity.

[0134] Clause B30. The regulator of any one of clauses B18-B29, further comprising a discharge detection circuit for detecting a discharge of the HV output voltage based on detecting an increased current flow through the regulator from the combined feedback signal.

[0135] Clause B31. The regulator of clause B30, wherein the discharge detection circuit comprises a window comparator for detecting whether a voltage based on the combined feedback signal is outside a predetermined range.

[0136] Clause B32. The regulator of clause B30 or B31, further comprising an output device for alerting a user that a discharge has occurred when a voltage based on the combined feedback signals is outside a predetermined range.

[0137] Clause B33. The regulator of any one of clauses B18 to B32, further comprising a feedback attenuation circuit having a switch for receiving an input to select between a first combined feedback signal and a second combined feedback signal, the first combined feedback signal and the second combined feedback signal being generated from the combined feedback signal, the second signal having a greater attenuation than the first signal, and the selected one of the first combined feedback signal and the second combined feedback signal being provided to the tuning unit.

[0138] Clause C34. An MR-ToF analyzer according to any one of clauses A1 to A14, wherein either the first regulator or the one or more second regulators comprises a regulator according to any one of clauses B15 to B33.

[0139] Clause D35. A mass spectrometer comprising an MR-ToF analyzer according to any one of clauses A1 to A14 or C34 and / or a regulator according to any one of clauses B15 to B33.

Claims

1. 1. A multi-reflecting time-of-flight (MR-ToF) mass analyzer for a mass spectrometer, the MR-ToF mass analyzer comprising a plurality of mirror electrodes, a first mirror electrode configured to operate at a first polarity and one or more second mirror electrodes configured to operate at a second polarity opposite the first polarity, the mass analyzer configured for polarity switching; a first power source configured to provide a first HV supply; a second power source configured to provide a second HV supply; At least two HV switches; a first regulator coupled to one or more first HV switches, the first regulator configured to provide a potential to the first mirror electrode; one or more second regulators each coupled to the one or more second HV switches, each of the one or more second regulators configured to provide a potential to a respective second mirror electrode; The MR-ToF mass analyzer, wherein the first HV switch and the second HV switch are configured to switch the polarity of the potentials supplied to the first regulator and the one or more second regulators.

2. the first power sources are configured in a first bridge configuration, and the one or more first HV switches are arranged in the first bridge configuration to reverse the coupling of the first power sources in the first bridge configuration to swap the polarity of the potential output to the first regulator; 2. The MR-ToF mass analyzer of claim 1, wherein the second power supplies are configured in a second bridge configuration, and the one or more second HV switches are positioned in the second bridge configuration to reverse the coupling of the second power supplies in the second bridge configuration to swap the polarity of the potential output to the one or more second regulators.

3. 3. The MR-ToF of claim 2, wherein the first bridge configuration is an H-bridge arrangement, the one or more first HV switches comprise four first HV switches, the first power source is coupled to a center of the H-bridge arrangement, and the four first HV switches are switchable in two pairs to define a first circuit path coupling the first power source to provide a positive HV voltage to the first regulator and a second circuit path coupling the first power source to provide a negative HV voltage to the first regulator.

4. 4. The MR-ToF of claim 2 or 3, wherein the second bridge configuration is an H-bridge arrangement, the one or more second HV switches comprise four second HV switches, the second power source is coupled to a center of the H-bridge arrangement, and the four second HV switches are switchable in two pairs to define a third circuit path coupling the second power source to provide a positive HV voltage to the one or more second regulators and a fourth circuit path coupling the second power source to provide a negative HV voltage to the one or more second regulators.

5. The MR-ToF of claim 3 , wherein the circuit path is further coupled to ground or a virtual ground.

6. The MR-ToF of claim 3 , wherein the HV switches in the bridge arrangement are configured to be switchable to decouple the power source from the regulator and / or to discharge the regulator to ground or virtual ground.

7. the first power source is configured to provide a positive HV supply and the second power source is configured to provide a negative HV supply; the at least two switches include a first HV switch and a second HV switch, the first HV switch and the second HV switch each having an output; 2. The MR-ToF mass analyzer of claim 1, wherein the first regulator is coupled to the output from the first HV switch, the one or more second regulators are each coupled to the output from the second HV switch, and the first and second HV switches are configured to switch between the first and second power supplies to swap the polarity of the potentials at the first and second mirror electrodes.

8. a first voltage prescaler and / or a second voltage prescaler; the first voltage prescaler is disposed to receive the positive HV supply or the negative HV supply from the first switch and configured to provide an HV output having a reduced voltage magnitude to the first regulator; 2. The MR-ToF mass analyzer of claim 1, wherein the second voltage prescaler is arranged to receive the positive HV supply or the negative HV supply from the second switch and configured to provide one or more respective HV outputs having reduced voltage magnitudes to the one or more second regulators.

9. 9. The MR-ToF mass analyzer of claim 8, wherein the first and / or second voltage prescaler comprises a chain of bipolar diodes for stepping down the voltage in magnitude from the voltage provided by the positive HV supply and / or the negative HV supply to the reduced voltage magnitude.

10. 10. The MR-ToF mass analyzer of claim 9, wherein the second voltage prescaler is arranged to provide at least two HV outputs, a first HV output tapped off between a first bipolar diode group of the bipolar diode chain and a second bipolar diode group of the bipolar diode chain to step down the voltage to a first voltage magnitude, and a second HV output tapped off between the second bipolar diode group of the bipolar diode chain and a third bipolar diode group of the bipolar diode chain, or between the second bipolar diode group of the bipolar diode chain and one or more resistors to step down the voltage to a second voltage magnitude less than the first voltage magnitude.

11. 11. The MR-ToF analyzer of claim 10, wherein the second voltage prescaler is arranged to provide at least three HV outputs, the second HV output being tapped off between the second bipolar diode group of the bipolar diode chain and a third bipolar diode group of the bipolar diode chain to step down the voltage to the second voltage magnitude less than the first voltage magnitude, and the third HV output being tapped off between the third bipolar diode group of the bipolar diode chain and a fourth bipolar diode group of the bipolar diode chain or between the third bipolar diode group of the bipolar diode chain and one or more resistors to step down the voltage to a third voltage magnitude less than the second voltage magnitude.

12. 1. A regulator for providing a regulated HV voltage to an electrode of a mass analyzer of a mass spectrometer, the regulator configured to receive a HV voltage of positive polarity or negative polarity, the regulator comprising: an input for receiving an HV voltage from a power source; an output for supplying a regulated HV voltage to the electrodes; one or more reference inputs for receiving one or more reference voltages; a tuning unit for adjusting the HV voltage provided at the output; a feedback circuit coupled between the output and the tuning unit, the feedback circuit arranged to monitor one or more voltages indicative of the regulated HV voltage provided at the output, the feedback circuit comprising a capacitor, a first feedback path configured to monitor an AC coupled current on the output and provide a first feedback signal, and a second feedback path configured to monitor a DC level on the output and provide a second feedback signal; The tuning unit adjusts the HV output voltage based on the one or more reference voltages and the first and second feedback signals.

13. 13. The regulator of claim 12, wherein the tuning unit comprises a MOSFET connected between an input and the output.

14. 14. The regulator of claim 12 or 13, wherein the first feedback path is configured to filter out DC current and / or low frequency leakage current from the capacitor when the polarity of the HV voltage is switched.

15. The regulator of claim 12 , wherein the regulator is configured to combine the first feedback signal and the second feedback signal into a combined feedback signal and provide the combined feedback signal to the tuning unit.

16. 13. The regulator of claim 12, further comprising a bridge rectifier, the tuning unit being coupled within the bridge rectifier such that current flows in the same direction from the input to the output through the tuning unit regardless of whether an HV output signal is of positive or negative polarity.

17. 13. The regulator of claim 12, further comprising one or more voltage suppression devices connected across the tuning unit to limit the voltage dropped across the tuning unit to a maximum predetermined voltage.

18. 20. The regulator of claim 17, wherein the one or more voltage suppression devices are bipolar suppression diodes.

19. The MR-ToF analyzer of claim 1 , wherein either the first regulator or the one or more second regulators include a regulator according to claim 12 .

20. A mass spectrometer comprising the regulator of claim 12.

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