Circuit element

The circuit element design with varying conductivity structures and a dielectric film achieves stable and precise electrical characteristics, addressing the challenge of maintaining small size and wide resistance value ranges in existing circuit elements.

JP2025115140APending Publication Date: 2025-08-06KK TOSHIBA

Patent Information

Application Number
JP2024009506
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-01-25
Publication Date
2025-08-06

AI Technical Summary

Technical Problem

Existing circuit elements face challenges in achieving improved performance, particularly in maintaining small size while achieving a wide range of desired electrical resistance values and stable electrical characteristics.

Method used

A circuit element design incorporating a first conductive member, a second conductive member, a first layer with varying conductivity structures, and a dielectric film, where the first layer is positioned between the conductive members and includes structures aligned in a specific plane, allowing for precise control of resistance values.

Benefits of technology

The design enables a small-sized circuit element with stable and highly accurate electrical characteristics by accurately controlling resistance values through the area ratio and thickness of the varying conductivity structures.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a circuit element that can improve its characteristics.SOLUTION: According to an embodiment, a circuit element includes a first conductive member, a second conductive member, a first layer, and a dielectric film. The first layer is between the first conductive layer and the second conductive layer. The first layer includes a first structure and a plurality of second structures. The plurality of second structures are arranged side by side on a first plane intersecting a first direction from the first conductive member to the second conductive member. At least part of the first structure is between the plurality of second structures on the first plane. A second conductivity of the plurality of second structures is different from a first conductivity of the first structure. The first layer is electrically connected to the second conductive member. The dielectric film is between the first conductive member and the first layer.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] FIELD OF THE INVENTION An embodiment of the present invention relates to a circuit element. [Background technology]

[0002] For example, there are circuit elements including capacitors and resistors, etc. Improvement of the characteristics of circuit elements is desired. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 57-113210 Summary of the Invention [Problem to be solved by the invention]

[0004] Embodiments of the present invention provide circuit elements that allow for improved performance. [Means for solving the problem]

[0005] According to an embodiment of the present invention, a circuit element includes a first conductive member, a second conductive member, a first layer, and a dielectric film. The first layer is between the first conductive member and the second conductive member. The first layer includes a first structure and a plurality of second structures. The plurality of second structures are aligned in a first plane intersecting a first direction from the first conductive member to the second conductive member, and at least a portion of the first structure is located between the plurality of second structures in the first plane. The second conductivity of the plurality of second structures is different from the first conductivity of the first structure. The first layer is electrically connected to the second conductive member. The dielectric film is located between the first conductive member and the first layer. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating a circuit element according to the first embodiment. [Figure 2] FIG. 2 is a schematic plan view illustrating a circuit element according to the first embodiment. [Figure 3] FIG. 3 is a schematic cross-sectional view illustrating a circuit element according to the first embodiment. [Figure 4] FIG. 4 is a schematic perspective view illustrating a circuit element according to the first embodiment. [Figure 5] FIG. 5 is a schematic cross-sectional view illustrating a circuit element according to the first embodiment. [Figure 6] FIG. 6 is a schematic perspective view illustrating a circuit element according to the second embodiment. [Figure 7] FIG. 7 is a schematic plan view illustrating a circuit element according to the second embodiment. [Figure 8] 8(a) to 8(d) are schematic plan views illustrating circuit elements according to the second embodiment. [Figure 9] FIG. 9 is a schematic cross-sectional view illustrating a circuit element according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios may be different depending on the drawing. In this specification and in each drawing, elements similar to those previously described with reference to the previous drawings are designated by the same reference numerals, and detailed descriptions thereof will be omitted where appropriate.

[0008] (First embodiment) FIG. 1 is a schematic cross-sectional view illustrating a circuit element according to the first embodiment. FIG. 2 is a schematic plan view illustrating a circuit element according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a circuit element according to the first embodiment. FIG. 4 is a schematic perspective view illustrating a circuit element according to the first embodiment. In FIG. 4, for clarity, several elements are drawn separated from one another.

[0009] 1 and 4, a circuit element 110 according to the embodiment includes a first conductive member 51, a second conductive member 52, a first layer 10, and a dielectric film 30. The first layer 10 is provided between the first conductive member 51 and the second conductive member 52. The dielectric film 30 is provided between the first conductive member 51 and the first layer 10.

[0010] A first direction D1 from the first conductive member 51 to the second conductive member 52 is defined as the Z-axis direction. A direction perpendicular to the Z-axis direction is defined as the X-axis direction. A direction perpendicular to the Z-axis direction and the X-axis direction is defined as the Y-axis direction.

[0011] The first layer 10 includes a first structure 11 and a plurality of second structures 12. The plurality of second structures 12 are arranged on a first plane PL1 that intersects with a first direction D1. The first plane PL1 is, for example, an XY plane. In FIG. 4, the plurality of second structures 12 are depicted separated from the first structures 11.

[0012] At least a portion of the first structure 11 is located between the plurality of second structures 12 in the first plane PL1. As shown in FIG. 1 , in this example, the first structure 11 includes a first partial region 11a and a second partial region 11b. The first partial region 11a is located between the plurality of second structures 12 in the first plane PL1. The second partial region 11b is located between the dielectric film 30 and the plurality of second structures 12 in the first direction D1. A portion of the first partial region 11a may be provided around the plurality of second structures 12 in the first plane PL1.

[0013] The material of the plurality of second structures 12 is different from the material of the first structures 11. The second conductivity of the plurality of second structures 12 is different from the first conductivity of the first structures 11. In one example, the second conductivity is higher than the first conductivity. For example, the first structures 11 include silicon, and the second structures 12 include metal. The first structures 11 may be, for example, a silicon substrate. For example, the plurality of second structures 12 may be formed by forming a plurality of holes (or trenches, etc.) in the silicon substrate and filling the holes with a conductive material.

[0014] In an embodiment, the second conductivity may be lower than the first conductivity.

[0015] The first layer 10 is electrically connected to the second conductive member 52. For example, a capacitor is formed by the first conductive member 51, the dielectric film 30, and the first layer 10. The first conductive member 51, the dielectric film 30, and the first layer 10 function as a capacitor element. The first layer 10 functions as a resistor element. For example, the electric circuit between the first conductive member 51 and the second conductive member 52 includes a capacitor element and a resistor element. The capacitor element and the resistor element are connected in series.

[0016] In the embodiment, a capacitor element and a resistor element are stacked in the Z-axis direction. This allows a small-sized circuit element to be obtained. In the embodiment, the first layer 10 includes a first structure 11 and a plurality of second structures 12. For example, by changing the area ratio between these, a target resistance value can be obtained accurately and stably. Stable and highly accurate electrical characteristics can be obtained. According to the embodiment, a circuit element with improved characteristics can be provided.

[0017] For example, when the first layer 10 does not include a plurality of second structures 12, the resistance value of the first layer 10 depends on the physical properties of the material of the first structures 11, the thickness and size of the first structures 11, etc. It is not easy to obtain the desired electrical resistance over a wide range while maintaining a small size.

[0018] In contrast to this, in the embodiment, a plurality of types of structures with different conductivities are applied to the first layer 10. For example, the resistance value of the first layer 10 can be obtained with high precision by the ratio (area ratio) of the area of the plurality of second structures 12 to the area of the first structure 11. For example, the resistance value of the first layer 10 can be accurately controlled by the thickness of the plurality of second structures 12.

[0019] 3 illustrates a cross section of the first layer 10 along the XY plane. As shown in FIG. 3, in this example, at least some of the second structures 12 are aligned along a second direction D2. The second direction D2 intersects with the first direction D1. The second direction D2 is, for example, the X-axis direction.

[0020] 3, the pitch in the second direction D2 of at least some of the multiple second structures 12 is defined as a second pitch p2. In the embodiment, the second pitch p2 is, for example, not less than 100 μm and not more than 500 μm.

[0021] In the embodiment, the length x12 (see FIG. 3) of one of the plurality of second structures 12 in the second direction D2 may be, for example, not less than 1 μm and not more than 50 μm.

[0022] 3, some of the multiple second structures 12 are aligned along a third direction D3. The third direction D3 intersects with a plane including the first direction D1 and the second direction D2. The pitch of some of the multiple second structures 12 in the third direction D3 is defined as a third pitch p3. In an embodiment, the third pitch p3 is, for example, not less than 100 μm and not more than 500 μm.

[0023] In the embodiment, the third direction length y12 (see FIG. 3) of one of the plurality of second structures 12 in the third direction D3 may be, for example, not less than 1 μm and not more than 300 μm.

[0024] In this example, the third direction length y12 of one of the multiple second structures 12 in the third direction D3 is longer than the second direction length x12 of one of the multiple second structures 12 in the second direction D2. In the embodiment, the relationship in magnitude between the second direction length x12 and the third direction length y12 is arbitrary. The second direction length x12 may be the same as the third direction length y12.

[0025] As shown in FIG. 1 , the length of one of the multiple second structures 12 in the first direction D1 is defined as the second structure thickness t12. The length of the first structure 11 in the first direction D1 is defined as the first structure thickness t11. The second structure thickness t12 is greater than 0 and, for example, is smaller than the first structure thickness t11. The ratio of the second structure thickness t12 to the first structure thickness t11 is, for example, not less than 0.01 and less than 1. This ratio may be, for example, not less than 0.2 and not more than 0.8.

[0026] In one example, the first structure thickness t11 is 100 μm or more and 500 μm or less, the second structure thickness t12 is 10 μm or more and 200 μm or less, and the thickness t11b of the second partial region 11b in the first direction D1 may be, for example, 90 μm or more and 490 μm or less.

[0027] In the embodiment, the first conductive member 51 and the second conductive member 52 may include a metal, which may include at least one selected from the group consisting of Al, Cu, silver, and gold.

[0028] The dielectric film 30 contains silicon and at least one selected from the group consisting of oxygen and nitrogen. The dielectric film 30 may include, for example, a stacked film of a silicon oxide film and a silicon nitride film.

[0029] 1, the circuit element 110 may further include an electrode 51E. The electrode 51E is electrically connected to the first conductive member 51. The first conductive member 51 is provided between the electrode 51E and the dielectric film 30. The electrode 51E functions as a terminal.

[0030] FIG. 5 is a schematic cross-sectional view illustrating a circuit element according to the first embodiment. 5, in the circuit element 111 according to the embodiment, the first conductive member 51 includes a base portion 51b and a plurality of protrusions 51p. Except for this, the configuration of the circuit element 111 may be the same as the configuration of the circuit element 110.

[0031] In the circuit element 111, the multiple protrusions 51p are connected to the base portion 51b. The multiple protrusions 51p protrude from the base portion 51b toward the second conductive member 52. In this example, at least a portion of the first structure 11 is located between the multiple protrusions 51p.

[0032] The side surfaces of the multiple protrusions 51p face the first structure 11. This increases the area over which the first conductive member 51 faces the first layer 10. A large capacitance is obtained.

[0033] As shown in FIG. 1, at least some of the multiple protrusions 51p may be aligned along a second direction D2 that intersects with the first direction D1.

[0034] In the embodiment, the length of one of the plurality of protrusions 51p in the third direction D3 may be longer than the length x51p of one of the plurality of protrusions 51p in the second direction D2. At least some of the plurality of protrusions 51p may be, for example, striped.

[0035] In this embodiment, the length t51p (see FIG. 5) of one of the plurality of protrusions 51p in the first direction D1 may be, for example, 10 μm or more and 200 μm or less, thereby obtaining a large capacitance.

[0036] As shown in Figure 5, the pitch of at least some of the multiple protrusions 51p in the second direction D2 is defined as a first pitch p1. It is preferable that the first pitch p1 is small. This makes it easier to obtain a large capacitance even with a small size. In one example, the first pitch p1 is 1 μm or more and 5 μm or less.

[0037] The pitch (for example, first pitch p1) of the plurality of protrusions 51p is preferably smaller than the pitch (second pitch p2) of the plurality of second structures 12 already described. This makes it easier to obtain a large capacitance.

[0038] In the embodiment, for example, the second pitch p2 is at least twice the first pitch p1, and may be at least ten times the first pitch p1.

[0039] As will be described later, the second conductive member 52 may include a plurality of independent regions. A large pitch for the plurality of second structures 12 stabilizes the positional relationship (alignment) between the plurality of independent regions and the plurality of second structures 12. This makes it easier to obtain stable characteristics.

[0040] For example, the second pitch p2 is larger than the first pitch p1, and the third pitch p3 is larger than the first pitch p1.

[0041] As shown in FIG. 5, the circuit element 111 may further include an intermediate layer 13. The intermediate layer 13 is located between the dielectric film 30 and the first layer 10. The intermediate layer 13 includes a first element and silicon. The first element includes at least one element selected from the group consisting of phosphorus, arsenic, antimony, phosphorus, and phosphorus. The intermediate layer 13 includes, for example, silicon containing impurities. The provision of the intermediate layer 13 stabilizes the connection between the first layer 10 and the dielectric film 30. When the first conductive member 51 includes multiple protrusions 51p, a portion of the intermediate layer 13 is provided between one of the multiple protrusions 51p and another of the multiple protrusions 51p. The intermediate layer 13 may be provided in the circuit element 110 illustrated in FIG. 1.

[0042] (Second embodiment) FIG. 6 is a schematic perspective view illustrating a circuit element according to the second embodiment. FIG. 7 is a schematic plan view illustrating a circuit element according to the second embodiment. In FIG. 6, for clarity, several elements are drawn separated from one another.

[0043] 6, the circuit element 120 according to the embodiment also includes a first conductive member 51, a second conductive member 52, a first layer 10, and a dielectric film 30. In the circuit element 120, the second conductive member 52 includes a plurality of regions (such as a first region 52a and a second region 52b). The remaining configuration of the circuit element 120 may be similar to that of the circuit element 110 or the circuit element 111.

[0044] In the circuit element 120, the multiple regions of the second conductive member 52 are spaced apart from one another. For example, the second region 52b is spaced apart from the first region 52a. The multiple regions may further include a third region 52c and a fourth region 52d, etc.

[0045] 7, the first region 52a overlaps, in the first direction D1, with the first portions 12a of the plurality of second structures 12. The second region 52b overlaps, in the first direction D1, with the second portions 12b of the plurality of second structures 12.

[0046] For example, when using the circuit element 120, the first region 52a may be used and the second region 52b may not be used. This allows a desired resistance value to be obtained. The region of the second conductive member 52 to be used may be selected depending on the desired characteristics. This allows a convenient circuit element to be provided.

[0047] In the embodiment, it is preferable that the first region 52a does not overlap with the second portion 12b in the first direction D1. It is also preferable that the second region 52b does not overlap with the first portion 12a in the first direction D1. This prevents the first region 52a and the second region 52b from bonding together through some of the second structures 12. This prevents instability in the resistance value caused by bonding, and achieves highly accurate characteristics.

[0048] For example, the region between the first region 52a and the second region 52b overlaps with the first partial region 11a (see, for example, FIG. 1) in the first direction D1.

[0049] The first area of the first region 52a may be different from the second area of the second region 52b in the circuit element 120. By selectively using these regions, the variety of resistance values that can be obtained increases.

[0050] In the circuit element 120, the second conductive member 52 may further include a third region 52c. The third region 52c is separated from the first region 52a and the second region 52b. The third region 52c overlaps with the third portions 12c of the plurality of second structures 12 in the first direction D1.

[0051] For example, it is preferable that the third region 52c does not overlap with the first portion 12a in the first direction D1. It is preferable that the third region 52c does not overlap with the second portion 12b in the first direction D1. It is preferable that the first region 52a does not overlap with the third portion 12c in the first direction D1. It is preferable that the second region 52b does not overlap with the third portion 12c in the first direction D1.

[0052] For example, the region between the first region 52a and the second region 52b, the region between the first region 52a and the third region 52c, and the region between the second region 52b and the third region 52c overlap with the first partial region 11a in the first direction D1.

[0053] For example, the first area of the first region 52a may be different from the second area of the second region 52b, the third area of the third region 52c may be different from the first area, and the third area may be different from the second area.

[0054] The second conductive member 52 may further include a fourth region 52d. The fourth region 52d overlaps with the fourth portions 12d of the plurality of second structures 12 in the first direction D1.

[0055] 8(a) to 8(d) are schematic plan views illustrating circuit elements according to the second embodiment. 8(a), the first region 52a may be disposed around the second region 52b, the second region 52b may be disposed around the third region 52c, and the third region 52c may be disposed around the fourth region 52d.

[0056] Like the circuit element 122 according to the embodiment shown in FIG. 8(b), the regions may be aligned along the second direction D2 and the third direction D3.

[0057] Like the circuit element 123 according to the embodiment shown in FIG. 8(c), a plurality of regions may be arranged along the direction in which the first layer 10 extends.

[0058] Like the circuit element 124 according to the embodiment shown in FIG. 8(d), a plurality of regions may be arranged in a direction intersecting the direction in which the first layer 10 extends.

[0059] Like the circuit element 123 and the circuit element 124, the number of regions in the second conductive member 52 may be five or more.

[0060] FIG. 9 is a schematic cross-sectional view illustrating a circuit element according to the second embodiment. 9, in a circuit element 125 according to the embodiment, a first conductive member 51 includes a base portion 51b and a plurality of protrusions 51p. The remaining configuration of the circuit element 125 may be similar to that of, for example, the circuit element 120. For example, in the circuit element 125, the second conductive member 52 includes a plurality of regions (such as a first region 52a and a second region 52b). A circuit element capable of improving characteristics can be provided.

[0061] The embodiments may include the following technical solutions. (Technical proposal 1) a first conductive member; A second conductive member; a first layer between the first conductive member and the second conductive member, the first layer including a first structure and a plurality of second structures, the plurality of second structures being aligned in a first plane intersecting a first direction from the first conductive member to the second conductive member, at least a portion of the first structure being located between the plurality of second structures in the first plane, second conductivity of the plurality of second structures being different from the first conductivity of the first structure, and the first layer being electrically connected to the second conductive member; a dielectric film between the first conductive member and the first layer; A circuit element comprising:

[0062] (Technical proposal 2) the first conductive member, the dielectric film, and the first layer function as a capacitor element; The circuit element described in Technical Solution 1, wherein the first layer functions as a resistive element.

[0063] (Technical proposal 3) The circuit element according to Technical Solution 1 or 2, wherein the second conductivity is higher than the first conductivity.

[0064] (Technical proposal 4) the first structure includes silicon; The circuit element according to any one of Technical Schemes 1 to 3, wherein the second structure includes a metal.

[0065] (Technical proposal 5) the first structure includes a first partial region and a second partial region; the first partial region is located between the plurality of second structures on the first plane, The circuit element according to any one of Technical Solutions 1 to 4, wherein the second partial region is located between the dielectric film and the plurality of second structures in the first direction.

[0066] (Technical proposal 6) the first conductive member includes a base portion and a plurality of protrusions; the plurality of protrusions are connected to the base; the plurality of protrusions protrude from the base portion toward the second conductive member, The circuit element according to Technical Solution 5, wherein at least a portion of the first structure is located between the plurality of protrusions.

[0067] (Technical proposal 7) A circuit element described in Technical Solution 6, wherein at least some of the multiple protrusions are aligned along a second direction that intersects with the first direction.

[0068] (Technical proposal 8) a length of one of the plurality of protrusions in the third direction is longer than a length of the one of the plurality of protrusions in the second direction; The circuit element described in Technical Solution 7, wherein the third direction intersects with a plane including the first direction and the second direction.

[0069] (Technical proposal 9) At least some of the second structures are aligned along the second direction, A circuit element as described in Technical Solution 7, wherein a first pitch of at least some of the plurality of protrusions in the second direction is smaller than a second pitch of at least some of the plurality of second structures in the second direction.

[0070] (Technical proposal 10) The circuit element according to Technical Solution 9, wherein the second pitch is at least twice the first pitch.

[0071] (Technical proposal 11) the first pitch is equal to or greater than 1 μm and equal to or less than 5 μm, The circuit element according to Technical Solution 9 or 10, wherein the second pitch is 100 μm or more and 500 μm or less.

[0072] (Technical proposal 12) some of the second structures are aligned along a third direction; the third direction intersects with a plane including the first direction and the second direction, 12. The circuit element according to any one of Technical Solutions 9 to 11, wherein a third pitch in the third direction of the part of the plurality of second structures is larger than the first pitch.

[0073] (Technical proposal 13) A circuit element as described in Technical Solution 12, wherein the third direction length of one of the plurality of second structures in the third direction is longer than the second direction length of one of the plurality of second structures in the second direction.

[0074] (Technical proposal 14) the second conductive member includes a first region and a second region; the second region is spaced from the first region, the first region overlaps with first portions of the plurality of second structures in the first direction; the second region overlaps with second portions of the plurality of second structures in the first direction; the first region does not overlap with the second portion in the first direction, 14. The circuit element according to any one of Technical Solutions 9 to 13, wherein the second region does not overlap with the first portion in the first direction.

[0075] (Technical proposal 15) The circuit element according to Technical Solution 14, wherein the region between the first region and the second region overlaps with the first partial region in the first direction.

[0076] (Technical proposal 16) The circuit element according to technical solution 14 or 15, wherein the first area of the first region is different from the second area of the second region.

[0077] (Technical proposal 17) the second conductive member further includes a third region; the third region is spaced apart from the first region and the second region, the third region overlaps with third portions of the plurality of second structures in the first direction, the third region does not overlap with the first portion in the first direction, the third region does not overlap with the second portion in the first direction, the first region does not overlap with the third portion in the first direction, The circuit element according to Technical Solution 14, wherein the second region does not overlap with the third portion in the first direction.

[0078] (Technical proposal 18) The circuit element described in Technical Solution 17, wherein the region between the first region and the second region, the region between the first region and the third region, and the region between the second region and the third region overlap with the first partial region in the first direction.

[0079] (Technical proposal 19) a first area of the first region is different from a second area of the second region; The circuit element according to Technical Solution 17 or 18, wherein the third area of the third region is different from the first area and different from the second area.

[0080] (Technical proposal 20) Further comprising an intermediate layer; the intermediate layer is between the dielectric film and the first layer; the intermediate layer includes a first element and silicon; 20. The circuit element according to any one of Technical Schemes 1 to 19, wherein the first element includes at least one selected from the group consisting of phosphorus, arsenic, antimony, phosphorus, and phosphorus.

[0081] According to the embodiment, it is possible to provide a circuit element that can improve characteristics.

[0082] In this specification, "vertical" and "parallel" do not only mean strictly vertical and strictly parallel, but also include variations in the manufacturing process, and may mean substantially vertical and substantially parallel.

[0083] The embodiments of the present invention have been described above with reference to examples. However, the present invention is not limited to these examples. For example, the specific configurations of each element, such as conductive members, layers, and dielectric films, included in the circuit element are within the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain similar effects by appropriately selecting them from known ranges.

[0084] Any combination of two or more elements of each example within the scope of technical feasibility is also included within the scope of the present invention as long as it encompasses the gist of the present invention.

[0085] All circuit elements that can be implemented by a person skilled in the art by appropriately modifying the design of the circuit elements described above as the embodiments of the present invention also fall within the scope of the present invention, as long as they include the gist of the present invention.

[0086] Within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications and alterations, and it is understood that these modifications and alterations also fall within the scope of the present invention.

[0087] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0088] 10: first layer, 11, 12: first and second structures, 11a, 11b: first and second partial regions, 12a-12d: first to fourth regions, 13: intermediate layer, 30: dielectric film, 51, 52: first and second conductive members, 51E: electrode, 51b: base portion, 51p: protruding portion, 52a-52d: first to fourth regions, 110-111, 120-125: circuit elements, D1-D3: first to third directions, PL1: first plane, p1-p3: first to third pitches, t11, t12: thickness of first and second structures, t11b: thickness

Claims

1. a first conductive member; A second conductive member; a first layer between the first conductive member and the second conductive member, the first layer including a first structure and a plurality of second structures, the plurality of second structures being aligned in a first plane intersecting a first direction from the first conductive member to the second conductive member, at least a portion of the first structure being located between the plurality of second structures in the first plane, second electrical conductivities of the plurality of second structures being different from the first electrical conductivities of the first structures, and the first layer being electrically connected to the second conductive member; a dielectric film between the first conductive member and the first layer; A circuit element comprising:

2. the first conductive member, the dielectric film, and the first layer function as a capacitor element; The circuit element of claim 1 , wherein the first layer functions as a resistive element.

3. The circuit element of claim 1 , wherein the second conductivity is greater than the first conductivity.

4. the first structure includes silicon; The circuit element of claim 1 , wherein the second structure comprises a metal.

5. the first structure includes a first partial region and a second partial region; the first partial region is located between the plurality of second structures in the first plane, The circuit element according to claim 1 , wherein the second partial region is located between the dielectric film and the plurality of second structures in the first direction.

6. the first conductive member includes a base portion and a plurality of protrusions; the plurality of protrusions are connected to the base; the plurality of protrusions protrude from the base portion toward the second conductive member, The circuit element of claim 5 , wherein at least a portion of the first structure is between the plurality of protrusions.

7. The circuit element according to claim 6 , wherein at least some of the plurality of protrusions are aligned along a second direction intersecting the first direction.

8. a length of one of the plurality of protrusions in the third direction is longer than a length of the one of the plurality of protrusions in the second direction; The circuit element according to claim 7 , wherein the third direction intersects a plane including the first direction and the second direction.

9. At least some of the second structures are aligned along the second direction, The circuit element according to claim 7 , wherein a first pitch of the at least some of the plurality of protrusions in the second direction is smaller than a second pitch of the at least some of the plurality of second structures in the second direction.

10. The circuit element according to claim 9 , wherein the second pitch is at least twice the first pitch.

11. the first pitch is equal to or greater than 1 μm and equal to or less than 5 μm, 10. The circuit element according to claim 9, wherein the second pitch is equal to or greater than 100 [mu]m and equal to or less than 500 [mu]m.

12. some of the second structures are aligned along a third direction; the third direction intersects with a plane including the first direction and the second direction, 12. The circuit element according to claim 9, wherein a third pitch of said part of said plurality of second structures in said third direction is larger than said first pitch.

13. The circuit element according to claim 12 , wherein a third direction length in the third direction of one of the plurality of second structures is longer than a second direction length in the second direction of the one of the plurality of second structures.

14. the second conductive member includes a first region and a second region; the second region is spaced from the first region, the first region overlaps with first portions of the plurality of second structures in the first direction; the second region overlaps with second portions of the plurality of second structures in the first direction; the first region does not overlap with the second portion in the first direction, The circuit element according to claim 9 , wherein the second region does not overlap the first portion in the first direction.

15. The circuit element according to claim 14 , wherein a region between the first region and the second region overlaps with the first partial region in the first direction.

16. 15. The circuit element of claim 14, wherein a first area of the first region is different from a second area of the second region.

17. the second conductive member further includes a third region; the third region is spaced apart from the first region and the second region, the third region overlaps with third portions of the plurality of second structures in the first direction, the third region does not overlap with the first portion in the first direction, the third region does not overlap with the second portion in the first direction, the first region does not overlap with the third portion in the first direction, The circuit element according to claim 14 , wherein the second region does not overlap with the third portion in the first direction.

18. 18. The circuit element of claim 17, wherein a region between the first region and the second region, a region between the first region and the third region, and a region between the second region and the third region overlap with the first partial region in the first direction.

19. a first area of the first region is different from a second area of the second region; 20. The circuit element of claim 17, wherein a third area of the third region is different from the first area and different from the second area.

20. Further comprising an intermediate layer; the intermediate layer is between the dielectric film and the first layer; the intermediate layer includes a first element and silicon; 2. The circuit element according to claim 1, wherein the first element includes at least one selected from the group consisting of phosphorus, arsenic, antimony, phosphorus, and arsenic.

Citation Information

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