Electric circuit and amplifier

Abstract

To provide an amplifier which includes a simple circuit configuration and has highly efficient and wide band characteristics.SOLUTION: An amplifier device comprises: a first substrate with a first impedance converter which converts impedance of output signal of a first amplifier amplifying inputted first signal; a second substrate with a second impedance converter which converts impedance of output signal of a second amplifier amplifying inputted second signal; and a third impedance converter a part of which is arranged in the first substrate and the other of which is arranged in the second substrate, and which has an electrical component passing AC signal and blocking DC signal. The output signal of the first impedance converter and the output signal of the third impedance converter are combined and output.SELECTED DRAWING: Figure 12

Description

[Technical Field]

[0001] An embodiment of the present invention relates to an electrical circuit and an amplifier. [Background technology]

[0002] Doherty amplifiers are known that dynamically switch the number of amplifiers in operation depending on the amplitude of the high-frequency input signal. Doherty amplifiers consist of a main amplifier and a peaking amplifier. For main amplifiers and peaking amplifiers designed with transistors, the impedance seen by power amplifiers such as Doherty amplifiers traces a clockwise impedance locus on the Smith chart. Therefore, to achieve high efficiency and wideband characteristics, it is necessary to connect a load to the output of the power amplifier that creates a counterclockwise impedance locus on the Smith chart.

[0003] However, with a typical power amplifier, only a clockwise impedance locus can be obtained on the Smith chart, and as a result, it is not easy to obtain high-efficiency and wide-band characteristics. [Prior art documents] [Patent documents]

[0004] [Non-Patent Document 1] AR191191(AMPLEON Application Report) Summary of the Invention [Problem to be solved by the invention]

[0005] Therefore, one embodiment of the present invention provides an electric circuit and an amplifier that have a simple circuit configuration, high efficiency, and wide-band characteristics. [Means for solving the problem]

[0006] In order to solve the above problem, according to one embodiment of the present invention, a first circuit board having a first impedance converter that converts the impedance of an output signal of a first amplifier that amplifies an input first signal; a second substrate having a second impedance converter that converts the impedance of an output signal of a second amplifier that amplifies an input second signal; a third impedance converter having an electric component that is partly provided on the first substrate and the remaining partly provided on the second substrate and that passes AC signals and blocks DC signals; The output signal of the first impedance converter and the output signal of the third impedance converter are combined and output. An electrical circuit is provided. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a block diagram showing a schematic configuration of an amplifier according to an embodiment. [Figure 2] FIG. 2 is an ideal equivalent circuit diagram of an amplifier according to an embodiment. [Figure 3] 3 is a diagram showing the passing phase characteristics that an impedance converter formed by the ideal equivalent circuit of FIG. 2 shows to the load side. [Figure 4] FIG. 2 is an equivalent circuit diagram of an amplifier according to an embodiment, taking into account parasitic components. [Figure 5] FIG. 5 is an equivalent circuit diagram in which the impedance converter in FIG. 4 is replaced with first to third impedance converters. [Figure 6] 6A, 6B, and 6C are diagrams illustrating a general impedance converter. [Figure 7] FIG. 6C is a diagram illustrating the Smith chart of FIG. 6B. [Figure 8] FIG. [Figure 9] FIG. 9 is a diagram illustrating frequency characteristics related to the complex conjugate of FIG. 8. [Figure 10]This figure compares a Smith chart showing the frequency characteristics that a typical Doherty amplifier combiner presents to the main amplifier, with a Smith chart showing the frequency characteristics of an ideal combiner that should be presented to the main amplifier in order to achieve high efficiency. [Figure 11] FIG. 11A is a frequency characteristic that a combiner for a Doherty amplifier according to a comparative example shows to a main amplifier, and FIG. 11B is a Smith chart showing the frequency characteristic of an ideal combiner, similar to FIG. 10B. [Figure 12] FIG. 2 is a planar layout diagram of an amplifier according to an embodiment. [Figure 13] 13 is a Smith chart showing the frequency characteristics of the combiner according to the embodiment shown in FIG. 12. [Figure 14] FIG. 2 is an equivalent circuit diagram of an amplifier according to an embodiment. [Figure 15] A plan view of a load converter that converts impedance by gradually changing the width of the microstrip line designed on the board. [Figure 16] A plan view showing a load transformer designed with two substrates and connecting microstrip lines. [Figure 17] FIG. 10 is a diagram illustrating an electromagnetic field simulation of circuit A. [Figure 18] This diagram explains the electromagnetic field simulation of a circuit that connects circuit A and circuit B, which are made of different types of boards. [Figure 19] FIG. 10 is a diagram illustrating an embodiment in which two circuits on two substrates are connected via an electrical component. [Figure 20] 20A and 20B are diagrams for explaining a first example of an electromagnetic field simulation method for the circuit A and the circuit B in FIG. 19. [Figure 21] FIG. 10 is a diagram showing the results of an electromagnetic field simulation of the first example. [Figure 22] 20A and 20B are diagrams for explaining a second example of the electromagnetic field simulation method for the circuit A and the circuit B in FIG. 19. [Figure 23] FIG. 10 is a diagram showing the results of an electromagnetic field simulation of the second example. [Figure 24] FIG. 10 is a diagram showing the sizes of the first board, electrical components, and second board used in the electromagnetic field simulation, and the currents flowing through the first board, electrical components, and second board. [Figure 25]FIG. 10 is a diagram showing the results of an electromagnetic field simulation. [Figure 26A] FIG. 10 is a diagram showing an example in which two electrical components are connected in parallel between a first and a second substrate. [Figure 26B] FIG. 10 is a diagram showing an example in which three electrical components are connected in parallel between the first and second substrates. [Figure 27] FIG. 10 is an equivalent circuit diagram when an electrical component made of a capacitor is connected between the first and second substrates. [Figure 28] 28 is a graph showing the transfer characteristics of FIG. 27. [Figure 29] FIG. 10 is a diagram showing an example in which a plurality of capacitors are connected in parallel between a first substrate and a second substrate that are different types of substrates. [Figure 30] FIG. 4 is a diagram showing the relationship between the frequency band of a signal transmitted between the first substrate and the second substrate and the resonance frequency. [Figure 31] FIG. 1 is an equivalent circuit diagram taking into consideration the parasitic components of the amplifier according to the present embodiment. [Figure 32] 32 is a diagram showing passing phase characteristics of the first to third impedance converters of FIG. 31. [Figure 33] FIG. 10 is a block diagram of an amplifier according to a modified example of the present embodiment. [Figure 34] FIG. 10 is a planar layout diagram of an amplifier according to a modified example of the embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, embodiments of an electric circuit and an amplifier will be described with reference to the drawings. The following description will focus on the main components of the amplifier, but the amplifier may include components and functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.

[0009] Fig. 1 is a block diagram showing a schematic configuration of an electric circuit 10 and an amplifier 1 according to an embodiment. As shown in Fig. 1, the amplifier 1 according to an embodiment includes a divider 2, a DC voltage source 3, a main amplifier 4, a peak amplifier 5, and a combiner 6. As will be described later, the electric circuit 10 according to an embodiment is a part of the amplifier 1.

[0010] The divider 2 divides into a plurality of signals the input signal of the amplifier 1. In this specification, an example will be described in which the divider 2 divides the input signal into a first signal and a second signal.

[0011] The main amplifier 4 amplifies the first signal. More specifically, the main amplifier 4 continues to amplify the first signal while the first signal is being input.

[0012] While the main amplifier 4 amplifies the first signal, the peak amplifier 5 amplifies the second signal in accordance with the signal level of the input signal to the amplifier 1. More specifically, the peak amplifier 5 amplifies the second signal when the signal level of the input signal is equal to or higher than a predetermined reference level.

[0013] The combiner 6 combines the signal amplified by the main amplifier 4 and the signal amplified by the peak amplifier 5. The combiner 6 only needs to have a location (hereinafter referred to as a junction node) where the wiring transmitting the signal amplified by the main amplifier 4 and the wiring transmitting the signal amplified by the peak amplifier 5 join together, and does not need to be composed of electrical components.

[0014] Fig. 2 is an ideal equivalent circuit diagram of an amplifier 1 according to one embodiment. The equivalent circuit of the amplifier 1 shown in Fig. 2 includes an ideal first current source 4a corresponding to the main amplifier 4, an ideal second current source 5a corresponding to the peak amplifier 5, an impedance converter 7, and a combiner node 6a, with a load impedance 8 connected to the combiner node 6a. The impedance converter 7 and the combiner node 6a form a combiner 6.

[0015] The first current source 4a is connected to one end of the impedance converter 7. The second current source 5a is connected to the other end of the impedance converter 7. The other end of the impedance converter 7 is a combined node 6a. A load impedance 8 is connected to the combined node 6a. The load impedance 8 is the impedance of a load.

[0016] 2 shows an equivalent circuit when there are no parasitic components in the output signal paths of the main amplifier 4 and the peak amplifier 5. In this case, the characteristic impedance Z of the impedance converter 7 is, for example, 50 ohms. The electrical length of the impedance converter 7 is 90 degrees when a 1 GHz signal is input. The load impedance 8 is, for example, 25 ohms.

[0017] FIG. 3 is a diagram showing the pass phase characteristics that the impedance converter 7, which is the ideal equivalent circuit of FIG. 2, shows to the load side. The horizontal axis of FIG. 3 is frequency [GHz], and the vertical axis is pass phase [degrees]. As shown in FIG. 3, the higher the frequency of the signal output from the impedance converter 7, the more delayed the pass phase becomes. For example, when the frequency of the signal output from the impedance converter 7 is 1 GHz, the pass phase becomes -90 degrees.

[0018] 4 is an equivalent circuit diagram of an amplifier 1 according to an embodiment, taking into consideration the parasitic components. As shown in FIG. 4, a main amplifier 4 has an ideal first current source 4a, a parasitic capacitor 4b, and a parasitic inductor 4c. The parasitic capacitor 4b of the main amplifier 4 is connected between the output node of the main amplifier 4 and the ground node. The parasitic inductor 4c of the main amplifier 4 is connected on the output signal path of the main amplifier 4.

[0019] The peak amplifier 5 has an ideal second current source 5a, a parasitic capacitor 5b, and a parasitic inductor 5c. The parasitic capacitor 5b of the peak amplifier 5 is connected between the output node of the peak amplifier 5 and the ground node. The parasitic inductor 5c of the peak amplifier 5 is connected to the output signal path of the peak amplifier 5. One end of the impedance converter 7 and one end of the parasitic inductor 5c of the peak amplifier 5 are connected to a combining node 6a in FIG. 4. The impedance converter 7 and the combining node 6a form a combiner 6.

[0020] Impedance converter 7 in Fig. 4 can be replaced with first to third impedance converters. Fig. 5 is an equivalent circuit diagram in which impedance converter 7 in Fig. 4 is replaced with first to third impedance converters 7a to 7c.

[0021] The first impedance converter 7a is connected between the parasitic inductor 4c of the ideal first current source 4a of the main amplifier 4 and the combined node 6a. The combined electrical length of the parasitic capacitor 4b and the parasitic inductor 4c of the ideal first current source 4a of the main amplifier 4 and the first impedance converter 7a is 90 degrees. In this way, the length and width of the first impedance converter 7a are adjusted so that the electrical length of the main amplifier 4 becomes 90 degrees, taking into account the parasitic components of the main amplifier 4.

[0022] The second impedance converter 7b is connected between the parasitic inductor 5c of the ideal second current source 5a of the peak amplifier 5 and the third impedance converter 7c. The combined electrical length of the parasitic capacitor 5b, the parasitic inductor 5c, and the second impedance converter 7b of the ideal second current source 5a of the peak amplifier 5 is 90 degrees. Thus, the length and width of the second impedance converter 7b are adjusted so that the electrical length of the peak amplifier 5 is 90 degrees, taking into account the parasitic components of the peak amplifier 5. The third impedance converter 7c is connected between the second impedance converter 7b and the combining node 6a. The electrical length of the third impedance converter 7c is also 90 degrees. One end of the first impedance converter 7a and one end of the third impedance converter 7c are connected to the combining node 6a in FIG. 5. The first to third impedance converters 7a to 7c and the combining node 6a form the combiner 6.

[0023] FIG. 6 is a diagram illustrating a general impedance converter 7. The circuit in FIG. 6A includes a first port p1, an impedance converter 7, and a second port p2. The impedance converter 7 in FIG. 6A corresponds to the impedance converter 7 in FIG. 2. The first port p1 and the second port p2 are provided for analyzing the frequency characteristics of the impedance converter 7.

[0024] The characteristic impedance of the first port p1 in FIG. 6A is, for example, 25 ohms, the characteristic impedance of the impedance converter 7 is, for example, 50 ohms, and the characteristic impedance of the second port p2 is, for example, 50 ohms.

[0025] Figure 6B is a Smith chart showing the frequency characteristics of the reflection coefficient generated at the second port p2 in Figure 6A. The center of the Smith chart in Figure 6B is the same value as the characteristic impedance of the second port p2, which is 50 ohms in the example of Figure 6A. Figure 6C is a diagram showing the phase component of Figure 6B. The horizontal axis of Figure 6C is frequency [GHz], and the vertical axis is the phase component of the reflection coefficient S(2,2) generated at the second port p2.

[0026] In a typical impedance converter 7, an impedance locus that rotates clockwise on the Smith chart is obtained as shown in Fig. 6B. Also, as shown in Fig. 6C, the higher the frequency characteristic of the reflection coefficient generated at the second port p2, the more the phase delay characteristic is obtained.

[0027] Figure 7 is a diagram explaining the Smith chart of Figure 6B. A Smith chart is a graph showing impedance expressed as a complex number R + jX. The right end of the line extending horizontally through the center of the outermost circle is the point where the resistance R and reactance X become infinite. The circles of different diameters that touch this point are constant resistance circles. The arcs that pass through this point are constant reactance circles. The left end of the line extending horizontally through the center of the outermost circle is the point where both the resistance R and reactance X become zero. The center of the outermost circle is the reference impedance, which is the characteristic impedance of the second port p2. The area above the line extending horizontally through the center of the outermost circle is the inductive region, and the area below this line is the capacitive region.

[0028] Fig. 8 is a diagram explaining complex conjugates. As shown in Fig. 8, when the impedance (A+jB) that the impedance converter 7 presents to the second port p2 matches the impedance (A-jB) that the second port p2 presents to the impedance converter 7, this is called impedance matching. Because each impedance is expressed as a complex number, these two impedances (A-jB) and (A+jB) are called complex conjugates, and matching the complex conjugates makes it possible to achieve high efficiency in the power amplifier across the entire frequency range.

[0029] FIG. 9 is a diagram illustrating the frequency characteristics of the complex conjugate of FIG. 8. FIG. 9A shows the same circuit configuration as FIG. 6A. FIG. 9B is a Smith chart showing the frequency characteristics that the second port p2 presents to the impedance converter 7. FIG. 9C is a diagram showing the phase components of FIG. 9B. The horizontal axis of FIG. 9C is frequency [GHz], and the vertical axis is the phase component of the reflection coefficient S(2,2) generated at the second port p2.

[0030] As shown in Figure 9B, a counterclockwise impedance locus is obtained on the Smith chart, and as shown in Figure 9C, the higher the frequency, the more the phase advances.

[0031] Figure 10 compares a Smith chart showing the frequency characteristics of a typical Doherty amplifier combiner presented to the main amplifier with a Smith chart showing the frequency characteristics of an ideal combiner that would be presented to the main amplifier for high efficiency. Figure 10A shows a Smith chart showing the frequency characteristics of a typical Doherty amplifier combiner (impedance converter 7) presented to the main amplifier, and similar to Figure 6B, it shows a clockwise impedance locus. Figure 10B shows a Smith chart showing the frequency characteristics of an ideal combiner that would be presented to the main amplifier for high efficiency, and similar to Figure 9B, it shows a counterclockwise impedance locus.

[0032] The Smith charts in Figures 10A and 10B are different from each other, and a typical Doherty amplifier combiner cannot achieve high efficiency across the entire frequency range. With the combiner in Figure 10A, the main amplifier can achieve high efficiency between p3 and p4 in Figure 10B, but the efficiency deteriorates as it moves away from p3 and p4.

[0033] FIG. 11A is a diagram showing the frequency characteristics that a combiner for a Doherty amplifier according to a comparative example shows to a main amplifier, and FIG. 11B is a Smith chart showing the frequency characteristics of an ideal combiner, similar to FIG. 10B.

[0034] To solve the problem shown in Fig. 10A, the signal band of the combiner according to the comparative example is narrowed. This reduces the difference between the frequency characteristics shown in Fig. 11A and those shown in Fig. 11B. However, since the combiner according to the comparative example shown in Fig. 11A exhibits an impedance locus that rotates clockwise, while the combiner according to the comparative example shown in Fig. 11B exhibits an impedance locus that rotates counterclockwise, efficiency degradation is reduced compared to the general combiner shown in Fig. 10A, but efficiency degradation occurs near the upper and lower limits of the signal band.

[0035] Impedance can be controlled by adjusting the width of the microstrip line designed on the board on which the main amplifier 4 and the peak amplifier 5 are mounted. For example, the impedance can be increased by reducing the width of the microstrip line. Furthermore, the electrical length can be controlled by adjusting the length of the microstrip line. For example, the electrical length can be reduced by reducing the length of the microstrip line. Therefore, it is theoretically possible to achieve impedance matching by adjusting the width and length of the microstrip line. However, when controlling impedance by changing the width of the microstrip line without changing the type of board, it may be necessary to make the width of the microstrip line extremely large or, conversely, extremely small. If the width of the microstrip line is too small, there is a risk that the narrow portion of the microstrip line will be burned due to heat generated by the current flow. Furthermore, if the width of the microstrip line is too large, the circuit size will increase, hindering integration. As such, the range in which the width of the microstrip line can be adjusted is limited, and adjusting the width of the microstrip line within that range often fails to achieve impedance matching.

[0036] Therefore, the amplifier 1 of this embodiment is characterized in that it matches the impedance that the amplifier 1 presents to the combiner 6 and the impedance that the combiner 6 presents to the amplifier 1 by a method other than adjusting the width and length of the microstrip lines designed on the substrate.

[0037] 12 is a planar layout diagram of an amplifier 1 according to an embodiment. As shown in FIG. 12, the amplifier 1 according to an embodiment includes a main amplifier 4, a peak amplifier 5, a first substrate 11, a second substrate 12, a third impedance converter 7c, and a junction node 6a. The electric circuit 10 according to an embodiment includes the first substrate 11, the second substrate 12, the third impedance converter 7c, and a junction node 6a. That is, the amplifier 1 according to an embodiment includes the electric circuit 10, the main amplifier 4, and a peak amplifier 5.

[0038] The first substrate 11 and the second substrate 12 are of different substrate types. Different substrate types mean that at least one of the dielectric constants, thicknesses, and substrate materials of the substrates is different. The first substrate 11 and the second substrate 12 are different from each other in at least one of the dielectric constants, thicknesses, and substrate materials.

[0039] The output terminal of the main amplifier 4 is mounted on the first substrate 11. In the example of FIG. 12, the main amplifier 4 is arranged on the left side of the first substrate 12, but is not shown in FIG. The main amplifier 4 is, for example, a semiconductor IC. The first substrate 11 has a first impedance converter 7a that converts the impedance of the output signal of the main amplifier 4. The electrical length of the first substrate 11, including the output node of the main amplifier 4 and the first impedance converter 7a, is 90 degrees, including parasitic components.

[0040] The output terminal of the peak amplifier 5 is mounted on the second substrate 12. The peak amplifier 5 is disposed on the left side of the second substrate 12, but is not shown in FIG. 12. The peak amplifier 5 is, for example, a semiconductor IC. The second substrate 12 has a second impedance converter 7b that converts the impedance of the output signal of the peak amplifier 5. The electrical length on the second substrate 12 from the parasitic component of the peak amplifier 5 to the second impedance converter 7b is 90 degrees.

[0041] A portion 11p of the third impedance converter 7c is disposed on the first substrate 11, and the remaining portion 12p is disposed on the second substrate 12. The third impedance converter 7c has an electric component 13 that passes AC signals and blocks DC signals. For example, the electric component 13 is soldered to the portion 11p of the first substrate 11 and the remaining portion 12p of the second substrate 12 at one location each. The electric component 13 is formed, for example, of a capacitor, inductor, or resistor. As will be described later, a plurality of electric components 13 may be connected in parallel between the portion 11p of the first substrate 11 and the remaining portion 12p of the second substrate 12. The first substrate 11 has a branched branch portion 11b, and the portion 11p of the first substrate 11 is provided at the branch portion 11b.

[0042] The combiner 6 has first to third impedance converters 7a, 7b, and 7c and a combining node 6a. The combining node 6a is a node that combines the output signal of the main amplifier 4 after impedance conversion and the output signal of the peak amplifier 5 after impedance conversion, and outputs the combined signal.

[0043] In amplifier 1 according to one embodiment, at least one of the element values ​​of electrical components 13, the type of first substrate 11, and the type of second substrate 12 is adjusted so that, on a Smith chart representing the frequency characteristics that combiner 6 presents to main amplifier 4 and peak amplifier 5, an impedance locus that rotates counterclockwise as the frequency of the signal combined by combiner 6 increases is obtained. More specifically, as shown in Fig. 9, at least one of the element values ​​of electrical components 13, the type of first substrate 11, and the type of second substrate 12 is adjusted so that the phase of the signal combined by combiner 6 advances more as the frequency increases. This allows impedance matching to be achieved, resulting in amplifier 1 with high efficiency and wideband characteristics.

[0044] FIG. 13 is a Smith chart showing the frequency characteristics of the combiner 6 according to the embodiment shown in FIG. 12 . The left side of FIG. 13 shows an enlarged view of the impedance locus of the Smith chart. As shown in FIG. 13 , the impedance seen by the combiner 6 to the main amplifier 4 follows an impedance locus that rotates counterclockwise around the center of the Smith chart. The reason why the impedance seen by the combiner 6 to the main amplifier 4 follows an impedance locus that rotates counterclockwise around the center of the Smith chart is because the first substrate 11 and the second substrate 12, which are different types of substrate, are connected via the electrical components 13. By adjusting at least one of the element values ​​of the electrical components 13, the dielectric constants, thicknesses, and substrate materials of the first substrate 11 and the second substrate 12, the impedance seen by the combiner 6 to the main amplifier 4 can be adjusted relatively easily to follow an impedance locus that rotates counterclockwise around the center of the Smith chart.

[0045] (load converter) 12, a load converter 14 is connected to the combiner 6 (combining node 6a). Generally, the basic impedance of communication and broadcasting systems is 50 ohms, so the load converter 14 converts the load impedance 8 connected to the combining node 6a to 50 ohms. For example, if the load impedance 8 is 25 ohms, the load converter 14 converts 25 ohms to 50 ohms.

[0046] FIG. 14 is an equivalent circuit diagram of the amplifier 1 according to one embodiment. The equivalent circuit of FIG. 14 includes a load converter 14 in addition to the configuration of FIG. 5. The load converter 14 includes a plurality of impedance converters connected in series. The number of impedance converters connected in series is arbitrary. In the example of FIG. 14, the load converter 14 includes fourth to sixth impedance converters 14a to 14c connected in series.

[0047] The fourth impedance converter 14a converts the impedance of the signal output from the combiner 6 to, for example, 29 ohms. The fifth impedance converter 14b converts the impedance of the output signal of the fourth impedance converter 14a to, for example, 39 ohms. The sixth impedance converter 14c converts the impedance of the output signal of the fifth impedance converter 14b to, for example, 50 ohms.

[0048] The load converter 14, which is made up of a plurality of impedance converters 14a, 14b, and 14c, can be realized, for example, by changing the width of the microstrip line designed on the substrate in stages.

[0049] Figure 15 is a plan view of a load converter 14 that converts impedance by gradually changing the width of a microstrip line designed on a substrate 15 made of the same substrate material. When gradually changing the impedance using microstrip lines designed on a substrate 15 made of the same substrate material as in Figure 15, it may be necessary to extremely narrow the width of the microstrip line designed on substrate 15 in order to set the impedance to 50 ohms. For this reason, as mentioned above, there is a risk that the narrow portion of the microstrip line designed on substrate 15 may be burned out due to heat generated by the current flow.

[0050] In order to perform a wide range of impedance conversion without extremely reducing the width of the microstrip line designed in the substrate 15, it is conceivable to configure the load converter 14 by connecting a plurality of substrates of different types.

[0051] FIG. 16 is a plan view showing a load converter 14 in which microstrip lines designed using two different types of substrates 15 and 16 are connected. The two substrates 15 and 16 differ from each other in at least one of the dielectric constant, thickness, or substrate material, for example. The widths of the microstrip lines designed using the two substrates 15 and 16 are gradually reduced. At the connection point between the microstrip lines designed using the two substrates 15 and 16, the width of the microstrip line designed using substrate 16 is larger than the width of the microstrip line designed using substrate 15. Therefore, the width of the right end of the microstrip line designed using substrate 16, which is the output section of load converter 14, is larger than the width of the right end of the microstrip line designed using substrate 15 in FIG. 15.

[0052] As can be seen by comparing Figure 16 with Figure 15, when impedance conversion is performed by connecting microstrip lines designed on multiple substrates of different substrate types, the width of the microstrip lines designed on the substrates does not need to be made smaller than when impedance conversion is performed on substrates of the same substrate type, and problems such as the narrow parts of the microstrip lines designed on the substrates being burned out due to heat generated by the flow of current do not occur.

[0053] As described above, it is desirable that the load converter 14 in the amplifier 1 according to this embodiment connects a plurality of substrates of different types and adjusts the width stepwise for each substrate to perform impedance conversion.

[0054] (Electromagnetic field simulation) The operation of amplifier 1 according to this embodiment can be analyzed by electromagnetic field simulation. Fig. 17 is a diagram illustrating an electromagnetic field simulation of circuit A (hereinafter, sometimes abbreviated as electromagnetic field sim). When performing an electromagnetic field simulation of circuit A, in order to correctly calculate the current flowing at the input / output sections of circuit A, it is common to connect a first feeder line 17 to the input section of circuit A and a second feeder line 18 to the output section of circuit A, as shown on the right side of Fig. 17, and the influence of feeder lines 17 and 18 is eliminated in the electromagnetic field simulation.

[0055] However, there is a possibility that the results of the electromagnetic field simulation will differ depending on whether or not the first feed line 17 and the second feed line 18 are connected to the circuit A. Depending on the configuration of the circuit A, there may be no difference.

[0056] Furthermore, electromagnetic field simulation has a limitation in that it cannot simulate multiple circuits placed on multiple substrates made of two or more different types of substrate. This is because electromagnetic field simulation does not allow for the setting of multiple dielectric constants and thickness parameters. For this reason, when performing electromagnetic field simulation on a circuit connecting circuit A and circuit B made of different types of substrate, as shown in Figure 18, for example, it is necessary to perform two separate electromagnetic field simulations (first electromagnetic field sim) in which first and second feeder lines 17 and 18 are connected to the input / output section of circuit A and the influence of the first and second feeder lines 17 and 18 is removed in the electromagnetic field simulation, and then perform two separate electromagnetic field simulations (second electromagnetic field sim) in which third and fourth feeder lines 19 and 20 are connected to the input / output section of circuit B and the influence of the third and fourth feeder lines 19 and 20 is removed in the electromagnetic field simulation, and then combine the two results.

[0057] However, when two separate electromagnetic field simulations are performed, one in which the first and second feeder lines 17, 18 are connected to the input / output section of circuit A and the effects of the first and second feeder lines 17, 18 are removed in the electromagnetic field simulation, and the other in which the third and fourth feeder lines 19, 20 are connected to the input / output section of circuit B and the effects of the third and fourth feeder lines 19, 20 are removed in the electromagnetic field simulation, the combined results do not match the characteristics of a circuit in which circuit A and circuit B are connected. This is because the results are affected by the step at the boundary between circuit A and circuit B due to the difference in board width.

[0058] In this way, if circuit A on first substrate 11 and circuit B on second substrate 12, which are different types of substrates, are directly connected, the accuracy of the electromagnetic field simulation will not improve. Therefore, this embodiment is characterized in that circuit A on first substrate 11 and circuit B on second substrate 12 are connected via electrical component 13, as shown in Fig. 19.

[0059] Fig. 20 is a diagram illustrating a first example of an electromagnetic field simulation method for circuit A and circuit B in Fig. 19. In the first example, feed lines are connected to the input / output sections of circuit A, circuit B, and electrical component 13. In Fig. 20, feed lines 17 and 18 are connected to the input / output sections of circuit A, feed lines 19 and 20 are connected to the input / output sections of circuit B, and feed lines 21 and 22 are connected to the input / output sections of electrical component 13.

[0060] In this state, an electromagnetic field simulation is performed for each of the circuit A, the circuit B, and the electrical component 13.

[0061] 21 is a diagram showing the results of the electromagnetic field simulation of Example 1. According to the electromagnetic field simulation of Example 1, an S parameter sp1 of first substrate 11 on which circuit A is arranged, an S parameter sp2 of second substrate 12 on which circuit B is arranged, and an S parameter sp3 of electrical component 13 are calculated. In Example 1, the electromagnetic field simulation results of circuits A and B, which are made of different substrate materials, and the electromagnetic field simulation result of electrical component 13 are forcibly combined, which raises concerns about a decrease in the accuracy of the electromagnetic field simulation.

[0062] FIG. 22 is a diagram illustrating a second example of the electromagnetic field simulation method for circuit A and circuit B in FIG. 19. The electromagnetic field simulation of the second example is performed in two stages. In the first stage, the material of second substrate 12 on which circuit B is disposed is assumed to be the same as the material of first substrate 11 on which circuit A is disposed, and feed lines 17 and 18 are connected to both ends of circuit A and circuit B, which are connected via electrical component 13, to perform the electromagnetic field simulation. In the second stage, the material of first substrate 11 on which circuit A is disposed is assumed to be the same as the material of second substrate 12 on which circuit B is disposed, and feed lines 17 and 18 are connected to both ends of circuit A and circuit B, which are connected via electrical component 13, to perform the electromagnetic field simulation. In FIG. 22, feed line 17 is designated as first port p1, feed line 18 is designated as second port p2, the connection between circuit A and electrical component 13 is designated as third port p3, and the connection between circuit B and electrical component 13 is designated as fourth port p4.

[0063] 23 is a diagram showing the results of the electromagnetic field simulation of the second example. According to the electromagnetic field simulation of the second example, it is possible to perform an electromagnetic field simulation on the circuit A and the circuit B, which are connected via the electric component 13, as a single unit. Specifically, a result is obtained in which the S-parameter sp4 of the first substrate 11 obtained by the first electromagnetic field simulation and the S-parameter sp5 of the second substrate 12 obtained by the second electromagnetic field simulation are connected by the S-parameter sp6 of the electric component 13. That is, in the first electromagnetic field simulation, S-parameters for the first substrate 11, which are input to the first port p1 and the second port p2 and output from the third port p3 and the fourth port p4, are calculated. In the second electromagnetic field simulation, S-parameters for the second substrate 12, which are input to the first port p1 and the second port p2 and output from the third port p3 and the fourth port p4, are calculated, and the third port p3 and the fourth port p4 in the first electromagnetic field simulation and the third port p3 and the fourth port p4 in the second electromagnetic field simulation are connected by the S-parameters of the electric components.

[0064] As described above, in the electromagnetic field simulation of the second example, in the first electromagnetic field simulation for the first substrate 11, the S parameters from the first port p1 to the fourth port p4 are calculated.

[0065] In addition, in the second electromagnetic field simulation for the second substrate 12, S parameters from the first port p1 to the fourth port p4 are calculated.

[0066] The third port p3 in the first electromagnetic field simulation and the fourth port p4 in the second electromagnetic field simulation are connected by the S parameters of the electrical component 13. In the second example, the second port p2 and the fourth port p4 in the first electromagnetic field simulation are ignored, and the first port p1 and the third port p3 in the second electromagnetic field simulation are ignored. The input end is the first port p1 in the first electromagnetic field simulation, and the output end is the second port p2 in the second electromagnetic field simulation.

[0067] In this way, in a circuit in which circuit A on first substrate 11 and circuit B on second substrate 12, which are different types of substrates, are connected by electrical component 13, by performing electromagnetic field simulation twice as shown in Figures 22 and 23, simulation results that match the actual circuit operation can be obtained.

[0068] The inventors compared the passing phase when signal transmission is performed between a first board 11 and a second board 12, which are different board types, with an electrical component 13 connected between them, using a first example electromagnetic field simulation method shown in Figures 19 and 20 and a second example electromagnetic field simulation method shown in Figures 21 and 22.

[0069] (Comparison of the electromagnetic field simulation methods of the first and second examples) 24 is a diagram showing the sizes of first substrate 11, electrical component 13, and second substrate 12 used in the electromagnetic field simulation, and the currents flowing through first substrate 11, electrical component 13, and second substrate 12. The length L of first substrate 11 and second substrate 12 was set to 10 mm, the width H of the microstrip line designed for first substrate 11 was set to 5 to 15 mm, and the width H of the microstrip line designed for second substrate 12 was set to 5 mm.

[0070] Hereinafter, the second example electromagnetic field simulation method shown in FIGS. 21 and 22 will be referred to as the first electromagnetic field simulation, and the first example electromagnetic field simulation method shown in FIGS. 19 and 20 will be referred to as the second electromagnetic field simulation.

[0071] Fig. 25 is a diagram showing the results of the electromagnetic field simulation. The horizontal axis of Fig. 22 is the frequency [GHz] of the signal transmitted by the first substrate 11 and the second substrate 12, and the vertical axis is the difference between the passing phase calculated by the first electromagnetic field simulation and the passing phase calculated by the second electromagnetic field simulation. Since the first electromagnetic field simulation is considered to be similar to the actual passing phase, the larger the difference, the larger the error in the first electromagnetic field simulation.

[0072] 25 shows a plurality of passing phase characteristic waveforms w1 to w11 when the width H of the microstrip line designed on the first substrate 11 is changed from 5 mm to 15 mm. As the width H of the microstrip line designed on the first substrate 11 increases, the difference described above increases, and the error in the second electromagnetic field simulation also increases.

[0073] The frequency range of 0.5 to 1.0 GHz is the frequency band that is actually used, and the above-mentioned difference in the passing phase within this frequency band is 2 to 5 degrees. From the viewpoint of making the electrical length of first substrate 11, electrical component 13, and second substrate 12 90 degrees as a whole, a deviation of 2 to 5 degrees in the passing phase is not permissible.

[0074] From the waveforms w1 to w11 in Figure 25, it can be seen that when electrical component 13 is connected between first board 11 and second board 12 and the electromagnetic field simulation of the second example described above is performed, the passing phase can be calculated with greater accuracy.

[0075] (Resonance of electrical component 13) When connecting first and second substrates 11 and 12 of different types via electrical components 13, if the width of the first and second substrates 11 and 12 is greater than the width of the electrical components 13, it is desirable to connect multiple electrical components 13 in parallel between the first and second substrates 11 and 12. In this case, the multiple electrical components 13 are arranged symmetrically between the first and second substrates 11 and 12. FIG. 26A shows an example in which two electrical components 13 are connected in parallel between the first and second substrates 11 and 12. FIG. 26B shows an example in which three electrical components 13 are connected in parallel between the first and second substrates 11 and 12.

[0076] When multiple electrical components 13 are connected in parallel between the first and second substrates 11, 12, there is a risk of resonance between the multiple electrical components 13. Furthermore, since each electrical component 13 has a parasitic component, even when one electrical component 13 is connected between the first and second substrates 11, 12, resonance may occur depending on the element value of the electrical component 13 and the parasitic component.

[0077] Fig. 27 is an equivalent circuit diagram when an electrical component 13 consisting of a capacitor 13C is connected between first and second substrates 11 and 12. As shown in Fig. 27, capacitor 13C has a parasitic inductor 13L, and resonates at a resonant frequency created by parasitic inductor 13L and capacitor 13C. The resonant frequency is expressed by the following equation (1). In equation (1), the inductance of parasitic inductor 13L is L, and the capacitance of capacitor 13C, which is electrical component 13, is C.

[0078]

number

[0079] Figure 28 is a graph showing the transfer characteristics of Figure 27. The horizontal axis of Figure 28 is frequency [GHz], and the vertical axis is transfer function S(2,1) [dB]. As shown in Figure 28, signal loss increases sharply at the resonant frequency. Therefore, if the resonant frequency exists within the signal band, it becomes impossible to widen the bandwidth of amplifier 1.

[0080] 29 is a diagram showing an example in which a plurality of capacitors 13C are connected in parallel between first substrate 11 and second substrate 12 of different substrate types. In this case, as described above, each capacitor 13C has parasitic inductor 13L, and therefore resonates at the resonant frequency of equation (1).

[0081] 30 is a diagram showing the relationship between the frequency band and resonant frequency of a signal transmitted between the first substrate 11 and the second substrate 12. In the example of FIG. 30, when the capacitance of capacitor 13C constituting electrical component 13 is, for example, 100 pF, resonant frequency w12 is within the signal band. However, when the capacitance is, for example, 150 pF, resonant frequency w13 is outside the signal band, and therefore does not adversely affect signal transmission. Therefore, when connecting multiple electrical components 13 such as capacitor 13C between the first substrate 11 and the second substrate 12, it is desirable to determine the element values ​​of the multiple electrical components 13 so that the resonant frequency generated by the element values ​​and parasitic components of the multiple electrical components 13 is outside the intended signal band.

[0082] (Characteristic Impedance and Passing Phase Characteristics of the First to Third Impedance Converters 7a to 7c) Fig. 31 is an equivalent circuit diagram of the amplifier 1 according to this embodiment that takes into account the parasitic components, and is obtained by adding impedance values ​​to the equivalent circuit diagram of Fig. 5. In Fig. 31, in the amplifier 1 according to this embodiment, the characteristic impedance of the first impedance converter 7a that takes into account the parasitic components from the main amplifier 4 to the combined node 6a is Z01, the characteristic impedance of the second impedance converter 7b that takes into account the parasitic components from the peak amplifier 5 to the combined node 6a is Z02, and the characteristic impedance of the third impedance converter 7c is Z03.

[0083] FIG. 32 is a diagram showing the passing phase characteristics of the first to third impedance converters 7a to 7c of FIG. 31. Waveform w21 in FIG. 32 shows the change in passing phase with respect to the change in frequency of a signal flowing through a microstrip line extending in one direction. Waveforms w22 to w24 show the change in passing phase with respect to the change in frequency of the first to third impedance converters 7a to 7c, respectively. As shown by waveforms w22 to w24, the slope of the change in passing phase with respect to the change in frequency of the signal that has undergone impedance conversion in the third impedance converter 7c is smaller than the slope of the change in passing phase with respect to the change in frequency of the signal that has undergone impedance conversion in the first impedance converter 7a, and is also smaller than the slope of the change in passing phase with respect to the change in frequency of the signal that has undergone impedance conversion in the second impedance converter 7b. Furthermore, the slope of the change in passing phase with respect to the change in frequency of the signal that has undergone impedance conversion in the third impedance converter 7c is larger than the slope of the change in passing phase with respect to the change in frequency of the signal that has undergone impedance conversion in the third impedance converter 7c.

[0084] (2 or more peak amplifiers5) The amplifier 1 according to this embodiment may include two or more peak amplifiers 5. FIG. 33 is a block diagram of the amplifier 1 according to a modification of this embodiment. The amplifier 1 according to this modification differs from the amplifier 1 of FIG. 1 in that it includes a plurality of peak amplifiers 5. The amplifier 1 according to this modification increases the number of peak amplifiers 5 that perform amplification as the amplitude of the high-frequency input signal increases. Below, an example will be described in which the amplifier 1 according to this modification includes two peak amplifiers 5 (referred to as a first peak amplifier 5d and a second peak amplifier 5e).

[0085] FIG. 34 is a planar layout diagram of an amplifier 1 according to a modified example of an embodiment. The amplifier 1 according to the modified example shown in FIG. 34 includes, in addition to the planar layout of FIG. 12 in which the main amplifier 4 and the first peak amplifier 5d are mounted, a third substrate 21 on which the second peak amplifier 5e is mounted, a branch portion 12b extending from the second substrate 12, and a second electric component 13b. In the following, as shown in FIG. 12, a portion 11p of a third impedance converter 7c is designed on the first substrate 11, and the remaining portion 12p is designed on the second substrate 12. The third impedance converter 7c includes a first electric component 13a that passes AC signals and blocks DC signals.

[0086] The third substrate 21 has a fourth impedance converter 7d, the electrical length of which is 90 degrees from the parasitic component of the second peak amplifier 5e to the impedance converter 7d including the impedance converter 12b of the second substrate 12.

[0087] In this way, in the amplifier 1 according to this embodiment, the electrical components 13 are connected between the portion 11p of the first substrate 11 and the remaining portion 12p of the second substrate 12, which makes it easy to achieve impedance matching, simplifies the configuration of the amplifier 1, and reduces the size of the amplifier 1. Specifically, in this embodiment, for example, by adjusting at least one of the element values ​​of the electrical components 13, the type of the first substrate 11, and the type of the second substrate 12, it is possible to match the impedance that the amplifier 1 presents to the combiner 6 and the impedance that the combiner 6 presents to the amplifier 1.

[0088] Furthermore, in this embodiment, when the width of the portion 11p of the first substrate 11 and the remaining portion 12p of the second substrate 12 is larger than the width of the electrical components 13, connecting multiple electrical components 13 in parallel makes it possible to flow current evenly to one end of each of the first substrate 11 and the second substrate 12. Furthermore, when multiple electrical components 13 are connected in parallel, resonance is likely to occur due to the element values ​​and parasitic components of the multiple electrical components 13, but by adjusting the element values ​​so that the resonance frequency is outside the signal band of the amplifier 1, this does not adversely affect the signal transmission of high-frequency signals.

[0089] Furthermore, in this embodiment, since a plurality of types of substrates are used, the combiner 6 can be designed over a wide range of characteristic impedances, thereby improving the degree of freedom in designing the amplifier 1.

[0090] Furthermore, when multiple capacitors are connected in parallel as electrical components 13 between a portion 11p of first substrate 11 and the remaining portion 12p of second substrate 12, even if the capacitance of the capacitors fluctuates, if the capacitance itself is large, the resonant frequency expressed by equation (1) does not change significantly, and therefore, capacitance deviations of the capacitors due to manufacturing variations can be absorbed.

[0091] Furthermore, when electrical component 13 is connected between portion 11p of first substrate 11 and remaining portion 12p of second substrate 12, if any malfunction occurs in amplifier 1, the cause of the malfunction can be identified by separating it into the portion 11p side of first substrate 11 and the remaining portion 12p side of second substrate 12, making it easier to identify the cause of the malfunction.

[0092] [Note] [Item 1] a first substrate having a first impedance converter that converts the impedance of an output signal of a first amplifier that amplifies an input first signal; a second substrate having a second impedance converter that converts the impedance of an output signal of a second amplifier that amplifies an input second signal; a third impedance converter having an electric component that is partly provided on the first substrate and the remaining partly provided on the second substrate and that passes AC signals and blocks DC signals; The output signal of the first impedance converter and the output signal of the third impedance converter are combined and output. Electrical circuit. [Item 2] a combiner having the first impedance converter, the second impedance converter, and the third impedance converter, which combines an output signal of the first impedance converter and an output signal of the third impedance converter and outputs the combined signal; Item 1. The electrical circuit described in item 1. [Item 3] a combining node that combines an output signal of the first impedance converter and an output signal of the third impedance converter; the first substrate has a branch portion branching from the combined node toward the second substrate, a portion of the first substrate is provided at one end of the branch portion; Item 1 or 2. An electric circuit according to item 1 or 2. [Item 4] the electrical lengths of the parasitic components of the first amplifier and the first impedance converter are 90 degrees; the electrical lengths of the parasitic components of the second amplifier and the second impedance converter are 90 degrees; The electrical length of the third impedance converter is 90 degrees. 4. The electric circuit according to any one of items 1 to 3. [Item 5] the electrical component is soldered to the portion of the first substrate and the remaining portion of the second substrate; 5. The electric circuit according to any one of items 1 to 4. [Item 6] At least one of the element values ​​of the electrical components, the type of the first substrate, and the type of the second substrate is adjusted so that the impedance seen by the combiner to the first amplifier describes an impedance locus that rotates counterclockwise around the center of a Smith chart that represents frequency characteristics. Item 2. The electrical circuit described in item 2. [Item 7] At least one of the element values ​​of the electrical components, the type of the first substrate, and the type of the second substrate is adjusted so that the phase of the combined signal advances more as the frequency of the combined signal increases. 7. The electric circuit according to any one of items 1 to 6. [Item 8] The first substrate and the second substrate are different from each other in at least one of dielectric constant, thickness, and substrate material. Item 7. The electrical circuit according to item 7. [Item 9] the electrical component includes at least one of a capacitor, an inductor, or a resistor; Item 9. An electric circuit according to any one of items 1 to 8. [Item 10] a width of a portion of the first substrate and a width of another portion of the second substrate are greater than a width of the electrical component; 10. The electric circuit according to any one of items 1 to 9. [Item 11] the third impedance converter has a plurality of the electrical components connected in parallel between a part of the first substrate and another part of the second substrate; Item 11. The electrical circuit according to item 10. [Item 12] element values ​​of the plurality of electrical components are set so that the resonant frequencies of the plurality of electrical components are outside the frequency band of the combined signal; Item 12. The electrical circuit according to item 11. [Item 13] a load converter for converting the impedance of the signal combined by the combiner; 13. The electric circuit according to any one of items 1 to 12. [Item 14] the load converter is disposed on the first substrate; Item 14. The electrical circuit according to item 13. [Item 15] a gradient of change in the passing phase with respect to a frequency change of the signal that has undergone impedance conversion by the third impedance converter is smaller than a gradient of change in the passing phase with respect to a frequency change of the signal that has undergone impedance conversion by the first impedance converter, and is also smaller than a gradient of change in the passing phase with respect to a frequency change of the signal that has undergone impedance conversion by the second impedance converter; 15. The electric circuit according to any one of items 1 to 14. [Item 16] a gradient of a change in a passing phase of a signal that has undergone impedance conversion by the third impedance converter with respect to a change in frequency is larger than a gradient of a change in a passing phase of a signal that flows through a microstrip line extending in one direction with respect to a change in frequency; 16. The electric circuit according to any one of items 1 to 15. [Item 17] the characteristic impedance of the first impedance converter, the characteristic impedance of the second impedance converter, and the characteristic impedance of the third impedance converter have a predetermined magnitude relationship. 17. The electric circuit according to any one of items 1 to 16. [Item 18] the characteristic impedance of the first impedance converter is greater than the characteristic impedance of the third impedance converter, and the characteristic impedance of the second impedance converter is greater than the characteristic impedance of the first impedance converter; Item 18. The electrical circuit according to item 17. [Item 19] In a circuit in which the electrical component is disposed between the first substrate and the second substrate, a first electromagnetic field simulation is performed by arranging feed lines at an end of the first substrate and an end of the second substrate, assuming that the second substrate is made of the same material as the first substrate, and calculating S parameters for the first substrate that are input to a first port and a second port and output from a third port and a fourth port; Next, assuming that the second substrate is made of the same material as the first substrate, feed lines are placed at the end of the first substrate and the end of the second substrate, and a second electromagnetic field simulation is performed to calculate S parameters for the second substrate that are input to the first port and the second port and output from the third port and the fourth port; the third port and the fourth port in the first electromagnetic field simulation are connected to the third port and the fourth port in the second electromagnetic field simulation by S parameters of the electrical component. 19. The electric circuit according to any one of items 1 to 18. [Item 20] An electric circuit according to any one of items 1 to 19; the first amplifier; The second amplifier, amplifier.

[0093] The aspects of the present disclosure are not limited to the individual embodiments described above, but include various modifications that may be conceived by those skilled in the art, and the effects of the present disclosure are not limited to the above-described contents. In other words, various additions, modifications, and partial deletions are possible within the scope of the conceptual idea and spirit of the present disclosure, which is derived from the contents defined in the claims and their equivalents. [Explanation of symbols]

[0094] 1 amplifier, 2 divider, 3 DC voltage source, 4 main amplifier, 4a first current source, 4b parasitic capacitor, 4c parasitic inductor, 5 peak amplifier, 5a second current source, 5b parasitic capacitor, 5c parasitic inductor, 5d first peak amplifier, 5e second peak amplifier, 6 combiner, 6a combining node, 7 impedance converter, 7a first impedance converter, 7b second impedance converter, 7c third impedance converter, 8 load impedance, 9 amplifier, 10 electrical circuit, 11 first board, 11a one end, 11b branch portion, 12 second board, 12a one end, 12b branch portion, 12c one end, 13 electrical component, 13a first electrical component, 13b second electrical component, 13C capacitor, 13L parasitic inductor, 14 load converter, 14a fourth impedance converter, 14b fifth impedance converter, 14c Sixth impedance converter, 17 first feed line, 18 second feed line, 19 third feed line, 20 fourth feed line, 21 third substrate, 21a one end

Claims

1. a first substrate having a first impedance converter that converts the impedance of an output signal of a first amplifier that amplifies an input first signal; a second substrate having a second impedance converter that converts the impedance of an output signal of a second amplifier that amplifies an input second signal; a third impedance converter having an electrical component that is partly provided on the first substrate and the remaining partly provided on the second substrate and that passes AC signals and blocks DC signals; The output signal of the first impedance converter and the output signal of the third impedance converter are combined and output. Electrical circuit.

2. a combiner having the first impedance converter, the second impedance converter, and the third impedance converter, which combines an output signal of the first impedance converter and an output signal of the third impedance converter and outputs the combined signal; 10. The electrical circuit of claim 1.

3. a combining node that combines an output signal of the first impedance converter and an output signal of the third impedance converter; the first substrate has a branch portion branching from the combined node toward the second substrate, a portion of the first substrate is provided at one end of the branch portion; 10. The electrical circuit of claim 1.

4. the electrical length of the parasitic component of the first amplifier and the electrical length of the first impedance converter are 90 degrees; the electrical length of the parasitic component of the second amplifier and the electrical length of the second impedance converter are 90 degrees; The electrical length of the third impedance converter is 90 degrees.

10. The electrical circuit of claim 1.

5. the electrical component is soldered to the portion of the first substrate and the remaining portion of the second substrate; 10. The electrical circuit of claim 1.

6. At least one of the element values ​​of the electrical components, the type of the first substrate, and the type of the second substrate is adjusted so that the impedance seen by the combiner to the first amplifier describes an impedance locus that rotates counterclockwise around the center of a Smith chart that represents frequency characteristics.

3. The electrical circuit of claim 2.

7. At least one of the element values ​​of the electrical components, the type of the first substrate, and the type of the second substrate is adjusted so that the phase of the combined signal advances more as the frequency of the combined signal increases.

10. The electrical circuit of claim 1.

8. The first substrate and the second substrate are different from each other in types including at least one of dielectric constant, thickness, and substrate material.

8. The electrical circuit of claim 7.

9. the electrical component includes at least one of a capacitor, an inductor, or a resistor; 10. The electrical circuit of claim 1.

10. a width of a portion of the first substrate and a width of another portion of the second substrate are greater than a width of the electrical component; 10. The electrical circuit of claim 1.

11. the third impedance converter has a plurality of the electrical components connected in parallel between a part of the first substrate and another part of the second substrate; 11. The electrical circuit of claim 10.

12. element values ​​of the plurality of electrical components are set so that the resonant frequencies of the plurality of electrical components are outside the frequency band of the combined signal; 12. The electrical circuit of claim 11.

13. a load converter for converting the impedance of the signal combined by the combiner; 3. The electrical circuit of claim 2.

14. the load converter is disposed on the first substrate; 14. The electrical circuit of claim 13.

15. a gradient of change in the passing phase with respect to a frequency change of the signal that has undergone impedance conversion by the third impedance converter is smaller than a gradient of change in the passing phase with respect to a frequency change of the signal that has undergone impedance conversion by the first impedance converter, and is also smaller than a gradient of change in the passing phase with respect to a frequency change of the signal that has undergone impedance conversion by the second impedance converter; 10. The electrical circuit of claim 1.

16. a gradient of a change in a passing phase of a signal that has undergone impedance conversion by the third impedance converter with respect to a change in frequency is larger than a gradient of a change in a passing phase of a signal that flows through a microstrip line extending in one direction with respect to a change in frequency; 10. The electrical circuit of claim 1.

17. the characteristic impedance of the first impedance converter, the characteristic impedance of the second impedance converter, and the characteristic impedance of the third impedance converter have a predetermined magnitude relationship.

10. The electrical circuit of claim 1.

18. the characteristic impedance of the first impedance converter is greater than the characteristic impedance of the third impedance converter, and the characteristic impedance of the second impedance converter is greater than the characteristic impedance of the first impedance converter; 18. The electrical circuit of claim 17.

19. In a circuit in which the electrical components are arranged between the first substrate and the second substrate, a first electromagnetic field simulation is performed by arranging feed lines at an end of the first substrate and an end of the second substrate, assuming that the second substrate is made of the same material as the first substrate, and calculating S parameters for the first substrate that are input to a first port and a second port and output from a third port and a fourth port; Next, assuming that the second substrate is made of the same material as the first substrate, a second electromagnetic field simulation is performed by arranging feed lines at an end of the first substrate and an end of the second substrate, and S parameters for the second substrate that are input to the first port and the second port and output from the third port and the fourth port are calculated; the third port and the fourth port in the first electromagnetic field simulation are connected to the third port and the fourth port in the second electromagnetic field simulation by S parameters of the electrical component.

10. The electrical circuit of claim 1.

20. an electric circuit according to claim 1; the first amplifier; The second amplifier, amplifier.

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