Context switching verification method and apparatus

Abstract

The present application relates to a context switching verification method and apparatus. The apparatus comprises: an excitation generation module generates an excitation signal according to a verification requirement for a module under test, and sends same to a reference model module and the module under test, the excitation signal being used for indicating a command sequence which needs to be processed and comprises at least one command under test; the module under test processes each command under test according to the excitation signal, sends at a preset processing node a target signal to the reference model module, and sends to a response inspection module first data generated during the command processing process; the reference model module processes each command under test according to the excitation signal and the target signal, and sends to the response inspection module second data generated during the processing command process; and the response inspection module verifies, according to the first data and the second data, the capability of the module under test executing a context switching command. The present application can automatically and accurately compare data and behaviors during context switching, thereby achieving context switching capability verification.

Description

Context switching verification method and device

[0001] This application claims priority to the Chinese patent application filed on August 22, 2023, with application number 202311061317.1 and invention name “Context Switching Verification Method and Device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of computer technology, and in particular to a context switching verification method and device. Background Art

[0003] In general-purpose or application-specific chip design, a front-end processing module is typically required. This front-end processing module reads command sequences from memory, parses them sequentially, and schedules other components on the chip to work together to execute the commands, thereby completing the entire chip's design functionality.

[0004] To quickly respond to user requests and implement time-division multiplexing, the chip must be capable of rapid context switching. When a high-priority task arrives or the time resources allocated by the current user expire, the chip, with the assistance of software, should stop the currently executing task and save the scene for future restoration and continuation. This context switching is monitored and handled by the front-end processing module.

[0005] Since the context switch event is asynchronous to the current operation of the chip and the context switch trigger can occur at any time, verifying the context switch function of the front-end processing module becomes a difficult design and verification problem.

[0006] In related technologies, the context switching capabilities of front-end processing modules are verified using a randomized testing approach in a separate hardware description language (HDL) design environment. Comparison of test results relies on manual verification and repeated switching experiments. However, environments based on a separate HDL design have the disadvantages of being relatively complex to implement and requiring a lengthy hardware error verification process.

[0007] Summary of the Invention

[0008] In view of this, the present application proposes a context switch verification method and device.

[0009] According to one aspect of the present application, a context switch verification device is provided, the device comprising: a stimulus generation module, a reference model module, a module to be tested, and a response checking module;

[0010] The stimulus generation module is configured to generate a stimulus signal according to verification requirements for the module to be tested, and send the stimulus signal to the reference model module and the module to be tested, wherein the stimulus signal indicates a command sequence to be processed, and the command sequence includes at least one command to be tested;

[0011] The module to be tested is configured to, during the process of processing each command to be tested according to the stimulus signal, send a target signal to the reference model module at a preset processing node, wherein the target signal is a command synchronization signal or a context switch signal, and the context switch signal is used to indicate that a context switch command has been received and a corresponding context switch operation has been performed; and send first data generated during the command processing process to the response checking module;

[0012] The reference model module is configured to process each of the commands to be tested according to the excitation signal and the target signal, and send second data generated during the command processing to the response checking module;

[0013] The response checking module is used to verify the ability of the module to be tested to execute the context switch command based on the first data and the second data.

[0014] In a possible implementation, the reference model module includes:

[0015] a first execution unit, configured to, when the target signal is the command synchronization signal, execute the command to be tested after the target preset processing node based on the command synchronization signal and the excitation signal until a next preset processing node is identified, the target preset processing node being the preset processing node corresponding to the command synchronization signal;

[0016] The second execution unit is configured to execute a context switch operation corresponding to the context switch command when the target signal is the context switch signal.

[0017] In a possible implementation, the module to be tested includes:

[0018] a third execution unit, configured to obtain the command to be tested from the command sequence and execute the command to be tested;

[0019] a switching unit, configured to, upon identifying a current preset processing node and detecting the context switch command in a target processing phase, determine completion of current processing of the command to be tested, execute a context switch operation corresponding to the context switch command, and generate the context switch signal after completion of the context switch operation;

[0020] a non-switching unit, configured to, when a current preset processing node is identified and the context switch command is not detected in a target processing phase, generate the command synchronization signal corresponding to the current preset processing node;

[0021] The target processing stage is a processing stage between the last preset processing node and the current preset processing node.

[0022] In a possible implementation, the preset processing nodes include a command acquisition completion node, a command decoding completion node, and a command execution completion node, and the command synchronization signal includes an acquisition command synchronization signal, a decoding command synchronization signal, and an execution command synchronization signal;

[0023] The third execution unit includes:

[0024] A command acquisition subunit, configured to acquire each of the commands to be tested from the command sequence, and send the acquired commands to be tested to the command decoding subunit;

[0025] The command decoding subunit is used to decode the received command to be tested and send the decoded command to be tested to the command execution subunit;

[0026] The command execution subunit is used to execute the received decoded command to be tested;

[0027] The non-switching unit includes:

[0028] a first non-switching subunit, configured to, upon detecting completion of acquisition of the command to be tested, determine and identify a command acquisition completion node, and generate the acquisition command synchronization signal when the context switch command is not detected in the target processing phase;

[0029] a second non-switching subunit, configured to, upon detecting completion of decoding of a command to be tested and determining identification of a command decoding completion node, generate the decoding command synchronization signal if the context switch command is not detected in the target processing stage;

[0030] The third non-switching subunit is used to generate the execution command synchronization signal when detecting that the execution of one of the commands to be tested is completed and identifying the command execution completion node, and when the context switching command is not detected in the target processing stage.

[0031] In a possible implementation, the switching unit includes:

[0032] The context switching subunit is used to, in a context detection scenario, determine that the current processing of the command to be tested is completed when the current preset processing node is identified and the context switching command is detected in the target processing stage, execute the context switching operation corresponding to the context switching command, and generate the context switching signal after completing the context switching operation.

[0033] In a possible implementation, the module to be tested further includes:

[0034] The scene recognition unit is configured to obtain scene recognition information and, when the scene recognition information is target information, determine that the scene is in a context detection scene.

[0035] In a possible implementation, the module to be tested further includes:

[0036] A sequence indicating unit, configured to send a target signal to the reference model module at the preset processing node during processing of each of the commands to be tested according to the stimulus signal in a command sequence processing scenario;

[0037] An out-of-order indication unit is used to send the target signal and command execution sequence information to the reference model module at the preset processing node during the process of processing each of the commands to be tested according to the excitation signal in an instruction out-of-order processing scenario, wherein the command execution sequence information is used to indicate the command execution sequence of the reference model module.

[0038] In a possible implementation, the reference model module includes:

[0039] a command acquiring unit, configured to determine, based on the command synchronization signal and the excitation signal, the command to be tested that has been acquired by the module to be tested, acquire the command to be tested that has been acquired by the module to be tested from the command sequence, and send the acquired command to be tested to a command decoding unit;

[0040] The command decoding unit is configured to determine, based on the command synchronization signal, the command to be tested that has been decoded by the module to be tested, decode the received command to be tested, and send the decoded command to the command execution unit;

[0041] The command execution unit is configured to determine, based on the command synchronization signal, the command to be tested that has been completed by the module to be tested, and decode the received command to be tested.

[0042] In a possible implementation, the response checking module is further configured to generate feedback information according to the first data and the second data, and send the feedback information to the stimulus generating module;

[0043] The stimulus generation module is further configured to generate a new stimulus signal based on the feedback information, and send the new stimulus signal to the module to be tested and the reference model module.

[0044] According to another aspect of the present application, a context switch verification method is provided for verifying a module to be tested, the method comprising:

[0045] Generate an excitation signal according to verification requirements for the module to be tested, and send the excitation signal to the reference model module and the module to be tested, wherein the excitation signal is used to indicate a command sequence to be processed, and the command sequence includes at least one command to be tested;

[0046] In the process of controlling the module to be tested to process each command to be tested according to the stimulus signal, a target signal is sent to the reference model module at a preset processing node, wherein the target signal is a command synchronization signal or a context switch signal, and the context switch signal is used to indicate that a context switch command has been received and a corresponding context switch operation has been performed;

[0047] Controlling the reference model module to process each command to be tested according to the excitation signal and the target signal;

[0048] The ability of the module to be tested to execute the context switch command is verified based on the first data generated by the module to be tested in the process of processing the command and the second data generated by the reference model module in the process of processing the command.

[0049] According to another aspect of the present application, a context switch verification device is provided, comprising: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to implement the above method when executing the executable instructions.

[0050] According to another aspect of the present application, a non-volatile computer-readable storage medium is provided, on which computer program instructions are stored, wherein the computer program instructions implement the above method when executed by a processor.

[0051] According to another aspect of the present application, a computer program product is provided, comprising a computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code. When the computer-readable code runs in a processor of an electronic device, the processor in the electronic device executes the above method.

[0052] The context switching verification method and device provided by the present application adopt a joint simulation environment with a one-way synchronization strategy. Through the collaboration between the module to be tested and the reference model module, the module to be tested sends a command synchronization signal or a context switching signal to the reference model module through a one-way signal path, so that the behavior of the reference model module and the module to be tested remain consistent. It can realize automatic and accurate comparison of data and behavior during context switching in a random switching scenario, and fully complete the context switching capability verification work. The context switching verification work can be completed automatically, and the data and behavior of the reference model and the module to be tested when the context switching occurs can be automatically compared. Without adding additional hardware design, it is convenient for designers to find and fix errors. It is also compatible with scenarios that do not require context switching verification.

[0053] Other features and aspects of the present application will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the application and, together with the description, serve to explain the principles of the application.

[0055] FIG1 shows a block diagram of a context switch verification device according to an embodiment of the present application.

[0056] FIG2 shows a block diagram of a context switch verification device according to an embodiment of the present application.

[0057] FIG3 shows a command processing timing diagram in a non-switching detection scenario according to an embodiment of the present application.

[0058] FIG4 shows a command processing sequence diagram in a context detection scenario according to an embodiment of the present application.

[0059] FIG5 shows a schematic diagram of a workflow of a reference model module in a context switch verification device according to an embodiment of the present application.

[0060] FIG6 shows a flowchart of a context switch verification method according to an embodiment of the present application.

[0061] FIG7 shows a block diagram of an apparatus for context switching according to an embodiment of the present application. DETAILED DESCRIPTION

[0062] Various exemplary embodiments, features, and aspects of the present application will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise indicated.

[0063] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0064] In addition, numerous specific details are provided in the detailed description below to better illustrate the present application. Those skilled in the art will appreciate that the present application can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art are not described in detail in order to highlight the main purpose of the present application.

[0065] In related technologies, the context switching capabilities of front-end processing modules are verified in environments designed using a separate hardware description language. This verification method cannot directly verify the correctness of context switching. Instead, it relies on repeatedly switching between different context environments and comparing the final results to determine whether the front-end processing module has the expected context switching capabilities. For some typical scenarios, manual inspection is used to manually obtain switching data from a simulation environment and examine the switching behavior.

[0066] To solve the above problems, the present application provides a context switch verification method and device, which adopts a joint simulation environment with a one-way synchronization strategy. Through the collaboration of reference model and hardware description language design, it can realize the automatic and accurate comparison of data and behavior during context switching in random switching scenarios, and fully complete the context switching capability verification work. The context switch verification work can be completed automatically, and the data and behavior of the reference model and the module to be tested when the context switch occurs can be automatically compared. Without adding additional hardware design, it is convenient for designers to find and fix errors. It is also compatible with scenarios that do not require context switch verification.

[0067] Figures 1 and 2 show a block diagram of a context switch verification device according to an embodiment of the present application. As shown in Figure 1 , the device includes a stimulus generation module 41 , a module to be tested 42 , a reference model module 43 , and a response checking module 44 .

[0068] Stimulus generation module 41 is configured to generate a stimulus signal based on verification requirements for module under test 42 and send the stimulus signal to module under test 42 and reference model module 43. The stimulus signal may indicate a command sequence that module under test 42 and reference model module 43 need to process. In some embodiments, the stimulus signal may also indicate output data requirements for verification purposes. The command sequence may include at least one command under test. For example, the command sequence may include multiple commands under test. Of course, in some cases, the command sequence may include only one command under test.

[0069] The module to be tested 42 may be designed based on a hardware description language and may implement the functions and roles of a front-end processing module in a general-purpose or application-specific chip design. Specifically, it may acquire and parse commands in a command sequence and schedule other modules on the chip for coordinated execution. Each command to be tested may be a command generated based on a test case that meets the functional requirements of the front-end processing module corresponding to the module to be tested 42.

[0070] The module to be tested 42 is used to process each command to be tested according to the excitation signal, and the processing of each command to be tested includes: acquisition, decoding (also known as parsing), and execution in sequence. In the process of processing each command to be tested according to the excitation signal, the module to be tested 42 sends a target signal to the reference model module 43 at a preset processing node. The target signal is a command synchronization signal or a context switch signal. The context switch signal is used to indicate the situation where a context switch command is received and the corresponding context switch operation is performed. The module to be tested 42 is also used to send the first data generated in the process of processing the command to the response check module 44. The first data can be determined based on the output data requirement in the excitation signal. In some embodiments, the output data requirement can also be pre-set so that the module to be tested 42 can obtain and output the first data in the process of processing the command based on the preset output data requirement.

[0071] A preset processing node is a synchronization point defined by the module under test 42. This node is the time point at which certain functions are completed, such as the time point at which the command under test is acquired, the time point at which the command under test is decoded, or the time point at which the command under test is executed. There can be multiple preset processing nodes defined. Only when a preset processing node is reached will the module under test 42 check the context switch request signal in the input signal and decide whether to perform a context switch.

[0072] The command synchronization signal is used to indicate that the command under test has been processed at a predetermined processing node, where the processing may be any of acquisition, decoding, and execution. In some embodiments, the command synchronization signal is further used to indicate the type of processing completed for the command under test, i.e., whether the processing is completed for the command under test, such as acquisition, decoding, or execution.

[0073] The reference model module 43 includes a reference model, which may be a behavioral model implemented using a high-level language, and is used to provide a behavioral reference for the module to be tested 42 designed based on a hardware description language.

[0074] The reference model module 43 is configured to process each command to be tested according to the excitation signal and the target signal, and send the second data generated during the command processing to the response checking module 44 .

[0075] The response checking module 44 collects data output from the module to be tested 42 and the reference model module 43, compares the output data of the two parts to see if they match, and determines whether the module to be tested 42 conforms to the definition of the reference model.

[0076] Response checking module 44 is configured to verify the ability of module under test 42 to execute the context switch command based on the first data and the second data. In some embodiments, by comparing the first data and the second data, the ability of module under test 42 can be verified, and any problems currently existing in module under test 42 can be identified, thereby enabling optimization of module under test 42.

[0077] In a possible implementation, as shown in FIG. 2 , the reference model module 43 may include a first execution unit 434 and a second execution unit 435 .

[0078] The first execution unit 434 is used to execute the command to be tested after the target preset processing node based on the command synchronization signal and the excitation signal when the target signal is a command synchronization signal, until the next preset processing node is identified, and the target preset processing node is the preset processing node corresponding to the command synchronization signal.

[0079] The second execution unit 435 is configured to execute a context switch operation corresponding to the context switch command when the target signal is a context switch signal.

[0080] In the related art, the reference model module 43 and the module to be tested 42 designed based on the hardware description language respectively independently receive the stimulus signal from the stimulus generation module 41, and output the data generated by their own modules to the response check module 44 for comparison by the response check module 44. When testing the context switching function, this organizational method is unpredictable for the module to be tested 42 and the reference model module 43 because the moment when the context switch is initiated is unpredictable, resulting in the two occurring at different context switching points, causing the response check module 44 to be unable to perform automatic comparison in the context switching scenario. This application designs a one-way signal path, in which the module to be tested 42 outputs its own internal signal (i.e., the target signal described above) to the reference model module 43 to solve this problem.

[0081] The module to be tested 42 sends a command synchronization signal or a context switch signal to the reference model module 43 via the above-mentioned unidirectional signal path. If the reference model module 43 receives a command synchronization signal, the reference model module 43 executes the command to be tested after the target preset processing node based on the command synchronization signal and the stimulus signal until the next preset processing node is identified. If the reference model module 43 receives a context switch signal, the reference model module 43 executes the context switch operation corresponding to the context switch command. In this way, synchronization point related information (including whether to execute the command to be tested after the target preset processing node or to execute the context switch operation corresponding to the context switch command) is transmitted to the reference model module 43 via the unidirectional signal path. In addition, this synchronization point related information can be obtained by directly pulling the existing signals in the module to be tested 42, thereby reducing the complexity of the hardware language design for verifying the context switch function.

[0082] In the context switch test scenario, when executing the same command sequence, the reference model module 43 waits at a predefined processing node until it receives the target signal from the module under test 42, and then performs the same action as the module under test 42. This ensures that the module under test 42 and the reference model module 43 have the same context switch timing in the context switch function verification scenario, ensuring consistency between the two scenarios. This in turn makes the data in the context switch verification scenario comparable, allowing the response check module 44 to complete automated testing.

[0083] In a possible implementation, as shown in FIG. 2 , the module to be tested 42 may include a third execution unit 23 , a switching unit 22 , and a non-switching unit 24 .

[0084] The third execution unit 23 is configured to obtain a command to be tested from the command sequence and execute the command to be tested.

[0085] The switching unit 22 is used to determine that the current processing of the command to be tested is completed when the current preset processing node is identified and the context switch command is detected in the target processing stage, execute the context switch operation corresponding to the context switch command, and generate a context switch signal after completing the context switch operation.

[0086] The non-switching unit 23 is configured to generate a command synchronization signal corresponding to the current preset processing node when the current preset processing node is identified and no context switch command is detected in the target processing stage.

[0087] The target processing stage is the processing stage between the previous preset processing node and the current preset processing node.

[0088] The module to be tested 42 will only determine whether to execute the context switch action based on whether a context switch command is detected within a period of time before the preset processing node check (ie, the target processing stage).

[0089] In the above manner, when the module to be tested 42 detects a context switching command in the target processing phase, it determines that the current processing of the command to be tested is completed, executes the context switching operation corresponding to the context switching command, generates a context switching signal after completing the context switching operation, and then sends the context switching signal to the reference model module 43. When the reference model module 43 receives the context switching signal, it executes the context switching operation corresponding to the context switching command, thereby ensuring that in the context switching function verification scenario, the module to be tested 42 and the reference model module 43 have the same context switching time point, ensuring the consistency of the scenarios of the two, and making the data in the context switching verification scenario comparable. The response check module 44 can complete the automated detection based on this.

[0090] In addition, when the module to be tested 42 does not detect a context switching command in the target processing stage, it generates a command synchronization signal corresponding to the current preset processing node, and then sends the command synchronization signal to the reference model module 43. When the reference model module receives the command synchronization signal, it executes the command to be tested after the target preset processing node based on the command synchronization signal and the excitation signal until the next preset processing node is identified, thereby ensuring that the behaviors of the reference model module 43 and the module to be tested 42 remain consistent.

[0091] In some embodiments, the preset processing nodes include a command acquisition completion node, a command decoding completion node, and a command execution completion node, and the command synchronization signal includes an acquisition command synchronization signal, a decoding command synchronization signal, and an execution command synchronization signal. The acquisition command synchronization signal is used to indicate that the command to be tested has been acquired and the processing completed for the command to be tested is acquisition. The decoding command synchronization signal is used to indicate that the command to be tested has been decoded and the processing completed for the command to be tested is decoding. The execution command synchronization signal is used to indicate that the command to be tested has been executed and the processing completed for the command to be tested is execution.

[0092] 2 , the third execution unit 23 may include a command acquisition subunit 231, a command decoding subunit 232, and a command execution subunit 233. The non-switching unit 42 may include a first non-switching subunit 241, a second non-switching subunit 242, and a third non-switching subunit 243.

[0093] The command acquisition subunit 231 is configured to acquire each command to be tested from the command sequence and send the acquired command to be tested to the command decoding subunit 232. The command decoding subunit 232 is configured to decode the received command to be tested and send the decoded command to be tested to the command execution subunit 233. The command execution subunit 233 is configured to execute the received decoded command to be tested.

[0094] The first non-switching subunit 241 is configured to generate an acquisition command synchronization signal upon detecting the completion of acquisition of a command to be tested, determining the identification of a command acquisition completion node, and if no context switch command is detected in the target processing phase. The second non-switching subunit 242 is configured to generate a decoding command synchronization signal upon detecting the completion of decoding of a command to be tested, determining the identification of a command decoding completion node, and if no context switch command is detected in the target processing phase. The third non-switching subunit 243 is configured to generate an execution command synchronization signal upon detecting the completion of execution of a command to be tested, determining the identification of a command execution completion node, and if no context switch command is detected in the target processing phase.

[0095] The command acquisition completion node, command decoding completion node, and command execution completion node are all preset processing nodes. The command acquisition completion node refers to the time point when the acquisition of the command to be tested is completed, the command decoding completion node refers to the time point when the decoding of the command to be tested is completed, and the command execution completion node refers to the time point when the execution of the command to be tested is completed.

[0096] For example, assuming that the command sequence includes commands A, B, and C to be tested, and no context switching is performed during the processing, the process of the command acquisition subunit 231, the command decoding subunit 232, and the command execution subunit 233 in the module to be tested 42 processing the commands A, B, and C to be tested can be as shown in Figure 3, and the command synchronization signal sent by the module to be tested 42 to the reference model module 43 can be as shown in Table 1 below.

[0097] Table 1 Command synchronization signal examples

[0098] Through the above method, based on the acquisition, decoding and execution of the command to be tested, the preset processing node is defined, so that the module to be tested 42 can send the command synchronization signal or context switching signal to the reference model module 43 in time at the above preset processing node, ensuring the uniformity of the behavior of the two.

[0099] In addition, in actual implementation, the above-mentioned command synchronization signals are often internal signals in the existing hardware description language design. When the module to be tested 42 sends the above-mentioned signals to the reference model module 43, it is only necessary to pull out these existing internal signals without making any modifications to the hardware description language design.

[0100] In one possible implementation, as shown in FIG2 , the switching unit 22 may include a context switching subunit 221. The context switching subunit 221 is configured to, in a context detection scenario, upon identifying a current preset processing node and detecting a context switching command in a target processing phase, determine that current processing of the command to be tested is complete, execute a context switching operation corresponding to the context switching command, and generate a context switching signal after the context switching operation is completed.

[0101] In this way, by setting the switching unit and the non-switching unit, it is possible to implement testing in two scenarios, with and without context switching, to meet different testing requirements.

[0102] In some embodiments, the context switching sub-unit 221 executing the context switching command may include: after the control command acquisition sub-unit 231 completes the currently ongoing acquisition of the command to be tested, or after the control command decoding sub-unit 232 completes the currently ongoing decoding of the command to be tested, or after the control command execution sub-unit 233 completes the currently ongoing execution of the command to be tested (that is, completing the current processing of the command to be tested), the control command acquisition sub-unit 231, the command decoding sub-unit 232 and the command execution sub-unit 233 suspend subsequent processing of the command to be tested, save the processing completion status of the current command sequence, and then process the command task indicated by the context switching command; after completing the processing of the command task indicated by the context switching command, a context switching signal is generated. For example, as shown in Figure 4, assuming that the command sequence includes commands A, B, and C to be tested, and a context switch command is received at time tB during the processing process, then at time tB, only the command decoding subunit 232 in the module to be tested 42 is decoding the command to be tested B, and the other two subunits are in a suspended working state. The context switch subunit 221 can perform a context switch operation based on the context switch command after determining that the decoding of the command to be tested B is completed, and generate a context switch signal after completing the context switch operation (assuming that the context switch operation is completed at time tx). In the above process, the target signal (including the command synchronization signal and the context switch signal) sent by the module to be tested 42 to the reference model module 43 can be shown in Table 2 below.

[0103] Table 2 Signal examples

[0104] In this way, when a context switch occurs, the reference model module 43 and the module to be tested 42 are guaranteed to have a consistent state, thereby ensuring that in the application scenario of context switching, the data can be automatically compared, avoiding manual inspection.

[0105] In this embodiment, as shown in FIG. 1 and FIG. 2 , the module to be tested 42 is further configured to send first data corresponding to output data requirements generated during the processing of commands (including commands to be tested and context switching commands) to the response checking module 44 .

[0106] In one possible implementation, as shown in FIG2 , the module to be tested 42 may further include a scene recognition unit 21. The scene recognition unit 21 is configured to obtain scene recognition information and, if the scene recognition information is target information, determine that the module is in a context detection scenario; and, if the scene recognition information is not target information or is non-switching information, determine that the module is in a non-switching detection scenario. The target information may be any information that indicates that context switch detection needs to be performed on the module to be tested 42. The non-switching information may be any information that indicates that context switch detection does not need to be performed on the module to be tested 42. In some embodiments, the scene recognition unit 21 may obtain scene recognition information from an excitation signal, or may receive scene recognition information from an external device. Those skilled in the art may configure the method for determining scene recognition information by the scene recognition unit 21 based on actual needs, and this application does not impose any restrictions thereon. In some embodiments, the scene recognition unit 21 may further, upon determining a detection scenario, send first scene indication information to the switching unit 22 and the non-switching unit 24. The first scene indication information is configured to indicate whether the current detection scenario is a context detection scenario requiring execution of a context switch command, or a non-switching detection scenario not requiring execution of a context switch command. The scene recognition unit 21 can identify whether the current scene is a context detection scene, and synchronize the recognition result to the switching unit 22 and the non-switching unit 24, so as to generate a context switching signal when the scene is a context detection scene, and generate a command synchronization signal when the scene is not a context detection scene, thereby ensuring the accuracy of the generated target signal.

[0107] In some embodiments, the scene recognition unit 21 is further configured to determine the command processing scene in which the command is being processed. The command processing scene includes one of a sequential command processing scene and an out-of-order command processing scene. After determining the command processing scene, the scene recognition unit 21 sends second scene indication information to the out-of-order indication unit 25, the sequential indication unit 26, and the third execution unit 23. The second scene indication information is used to indicate whether the current command processing scene is a sequential command processing scene or an out-of-order command processing scene.

[0108] In one possible implementation, as shown in FIG2 , the module to be tested 42 may further include a disorder indication unit 25 and a sequence indication unit 26 . The sequence indication unit 26 is configured to send a target signal to the reference model module 43 at a preset processing node during the process of processing each command to be tested according to the stimulus signal in a command sequence processing scenario. The disorder indication unit 25 is configured to send a target signal and command execution sequence information to the reference model module 43 at a preset processing node during the process of processing each command to be tested according to the stimulus signal in a command sequence processing scenario; the command execution sequence information is used to indicate the command execution sequence of the reference model module 43. In some embodiments, the disorder indication unit 25 and the sequence indication unit 26 may determine whether the current scenario is a command sequence processing scenario or a disordered command processing scenario based on the stimulus signal or the sequence indication information sent by an external device. Those skilled in the art may configure the manner in which the disorder indication unit 25 determines the disordered command processing scenario and the sequence indication unit 26 determines the order processing scenario according to actual needs, and this application does not impose any restrictions on this. The solution of the present application is not only applicable to command sequence processing scenarios, but also to command out-of-order processing scenarios. In the command out-of-order processing scenario, command execution sequence information is sent to the reference model module 43 through the module to be tested 42. This information is used to indicate the command execution sequence of the reference model module 43, ensuring the consistency of the command execution sequence between the reference model module 43 and the module to be tested 42, so that the reference model module 43 has a consistent state when a context switch occurs.

[0109] As shown in Figures 1, 2, and 5, the operations performed by the reference model module 43 after receiving the stimulus signal may include steps S101 to S109. After receiving the stimulus signal, the reference model module 43 first determines whether a context switch test is required (S101). If the reference model module 43 determines that a context switch test is required, it performs a target signal detection (S102). If the reference model module 43 determines that a context switch test is not required, it detects whether a command synchronization signal is received (S108). If the command synchronization signal is detected, it executes step S106. If the command synchronization signal is not detected, it waits for a preset time period (S109) and then continues to execute step S108. If the reference model module 43 determines that the target signal is not detected, it waits for a preset time period and then continues to execute step S102 (S103). If the target signal is detected, it further determines whether the target signal is a command synchronization signal (S104). If the target signal is detected, it executes step S106. If the command synchronization signal is not detected (i.e., a context switch signal is detected), it executes step S105. In step S105, the reference model module 43 performs a corresponding context switch operation based on the context switch signal, and sends the data corresponding to the output data requirement generated by the context switch operation as the second data to the response check module 44. In step S106, the reference model module 43 performs corresponding processing on the command to be tested indicated by the command synchronization signal based on the command to be tested indicated by the command synchronization signal and the processing currently completed by the test module 42 for the command to be tested. After executing the operation performed in response to the command synchronization signal, it is determined whether each command to be tested in the command sequence has completed processing (S107). If all have completed processing, the data corresponding to the output data requirement generated during the processing of the command to be tested is sent as the second data to the response check module 44. If not, step S101 is continued. In some embodiments, the preset time length can be set according to actual needs, and this application does not limit this. It should be understood that the preset time lengths in S109 and S103 above can be the same or different, and this application does not limit this.

[0110] In a possible implementation, as shown in FIG. 2 , the reference model module 43 may further include a command acquiring unit 431 , a command decoding unit 432 , and a command executing unit 433 .

[0111] In some embodiments, the first execution unit 434 can control the command acquisition unit 431, the command decoding unit 432, and the command execution unit 433 based on the command synchronization signal and the excitation signal when the target signal is a command synchronization signal, to execute the command to be tested after the target preset processing node. In some embodiments, the command acquisition unit 431 is used to determine the command to be tested that the module to be tested has completed acquiring based on the command synchronization signal and the excitation signal, acquire the command to be tested that the module to be tested has completed acquiring from the command sequence, and send the acquired command to be tested to the command decoding unit 432. The command decoding unit 432 is used to determine the command to be tested that the module to be tested has completed decoding based on the command synchronization signal, decode the received command to be tested, and send the decoded command to the command execution unit 433. The command execution unit 433 is used to determine the command to be tested that the module to be tested has completed executing based on the command synchronization signal, and decode the received command to be tested.

[0112] By setting a command acquisition unit 431, a command decoding unit 432 and a command execution unit 433 in the reference model module 43, the reference model module 43 can accurately execute the command to be tested after the target preset processing node based on the command synchronization signal when it receives the command synchronization signal, thereby ensuring the consistency between the reference model module 43 and the module to be tested 42 in terms of the command execution progress.

[0113] In some embodiments, as shown in FIG2 , the response detection module 44 is further configured to generate feedback information based on the first data and the second data, and send the feedback information to the stimulus generation module 41. The stimulus generation module 41 is further configured to generate a new stimulus signal based on the feedback, and send the new stimulus signal to the module to be tested 42 and the reference model module 43 for the next round of verification of the module to be tested 42.

[0114] The technical solution provided by the embodiment of the present application adopts a joint simulation environment with a one-way synchronization strategy. Through the collaboration between the module to be tested and the reference model module, the module to be tested sends the command synchronization signal or the context switch signal to the reference model module through a one-way signal path, so that the behavior of the reference model module and the module to be tested remains unified. It can realize the automatic and accurate comparison of the data and behavior during the context switch in the random switching scenario, and fully complete the context switch capability verification work. The context switch verification work can be completed automatically, and the data and behavior of the reference model and the module to be tested when the context switch occurs can be automatically compared. Without adding additional hardware design, it is convenient for designers to find and fix errors. It is also compatible with scenarios that do not require context switch verification.

[0115] FIG6 shows a flow chart of a context switch verification method according to an embodiment of the present application. As shown in FIG6 , for verifying a module to be tested, the method includes:

[0116] Step S601: Generate an excitation signal according to verification requirements for the module to be tested, and send the excitation signal to the reference model module and the module to be tested. The excitation signal is used to indicate a command sequence to be processed, and the command sequence includes at least one command to be tested.

[0117] Step S602: Controlling the module under test to process each command under test according to the stimulus signal, sending a target signal to the reference model module at a preset processing node, wherein the target signal is a command synchronization signal or a context switch signal, and the context switch signal is used to indicate that a context switch command has been received and a corresponding context switch operation has been performed;

[0118] Step S603, controlling the reference model module to process each command to be tested according to the excitation signal and the target signal;

[0119] Step S604 : Verify the ability of the module to be tested to execute the context switch command based on the first data generated by the module to be tested in the process of processing the command and the second data generated by the reference model module in the process of processing the command.

[0120] In some embodiments, the functions or modules included in the above device can be realized through the various steps of the method provided in the embodiments of the present application. The specific implementation of the method steps can refer to the description of the above device embodiment. For the sake of brevity, they will not be repeated here.

[0121] It should be noted that although the context switching method and apparatus are described above using the above embodiments as examples, those skilled in the art will appreciate that the present application is not limited thereto. In fact, users can flexibly set the modules and steps based on their personal preferences and / or actual application scenarios, as long as they comply with the technical solutions of the present application.

[0122] The present application also provides a computer-readable storage medium having computer program instructions stored thereon, which implement the above method when the computer program instructions are executed by a processor. The computer-readable storage medium can be volatile or non-volatile computer-readable storage medium.

[0123] An embodiment of the present application further proposes an electronic device, comprising: a processor; a memory for storing instructions executable by the processor; wherein the processor is configured to implement the above method when executing the instructions stored in the memory.

[0124] An embodiment of the present application also provides a computer program product, including computer-readable code, or a non-volatile computer-readable storage medium carrying computer-readable code. When the computer-readable code runs in a processor of an electronic device, the processor in the electronic device executes the above method.

[0125] FIG7 shows a block diagram of an apparatus 1900 for context switching according to an embodiment of the present application. For example, the apparatus 1900 can be provided as a server or a terminal device. Referring to FIG7 , the apparatus 1900 includes a processing component 1922, which further includes one or more processors, and a memory resource represented by a memory 1932 for storing instructions executable by the processing component 1922, such as an application. The application stored in the memory 1932 can include one or more modules, each of which corresponds to a set of instructions. In addition, the processing component 1922 is configured to execute instructions to perform the above method.

[0126] The device 1900 may also include a power supply component 1926 configured to perform power management of the device 1900, a wired or wireless network interface 1950 configured to connect the device 1900 to a network, and an input / output interface 1958 (I / O interface). The device 1900 may operate based on an operating system stored in the memory 1932, such as Windows Server 2003. TM , Mac OS X TM , Unix TM ,Linux TM , FreeBSD TM or similar.

[0127] In an exemplary embodiment, a non-volatile computer-readable storage medium is also provided, such as a memory 1932 including computer program instructions that can be executed by the processing component 1922 of the apparatus 1900 to perform the above-described method.

[0128] The present application may be a system, method and / or computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present application.

[0129] A computer-readable storage medium may be a tangible device that can hold and store instructions for use by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disc (DVD), a memory stick, a floppy disk, a mechanical encoding device, such as a punch card or a raised structure in a groove on which instructions are stored, and any suitable combination thereof. The computer-readable storage medium used herein is not to be construed as a transient signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., light pulses through a fiber optic cable), or an electrical signal transmitted through wires.

[0130] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions to be stored in the computer-readable storage medium in each computing / processing device.

[0131] The computer program instructions for performing the operations of the present application may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, by utilizing the state information of computer-readable program instructions to personalize an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), the electronic circuit can execute the computer-readable program instructions, thereby implementing various aspects of the present application.

[0132] Various aspects of the present application are described herein with reference to flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It should be understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer-readable program instructions.

[0133] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device is generated that implements the functions / actions specified in one or more blocks in the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium, where these instructions cause the computer, programmable data processing device, and / or other device to operate in a specific manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing various aspects of the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0134] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operational steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0135] The flow charts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the system, method and computer program product according to multiple embodiments of the present application. In this regard, each box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and the part of the module, program segment or instruction includes one or more executable instructions for realizing the logical function of the specification. In some alternative implementations, the functions marked in the box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented by a special hardware-based system that performs the function or action of the specification, or can be implemented by a combination of special hardware and computer instructions.

[0136] While various embodiments of the present application have been described above, the above descriptions are illustrative, non-exhaustive, and not intended to be limiting of the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or technological improvements in the marketplace, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A context switching verification device, the device comprising: Stimulus generation module, reference model module, module to be tested and response checking module; The stimulus generation module is used to generate a stimulus signal according to the verification requirements of the module to be tested, and send the stimulus signal to the reference model module and the module to be tested, wherein the stimulus signal is used to indicate a command sequence to be processed, and the command sequence includes at least one command to be tested; The module to be tested is used to send a target signal to the reference model module at a preset processing node during the process of processing each of the commands to be tested according to the stimulus signal, wherein the target signal is a command synchronization signal or a context switching signal, and the context switching signal is used to indicate that a context switching command has been received and a corresponding context switching operation has been performed; and send the first data generated during the command processing process to the response checking module; The reference model module is used to process each of the commands to be tested according to the excitation signal and the target signal, and send the second data generated in the process of processing the command to the response checking module; The response checking module is used to verify the ability of the module to be tested to execute the context switching command according to the first data and the second data.

2. The device according to claim 1, wherein: The reference model module comprises: A first execution unit, configured to execute, when the target signal is the command synchronization signal, a command to be tested after a target preset processing node based on the command synchronization signal and the excitation signal until a next preset processing node is identified, wherein the target preset processing node is a preset processing node corresponding to the command synchronization signal; The second execution unit is configured to execute a context switch operation corresponding to the context switch command when the target signal is the context switch signal.

3. The device according to claim 1 or 2, wherein: The module to be tested includes: A third execution unit, configured to obtain the command to be tested from the command sequence and execute the command to be tested; A switching unit, configured to, when a current preset processing node is identified and the context switching command is detected in a target processing stage, determine that the current processing for the command to be tested is completed, execute a context switching operation corresponding to the context switching command, and generate the context switching signal after completing the context switching operation; a non-switching unit, configured to generate the command synchronization signal corresponding to the current preset processing node when the current preset processing node is identified and the context switching command is not detected in the target processing stage; The target processing stage is a processing stage between a previous preset processing node and a current preset processing node.

4. The device according to claim 3, wherein: The preset processing nodes include a command acquisition completion node, a command decoding completion node, and a command execution completion node, and the command synchronization signal includes an acquisition command synchronization signal, a decoding command synchronization signal, and an execution command synchronization signal; The third execution unit comprises: A command acquisition subunit, used for acquiring each of the commands to be tested from the command sequence, and sending the acquired commands to be tested to the command decoding subunit; The command decoding subunit is used to decode the received command to be tested and send the decoded command to be tested to command execution subunit; The command execution subunit is used to execute the received decoded command to be tested; The non-switching unit comprises: A first non-switching sub-unit is used to generate the acquisition command synchronization signal when detecting that the acquisition of one of the commands to be tested is completed and determining to identify the command acquisition completion node, and when the context switching command is not detected in the target processing stage; A second non-switching subunit is used to generate the decoding command synchronization signal when detecting that the decoding of one of the commands to be tested is completed and determining that a command decoding completion node is identified, and when the context switching command is not detected in the target processing stage; The third non-switching sub-unit is used to generate the execution command synchronization signal when detecting that the execution of one of the commands to be tested is completed and determining to identify the command execution completion node, and when the context switching command is not detected in the target processing stage.

5. The device according to claim 3 or 4, wherein: The switching unit comprises: The context switching subunit is used to, in a context detection scenario, determine that the current processing of the command to be tested is completed when the current preset processing node is identified and the context switching command is detected in the target processing stage, execute the context switching operation corresponding to the context switching command, and generate the context switching signal after completing the context switching operation.

6. The device according to claim 5, wherein: The module to be tested also includes: The scene recognition unit is used to obtain scene recognition information, and when the scene recognition information is target information, determine that it is in a context detection scene.

7. The device according to any one of claims 1 to 6, wherein: The module to be tested includes: A sequence indicating unit, used for sending the target signal to the reference model module at the preset processing node during the process of processing each of the commands to be tested according to the stimulus signal in a command sequence processing scenario; An out-of-order indication unit is used to send the target signal and command execution sequence information to the reference model module at the preset processing node during the process of processing each of the commands to be tested according to the excitation signal in an out-of-order command processing scenario, wherein the command execution sequence information is used to indicate the command execution sequence of the reference model module.

8. The device according to any one of claims 1 to 7, wherein: The reference model module comprises: A command acquisition unit, used for determining the command to be tested that the module to be tested has completed acquiring according to the command synchronization signal and the excitation signal, acquiring the command to be tested that the module to be tested has completed acquiring from the command sequence, and sending the acquired command to be tested to a command decoding unit; The command decoding unit is used to determine the command to be tested that has been decoded by the module to be tested according to the command synchronization signal, decode the received command to be tested, and send the decoded command to be tested to the command execution unit; The command execution unit is used to determine the command to be tested that has been executed by the module to be tested according to the command synchronization signal, and decode the received command to be tested.

9. The device according to any one of claims 1 to 8, characterized in that The response checking module is further used to generate feedback information according to the first data and the second data, and send the feedback information to the stimulus generating module; The stimulus generating module is further configured to generate a new stimulus signal based on the feedback information, and send the new stimulus signal to the module to be tested and the reference model module.

10. A context switching verification method for verifying a module to be tested, the method comprising: Generate an excitation signal according to the verification requirements for the module to be tested, and send the excitation signal to the reference model module and the module to be tested, wherein the excitation signal is used to indicate a command sequence to be processed, and the command sequence includes at least one command to be tested; In the process of controlling the module to be tested to process each of the commands to be tested according to the stimulus signal, a target signal is sent to the reference model module at a preset processing node, wherein the target signal is a command synchronization signal or a context switching signal, and the context switching signal is used to indicate that a context switching command has been received and a corresponding context switching operation has been performed; Controlling the reference model module to process each of the commands to be tested according to the excitation signal and the target signal; The ability of the module to be tested to execute the context switch command is verified based on the first data generated by the module to be tested in the process of processing the command and the second data generated by the reference model module in the process of processing the command.

11. A context switching verification device, the device comprising: processor; a memory for storing executable instructions for the processor; Wherein, the processor is configured to implement the method of claim 10 when executing the executable instructions.

12. A non-volatile computer-readable storage medium having computer program instructions stored thereon, wherein the computer program instructions implement the method of claim 10 when executed by a processor.

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