High-impedance node detection method and system, and circuit simulation device
Through the methods of conduction matrix division and real-time update, the problem of low efficiency of traditional high-impedance node detection methods is solved, and the rapid identification of high-impedance nodes is realized, reducing the calculation amount and detection time, and improving detection time.
Patent Information
- Application Number
- PCT/CN2024/136173
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-13
- Filing Date
- 2024-12-02
- Publication Date
- 2025-06-19
AI Technical Summary
The traditional high-impedance node detection method has a large amount of computing and low efficiency. Especially in transient simulation, the inspection of each node will take up a lot of time, greatly increasing the circuit simulation time.
By obtaining the conduction matrix generated during the circuit simulation process, the nodes that are in communication are divided into the same group, and nodes that do not have conduction nodes are independently grouped, and the high-impedance nodes are updated and detected in real time according to the conduction matrix.
This method can quickly identify high-impedance nodes in the circuit, reduce the amount of calculation during the detection process, improve detection efficiency, save detection time, and improve the timeliness of detecting high-impedance nodes.
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Figure CN2024136173_19062025_PF_FP_ABST
Abstract
Description
High-impedance node detection method, system and circuit simulation device
[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on December 23, 2023, with application number CN202311719467.7 and application name “Detection method, system and circuit simulation device for high-impedance nodes”, the entire contents of which are incorporated by reference into this application. Technical Field
[0002] The present application relates to the field of circuit simulation technology, and in particular to a method and system for detecting high-impedance nodes, a circuit simulation device, and a readable storage medium. Background Art
[0003] A high-impedance node is a node whose resistance to the circuit ground is very large (e.g., greater than 10 12 Ohm) nodes. High-impedance nodes are insulated from other circuit nodes, and their voltage values are uncontrolled and random. If these high-impedance nodes are connected to the gates of field-effect transistors to control other circuits, it is easy to cause random behavior in the circuits controlled by these nodes, affecting the simulation results of the circuit modules where the nodes are located. High-impedance nodes in a circuit can be caused by switching of the circuit's working state or circuit design defects, and are important detection content in circuit simulation verification. Traditional high-impedance detection technology is based on circuit connection relationships and device conduction conditions. Starting from a point, it searches for a path to the ground point. If there is no conductive path to the ground point, then it is a high-impedance node.
[0004] Traditionally, detecting high-impedance nodes requires selecting a node as a starting point. The process then traverses all conductive paths to determine whether they reach the ground point, ultimately determining whether the currently selected node is high-impedance. The specific method involves calculating the resistance between each pin of each circuit component. When the resistance between two pins is less than a threshold, the pair is considered conductive, and the node connected by these two pins has a conductive path. This process finds all pairs of nodes with a conductive path. Starting from a node, the system checks whether the current node has a conductive path to another node. If so, the system continues searching for these new nodes until all connected nodes have been traversed. If none of these connected nodes contain a reference ground node, the initial starting point and its connected nodes are high-impedance nodes. Determining whether all nodes are high-impedance requires repeating this process for all nodes. This algorithm suffers from high computational complexity and low efficiency. Furthermore, checking each node in transient simulations consumes a significant amount of time, significantly increasing circuit simulation time. Summary of the Invention
[0005] In view of this, the present application provides a high-impedance node detection method, system, circuit simulation device and readable storage medium to solve the problems of large computational complexity and low efficiency of traditional high-impedance node detection solutions.
[0006] The present application provides a method for detecting a high-impedance node, comprising:
[0007] Obtaining a conduction matrix generated during circuit simulation, wherein each row and each column of the conduction matrix corresponds to a node, and when a matrix element is a first identification value, it indicates that the node corresponding to the row and the node corresponding to the column are conductive;
[0008] According to the conduction matrix, nodes that are mutually conductive are divided into the same group, and nodes that are not conductive are grouped independently to obtain multiple groups of nodes;
[0009] Among the multiple groups of nodes, at least one group of nodes including the reference node is determined as a non-high-impedance group, and the other groups of nodes are determined as high-impedance groups.
[0010] Optionally, obtaining the conduction matrix generated during the circuit simulation process includes: obtaining the node conduction state of each node during the simulation process at each simulation moment; updating the conduction matrix according to the node conduction state, so as to obtain the conduction matrix in real time at the detection time.
[0011] Optionally, updating the conduction matrix according to the conduction state of the node includes: identifying the node whose conduction state has changed according to the conduction state of the node to obtain an updated node; and updating the value of the corresponding matrix element in the conduction matrix according to the conduction state of the updated node at the corresponding simulation moment.
[0012] Optionally, before obtaining the node conduction state of each node during the simulation process at each simulation moment, the obtaining of the conduction matrix generated during the circuit simulation process also includes: constructing an initial conduction matrix to update the initial conduction matrix at the first simulation moment according to the node conduction state at the simulation moment to obtain the conduction matrix at the first simulation moment.
[0013] Optionally, in the initial conduction matrix, each matrix element is set to a second identification value.
[0014] Optionally, the first identification value is 1; the second identification value is 0.
[0015] Optionally, the reference node includes a reference ground node.
[0016] The present application also provides a high-impedance node detection system, the high-impedance node detection system comprising:
[0017] An acquisition module is used to acquire a conduction matrix generated during a circuit simulation process, wherein each row and each column of the conduction matrix corresponds to a node, and when a matrix element is a first identification value, it indicates that the node corresponding to the row and the node corresponding to the column are conductive;
[0018] a division module for dividing mutually connected nodes into the same group according to the conduction matrix, and independently grouping nodes that are not connected to each other to obtain multiple groups of nodes;
[0019] The determining module is configured to determine, among the multiple groups of nodes, at least one group of nodes including the reference node as a non-high-impedance group, and determine the other groups of nodes as high-impedance groups.
[0020] The present application also provides a circuit simulation device, which includes: a memory and a processor, wherein the memory stores a detection program for high-impedance nodes, and when the detection program for high-impedance nodes is executed by the processor, the steps of any of the above high-impedance node detection methods are implemented.
[0021] The present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of any of the above methods for detecting a high-impedance node are implemented.
[0022] The above-mentioned high-impedance node detection method, system, circuit simulation device and readable storage medium of the present application can obtain a conduction matrix for recording the conduction status between each node of the simulated circuit during the circuit simulation process. According to the conduction matrix, the nodes that are mutually conductive are divided into the same group, and the other nodes without conductive nodes are grouped independently to obtain multiple groups of nodes. Then, at least one group of nodes including the reference node is determined as a non-high-impedance group, and the nodes in the other groups are determined as high-impedance groups. The nodes included in the above-mentioned high-impedance group are high-impedance nodes. In this way, the high-impedance nodes of the simulated circuit at each simulation moment can be quickly identified, which can reduce the amount of calculation in the high-impedance node detection process, improve detection efficiency, and save detection time.
[0023] Furthermore, the above-mentioned high-impedance node detection method can use incremental updates to update the conduction matrix in real time at each simulation moment, which can reduce the amount of calculation during the update process. It can also detect the high-impedance nodes of the simulated circuit in real time based on the updated conduction matrix, which can further improve the timeliness of detecting high-impedance nodes. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0025] FIG1 is a schematic flow chart of a method for detecting a high-impedance node according to an embodiment of the present application;
[0026] FIG2 is a schematic diagram of a conduction matrix according to an embodiment of the present application;
[0027] FIG3a, FIG3b and FIG3c are schematic diagrams of a conduction matrix according to another embodiment of the present application;
[0028] FIG4 is a schematic diagram of the structure of a detection system for high-impedance nodes according to an embodiment of the present application. DETAILED DESCRIPTION
[0029] The following, in conjunction with the accompanying drawings, clearly and completely describes the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of this application. In the absence of conflict, the following embodiments and their technical features can be combined with each other.
[0030] In a first aspect, the present application provides a method for detecting a high-impedance node, which can be executed on a terminal device for performing circuit simulation, such as a circuit simulation device. Referring to FIG1 , the method for detecting a high-impedance node includes steps S110 to S130.
[0031] S110 , obtaining a conduction matrix generated during circuit simulation, wherein each row and each column of the conduction matrix corresponds to a node respectively, and when a matrix element is a first identification value, it indicates that the node corresponding to the row and the node corresponding to the column are conductive.
[0032] Optionally, the first identification value may be a non-zero value, for example, the first identification value may be 1, etc. When the first identification value is 1, the conduction matrix may refer to FIG2 , which may record the conduction states of the nodes between the 1st node and the 8th node in the simulated circuit. As shown in FIG2 , the matrix element in the 1st row and 4th column is 1, and the matrix element in the 4th row and 1st column is 1, indicating that the simulated circuit is conductive at the 1st node and the 4th node at the corresponding simulation moment; the matrix element in the 5th row and 2nd column is 1, and the matrix element in the 2nd row and 5th column is 1, indicating that the simulated circuit is conductive at the 5th node and the 2nd node at the corresponding simulation moment; the matrix element in the 5th row and 7th column is 1, and the matrix element in the 7th row and 5th column is 1, indicating that the simulated circuit is conductive at the 5th node and the 7th node at the corresponding simulation moment. Furthermore, in the above conduction matrix, the matrix elements between two nodes that have no conduction relationship may be other identification values except the first identification value, so as to quickly determine whether the corresponding nodes are conductive by taking the values of the matrix elements.
[0033] S120 , dividing mutually conductive nodes into the same group according to the conductive matrix, and grouping nodes that are not conductive into independent groups, to obtain multiple groups of nodes.
[0034] Specifically, the above-mentioned S120 can identify mutually conductive nodes based on the values of the matrix elements of the conductivity matrix, divide the mutually conductive nodes into the same group, and independently divide each node that is not a conductive node into its own group, thereby obtaining multiple groups of nodes. Taking the conductivity matrix shown in Figure 2 as an example, the node division process is described in detail. Based on the values of the matrix elements of the conductivity matrix shown in Figure 2, the first and fourth nodes can be divided into one group, the second, fifth, and seventh nodes can be divided into one group, and each other node can be independently formed into its own group, thereby obtaining multiple groups of nodes.
[0035] S130 , among the multiple groups of nodes, determine at least one group of nodes including the reference node as a non-high-impedance group, and determine the other groups of nodes as high-impedance groups, and the nodes included in the high-impedance groups are high-impedance nodes.
[0036] Optionally, the reference nodes include reference ground nodes and the like for defining nodes in a high-impedance state in the simulated circuit.
[0037] The above-mentioned high-impedance node detection method can obtain a conduction matrix for recording the conduction state between each node of the simulated circuit during the circuit simulation process. According to the conduction matrix, the nodes that are mutually conductive are divided into the same group, and other nodes without conductive nodes are independently grouped to obtain multiple groups of nodes. Then, at least one group of nodes including the reference node is determined as a non-high-impedance group, and the other groups of nodes are determined as high-impedance groups. The nodes included in the above-mentioned high-impedance group are high-impedance nodes. In this way, the high-impedance nodes of the simulated circuit at the corresponding simulation time can be quickly identified, which can reduce the amount of calculation in the high-impedance node detection process, improve detection efficiency, and save detection time.
[0038] In one embodiment, obtaining a conduction matrix generated during circuit simulation includes: obtaining the conduction state of each node during the simulation at each simulation moment; updating the conduction matrix based on the conduction state to obtain the conduction matrix in real time at the detection time; dividing the nodes in the simulated circuit into multiple groups of nodes based on the values of the matrix elements in the conduction matrix, and determining at least one group of nodes including the reference node as a non-high-impedance group, and determining the other groups of nodes as high-impedance groups, thereby detecting high-impedance nodes in the simulated circuit in real time. Optionally, this embodiment can obtain electrical signals such as currents between each node during the simulation process. If the current between two nodes is greater than a preset current threshold, it can be determined that the two nodes are conductive; if the current between two nodes is less than or equal to the current threshold, it can be determined that the two nodes are disconnected (not conductive).
[0039] Optionally, the detection timing is a timing when high-impedance node detection is required. The detection timing may be determined based on a detection requirement input by a user, for example, it may be at least one simulation time set by the user.
[0040] Furthermore, the circuit simulation device can update the conductivity matrix at each simulation moment, extract the updated conductivity matrix, and identify and detect high-impedance nodes in the simulated circuit based on the extracted conductivity matrix, thereby detecting high-impedance nodes in the simulated circuit in real time. Based on the high-impedance node detection results at multiple consecutive simulation moments, the circuit simulation device can identify risky paths in the simulated circuit and further analyze relevant performance characteristics of the simulated circuit.
[0041] In one example, updating the conductivity matrix based on the node conductivity states includes: identifying nodes whose conductivity states have changed based on the node conductivity states to obtain updated nodes; and updating the values of corresponding matrix elements in the conductivity matrix based on the conductivity states of the updated nodes at the corresponding simulation time, so that the updated conductivity matrix accurately represents the conductivity state of the simulated circuit at the corresponding simulation time. This example uses incremental updating, that is, only updating nodes whose conductivity states have changed, which can reduce the amount of computation during the update process.
[0042] Specifically, if the matrix element is the second identification value, it indicates that the node corresponding to the row and the node corresponding to the column are not conductive. The above-mentioned updating of the values of the corresponding matrix elements in the conductive matrix according to the conductive state of the updated node at the corresponding simulation moment includes: if two nodes change from a conductive state to a non-conductive state, then in the conductive matrix, the matrix elements corresponding to the two nodes are modified from the first identification value to the second identification value; if two nodes change from a non-conductive state to a conductive state, then in the conductive matrix, the matrix elements corresponding to the two nodes are modified from the second identification value to the first identification value. If the first identification value is 1 and the second identification value is 0, the conductive matrix at the previous simulation moment is shown in reference Figure 3a. If at the current simulation moment, the conduction state between the 1st node and the 4th node becomes a non-conducting state, then in the conduction matrix, the matrix elements in the 1st row and 4th column and the 4th row and 1st column are updated from the original 1 to 0, as shown in Figure 3b; in addition, if at the current simulation moment, the conduction state between the 3rd node and the 4th node becomes a conducting state, then in the conduction matrix, the matrix elements in the 3rd row and 4th column and the 4th row and 3rd column are updated from the original 0 to 1, as shown in Figure 3c.
[0043] In one example, before obtaining the node conduction state of each node during the simulation process at each simulation moment, the obtaining of the conduction matrix generated during the circuit simulation process also includes: constructing an initial conduction matrix to update the initial conduction matrix at the first simulation moment according to the node conduction state at the first simulation moment to obtain the conduction matrix at the first simulation moment, so that at the second simulation moment, the conduction matrix at the first simulation moment can be updated according to the corresponding conduction state to obtain the conduction matrix at the second simulation moment, and so on, at each subsequent simulation moment, the conduction matrix at the previous simulation moment is updated according to the corresponding node conduction state, the corresponding conduction matrix is obtained in real time at each simulation moment, and the high-impedance nodes of the simulated circuit are detected in real time according to the corresponding conduction matrix.
[0044] Optionally, in the initial conduction matrix, each matrix element is set to a second identification value, which can indicate a disconnection between the corresponding two nodes. The first identification value is 1 and the second identification value is 0, so that the values of the matrix elements can more simply and intuitively represent the conduction state between each node.
[0045] In the above method for detecting high-impedance nodes, a conduction matrix for recording the conduction state between each node of the simulated circuit can be obtained during the circuit simulation process. According to the conduction matrix, the nodes that are mutually conductive are divided into the same group, and the other nodes without conductive nodes are grouped independently to obtain multiple groups of nodes. Then, at least one group of nodes including the reference node is determined as a non-high-impedance group, and the other groups of nodes are determined as high-impedance groups. The nodes included in the above high-impedance group are high-impedance nodes, so that the high-impedance nodes of the simulated circuit at the corresponding simulation moment can be quickly identified, which can reduce the amount of calculation in the high-impedance node detection process, improve detection efficiency, and save detection time; further, the above method for detecting high-impedance nodes can use incremental updates to update the conduction matrix in real time at each simulation moment, which can reduce the amount of calculation in the update process, and can also detect the high-impedance nodes of the simulated circuit in real time based on the updated conduction matrix, which can further improve the timeliness of detecting high-impedance nodes.
[0046] The inventors conducted a comparative analysis of the high-impedance node detection method provided by this application and the traditional high-impedance node detection algorithm, and found that compared with the traditional high-impedance node detection algorithm, under the same test conditions, the corresponding detection speed of this application can be increased by more than 3 times, and the detection results are the same as those of the traditional high-impedance node detection algorithm. It can be seen that this application can effectively improve the corresponding detection efficiency.
[0047] A second aspect of the present application provides a high-impedance node detection system, which can be provided in a circuit simulation device. Referring to FIG4 , the high-impedance node detection system includes:
[0048] An acquisition module 110 is configured to acquire a conduction matrix generated during circuit simulation, wherein each row and each column of the conduction matrix corresponds to a node, and when a matrix element is a first identification value, it indicates that the node corresponding to the row and the node corresponding to the column are conductive;
[0049] A division module 120 is configured to divide mutually connected nodes into the same group according to the conduction matrix, and to group nodes that are not connected into independent groups, thereby obtaining multiple groups of nodes;
[0050] The determining module 130 is configured to determine, among the multiple groups of nodes, at least one group of nodes including the reference node as a non-high-impedance group, and determine the other groups of nodes as high-impedance groups.
[0051] The specific definition of the high-impedance node detection system can be found in the definition of the high-impedance node detection method above, and will not be repeated here. Each module in the above-mentioned high-impedance node detection system can be implemented in whole or in part through software, hardware, or a combination thereof. Each of the above-mentioned modules can be embedded in or independent of the computing module in the relevant computer device in hardware form, or can be stored in the memory of the computer device in software form, so that the computing module can call and execute the operations corresponding to the above-mentioned units.
[0052] The present application also provides a circuit simulation device, which may include: a memory and a processor, wherein the memory stores a high-impedance node detection program, and when the high-impedance node detection program is executed by the processor, the steps of the high-impedance node detection method described in any of the above embodiments are implemented.
[0053] The present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the method for detecting a high-impedance node as described in any of the above embodiments are implemented.
[0054] Although the present application has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art based on reading and understanding this specification and the accompanying drawings. The present application includes all such modifications and variations and is limited only by the scope of the appended claims. In particular, with respect to the various functions performed by the above-mentioned components, the terms used to describe such components are intended to correspond to any component (unless otherwise indicated) that performs the specified function of the component (e.g., it is functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs the function in the exemplary implementation of this specification shown herein.
[0055] That is, the above description is merely an embodiment of the present application and does not limit the patent scope of the present application. Any equivalent structural or equivalent process transformations made using the contents of the description and drawings of this application, such as the mutual combination of technical features between the various embodiments, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.
[0056] In addition, in the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, for structural elements with the same or similar characteristics, the present application may use the same or different reference numerals to identify them. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features. In the description of the present application, "multiple" means two or more, unless otherwise clearly and specifically defined.
[0057] In this application, the word "exemplary" is used to mean "serving as an example, illustration or description". Any embodiment described in this application as "exemplary" is not necessarily to be construed as being more preferred or more advantageous than other embodiments. The above description is provided to enable any person skilled in the art to implement and use the present application. In the above description, various details are listed for the purpose of explanation. It should be understood that a person of ordinary skill in the art can recognize that the present application can be implemented without using these specific details. In other embodiments, well-known structures and processes will not be elaborated in detail to avoid obscuring the description of the present application with unnecessary details. Therefore, the present application is not intended to be limited to the embodiments shown, but is consistent with the widest scope consistent with the principles and features disclosed in this application.
Claims
1. A method for detecting a high-impedance node, wherein: The high-impedance node detection method includes: Acquire a conduction matrix generated during the circuit simulation process, wherein each row and each column of the conduction matrix corresponds to a node respectively, and when a matrix element is a first identification value, it indicates that the node corresponding to the row and the node corresponding to the column are conductive; According to the conduction matrix, nodes that are mutually conductive are divided into the same group, and nodes that are not conductive are grouped independently to obtain multiple groups of nodes; Among the multiple groups of nodes, at least one group of nodes including the reference node is determined as a non-high-impedance group, and the other groups of nodes are determined as high-impedance groups.
2. The method for detecting a high-impedance node according to claim 1, wherein: The obtaining of a conduction matrix generated during the circuit simulation process includes: Obtaining the node conduction state of each node during the simulation process at each simulation moment; The conduction matrix is updated according to the conduction state of the node, so as to obtain the conduction matrix in real time at the detection timing.
3. The method for detecting a high-impedance node according to claim 2, wherein: The updating of the conduction matrix according to the conduction state of the node comprises: Identify nodes whose conduction states have changed according to the conduction states of the nodes, and obtain updated nodes; The value of the corresponding matrix element in the conduction matrix is updated according to the conduction state of the update node at the corresponding simulation time.
4. The method for detecting a high-impedance node according to claim 2, wherein: Before obtaining the node conduction state of each node during the simulation process at each simulation time, the obtaining of the conduction matrix generated during the circuit simulation process also includes: An initial conduction matrix is constructed to update the initial conduction matrix at a first simulation moment according to the conduction state of the nodes at the simulation moment, so as to obtain the conduction matrix at the first simulation moment.
5. The method for detecting a high-impedance node according to claim 4, wherein: In the initial conduction matrix, each matrix element is set to a second identification value.
6. The method for detecting a high-impedance node according to claim 5, wherein: The first identification value is 1; the second identification value is 0.
7. The method for detecting a high-impedance node according to claim 5, wherein: The reference node includes a reference ground node.
8. A high-impedance node detection system, wherein: The detection system of the high-impedance node comprises: An acquisition module, used to acquire a conduction matrix generated during circuit simulation, wherein each row and each column of the conduction matrix corresponds to a node respectively, and when a matrix element is a first identification value, it indicates that the node corresponding to the row and the node corresponding to the column are conductive; A division module, used for dividing mutually connected nodes into the same group according to the conduction matrix, and independently grouping nodes that are not conductive nodes, to obtain multiple groups of nodes; The determination module is used to determine at least one group of nodes including the reference node as a non-high-impedance group among the multiple groups of nodes, and determine the other groups of nodes as high-impedance groups.
9. A circuit simulation device, wherein: The circuit simulation device includes: a memory and a processor, wherein the memory stores a high-impedance node detection program, and when the high-impedance node detection program is executed by the processor, the steps of the high-impedance node detection method described in any one of claims 1 to 7 are implemented.
10. A computer-readable storage medium, wherein: The storage medium stores a computer program, and when the computer program is executed by the processor, the steps of the high-impedance node detection method described in any one of claims 1 to 7 are implemented.
Citation Information
Patent Citations
Method for detecting chip and verifying chip testing result
CN105823976A
Detection system and application of connection line from internal top layer to external top layer of chip
CN111859845A
Circuit inspection method and device, electronic equipment and storage medium
CN114091387A
High-impedance node detection method and system and circuit simulation equipment
CN118150918A
Abnormal state generation node detection method
JP2006171919A
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