Transmission circuit and communication apparatus equipped with same

Abstract

A transmission circuit (10) comprises an input terminal (T1), amplification circuits (130, 140), and an output terminal (T2). The amplification circuits (130, 140) each amplify an input signal which is a high frequency signal received by the input terminal (T1). The output terminal (T2) outputs the amplified signal to an antenna (ANT). The amplification circuit (140) includes amplifiers (141, 142) and a balun (150) which performs conversion from a pair of balanced lines to an unbalanced line. The pair of balanced lines include lines (151, 152). One end of the line (151) is connected to an output end of the amplifier (141), and the other end is connected to a ground potential (GND). One end of the line (152) is connected to an output end of the amplifier (142), and the other end is connected to a ground potential (GND). One end of the unbalanced line (153) is connected to an output end of the amplification circuit (130), and the other end is connected to the output terminal (T2). The driving states of the amplifiers (141, 142) are switched in accordance with the power level of the input signal.

Description

Transmitter circuit and communication device incorporating the same

[0001] The present disclosure relates to a transmission circuit and a communication device equipped with the same, and more particularly to a technique for improving the efficiency of a power amplifier circuit included in the transmission circuit.

[0002] Japanese Patent Laid-Open Publication No. 2018-137566 (Patent Document 1) discloses an amplifier circuit including a first differential amplifier (carrier amplifier) ​​and a second differential amplifier (peak amplifier) ​​that amplify signals distributed from an input signal, and transformers (first transformer, second transformer) individually provided for each differential amplifier. The first differential amplifier operates in a range where the power level of the input signal is equal to or higher than a first level, and the second differential amplifier operates in a range where the power level of the input signal is equal to or higher than a second level that is higher than the first level. The first transformer and the second transformer receive and combine the signals output from the first differential amplifier and the second differential amplifier, respectively, and output the combined output signal to a load.

[0003] Japanese Patent Application Laid-Open No. 2018-137566

[0004] In general, power amplifier circuits are required to improve their efficiency for input signals with wide modulation bandwidths. In particular, in recent years, development of communication systems using sub-terahertz frequency bands has been progressing for the purpose of large-capacity, high-speed communications. In such systems, signal loss in the signal path tends to be larger than that of signals in millimeter waves and lower frequency bands, and the impact of reduced amplifier efficiency tends to be more pronounced.

[0005] The present disclosure has been made to solve the above-mentioned problems, and its purpose is to improve the efficiency of a power amplifier circuit included in a transmission circuit.

[0006] A transmitter circuit according to the present disclosure includes an input terminal, a first amplifier circuit, a second amplifier circuit, and an output terminal. The first amplifier circuit and the second amplifier circuit amplify an input signal, which is a high-frequency signal received at the input terminal. The output terminal outputs the amplified signal to an antenna. The second amplifier circuit includes a first amplifier, a second amplifier, and a balun that converts a pair of balanced lines to unbalanced lines. The pair of balanced lines includes a first line and a second line. One end of the first line is connected to the output terminal of the first amplifier, and the other end is connected to ground potential. One end of the second line is connected to the output terminal of the second amplifier, and the other end is connected to ground potential. One end of the unbalanced line is connected to the output terminal of the first amplifier circuit, and the other end is connected to the output terminal. The drive states of the first amplifier and the second amplifier are switched depending on the power level of the input signal.

[0007] In a transmission circuit according to the present disclosure, an amplifier is connected to each of a pair of balanced lines in a balun of a second amplifier circuit, and an output terminal is connected to one end of an unbalanced terminal of the balun. A signal amplified by the first amplifier circuit is supplied to the other end of the unbalanced terminal. The drive states of the two amplifiers of the second amplifier circuit are switched depending on the power level of the input signal. This configuration allows the number of amplifiers used to be adjusted depending on the input signal, thereby improving the efficiency of the power amplifier circuit.

[0008] FIG. 1 is a schematic configuration diagram of a communication device to which a transmission circuit according to a first embodiment is applied. FIG. 2 is a diagram showing a detailed configuration of the power amplifier circuit in FIG. 1. FIG. 3 is a diagram for explaining an operating state and impedance of an amplifier in a second state. FIG. 4 is a diagram for explaining an operating state and impedance of an amplifier in a third state. FIG. 5 is a diagram for explaining the relationship between output power and efficiency of the power amplifier circuit of the first embodiment. FIG. 6 is a diagram showing a detailed configuration of a power amplifier circuit in a transmission circuit according to a modified example. FIG. 7 is a diagram showing a detailed configuration of a power amplifier circuit in a transmission circuit according to a second embodiment. FIG. 8 is a diagram for explaining the operating state of the amplifier in a first state. FIG. 9 is a diagram for explaining the operating state of the amplifier in a second state. FIG. 10 is a diagram for explaining the operating state of the amplifier in a third state. FIG. 11 is a diagram for explaining the operating state of the amplifier in a fourth state. FIG. 12 is a diagram for explaining the relationship between output power and efficiency of the power amplifier circuit of the second embodiment.

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference numerals, and description thereof will not be repeated.

[0010] 1 is a schematic configuration diagram of a communication device 1 to which a power amplifier circuit 100 according to embodiment 1 is applied. The communication device 1 is, for example, a mobile terminal such as a mobile phone, a smartphone, or a tablet, or a personal computer with a communication function.

[0011] 1 , the communication device 1 includes an antenna ANT, a transmission circuit 10, a baseband integrated circuit (BBIC) 20 constituting a baseband signal processing circuit, a radio frequency integrated circuit (RFIC) 30, and a power supply circuit 40. The transmission circuit 10 includes input terminals T1, T3, and T4, an output terminal T2, a bias control circuit 50, and a power amplifier circuit 100. In general, the communication device 1 upconverts an intermediate frequency (IF) signal transmitted from the BBIC 20 to a high frequency (radio frequency, RF) signal by the RFIC 30, amplifies the high frequency signal by the power amplifier circuit 100, and emits the amplified signal from the antenna ANT.

[0012] The RFIC 30 is an example of a signal processing circuit that processes a high-frequency signal. The RFIC 30 up-converts the intermediate frequency signal transmitted from the BBIC 20 into a high-frequency signal and outputs the generated high-frequency signal to the transmission circuit 10 via the input terminal T1.

[0013] Furthermore, the RFIC 30 generates a control signal CON for controlling the power amplifier circuit 100 based on the information transmitted from the BBIC 20. The generated control signal CON is transmitted to the bias control circuit 50 via the input terminal T3.

[0014] The bias control circuit 50 receives a control signal CON from the RFIC 30 via the input terminal T3. Based on the control signal CON, the bias control circuit 50 generates a bias signal BS and outputs it to the power amplifier circuit 100. The bias signal BS is a signal for controlling the magnitude and supply timing of the bias current of the amplifier included in the power amplifier circuit 100.

[0015] The power supply circuit 40 is an example of a so-called digital tracker, and can supply power supply voltages Vcc of a plurality of different voltage levels to the power amplifier circuit 100. The power supply circuit 40 includes a multilevel power converter (MPC) 410, a power supply selection circuit 420, and a digital envelope tracker (digital ET) 430.

[0016] The MPC 410 includes a plurality of DC / DC converters, which are not shown in Fig. 1. The MPC 410 converts the battery voltage VB supplied from an external battery into a plurality of different voltage levels and supplies the voltages to the power supply selection circuit 420.

[0017] The digital ET 430 receives the I and Q waveform signals of the transmit signal from the BBIC 20 and tracks the envelope of the transmit signal in the digital ET mode. The digital ET 430 generates a selection signal SEL corresponding to the voltage level of the envelope of the transmit signal and outputs it to the power supply selection circuit 420.

[0018] The power supply selection circuit 420 selects a voltage corresponding to the selection signal SEL from the multiple voltage levels supplied from the MPC 410, and generates a power supply voltage Vcc to be supplied to the power amplifier circuit 100. The generated power supply voltage Vcc is supplied to the power amplifier circuit 100 via the input terminal T4.

[0019] The power amplifier circuit 100 amplifies an input signal Pin received from the RFIC 30 via an input terminal T1, and generates an output signal Pout.

[0020] The antenna ANT is connected to the output terminal T2 of the transmission circuit 10. The antenna ANT emits an output signal Pout, which is a high-frequency signal output from the transmission circuit 10, as a radio wave.

[0021] (Detailed Configuration of Power Amplifier Circuit) Next, the detailed configuration of the power amplifier circuit 100 in the transmitter circuit 10 will be described with reference to FIG.

[0022] 2, the power amplifier circuit 100 includes a branch circuit 110, a phase-shift circuit 120, amplifier circuits 130 and 140, and a transformer TR1. The branch circuit 110 includes a phase adjuster 121 and a hybrid coupler 122. The amplifier circuit 130 includes amplifiers 131 and 132 and a phase-shift line 135. The amplifier circuit 140 includes amplifiers 141 and 142, a balun 150, and capacitors C1 and C2.

[0023] The branching circuit 110 branches an input signal Pin received at an input terminal T1 from the RFIC 30 into two paths with a phase difference, and outputs the branched signals to the phase shift circuit 120 and the transformer TR1, respectively.

[0024] The phase adjuster 121 adjusts the phase of the high frequency signal supplied from the branch circuit 110. Note that the phase adjuster 121 is not necessarily an essential element, and the configuration may be one without the phase adjuster 121.

[0025] The hybrid coupler 122 includes two input terminals and two output terminals. One input terminal of the hybrid coupler 122 receives a signal from the phase adjuster 121. The other input terminal of the hybrid coupler 122 is connected to the ground potential GND.

[0026] The hybrid coupler 122 branches the signal from the phase adjuster 121 into two signal paths with a phase difference of 90°. The two output terminals of the hybrid coupler 122 are connected to the amplifiers 131 and 132 in the amplifier circuit 130, respectively. The signal supplied to the amplifier 131 and the signal supplied to the amplifier 132 are out of phase by 90°. More specifically, the amplifier 131 is supplied with a signal whose phase is 90° ahead of the signal supplied to the amplifier 132.

[0027] In the amplifier circuit 130, one end of the phase-shift line 135 is connected to the output terminal of the amplifier 131, and the other end is connected to the output terminal of the amplifier 132. As will be described later, a connection node N1 between the output terminal of the amplifier 132 and the phase-shift line 135 is connected to a balun 150 in the amplifier circuit 140. That is, the amplifiers 131 and 132 and the phase-shift line 135 form a Doherty amplifier in which the amplifier 131 serves as a carrier amplifier and the amplifier 132 serves as a peak amplifier.

[0028] The transformer TR1 converts the input signal from the branch circuit 110 into a pair of balanced lines. One end of the primary winding of the transformer TR1 is connected to the branch circuit 110, and the other end is connected to the ground potential GND. One end of the secondary winding of the transformer TR1 is connected to the amplifier 141, and the other end is connected to the amplifier 142. The signal supplied to the amplifier 142 and the signal supplied to the amplifier 141 are 180° out of phase with each other. More specifically, the amplifier 142 is supplied with a signal whose phase is 180° ahead of the signal supplied to the amplifier 141.

[0029] Balun 150 is a conversion element for converting a pair of balanced lines into an unbalanced line. Balun 150 in the first embodiment is a so-called Marchand balun, and includes lines 151 and 152 corresponding to the pair of balanced lines and line 153 corresponding to the unbalanced line. Note that balun 150 may be a balun other than a Marchand balun.

[0030] Here, a magnetic coupling transformer (MCT) can be used instead of a balun to convert between a balanced line and an unbalanced line. Because a balun requires a quarter-wavelength line, the element size of an MCT can generally be made smaller than that of a balun. However, in the sub-terahertz frequency band, the area occupied by the quarter-wavelength line on the substrate is small, so size constraints are alleviated.

[0031] On the other hand, when an MCT is used in the sub-terahertz frequency band, its small size can result in greater than desired magnetic coupling, which can increase loss and reduce bandwidth. Therefore, when targeting signals in the sub-terahertz frequency band, using a balun rather than an MCT for balanced-to-unbalanced conversion can suppress the increase in loss.

[0032] If the wavelength at the center frequency of the high-frequency signal to be transmitted by the transmission circuit 10 is λ, the lines 151 and 152 have a line length of 1 / 4 wavelength (λ / 4), and the line 153 has a line length of 1 / 2 wavelength (λ / 2).

[0033] One end of the line 151 is connected to the output terminal of the amplifier 141, and the other end is connected to the ground potential GND via a capacitor C1. The other end of the line 151 is supplied with the power supply voltage Vcc.

[0034] Similarly, one end of a line 152 is connected to the output terminal of the amplifier 142, and the other end is connected to the ground potential GND via a capacitor C2. The other end of the line 152 is supplied with the power supply voltage Vcc.

[0035] The line 153 has a configuration in which a first portion 1531 coupled to the line 151 and a second portion 1532 coupled to the line 152 are connected in series. Each of the first portion 1531 and the second portion 1532 has a line length of λ / 4.

[0036] One end of the first portion 1531 is connected to the output end (i.e., connection node N1) of the amplifier 132 in the amplifier circuit 130. The other end of the first portion 1531 is connected to one end of the second portion 1532. The other end of the second portion 1532 is connected to the antenna ANT via the output terminal T2.

[0037] Second portion 1532 is coupled to line 152 in antiphase with respect to the coupling between first portion 1531 and line 151. By means of balun 150, the signal amplified in amplifier 141 and the signal amplified in amplifier 142 are combined in phase on line 153. Furthermore, by connecting line 153, which is an unbalanced line, to the output end of amplifier circuit 130, the signal amplified in amplifier circuit 130 is combined with the signals amplified in amplifiers 141 and 142. The combined signal is transmitted to antenna ANT via output terminal T2 and radiated as a radio wave from antenna ANT.

[0038] In this way, in the power amplifier circuit 100 of the first embodiment, the signals amplified by the plurality of amplifiers are combined by the balun 150, thereby improving the signal amplification efficiency.

[0039] (Extending the Back-Off Amount) In a power amplifier circuit, it is necessary to make the power supply voltage follow changes in an input signal with a wide modulation bandwidth. To meet this requirement, a digital ET mode is generally used, in which the power supply voltage is set to multiple discrete voltage levels within one frame.

[0040] On the other hand, a characteristic of typical amplifiers is that their efficiency tends to decrease as the power level of the input signal decreases. Therefore, when the power level of the input signal decreases in digital ET mode, the efficiency of the amplifier may decrease. In particular, in communication systems using sub-terahertz frequency bands, which have been developed in recent years for the purpose of large-capacity and high-speed communications, the loss in the signal path tends to be larger than that of signals in millimeter waves and lower frequency bands, and the impact of decreased amplifier efficiency may be more pronounced.

[0041] Therefore, in the transmission circuit 10 according to the first embodiment, the back-off amount is increased by switching the amplifiers included in each amplifier circuit, thereby further improving efficiency in the range where the power level of the input signal is low. Specifically, power efficiency is improved by switching between a first state ( FIG. 2 ) in which all amplifiers included in amplifier circuits 130 and 140 are driven, a second state ( FIG. 3 ) in which only amplifier circuit 130 is driven and the amplifier of amplifier circuit 140 is dedriven (stopped), and a third state ( FIG. 4 ) in which only amplifier 131 in amplifier circuit 130 is driven, depending on the power level of the input signal Pin.

[0042] Fig. 3 is a diagram illustrating the operating state and impedance of the amplifier in the second state. Fig. 4 is a diagram illustrating the operating state and impedance of the amplifier in the third state. Note that the phase shift circuit 120 and the transformer TR1 in the power amplifier circuit 100 are omitted in Figs. 3 and 4.

[0043] The operating state of the power amplifier circuit 100 changes depending on the power supply voltage Vcc. In the example of the first embodiment, the power supply voltage Vcc is switched between three levels: V1, V2, and V3 (V1>V2>V3) by the digital ET 430 of the power supply circuit 40. When Vcc=V1, it is defined as a first state, when Vcc=V2, it is defined as a second state, and when Vcc=V3, it is defined as a third state.

[0044] In the first state, the power level of the input signal Pin is greater than the first power value, and the power supply voltage Vcc is set to V1. In this state, as shown in FIG. 2 , the amplifiers 131 and 132 in the amplifier circuit 130 and the amplifiers 141 and 142 in the amplifier circuit 140 are both driven, and the input signal is amplified using the four amplifiers.

[0045] The second state corresponds to a state where the power level of the input signal Pin is a second power value that is smaller than the first power value. In this case, as shown in FIG. 3, the amplifiers 141 and 142 in the amplifier circuit 140 are in a non-driven state.

[0046] At this time, the load impedance R of the antenna ANT is Ｌ Z ０ Then, since the line length of the line 153 in the balun 150 is 1 / 2 wavelength, the impedance at the output end (i.e., the connection node N1) of the amplifier circuit 130 is also Z ０ Here, the impedance of the phase shift line 135 is set to 2Z ０ When the impedance is set to 2Z when looking at the load side from each of the amplifiers 131 and 132, ０ Depending on the operating state of the amplifier circuit 140, there is no change in impedance when looking from the output end of the amplifier circuit 130 to the load side, and therefore the impedance state of the amplifier circuit 130 in the second state also does not change.

[0047] Therefore, in the second state, the number of operating amplifiers is reduced by half, thereby achieving a back-off amount of 3 dB.

[0048] The third state corresponds to a state where the power level of the input signal Pin is a third power value that is even smaller than the second power value. In this case, as shown in FIG. 4 , the amplifiers 141 and 142 in the amplifier circuit 140 and the amplifier 132 in the amplifier circuit 130 are in a non-operating state.

[0049] At this time, the impedance when looking at the load side from the output terminal of the amplifier circuit 130 is Z ０ However, by stopping the amplifier 132, the impedance when looking at the load side from the branch path branching from the connection node N1 to the phase shift line 135 becomes 2Z ０ From Z ０ As a result, the impedance when looking at the load side from the amplifier 131 becomes 4Z. ０ and the impedance is doubled compared to the first and second states.

[0050] Generally, amplifiers have a tendency for their efficiency to increase as the load impedance increases. In the third state, the number of amplifiers is halved compared to the second state, and the load impedance of the operating amplifiers is doubled. Therefore, an additional 6 dB of back-off can be obtained from the second state, for a total of 9 dB of back-off.

[0051] 5 is a diagram for explaining the relationship between the output power and efficiency of the power amplifier circuit 100 according to the first embodiment. In Fig. 5, the horizontal axis represents the power level of the output signal Pout output from the output terminal T2 to the antenna ANT, and the vertical axis represents the efficiency of the power amplifier circuit 100.

[0052] In FIG. 5, the solid line LN10 is a graph showing the case where the first, second and third states are switched in accordance with the power level of the input signal Pin as in the first embodiment.

[0053] The dashed line LN11 is a graph showing the results when the four class AB amplifiers corresponding to the amplifiers 131, 132, 141, and 142 are driven in average power tracking (APT) mode in the first state where these amplifiers are driven, where the power supply voltage level is set based on the average output power over a predetermined period of time.

[0054] The dashed dotted line LN12 is a graph showing a case where switching is performed between the first state and the second state in which the amplifiers 131 and 132 are in a driving state and the amplifiers 141 and 142 are in a non-driving state.

[0055] In the third state, the region until the amplifier reaches saturation is designated as RG3, in the second state, the region until the amplifier reaches saturation is designated as RG2, and in the first state, the region until the amplifier reaches saturation is designated as RG1. The power supply voltage Vcc in the first state is set to V1, the power supply voltage Vcc in the second state is set to V2, and the power supply voltage Vcc in the third state is set to V3 (V1>V2>V3).

[0056] In region RG1, the parallel operation of all amplifiers in amplifier circuits 130 and 140 improves efficiency compared to the case of a class AB amplifier (dashed line LN11). In region RG2, where the power level of input signal Pin drops from the first power value to the second power value, amplifiers 141 and 142 in amplifier circuit 140 are stopped, improving efficiency. In region RG3, where the power level of input signal Pin drops further to the third power value, amplifier 132 in amplifier circuit 130 is stopped, increasing the impedance of amplifier 131 in the driven state. This improves the efficiency of amplifier 141.

[0057] Therefore, in the power amplifier circuit 100 of the first embodiment, a back-off amount of 9 dB can be achieved by stopping some of the amplifiers as the power level of the input signal Pin decreases.

[0058] As described above, the efficiency of the power amplifier circuit can be improved by adopting a configuration in which the amplifiers connected to each balanced line of the Marchand balun are combined on an unbalanced line, and a signal amplified by a separate amplifier circuit is combined on the unbalanced line, and by putting some of the amplifiers into a non-driven state depending on the power level of the input signal.

[0059] The "amplifier circuit 130" and the "amplifier circuit 140" in the first embodiment correspond to the "first amplifier circuit" and the "second amplifier circuit," respectively, in the present disclosure. The "amplifier 141" and the "amplifier 142" in the first embodiment correspond to the "first amplifier" and the "second amplifier," respectively, in the present disclosure. The "amplifier 131" and the "amplifier 132" in the first embodiment correspond to the "third amplifier" and the "fourth amplifier," respectively, in the present disclosure. The "lines 151" to "lines 153" in the first embodiment correspond to the "first line" to the "third line," respectively, in the present disclosure.

[0060] <Modifications> In the power amplifier circuit 100 of the first embodiment, an example has been described in which the amplifier circuit 130 is configured as a Doherty amplifier having two amplifiers, but the amplifier circuit 130 does not necessarily have to be a Doherty amplifier.

[0061] Fig. 6 is a diagram showing a detailed configuration of a power amplifier circuit 100A in a transmission circuit according to a modified example. In the power amplifier circuit 100A, the amplifier circuit 130 of the first embodiment shown in Fig. 2 is replaced with an amplifier circuit 130A configured with a single amplifier, and accordingly, the hybrid coupler 122 in the phase shift circuit 120 is deleted. In Fig. 6, the description of elements that overlap with those in Fig. 2 will not be repeated.

[0062] Amplifier circuit 130A amplifies the signal from phase adjuster 121 and supplies the amplified signal to first portion 1531 of line 153 in balun 150 of amplifier circuit 140. In power amplifier circuit 100A, when the power level of input signal Pin is greater than a predetermined value, all amplifiers of amplifier circuits 130A and 140 are driven, and when the power level of input signal Pin becomes smaller than the predetermined value, amplifiers 141 and 142 of amplifier circuit 140 are stopped.

[0063] This results in an efficiency as shown by the dashed line LN12 in FIG. 5, and a back-off amount of 3 dB can be obtained.

[0064] The "amplifier circuit 130A" in the modified example corresponds to the "first amplifier circuit" in the present disclosure.

[0065] Second Embodiment In a second embodiment, a configuration in which an amplifier circuit for a low power mode is provided in addition to the configuration of the power amplifier circuit 100 of the first embodiment will be described.

[0066] Fig. 7 is a diagram showing a detailed configuration of a power amplifier circuit 100B in a transmission circuit according to embodiment 2. In power amplifier circuit 100B, amplifier circuit 130 in embodiment 1 shown in Fig. 2 is replaced with amplifier circuit 130B. In amplifier circuit 130B, amplifier 133 is added to amplifiers 131 and 132 and phase shift line 135 in amplifier circuit 130. In Fig. 7, descriptions of elements that overlap with those in Fig. 2 will not be repeated.

[0067] 7, in a power amplifier circuit 100B, a branch circuit 110 branches an input signal Pin into three paths, and supplies the branched signals to a phase shift circuit 120, a transformer TR1, and an amplifier 133 in an amplifier circuit 130B, respectively.

[0068] The output terminal of amplifier 133 is connected to line 153 in balun 150, similar to the output terminal of amplifier 132. Amplifier 133 has a characteristic that its efficiency is maximized when the power level of input signal Pin is a specific power level in region RG3 of FIG. 5 . Therefore, amplifier 133 is in a non-driven state when input signal Pin is greater than the specific power level, and is in a driven state when input signal Pin is less than the specific power level. Note that when amplifier 133 is driven, amplifiers 131, 132, 141, and 142 are in a non-driven state. The operating state in which only amplifier 133 is driven is referred to as the "fourth state."

[0069] (Operation of Power Amplifier Circuit) Next, the operation states of each amplifier in the first, second, third and fourth states in the second embodiment will be described with reference to FIGS.

[0070] 8 is a diagram illustrating the operating state of the amplifier in the first state. In the first state, amplifiers 131 and 132 in amplifier circuit 130B and amplifiers 141 and 142 in amplifier circuit 140 are driven, and amplifier 133 in amplifier circuit 130B is dedriven. In this case, the characteristics are the same as those in the first state of the first embodiment.

[0071] 9 is a diagram illustrating the operating state of the amplifiers in the second state. In the second state, amplifiers 131 and 132 in amplifier circuit 130B are driven, and amplifier 133 in amplifier circuit 130B and amplifiers 141 and 142 in amplifier circuit 140 are driven. In this case, the characteristics are the same as those in the second state of the first embodiment.

[0072] 10 is a diagram illustrating the operating state of the amplifiers in the third state. In the third state, amplifier 131 in amplifier circuit 130B is driven, and amplifiers 132 and 133 in amplifier circuit 130B and amplifiers 141 and 142 in amplifier circuit 140 are driven. In this case, the characteristics are the same as those in the third state of the first embodiment.

[0073] 11 is a diagram illustrating the operating state of the amplifier in the fourth state. In the fourth state, amplifier 133 in amplifier circuit 130B is driven, and amplifiers 131 and 132 in amplifier circuit 130B and amplifiers 141 and 142 in amplifier circuit 140 are dedriven. In this case, only the signal amplified by amplifier 131 is output to antenna ANT through line 153 of balun 150. Therefore, the output power characteristics are those of amplifier 131.

[0074] 12 is a diagram illustrating the relationship between the output power and efficiency of the power amplifier circuit 100B according to the second embodiment. In FIG. 12, the region until the amplifier reaches saturation in the fourth state is designated as RG4, the region until the amplifier reaches saturation in the third state is designated as RG3, the region until the amplifier reaches saturation in the second state is designated as RG2, and the region until the amplifier reaches saturation in the first state is designated as RG1. The power supply voltage Vcc in the first state is set to V1, the power supply voltage Vcc in the second state is set to V2, the power supply voltage Vcc in the third state is set to V3, and the power supply voltage Vcc in the fourth state is set to V4 (V1>V2>V3>V4).

[0075] 12, the solid line LN10A is a graph showing the case where the first to fourth states are switched in accordance with the power level of the input signal Pin, and the dashed line LN13 is a graph showing the case where the amplifier 131 is used alone.

[0076] 12 , in regions RG1, RG2, and RG3, amplifier 133 is deactivated, and the other amplifiers are switched in the same manner as in embodiment 1. When the power level of input signal Pin drops to region RG4, amplifiers 131 and 132 in amplifier circuit 130 and amplifiers 141 and 142 in amplifier circuit 140 are deactivated, and amplifier 133 is activated. As a result, amplifier 133, which has high efficiency characteristics for low input power, is used in region RG4. Therefore, in power amplifier circuit 100B, as shown by solid line LN10A, the efficiency in region RG4 can be further improved compared to embodiment 1.

[0077] The "amplifier circuit 130B" in the second embodiment corresponds to the "first amplifier circuit" in the present disclosure. The "amplifier 133" in the second embodiment corresponds to the "fifth amplifier" in the present disclosure.

[0078] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the description of the above embodiments, and is intended to include all modifications within the meaning and scope of the claims.

[0079] 1 Communication device, 10 Transmission circuit, 20 BBIC, 30 RFIC, 40 Power supply circuit, 50 Bias control circuit, 100, 100A, 100B Power amplifier circuit, 110 Branch circuit, 120 Phase shift circuit, 121 Phase adjuster, 122 Hybrid coupler, 130, 130A, 130B, 140 Amplification circuit, 131 to 133, 141, 142 Amplifier, 135 Phase shift line, 150 Balun, 151 to 153 Line, 410 MPC, 420 Power supply selection circuit, 430 Digital ET, 1531 First part, 1532 Second part, ANT Antenna, C1, C2 Capacitor, GND Ground potential, N1 Connection node, T1, T3, T4 Input terminal, T2 Output terminal, TR1 Transformer, VB Battery voltage, Vcc Power supply voltage.

Claims

1. A transmission circuit for transmitting a signal to an antenna, comprising: an input terminal; a first amplifier circuit and a second amplifier circuit configured to amplify an input signal, which is a high-frequency signal received at the input terminal; and an output terminal for outputting the amplified signal to the antenna, wherein the second amplifier circuit includes a first amplifier and a second amplifier, and a balun for converting a pair of balanced lines to unbalanced lines, wherein the pair of balanced lines includes a first line and a second line, one end of the first line is connected to the output terminal of the first amplifier and the other end is connected to ground potential, one end of the second line is connected to the output terminal of the second amplifier and the other end is connected to the ground potential, one end of the unbalanced line is connected to the output terminal of the first amplifier circuit and the other end is connected to the output terminal, and the drive states of the first amplifier and the second amplifier are switched according to the power level of the input signal.

2. The transmission circuit according to claim 1, wherein the balun is a Marchand balun that further includes a third line coupled to the first line and the second line as the unbalanced line, and wherein, when the wavelength of a high-frequency signal to be transmitted is λ, the first line and the second line have a line length of λ / 4, and the third line has a line length of λ / 2.

3. The transmission circuit according to claim 2, wherein the third line includes a first portion coupled to the first line and a second portion coupled to the second line, and each of the first portion and the second portion has a line length of λ / 4.

4. A transmission circuit as claimed in any one of claims 1 to 3, wherein the first amplifier circuit includes a third amplifier and a fourth amplifier, and a phase shift line connected between the output terminal of the third amplifier and the output terminal of the fourth amplifier, and the output terminal of the fourth amplifier is connected to the other end of the unbalanced line.

5. The transmission circuit according to claim 4, further comprising a phase shift circuit that supplies the input signal to the third amplifier and the fourth amplifier with a phase difference, wherein the phase of the signal supplied to the third amplifier and the phase of the signal supplied to the fourth amplifier differ by 90°.

6. The transmission circuit according to claim 5, wherein the phase shift circuit includes: a phase adjuster that adjusts the phase of the input signal; and a hybrid coupler that supplies a signal from the phase adjuster to the third amplifier and the fourth amplifier.

7. A transmission circuit according to any one of claims 1 to 6, further comprising a transformer having a primary winding and a secondary winding, and supplying the input signal to the first amplifier and the second amplifier, one end of the primary winding being connected to the input terminal and the other end being connected to the ground potential, one end of the secondary winding being connected to the first amplifier and the other end being connected to the second amplifier, and the signal supplied to the second amplifier and the signal supplied to the first amplifier being 180° out of phase with each other.

8. The transmission circuit of claim 4, wherein when the power level of the input signal is equal to or greater than a first threshold, the first amplifier, the second amplifier, the third amplifier, and the fourth amplifier are driven; when the power level of the input signal is less than the first threshold and equal to or greater than a second threshold, the third amplifier and the fourth amplifier are driven, while the first amplifier and the second amplifier are deactivated; and when the power level of the input signal is less than the second threshold, the third amplifier is driven, while the first amplifier, the second amplifier, and the fourth amplifier are deactivated.

9. The transmission circuit according to claim 8, wherein the second amplifier circuit further includes a fifth amplifier configured to amplify the input signal, an output terminal of the fifth amplifier connected to one end of the unbalanced line, when the power level of the input signal is less than a third threshold value that is smaller than the second threshold value, the fifth amplifier is driven, while the first amplifier, the second amplifier, the third amplifier, and the fourth amplifier are driven, and when the power level of the input signal is equal to or greater than the third threshold value, the fifth amplifier is driven.

10. A communication device comprising: a transmitting circuit according to any one of claims 1 to 9; the antenna; and a signal processing circuit configured to supply the input signal to the transmitting circuit.

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