Electronic device substrate, method for manufacturing same, schottky barrier diode, field effect transistor, and bipolar transistor

Abstract

This electronic device substrate (1) is provided with: a sapphire substrate (2) comprising a sapphire single crystal; a buffer layer (4) comprising a single crystal of, e.g., Ir, formed on the sapphire substrate (2) by epitaxial growth; and a diamond layer (6) formed on the buffer layer (4) by epitaxial growth and comprising an n-type or p-type diamond single crystal having a plane orientation of (001), (110), (111), or (311). The plane orientation of the sapphire substrate (2) may be (0001), the plane orientation of the buffer layer (4) may be (111), and the plane orientation of the diamond layer (6) may be (111), and the crystal axis direction < 1-120 > of the sapphire substrate (2), the crystal axis direction <-1-12 > of the buffer layer (4), and the crystal axis direction <-1-12 > of the diamond layer (6) may be parallel to each other.

Description

Substrate for electronic device and manufacturing method thereof, Schottky barrier diode, field effect transistor, and bipolar transistor

[0001] The present invention relates to a substrate for an electronic device having a diamond single crystal layer with a plane orientation of (110), (111), (311), or (001) tilted at a predetermined angle, a method for manufacturing the same, and a Schottky barrier diode, a field effect transistor, and a bipolar transistor using the substrate for an electronic device. The present invention also relates to a manufacturing method that can manufacture a substrate for an electronic device having a diamond single crystal layer with a plane orientation of (001) at a lower temperature than conventional methods. This application claims priority based on Japanese Patent Application No. 2024-077378 filed in Japan on May 10, 2024, the contents of which are incorporated herein by reference.

[0002] Non-Patent Document 1 discloses a substrate for electronic devices, in which a 1 μm thick Ir buffer layer with a (001) plane orientation is formed on a substrate made of a sapphire single crystal whose surface has a (11-20) plane orientation, and a diamond layer with a (001) plane orientation is grown on top of the Ir buffer layer.

[0003] The Ir buffer layer in Non-Patent Document 1 was fabricated under the conditions that the substrate temperature of the sapphire single crystal was 850° C. and 1 μm of Ir was deposited for 100 minutes. That is, the deposition rate of the Ir buffer layer was 10 nm per minute.

[0004] Seong-Woo Kim, Yuki Kawamata, Ryota Takaya, Koji. Koyama, and Makoto Kasu, “Growth of high-quality one-inch freestanding heteroepitaxial (001) diamond on (11-20) sapphire substrate”, Applied Physics Letters 117, 202102 (2020).

[0005] With the electronic device substrate of Non-Patent Document 1, only a diamond single crystal layer with a surface plane orientation of (001) could be produced, and it was not possible to obtain diamond single crystals with plane orientations of (110), (111) or (311). When used in electronic elements, diamond single crystal layers with plane orientations of (110), (111) or (311) can be expected to have better device characteristics than diamond single crystal layers with a plane orientation of (001).

[0006] Furthermore, in Non-Patent Document 1, the Ir buffer layer is formed at a substrate temperature as high as 850°C. However, heating a substrate to a high temperature such as 850°C in an ultra-high vacuum device such as a sputtering device requires a special and large-scale heating device, which poses many technical difficulties and is not practical.

[0007] [Aspect 1] The electronic device substrate according to aspect 1 of the present invention comprises a sapphire substrate made of a sapphire single crystal, a buffer layer formed on the sapphire substrate by epitaxial growth and made of a single crystal of a buffer metal selected from Ir, Au, Ni, and Al or an alloy consisting of two or more of the above metals, and a diamond layer formed on the buffer layer by epitaxial growth and made of an n-type or p-type diamond single crystal with a plane orientation of (110), (111), or (311). In addition, when the angle of the plane orientation relative to the perpendicular is not particularly specified, the tolerance of the individual angle or relative angle of the plane orientation or crystal axis direction in the present invention is preferably ±8°, more preferably ±2°, and even more preferably ±1°. This point is common to all aspects, embodiments, and examples in which the angle of the plane orientation relative to the perpendicular is not particularly specified. In all aspects of the present invention, the buffer layer made of the single crystal of the buffer metal and the diamond layer made of the single crystal of diamond may each contain island-shaped single crystals with different plane orientations, with an area ratio of 10% or less.This is because even if the area ratio of single crystals with different plane orientations on the surface is 10% or less, there is little effect on device characteristics.If island-shaped regions with plane orientations different from other regions are formed in the buffer layer, island-shaped regions with plane orientations different from other regions will also be formed in the diamond layer on these island-shaped regions.The area ratio of single crystals with different plane orientations is preferably 5% or less, more preferably 1% or less.

[0008] According to this electronic device substrate, on the sapphire substrate made of sapphire single crystal, the single crystal of the buffer metal is epitaxially grown to form a buffer layer, and further on the buffer layer, n-type or p-type diamond single crystal is epitaxially grown to form a diamond layer, so that by setting the plane orientation of the sapphire substrate and the buffer layer, it is easy to realize the diamond single crystal layer with plane orientation (110), (111) or (311).Therefore, compared with the conventional diamond single crystal layer with plane orientation (001), it can obtain better device characteristics.As the buffer metal, Ir is particularly preferable, but other metals can also be used.

[0009] The reason why diamond single crystal layers with a (110), (111) or (311) plane orientation can achieve better device characteristics than diamond single crystal layers with a (001) plane orientation is that the density of dangling bonds (number per unit area) on the diamond surface increases in the order of (110), (111) and (001) plane orientations, and a diamond single crystal layer with a (110) or (111) plane orientation can achieve a higher hole carrier concentration than a diamond single crystal layer with a (001) plane orientation (Hisashi Sato, Makoto Kasu, Diamond and Related Materials 31 (2013) 47-49; see Figure 4 in this document).

[0010] [Aspect 2] The electronic device substrate according to Aspect 2 of the present invention is the same as Aspect 1, wherein the sapphire substrate has a (0001) plane orientation, the buffer layer has a (111) plane orientation, and the diamond layer has a (111) plane orientation, and the crystal axis direction <-1-120> of the sapphire substrate, the crystal axis direction <-1-12> of the buffer layer, and the crystal axis direction <-1-12> of the diamond layer are parallel to one another. Note that the tolerance for the angle of "parallel" as used herein is ±8°, more preferably ±2°, and even more preferably ±1°.

[0011] [Aspect 3] The electronic device substrate according to Aspect 3 of the present invention is the same as Aspect 1, except that the sapphire substrate has a (1-100) plane orientation, the buffer layer has a (311) plane orientation, and the diamond layer has a (311) plane orientation, and the crystal axis direction <11-20> of the sapphire substrate, the crystal axis direction <-1-12> of the buffer layer, and the crystal axis direction <-1-12> of the diamond layer all form an angle of 45° with each other.

[0012] [Aspect 4] An electronic device substrate according to Aspect 4 of the present invention is the same as Aspect 1, wherein the sapphire substrate has a plane orientation of (1-100), the buffer layer has a plane orientation of (111), and the diamond layer has a plane orientation of (111), and an orientation relationship in which the crystal axis direction <11-20> of the sapphire substrate forms an angle of 45 degrees with the crystal axis direction <-1-12> of the buffer layer and the crystal axis direction <-1-12> of the diamond layer.

[0013] [Aspect 5] The electronic device substrate according to Aspect 5 of the present invention is the same as Aspect 1, except that the sapphire substrate has a (11-20) plane orientation, the buffer layer has a (111) plane orientation, and the diamond layer has a (111) plane orientation, and the crystal axis direction <1-100> of the sapphire substrate, the crystal axis direction <-1-12> of the buffer layer, and the crystal axis direction <-1-12> of the diamond layer are all parallel to one another.

[0014] According to the electronic device substrates of Aspects 2 to 5, by setting the plane orientations of the sapphire substrate and the buffer layer so as to satisfy the above-mentioned orientation relationship, it is possible to easily realize a diamond single crystal layer having a plane orientation of (110), (111) or (311).

[0015] [Aspect 6] As shown in Figure 24, an electronic device substrate according to aspect 6 of the present invention comprises a sapphire substrate made of an inclined sapphire single crystal with a plane orientation (11-20) tilted at a predetermined angle within a range of 4° to 11° in the

[0001] direction relative to a line normal to the surface; a buffer layer epitaxially grown on the sapphire substrate and made of an inclined single crystal of the buffer metal with a plane orientation (001) tilted at the predetermined angle relative to the line normal to the surface; and a diamond layer epitaxially grown on the buffer layer and made of an n-type or p-type inclined diamond single crystal with a plane orientation (001) tilted at the predetermined angle relative to the line normal to the surface.

[0016] According to the substrate for electronic devices of Aspect 6, by using an inclined sapphire single crystal whose (11-20) plane orientation is tilted in the

[0001] direction by a predetermined angle within a range of 4° to 11° with respect to the normal to the surface, a buffer layer of the buffer metal can be formed more stably than when the (11-20) plane orientation is not tilted at a temperature range of 600°C to 750°C, which is lower than conventional temperatures. This eliminates the need to heat the substrate to a high temperature such as 850°C under ultra-high vacuum, allowing for a simple and small-scale heating device, thereby improving practicality. The predetermined angle may more preferably be 5.0° to 9.0°, 4.0° to 6.0°, or even more preferably be 5.0°±0.5°.

[0017] [Aspect 7] As shown in Figure 26, an electronic device substrate according to Aspect 7 of the present invention comprises a sapphire substrate made of an inclined sapphire single crystal with a plane orientation (11-20) tilted at a predetermined angle within a range of 4° to 15° in the [1-100] direction relative to a line normal to the surface; a buffer layer epitaxially grown on the sapphire substrate and made of an inclined single crystal of the buffer metal with a plane orientation (001) tilted at the predetermined angle relative to a line normal to the surface; and a diamond layer epitaxially grown on the buffer layer and made of an n-type or p-type inclined diamond single crystal with a plane orientation (001) tilted at the predetermined angle relative to a line normal to the surface.

[0018] According to the substrate for electronic devices of Aspect 7, by using a sapphire substrate made of an inclined sapphire single crystal whose plane orientation (11-20) is inclined at a predetermined angle within a range of 4° to 15° in the [1-100] direction with respect to the normal to the surface, it is possible to more stably form a buffer layer of the buffer metal in a temperature range of 600° C. or more and 750° C. or less, which is lower than conventional temperatures. This eliminates the need to heat the substrate to a high temperature such as 850° C. in an ultra-high vacuum, and allows for a simpler and smaller-scale heating apparatus to be used, thereby improving practicality.

[0019] [Aspect 8] The substrate for electronic devices according to aspect 8 of the present invention is the substrate for electronic devices according to any one of aspects 1 to 7, wherein the resistivity of the buffer layer is 1.0×10 －６ Ω cm or more and 1.0 × 10 －５Ω·cm or less, and the resistivity of the diamond layer is 10 Ω·cm or more and 1000 Ω·cm or less.

[0020] According to the substrate for electronic devices of aspect 8, it is possible to manufacture an electronic device that is easy to manufacture and has excellent device characteristics. The resistivity of the buffer layer is more preferably 2.0×10 －６ Ω cm or more and 8.0 x 10 －６ Ω cm or less, more preferably 4.0 × 10 －６ Ω cm or more and 5.0 x 10 －6 The resistivity of the diamond layer is more preferably 10 Ω·cm or more and 100 Ω·cm or less, and even more preferably 10 Ω·cm or more and 30 Ω·cm or less.

[0021] [Aspect 9] A substrate for electronic devices according to Aspect 9 of the present invention is the same as that of any of Aspects 1 to 8, wherein the thickness of the sapphire substrate is 100 μm or more and 800 μm or less, the thickness of the buffer layer is 0.1 μm or more and 5 μm or less, and the thickness of the diamond layer is 1 μm or more and 2000 μm or less.

[0022] According to the electronic device substrate of Aspect 9, it is possible to manufacture an electronic device that is easy to manufacture and has excellent device characteristics. The thickness of the sapphire substrate is more preferably 100 μm or more and 500 μm or less, and even more preferably 100 μm or more and 200 μm or less. The thickness of the buffer layer may more preferably be 0.1 μm or more and 1.5 μm or less, 0.5 μm or more and 1.3 μm or less, 0.1 μm or more and 1 μm or less, or 0.1 μm or more and 0.3 μm or less. The thickness of the diamond layer is more preferably 1 μm or more and 1000 μm or less, and even more preferably 1 μm or more and 100 μm or less.

[0023] In the substrate for electronic devices according to any one of the first to ninth aspects, before forming the buffer layer, the sapphire substrate is heated in air or an oxygen atmosphere at 1050 K for one hour or more under atmospheric pressure. ℃The substrate may be subjected to a heat treatment (annealing treatment) at a temperature within a range of ±100°C. In this case, the buffer layer of the buffer metal grows epitaxially on the sapphire substrate in a more orderly manner, thereby achieving a higher quality of the substrate for an electronic device. The atmospheric pressure may be 1 atmosphere ±0.2 atmosphere. The time for the heat treatment may be 1 hour to 5 hours.

[0024] A Schottky barrier diode according to Aspect 10 of the present invention comprises the substrate for electronic devices according to any one of Aspects 1 to 9, a Schottky electrode in Schottky contact with the first region of the diamond layer, and an ohmic electrode in ohmic contact with the second region of the diamond layer. This Schottky barrier diode has large capacity, high operating speed, and electrical characteristics with excellent heat resistance.

[0025] A field effect transistor according to Aspect 11 of the present invention comprises the substrate for electronic devices according to any one of Aspects 1 to 9, a gate oxide film formed on the first region of the diamond layer, a source electrode formed on the second region of the diamond layer, a gate electrode formed on the gate oxide film, and a drain electrode formed on the third region of the diamond layer. This field effect transistor has large capacity, high operating speed, and electrical characteristics with excellent heat resistance.

[0026] A bipolar transistor according to Aspect 12 of the present invention comprises the substrate for electronic devices according to any one of Aspects 1 to 9, a gate oxide film formed on the first region of the diamond layer, an emitter electrode formed on the second region of the diamond layer, a gate electrode formed on the gate oxide film, and a collector electrode formed on the third region of the diamond layer. This bipolar transistor has large capacity, high operating speed, and excellent heat resistance electrical characteristics.

[0027] [Aspect 13] A manufacturing method for an electronic device substrate according to aspect 13 of the present invention comprises the steps of epitaxially growing a single crystal of a buffer metal, which is a metal selected from Ir, Au, Ni, and Al, or an alloy consisting of two or more of the above metals, on a sapphire substrate made of a single crystal sapphire, thereby forming a buffer layer, and epitaxially growing an n-type or p-type diamond single crystal with a (110), (111), or (311) face orientation on the buffer layer, thereby forming a diamond layer. According to this manufacturing method for an electronic device substrate, a buffer layer is formed on a sapphire substrate made of a single crystal sapphire by epitaxially growing the single crystal of the buffer metal, and an n-type or p-type diamond single crystal is epitaxially grown on the buffer layer to form a diamond layer, so that a diamond single crystal with a (110), (111), or (311) face orientation can be easily realized.

[0028] In the method of aspect 13, a buffer layer made of the buffer metal having a (111) plane orientation may be formed by using a sapphire substrate made of a sapphire single crystal having a plane orientation (1-100), and performing film formation under the conditions of a substrate temperature Tg (°C) during deposition of the buffer metal single crystal and a deposition rate Gr (nm / min) of the buffer metal single crystal satisfying the relationship Gr>Tg / 20-25.

[0029] In the method of aspect 13, a buffer layer made of the buffer metal having a (311) plane orientation may be formed by using a sapphire substrate made of a sapphire single crystal having a (1-100) plane orientation and performing film formation under the conditions of a substrate temperature Tg (°C) during deposition of the buffer metal single crystal and a deposition rate Gr (nm / min) of the buffer metal single crystal satisfying Gr<Tg / 20-25.

[0030] In the method of aspect 13, a buffer layer made of the buffer metal having a (111) plane orientation may be formed by using a sapphire substrate made of a sapphire single crystal having a plane orientation (11-20), and performing film formation under the conditions of a substrate temperature Tg (°C) during deposition of the buffer metal single crystal and a deposition rate Gr (nm / min) of the buffer metal single crystal satisfying the relationship Gr>Tg / 30-15.

[0031] A method for manufacturing a substrate for an electronic device according to Aspect 14 of the present invention includes the steps of: forming a buffer layer on a sapphire substrate made of a sapphire single crystal with a (11-20) crystal plane orientation by epitaxially growing a single crystal of a buffer metal having a (001) crystal plane orientation, the buffer metal being a metal selected from Ir, Au, Ni, and Al, or an alloy of two or more of the metals; and forming a diamond layer on the buffer layer by epitaxially growing an n-type or p-type diamond single crystal with a (001) crystal plane orientation, wherein the step of forming the buffer layer is carried out by adjusting the pressure in a sputtering apparatus to 1×10 －４ Pa or more 5×10 －４ The method is characterized in that the pressure is reduced to 0.1 Pa or less, the temperature of the sapphire substrate is heated to 600° C. to 750° C., argon is introduced as a sputtering gas, and a sputtering target of the buffer metal is used to deposit a single crystal of the buffer metal having a (001) plane orientation on the sapphire substrate 2. According to this manufacturing method, the buffer layer of the buffer metal can be formed in a temperature range of 600° C. to 750° C., which is lower than conventional methods, and therefore there is no need to heat the substrate to a high temperature such as 850° C. in an ultra-high vacuum, and a simple and small-scale heating device can be used, thereby improving practicality.

[0032] In the method of aspect 14, the buffer layer may be formed under the conditions that the substrate temperature Tg (°C) during deposition of the buffer metal single crystal and the deposition rate Gr (nm / min) of the buffer metal single crystal satisfy Gr<Tg / 30-15.

[0033] [Aspect 15] A method for manufacturing a substrate for an electronic device according to aspect 15 of the present invention includes the steps of: forming a buffer layer on a sapphire substrate made of an inclined sapphire single crystal having a plane orientation (11-20) inclined at a predetermined angle within a range of 4° to 11° in the

[0001] direction with respect to a line normal to the surface by epitaxially growing an inclined single crystal of the buffer metal having a plane orientation (001) inclined at the predetermined angle with respect to a line normal to the surface, as shown in FIG. 24; and forming a diamond layer on the buffer layer by epitaxially growing an n-type or p-type inclined diamond single crystal having a plane orientation (001) inclined at the predetermined angle with respect to a line normal to the surface, as shown in FIG. 24; －４ Pa or more and 5 x 10 －４ The method is characterized in that the pressure is reduced to 0.1 Pa or less, the temperature of the sapphire substrate is heated to 600°C or more and 750°C or less, argon is introduced as a sputtering gas, and the tilted single crystal is deposited on the sapphire substrate by a sputtering method using a sputtering target of the buffer metal.

[0034] According to the method for manufacturing a substrate for an electronic device according to Aspect 15, by using an inclined sapphire single crystal whose (11-20) plane orientation is tilted in the

[0001] direction by a predetermined angle within a range of 4° to 11° with respect to the normal to the surface, a buffer layer of the buffer metal can be formed more stably than when the (11-20) plane orientation is not tilted at a temperature range of 600°C to 750°C, which is lower than conventional temperatures. This eliminates the need to heat the substrate to a high temperature such as 850°C under ultra-high vacuum, allowing for a simpler and smaller heating device, thereby improving practicality. The predetermined angle may more preferably be 5.0° to 9.0°, 4.0° to 6.0°, or even more preferably be 5.0°±0.5°.

[0035] [Aspect 16] A method for manufacturing a substrate for an electronic device according to Aspect 16 of the present invention includes the steps of: forming a buffer layer on a sapphire substrate made of an inclined sapphire single crystal having a plane orientation (11-20) inclined at a predetermined angle within a range of 4° to 15° in the [1-100] direction with respect to a line normal to the surface by epitaxially growing an inclined single crystal of the buffer metal having a plane orientation (001) inclined at the predetermined angle with respect to a line normal to the surface, as shown in FIG. 26; and forming a diamond layer on the buffer layer by epitaxially growing an n-type or p-type inclined diamond single crystal having a plane orientation (001) inclined at the predetermined angle with respect to a line normal to the surface, as shown in FIG. 26; －４ Pa or more and 5 x 10 －４ The method is characterized in that the pressure is reduced to 0.1 Pa or less, the temperature of the sapphire substrate is heated to 600°C or more and 750°C or less, argon is introduced as a sputtering gas, and the tilted single crystal is deposited on the sapphire substrate by a sputtering method using a sputtering target of the buffer metal.

[0036] According to the method for manufacturing a substrate for an electronic device according to Aspect 16, by using a sapphire substrate made of an inclined sapphire single crystal whose plane orientation (11-20) is inclined in the [1-100] direction by a predetermined angle within a range of 4° to 15° with respect to the normal to the surface, the buffer layer of the buffer metal can be more stably formed at a temperature range of 600°C to 750°C, which is lower than conventional temperatures. This eliminates the need to heat the substrate to a high temperature such as 850°C under ultra-high vacuum, allowing for a simpler and smaller heating device, thereby improving practicality. The predetermined angle may more preferably be 4.0° to 11.0°, and even more preferably be 7.5°±0.5° or 5.0°±0.5°.

[0037] [Aspect 17] The method for manufacturing a substrate for an electronic device according to any one of Aspects 13 to 16 may further include a step of heat-treating the sapphire substrate at 1050°C ± 100°C under atmospheric pressure for one hour or more in the air or an oxygen atmosphere prior to the step of forming the buffer layer. In this case, the buffer layer of the buffer metal grows epitaxially on the sapphire substrate in a more orderly manner, thereby achieving even higher quality of the substrate for an electronic device. The atmospheric pressure may be 1 atmosphere ± 0.2 atmospheres. The duration of the heat treatment may be one to five hours.

[0038] [Aspect 18] In the electronic device substrate according to any one of Aspects 1 to 9, the Schottky barrier diode according to Aspect 10, the field-effect transistor according to Aspect 11, the bipolar transistor according to Aspect 12, or the method for manufacturing an electronic device substrate according to any one of Aspects 13 to 16, the sapphire substrate is an inclined sapphire single crystal in which the plane orientation of the sapphire single crystal is inclined by an inclination angle α with respect to a line perpendicular to the surface of the sapphire substrate, the buffer layer is an inclined Ir single crystal in which the plane orientation of the buffer metal single crystal is inclined by an inclination angle β with respect to a line perpendicular to the surface of the buffer layer, and the diamond layer is made of an inclined n-type or p-type diamond single crystal in which the plane orientation of the diamond single crystal is inclined by an inclination angle γ with respect to a line perpendicular to the surface of the diamond layer, and the relationships of inclination angle α > inclination angle β and inclination angle β < inclination angle γ may be satisfied. In this case, there is little disturbance in epitaxial growth at the boundaries between each layer, thereby enabling further improvement in the quality of the electronic device substrate and the device. The angle difference between the inclination angles α and β and the angle difference between the inclination angles β and γ are preferably 0.5 to 7°, and more preferably 1 to 4°.

[0039] According to the electronic device substrate of the present invention, a buffer layer is formed by epitaxially growing a single crystal of the buffer metal on a sapphire substrate made of a single crystal sapphire, and a diamond layer is formed by epitaxially growing an n-type or p-type single crystal diamond on the buffer layer.Therefore, by setting the respective plane orientations of the sapphire substrate and the buffer layer, a diamond single crystal layer with a plane orientation of (110), (111) or (311) which has excellent electrical properties can be easily realized.

[0040] Furthermore, according to the method for manufacturing a substrate for an electronic device according to aspect 13 of the present invention, a buffer layer is formed by epitaxially growing a single crystal of the buffer metal on a sapphire substrate made of a single crystal sapphire, and an n-type or p-type diamond single crystal is epitaxially grown on the buffer layer to form a diamond layer, so that a diamond single crystal layer with a plane orientation of (110), (111) or (311) can be easily realized.

[0041] Furthermore, according to the substrate for electronic devices according to Aspects 6 and 7 of the present invention and the method for manufacturing a substrate for electronic devices according to Aspects 14 to 16, the buffer layer of the buffer metal can be stably formed in a temperature range of 600° C. or more and 750° C. or less, which is lower than conventional temperatures, and a simple and small-scale heating device can be used, thereby improving practicality.

[0042] 1 is a cross-sectional view showing a substrate for an electronic device according to one embodiment of the present invention; FIG. 2 is a cross-sectional view showing a Schottky barrier diode according to another embodiment of the present invention; FIG. 3 is a cross-sectional view showing a field-effect transistor according to another embodiment of the present invention; FIG. 4 is a cross-sectional view showing a bipolar transistor according to another embodiment of the present invention; FIG. 5 is a graph showing the results of diffracted X-ray intensity using the 2θ angle as a parameter in a 2θ / θ scan measurement by X-ray diffraction in Example 1 of the present invention, with the horizontal axis representing the measured value of 2θ; FIG. 6 is a graph showing the results of X-ray diffraction of the buffer layer in Example 1; FIG. 7 is a graph showing the results of X-ray diffraction of the sapphire substrate in Example 1; FIG. 8 is an explanatory diagram showing a state in Example 1 in which the crystal axis direction of the sapphire substrate and the crystal axis direction of the buffer layer made of Ir single crystal coincide with each other; FIG. 9 is a graph showing the results of diffracted X-ray intensity using the 2θ angle as a parameter in a 2θ / θ scan measurement by X-ray diffraction in Examples 2 and 3 of the present invention, with the horizontal axis representing the measured value of 2θ; FIG. 10 is a graph showing the results of X-ray diffraction of the buffer layer in Examples 2 and 3; FIG. 11 is a graph showing the results of X-ray diffraction of the sapphire substrate in Examples 2 and 3. 1 is an explanatory diagram showing a state in which the crystal axis direction of a sapphire substrate coincides with the crystal axis direction of a buffer layer made of Ir single crystal in Example 4 of the present invention.

[0034] FIG. 1 is a graph showing the results of diffracted X-ray intensity using the 2θ angle as a parameter in a 2θ / θ scan measurement by X-ray diffraction in Example 4, with the horizontal axis representing the measured value of 2θ.

[0035] FIG. 2 is a graph showing the results of X-ray diffraction of a buffer layer in Example 4.

[0036] FIG. 3 is a graph showing the results of X-ray diffraction of a sapphire substrate in Example 4.

[0037] FIG. 4 is an explanatory diagram showing a state in which the crystal axis direction of a sapphire substrate coincides with the crystal axis direction of a buffer layer made of Ir single crystal in Example 4.

[0038] FIG. 5 is a graph showing the results of diffracted X-ray intensity using the 2θ angle as a parameter in a 2θ / θ scan measurement by X-ray diffraction in Example 5 of the present invention, with the horizontal axis representing the measured value of 2θ.

[0039] FIG. 6 is a graph showing the results of X-ray diffraction of a buffer layer in Example 5.

[0039] FIG. 7 is a graph showing the results of X-ray diffraction of a sapphire substrate in Example 5.

[0039] FIG. 8 is an explanatory diagram showing a state in which the crystal axis direction of a sapphire substrate coincides with the crystal axis direction of a buffer layer made of Ir single crystal in Example 5. 10 is a graph showing, in Examples 2 and 3, the conditions under which an Ir layer with a (311) plane orientation appeared on a sapphire substrate with a (1-100) plane orientation, indicated by △, and the conditions under which an Ir layer with a (111) plane orientation appeared, indicated by ×.Graph showing the conditions under which an Ir layer with a (001) plane orientation appeared on a sapphire substrate with a (11-20) plane orientation in Examples 4 and 5, marked with a circle, and the conditions under which an Ir layer with a (111) plane orientation appeared, marked with an X. A lattice image of the interface where Ir (001) is deposited on a sapphire (11-20) plane substrate, observed from the side using a transmission electron microscope (TEM) at 10,000,000 magnification. A cross-sectional view showing an electronic device substrate having a layered structure of a tilted diamond single crystal / tilted Ir single crystal / tilted sapphire single crystal according to Example 6 (Aspect 13) of the present invention, in which the plane orientation (11-20) of the tilted sapphire single crystal is tilted 5° in the

[0001] direction with respect to the normal to its surface. A graph showing the measurement results of diffracted X-ray intensity using the 2θ angle of 2θ / θ scan measurement by X-ray diffraction in Example 6 (Aspect 13) as a parameter, with the horizontal axis representing the measured value of 2θ. 1 is a cross-sectional view showing an electronic device substrate having a layered structure of tilted diamond single crystal / tilted Ir single crystal / tilted sapphire single crystal of Example 7 (Aspect 14) of the present invention, in which the plane orientation (11-20) of the tilted sapphire single crystal is tilted 5° in the

[0001] direction with respect to the normal to its surface.

[0001] is a graph showing the measurement results of diffracted X-ray intensity using the 2θ angle of the 2θ / θ scan measurement by X-ray diffraction of Example 7 (Aspect 14) as a parameter, with the horizontal axis representing the measured value of 2θ.

[0002] is a graph showing the relationship between the tilt angle of the plane orientation (11-20) of the sapphire substrate with respect to the normal and the Ir (002) / (111) X-ray diffraction intensity ratio in Example 5 (no tilt), Example 6 (Aspect 13), and Example 7 (Aspect 14). 11 is a graph showing the relationship between the tilt angle of the (11-20) plane orientation of the sapphire substrate relative to the perpendicular and the full width at half maximum (FWHM) of the X-ray diffraction (002) rocking curve of the Ir layer deposited thereon in Example 5 (no tilt), Example 6 (Aspect 13), and Example 7 (Aspect 14). FIG. 12 is a graph showing the results of diffracted X-ray intensity using the 2θ angle as a parameter in a 2θ / θ scan measurement by X-ray diffraction in Example 11 of the present invention, with the horizontal axis representing the measured value of 2θ. FIG. 13 is a graph showing the results of X-ray diffraction ω scanning of the Ir buffer layer in Example 11. FIG. 14 is a graph showing the results of X-ray diffraction Φ scanning of the sapphire substrate in Example 11. FIG. 15 is a graph showing the results of X-ray diffraction Φ scanning of the Ir buffer layer in Example 11.37 is an explanatory diagram showing a state in which the crystal axis direction of the sapphire substrate and the crystal axis direction of the buffer layer made of Ir single crystal coincide with each other in Examples 11, 12, and 13 of the present invention. This is a graph showing the results of 2θ / ω scan measurement by X-ray diffraction of the sapphire substrate of Example 12 (tilt angle to the tilt direction [1-100] is 7.5°), with the horizontal axis representing the measured value of 2θ. This is a graph showing the results of X-ray diffraction ω scan measurement of the Ir buffer layer when the sapphire substrate of Example 12 (tilt angle to the tilt direction [1-100] is 7.5°) is used. This is a graph showing the results of X-ray diffraction Φ scan measurement of the Ir buffer layer when the sapphire substrate of Example 12 (tilt angle to the tilt direction [1-100] is 7.5°) is used. The Φ angle is the same as in FIG. 38. This is a graph showing the results of X-ray diffraction Φ scan measurement of the sapphire substrate of Example 12 (tilt angle to the tilt direction [1-100] is 7.5°). The Φ angle is the same as in FIG. 37. 10 is a graph showing the tilt angle of the sapphire substrate, measured by ω scans of the sapphire substrate and the Ir buffer layer using the sapphire substrate of Example 12 (tilt angle of 7.5° in the tilt direction [1-100] direction) while changing Φ in increments of 15°. FIG. 11 is a graph showing the tilt angle of the Ir buffer layer, measured by ω scans of the sapphire substrate and the Ir buffer layer using the sapphire substrate of Example 12 (tilt angle of 7.5° in the tilt direction [1-100] direction) while changing Φ in increments of 15°. FIG. 12 is a graph showing the diffracted X-ray intensity results using the 2θ angle as a parameter in 2θ / ω scan measurements by X-ray diffraction of the sapphire substrate of Example 13 (tilt angle of 5° in the tilt direction

[0001] direction), with the horizontal axis representing the measured value of 2θ. FIG. 13 is a graph showing the measurement results of X-ray diffraction ω scans of the Ir buffer layer when the sapphire substrate of Example 13 (tilt angle of 5° in the tilt direction

[0001] direction) is used. 1 is a graph showing the results of X-ray diffraction ω scan measurement of the sapphire substrate (tilt angle 5° in the tilt direction

[0001] direction) of Example 13. It is a photograph taken from the front side of the diamond field effect transistor fabricated on the sapphire substrate / Ir buffer layer / diamond layer fabricated in Example 9 of the present invention. It is a graph showing the results of diffracted X-ray intensity using 2θ angle as a parameter in 2θ / θ scan measurement by X-ray diffraction of the Au buffer layer on the sapphire substrate ((0001) plane orientation) of Example 14 of the present invention, with the horizontal axis representing the measured value of 2θ.15 is a graph showing the results of diffracted X-ray intensity, with the 2θ angle as a parameter, of a 2θ / θ scan measurement by X-ray diffraction of an Au buffer layer on a sapphire substrate ((1-100) surface orientation) according to Example 15 of the present invention, with the horizontal axis representing the measured value of 2θ. 16 is a graph showing the results of diffracted X-ray intensity, with the 2θ angle as a parameter, of a 2θ / θ scan measurement by X-ray diffraction of an Au buffer layer on a sapphire substrate ((11-20) surface orientation) according to Example 16 of the present invention, with the horizontal axis representing the measured value of 2θ. 17 is a graph showing the results of diffracted X-ray intensity, with the 2θ angle as a parameter, of a 2θ / θ scan measurement by X-ray diffraction of a Ni buffer layer on a sapphire substrate ((0001) surface orientation) according to Example 17 of the present invention, with the horizontal axis representing the measured value of 2θ. 18 is a graph showing the results of diffracted X-ray intensity, with the 2θ angle as a parameter, of a 2θ / θ scan measurement by X-ray diffraction of a Ni buffer layer on a sapphire substrate ((11-20) surface orientation) according to Example 18 of the present invention, with the horizontal axis representing the measured value of 2θ. 10 is a graph showing the results of diffracted X-ray intensity using the 2θ angle as a parameter in a 2θ / θ scan measurement by X-ray diffraction of an Al buffer layer on a sapphire substrate ((0001) plane orientation) of Example 19 of the present invention, with the horizontal axis representing the measured value of 2θ. FIG. 11 is a graph showing the results of measurement of the tilt angle β of the Ir buffer layer relative to the tilt angle α of the sapphire substrate in Example 20 of the present invention. FIG. 12 is a graph showing the results of measurement of the X-ray diffraction ω scan of the Ir buffer layer when a sapphire substrate (tilt angle to the tilt direction [1-100] of 15°) of Example 21 of the present invention is used. FIG. 13 is a graph showing the tilt angle of the sapphire substrate when the sapphire substrate (tilt angle to the tilt direction [1-100] of 15°) of Example 21 is used, and the ω scan of the sapphire substrate and the Ir buffer layer is measured by changing Φ by 15°. 10 is a graph showing the tilt angle of the Ir buffer layer measured by ω scanning of the sapphire substrate and the Ir buffer layer while changing Φ in increments of 15° using the sapphire substrate of Example 21 (tilt angle of 15° in the tilt direction [1-100] direction).

[0043] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. [Electronic Device Substrate] Figure 1 shows an electronic device substrate 1 according to one embodiment of the present invention. This electronic device substrate 1 comprises a sapphire substrate 2 made of a sapphire single crystal, a buffer layer 4 formed on the sapphire substrate 2 by epitaxial growth and made of a single crystal of a buffer metal selected from Ir, Au, Ni, and Al or an alloy made of two or more of the above metals, and a diamond layer 6 formed on the buffer layer 4 by epitaxial growth and made of an n-type or p-type diamond single crystal with a plane orientation of (110), (111), or (311).

[0044] The sapphire substrate 2 is made of a single crystal sapphire, which is made of high-purity alumina (Al ２ O ３ The sapphire substrate 2 is a colorless, transparent crystal with a hexagonal crystal structure, artificially grown into a giant crystal, and has high insulating properties. The purity of the sapphire single crystal is preferably 6N mass% or more, and more preferably 7N mass% or more. The sapphire substrate 2 may be a commercially available product, and its manufacturing method is not limited. For example, it can be manufactured by slicing a sapphire ingot grown by the CZ method, or by growing it into a thin plate shape by the EFG method.

[0045] The buffer layer 4 is produced by epitaxially growing the buffer metal on the surface of the sapphire substrate 2, and can be produced, for example, by the following method. First, the sapphire substrate 2 is placed in a sputtering apparatus and a pressure of 1×10 －４ ~5 x 10 －４ The pressure is reduced to 100 Pa, and the temperature of the sapphire substrate 2 is heated to 600 to 1050°C. Argon, for example, is introduced as a sputtering gas, and a sputtering target of the high-purity buffer metal is used. The degree of vacuum during argon introduction is set to 0.25 to 0.4 Pa, and a single crystal of the buffer metal with a (110) or (111) orientation is deposited on the sapphire substrate 2 by RF sputtering. This allows the buffer layer 4 to be formed. Ir is the most preferred of the buffer metals, but as will be shown in the examples described below, other metals can also be used in the present invention.

[0046] The diamond layer 6 is made of n-type or p-type diamond single crystal, and has a plane orientation of (110), (111), or (311). In the case of n-type, one or more elements such as phosphorus (P), nitrogen (N), and arsenic (As) are added to the diamond single crystal at a concentration of 1×10 １８ ~5 x 10 １９ cm －３ In the case of p-type, one or more elements such as boron (B), aluminum (Al), and lithium (Li) are doped into the diamond single crystal at a concentration of about 2 × 10 １８ ~1 x 10 ２０ cm －３ This can be achieved by doping at a concentration of about 1000 .mu.m.

[0047] To form the diamond layer 6, the sapphire substrate 2 on which the buffer layer 4 has been formed is set in, for example, a plasma CVD apparatus, and a pressure of 1×10 －５ ~5 x 10 －５ The pressure is reduced to 500°C, the substrate temperature is set to 650 to 900°C, and the doped diamond single crystal with a (110) or (311) plane orientation is deposited on the buffer layer 4 to a thickness of 1 to 1000 μm by microwave plasma chemical vapor deposition (CVD), thereby forming the diamond layer 6.

[0048] The buffer layer 4 made of a single crystal of the buffer metal and the diamond layer 6 made of a single crystal of diamond may each contain island-shaped single crystals with different plane orientations at an area ratio of 10% or less. This is because even if the surface area ratio of single crystals with different plane orientations is 10% or less, it has almost no effect on the device characteristics. The area ratio of single crystals with different plane orientations is preferably 5% or less, more preferably 1% or less. If island-shaped regions with plane orientations different from other regions are formed in the buffer layer 4, island-shaped regions with plane orientations different from other regions will also be formed in the diamond layer 6 on those island-shaped regions. There are no limitations on the size of the island-shaped regions when viewed in a plane, but it is preferable that the size be approximately 1 μm or less in the major axis direction.

[0049] According to this electronic device substrate 1, a buffer layer 4 is formed by epitaxially growing a single crystal of the buffer metal on a sapphire substrate 2 made of a single crystal sapphire, and a diamond layer 6 is further formed by epitaxially growing an n-type or p-type single crystal diamond on the buffer layer 4, so that a diamond single crystal layer 6 with a plane orientation of (110), (111) or (311) can be easily realized by setting the respective plane orientations of the sapphire substrate 2 and the buffer layer 4. Therefore, better device characteristics can be obtained than with conventional diamond single crystal layers with a plane orientation of (001).

[0050] There are six possible plane orientations for the sapphire substrate 2 and the buffer layer 4. The tolerance for the angle of "parallel" below is ±8°, more preferably ±2°, and even more preferably ±1°.

[0051] (1) The plane orientation of the sapphire substrate 2 is (0001), the plane orientation of the buffer layer 4 is (111), and the plane orientation of the diamond layer 6 is (111). In this case, it is necessary that the crystal axis direction <-1-120> of the sapphire substrate 2, the crystal axis direction <-1-12> of the buffer layer 4, and the crystal axis direction <-1-12> of the diamond layer 6 have an orientation relationship in which they are parallel to one another.

[0052] (2) The plane orientation of the sapphire substrate 2 is (1-100), the plane orientation of the buffer layer 4 is (311), and the plane orientation of the diamond layer 6 is (311). In this case, it is necessary that the crystal axis direction <11-20> of the sapphire substrate 2, the crystal axis direction <-1-12> of the buffer layer 4, and the crystal axis direction <-1-12> of the diamond layer 6 have an orientation relationship in which they form an angle of 45° with each other.

[0053] (3) The plane orientation of the sapphire substrate 2 is (1-100), the plane orientation of the buffer layer 4 is (111), and the plane orientation of the diamond layer 6 is (111). In this case, it is necessary that the crystal axis direction <11-20> of the sapphire substrate 2, the crystal axis direction <-1-12> of the buffer layer 4, and the crystal axis direction <-1-12> of the diamond layer 6 have an orientation relationship in which they form an angle of 45 degrees with one another.

[0054] (4) The plane orientation of the sapphire substrate 2 is (11-20), the plane orientation of the buffer layer 4 is (111), and the plane orientation of the diamond layer 6 is (111). In this case, it is necessary that the crystal axis direction <1-100> of the sapphire substrate 2, the crystal axis direction <-1-12> of the buffer layer 4, and the crystal axis direction <-1-12> of the diamond layer 6 have an orientation relationship in which they are parallel to one another.

[0055] (5) It has the structure shown in Fig. 24. The plane orientation (11-20) of the sapphire substrate 2 is tilted at a predetermined angle α in the

[0001] direction within a range of 4° to 11° with respect to the normal O to the surface of the sapphire substrate 2. Similarly, the plane orientation (001) of the buffer layer 4 is tilted at a predetermined angle β in the <-110> direction with respect to the normal O to the surface of the buffer layer 4. Similarly, the plane orientation (001) of the diamond layer 6 is tilted at a predetermined angle γ in the <-110> direction with respect to the normal O to the surface of the diamond layer 6. The relationship α = β = γ holds, and the crystal axis direction <0001> of the sapphire substrate 2, the crystal axis direction <-110> of the buffer layer 4, and the crystal axis direction <-110> of the diamond layer 6 have an orientation relationship in which they are parallel to one another. The predetermined angles α=β=γ may more preferably be 5.0° to 9.0°, or may be 4.0° to 6.0°, and further preferably be 5.0°±0.5°.

[0056] The present invention can be realized not only when the predetermined angle α=β=γ is satisfied, but also when the relationship of α>β and β<γ is satisfied. Figure 51 is a graph showing the measurement results of the relationship between the tilt angle α and the tilt angle β when an Ir buffer layer is epitaxially grown on a sapphire substrate with a tilt angle α in Example 20 described later. From the graph, it can be seen that α>β is satisfied at all points. Thus, it was found that a high-quality Ir layer and a high-quality diamond layer can be obtained even when α>β.

[0057] (6) It has the structure shown in Fig. 26. The plane orientation (11-20) of the sapphire substrate 2 is inclined at a predetermined angle α in the range of 4° to 11° in the [-1100] direction with respect to the normal O to the surface of the sapphire substrate 2, and similarly, the plane orientation (001) of the buffer layer 4 is inclined at a predetermined angle β in the <110> direction with respect to the normal O to the surface of the buffer layer 4. Similarly, the plane orientation (001) of the diamond layer 6 is inclined at a predetermined angle γ in the <110> direction with respect to the normal O to the surface of the diamond layer 6. There is a relationship of α = β = γ, and the crystal axis direction <-1100> of the sapphire substrate 2, the crystal axis direction <110> of the buffer layer 4, and the crystal axis direction <110> of the diamond layer 6 have an orientation relationship in which they are parallel to one another. The predetermined angle α=β=γ may more preferably be 5.0° to 9.0°, 7.5°±0.5°, 4.0° to 6.0°, or 5.0°±0.5°. The present invention can also be realized when the relationships α>β and β<γ are satisfied.

[0058] As described above, by setting the respective plane orientations of the sapphire substrate 2 and the buffer layer 4, it is possible to easily realize a diamond single crystal layer with a plane orientation of (110), (111) or (311). Alternatively, it is possible to easily realize a diamond single crystal layer with a plane orientation (001) tilted at a predetermined angle with respect to the perpendicular line O.

[0059] In either case, the resistivity of the buffer layer 4 is not limited, but is preferably 0.010 Ω·cm or more and 0.040 Ω·cm or less. The resistivity of the diamond layer 6 is not limited, but is preferably 10 Ω·cm or more and 100 Ω·cm or less. This is to appropriately set the performance of the electronic device. The sapphire substrate 2 is a high insulator, and its resistivity is not limited, but is preferably 10 １４ Ω cm to 10 １６ It is about Ω·cm.

[0060] The resistivity of the buffer layer 4 is more preferably 0.015 Ω cm or more and 0.030 Ω cm or less, and even more preferably 0.020 Ω cm or more and 0.025 Ω cm or less. The resistivity of the diamond layer 6 is more preferably 10 Ω cm or more and 50 Ω cm or less, and even more preferably 10 Ω cm or more and 30 Ω cm or less.

[0061] The thickness of the sapphire substrate 2 is not limited, but is preferably 100 μm or more and 800 μm or less, the thickness of the buffer layer 4 is not limited, but is preferably 0.1 μm or more and 5 μm or less, and the thickness of the diamond layer 6 is not limited, but is preferably 1 μm or more and 1000 μm or less, in order to appropriately set the performance of the electronic device.

[0062] The thickness of the sapphire substrate 2 is more preferably 100 μm or more and 500 μm or less, and even more preferably 100 μm or more and 200 μm or less. The thickness of the buffer layer 4 is more preferably 0.1 μm or more and 1 μm or less, and even more preferably 0.1 μm or more and 0.5 μm or less. The thickness of the diamond layer 6 is more preferably 1 μm or more and 1000 μm or less, and even more preferably 1 μm or more and 10 μm or less.

[0063] 2 is a cross-sectional view of a Schottky barrier diode 12 according to another embodiment of the present invention, which is characterized by having the above-described electronic device substrate 1, a Schottky electrode 8 in Schottky contact with the first region of the diamond layer 6, and an ohmic electrode 10 in ohmic contact with the second region of the diamond layer 6. This Schottky barrier diode 12 has a large capacity, a fast operating speed, and electrical characteristics with excellent heat resistance. The first and second regions in this embodiment are both located close to but separated from each other on the surface of the diamond layer 6, and their planar shapes are appropriately set according to the conditions of use of the device.

[0064] The Schottky electrode 8 is formed by depositing, for example, Pt / Au, Au, or Pt on the diamond layer 6 by vapor deposition or sputtering, and its thickness is not limited, but may be, for example, 10 to 500 nm. More preferably, the thickness of the Schottky electrode 8 may be 10 to 200 nm or 10 to 50 nm. To form a Schottky contact, a potential barrier must be formed between the Schottky electrode 8 and the diamond layer 6. If the work function of the Schottky electrode 8 is qΦm and the work function of the semiconductor diamond layer 6 is qΦs, the condition for forming a Schottky contact is qΦs<qΦm. The work function is the difference between the vacuum level and the Fermi level.

[0065] The ohmic electrode 10 is formed by depositing, for example, Ti / Au / Al / Au, Ti / Au, Al / Au, or the like on the diamond layer 6 by vapor deposition or sputtering, in that order from bottom to top, and its thickness is not limited, but may be, for example, 10 to 500 nm. More preferably, the thickness of the ohmic electrode 10 may be 10 to 400 nm or 10 to 300 nm. A necessary condition for forming the ohmic electrode 10 is that no potential barrier is formed between the ohmic electrode 10 and the diamond layer 6. If the work function of the ohmic electrode 10 is qΦm and the work function of the diamond layer 6 is qΦs, the condition for forming a Schottky contact is qΦs>qΦm.

[0066] 3 is a cross-sectional view showing a field effect transistor 22 as another embodiment of the present invention, which comprises the above-mentioned electronic device substrate 1, a gate oxide film 14 formed on a first region of the diamond layer 6, a source electrode 16 formed on a second region of the diamond layer 6, a gate electrode 20 formed on the gate oxide film 14, and a drain electrode 18 formed on a third region of the diamond layer 6. This field effect transistor 22 can achieve electrical characteristics with large capacity, high operating speed, and excellent heat resistance.

[0067] The gate oxide film 14 is made of, for example, Al ２ O ３ , TiO, HfO ２The thickness of the gate oxide film 14 is not limited, but may be, for example, 10 to 500 nm. More preferably, the thickness of the gate oxide film 14 may be 10 to 40 nm or 100 to 500 nm.

[0068] The source electrode 16 is formed by depositing a metal such as Pt / Au, Au, or Pt on the diamond layer 6 by vapor deposition or sputtering, and its thickness is not limited, but may be, for example, 10 to 500 nm. More preferably, the thickness of the source electrode 16 may be 10 to 40 nm or 100 to 500 nm.

[0069] The drain electrode 18 is formed by depositing, for example, Pt / Au, Au, or Pt on the sapphire substrate 2 by vapor deposition or sputtering, and its thickness is not limited, but may be, for example, 10 to 500 nm. More preferably, the thickness of the drain electrode 18 may be 10 to 500 nm or 10 to 400 nm.

[0070] The gate electrode 20 is formed by depositing, for example, Pt / Au, Au, Pt, or the like on the gate oxide film 14 by vapor deposition or sputtering, and its thickness is not limited, but may be, for example, 10 to 500 nm. More preferably, the thickness of the gate electrode 20 may be 10 to 400 nm or 10 to 300 nm.

[0071] 4 is a cross-sectional view showing a bipolar transistor as another embodiment of the present invention, and this bipolar transistor 32 comprises the above-mentioned electronic device substrate 1, a gate oxide film 24 formed on the first region of the diamond layer 6, an emitter electrode 26 formed on the second region of the diamond layer 6, a gate electrode 30 formed on the gate oxide film 24, and a collector electrode 28 formed on the third region of the diamond layer 6. This bipolar transistor 32 can achieve large capacity, high operating speed, and electrical characteristics with excellent heat resistance.

[0072] The gate oxide film 24 is made of, for example, Al ２ O ３ , TiO, HfO ２An insulator such as silicon dioxide or silicon dioxide is deposited on the diamond layer 6 by vapor deposition or sputtering, and the thickness is not limited, but may be, for example, 10 to 500 nm. More preferably, the thickness of the gate oxide film 24 may be 10 to 40 nm or 100 to 400 nm. The gate oxide film 24 can be manufactured, for example, by the following method. First, in an atomic layer deposition (ALD) apparatus, the electronic device substrate 1 is placed in a vacuum chamber, the substrate temperature is set to 350° C., and trimethylaluminum (TMA) is used as an Al source, H is used as an O source, and the like is deposited on the diamond layer 6 by vapor deposition or sputtering. ２ High-purity nitrogen gas (purity 6N) was flowed through both of them and bubbled in the cylinder. ２ Gas-diluted TMA and H ２ O was alternately supplied to the sample in the vacuum chamber, and Al ２ O ３ is deposited.

[0073] The emitter electrode 26 is formed by depositing a metal such as Pt / Au, Au, or Pt on the diamond layer 6 by vapor deposition or sputtering, and its thickness is not limited, but may be, for example, 10 to 500 nm. More preferably, the thickness of the emitter electrode 26 may be 10 to 400 nm or 10 to 300 nm. The emitter electrode 26 can be manufactured, for example, by the following method. Two tungsten (W) boards are set in a resistance heating vapor deposition apparatus, a Pt wire having a diameter of 1 mm is cut and placed on the first W board, and an Au wire is cut and placed on the second W board, and then the two boards are heated under a pressure of 5×10 －４ The chamber is evacuated to 100 Pa. Next, a direct current is passed through the first W board to heat it, and Pt is evaporated onto the sample surface. A direct current is then passed through the second W board to heat it, and Au is evaporated onto the sample surface.

[0074] The collector electrode 28 is formed by depositing, for example, Au, Pt / Au, Pt, or the like on the diamond layer 6 by vapor deposition or sputtering, and its thickness is not limited, but may be, for example, 10 to 500 nm. More preferably, the thickness of the collector electrode 28 may be 10 to 50 nm or 10 to 400 nm.

[0075] The gate electrode 30 is formed by depositing, for example, Pt / Au, Au, Pt, or the like on the gate oxide film 24 by vapor deposition or sputtering, and its thickness is not limited, but may be, for example, 10 to 500 nm. More preferably, the thickness of the gate electrode 30 may be 10 to 400 nm or 10 to 300 nm. The gate electrode 30 can be manufactured, for example, by the following method: Two tungsten (W) boards are set in a resistance heating vapor deposition apparatus, a Pt wire with a diameter of 1 mm is cut and placed on the first W board, and an Au wire is cut and placed on the second W board. A pressure of 5×10 －４ The chamber is evacuated to 100 Pa, and a direct current is passed through the first W board to heat it, causing Pt to be sputtered and deposited on the sample surface. A direct current is then passed through the second W board to heat it, causing Au to be sputtered and deposited on the sample surface.

[0076] [Method for manufacturing an electronic device substrate provided with a diamond single crystal layer with a (001) plane orientation] The method of this embodiment is a method for manufacturing an electronic device substrate provided with a diamond single crystal layer with a (001) plane orientation. This method comprises the steps of forming a buffer layer 4 by epitaxially growing a single crystal of the buffer metal on a sapphire substrate 2 made of a sapphire single crystal, and forming a diamond layer 6 on the buffer layer 4 by epitaxially growing an n-type or p-type diamond single crystal with a (001) plane orientation.

[0077] In the step of forming the buffer layer 4, the pressure in the sputtering device is set to 1×10 －４ Pa or more 5×10 －４ The pressure is reduced to 10 Pa or less, and the temperature of the sapphire substrate 2 is heated to 600°C or higher and 750°C or lower while argon is introduced as a sputtering gas. A sputtering target of the buffer metal is used to deposit a single crystal of the buffer metal having a (001) plane orientation on the sapphire substrate 2 by sputtering. The thickness of each layer may be the same as in the above-described embodiment. The pressure inside the sputtering apparatus during film formation is preferably 4×10 －４ Pa or more 5×10 －４ The temperature of the sapphire substrate 2 during film formation is more preferably 700° C. or higher and 750° C. or lower.

[0078] According to this manufacturing method, unlike the method of Non-Patent Document 1, the buffer layer of the buffer metal can be formed at a temperature range of 600°C or more and 750°C or less, which is lower than conventional methods. Therefore, there is no need to heat the substrate to a high temperature such as 850°C under an ultra-high vacuum, and a simple and small-scale heating device can be used, thereby improving practicality.

[0079] [Method 1 for manufacturing an electronic device substrate provided with a diamond single crystal layer with an inclined (001) plane orientation] This method for manufacturing an electronic device substrate uses a sapphire substrate 2 made of an inclined sapphire single crystal whose plane orientation (11-20) is inclined in the

[0001] direction by a predetermined angle α in the range of 4° to 11° with respect to a normal line O to the surface, as shown in Figure 24. Next, a single crystal of the buffer metal is epitaxially grown on the sapphire substrate 2 to form a buffer layer 4 made of an inclined single crystal of the buffer metal whose plane orientation (001) is inclined by the predetermined angle with respect to the normal line to the surface.

[0080] In the step of forming the buffer layer 4, the pressure in the sputtering device was set to 1×10 －４ Pa or more and 5 x 10 －４ The pressure is reduced to 0.1 Pa or less, and the temperature of the sapphire substrate 2 is heated to 600°C or more and 750°C or less while argon is introduced as a sputtering gas. A sputtering target of the buffer metal is used to deposit a gradient single crystal of the buffer metal on the sapphire substrate 2 by a sputtering method, thereby forming a buffer layer 4.

[0081] Next, an n-type or p-type diamond single crystal is epitaxially grown on the buffer layer 4 to form a diamond layer 6 made of an n-type or p-type inclined diamond single crystal with its plane orientation (001) tilted by a predetermined angle γ relative to the normal to its surface. Other conditions not specifically mentioned may be the same as those in the previous embodiment. According to this method, as shown in Figure 24, the relationship α = β = γ is satisfied, and an orientation relationship can be realized in which the crystal axis direction <0001> of the sapphire substrate 2, the crystal axis direction <-110> of the buffer layer 4, and the crystal axis direction <-110> of the diamond layer 6 are parallel to each other. The present invention can also be realized when the relationships α > β and β < γ are satisfied.

[0082] According to this method for manufacturing a substrate for an electronic device, by using an inclined sapphire single crystal whose plane orientation (11-20) is inclined in the

[0001] direction by a predetermined angle within a range of 4° to 11° with respect to the normal to the surface, a buffer layer of the buffer metal can be formed more stably in a temperature range of 600°C or more and 750°C or less, which is lower than conventional temperatures, compared to when the plane orientation (11-20) is not inclined. This eliminates the need to heat the substrate to a high temperature such as 850°C under ultra-high vacuum, and allows for a simpler and smaller-scale heating device, thereby improving practicality.

[0083] The reason for this is unclear, but the inventor speculates as follows. The buffer metal single crystal layer and the diamond single crystal layer are subject to significant strain resulting from differences in lattice constant and thermal expansion coefficient from the underlying sapphire substrate 2. When the plane orientation (11-20) is tilted by a predetermined angle within the range of 4° to 11° in the

[0001] direction relative to the normal to the surface, the strain can be released in the tilted direction, i.e., laterally. This reduces the strain experienced by the buffer metal single crystal and the diamond single crystal during film formation, and crystal growth proceeds more stably even at low temperatures between 600°C and 750°C, compared to when the plane orientation is not tilted. The predetermined angle is more preferably 4.0° to 6.0°, and even more preferably 5.0°±0.5°.

[0084] [Method 2 for manufacturing an electronic device substrate provided with a diamond single crystal layer with a tilted (001) plane orientation] This method for manufacturing an electronic device substrate uses a sapphire substrate 2 made of a tilted sapphire single crystal whose plane orientation (11-20) is tilted at a predetermined angle α in the range of 4° to 15° in the [1-100] direction with respect to the normal to the surface, as shown in Figure 26. Next, a single crystal of the buffer metal is epitaxially grown on the sapphire substrate 2 to form a buffer layer 4 made of a tilted single crystal of the buffer metal whose plane orientation (001) is tilted at a predetermined angle β with respect to the normal to the surface.

[0085] In the step of forming the buffer layer 4, the pressure in the sputtering device was set to 1×10 －４ Pa or more and 5 x 10 －４The pressure is reduced to 0.1 Pa or less, and the temperature of the sapphire substrate 2 is heated to 600°C or more and 750°C or less while argon is introduced as a sputtering gas. A sputtering target of the buffer metal is used to deposit a gradient single crystal of the buffer metal on the sapphire substrate 2 by a sputtering method, thereby forming a buffer layer 4.

[0086] Next, an n-type or p-type diamond single crystal is epitaxially grown on the buffer layer 4 to form a diamond layer 6 made of an n-type or p-type inclined diamond single crystal with its plane orientation (001) tilted by a predetermined angle γ relative to the normal to its surface. Other conditions not specifically mentioned may be the same as those in the previous embodiment. According to this method, as shown in Figure 26, the relationship α = β = γ is satisfied, and an orientation relationship can be realized in which the crystal axis direction <-1100> of the sapphire substrate 2, the crystal axis direction <110> of the buffer layer 4, and the crystal axis direction <110> of the diamond layer 6 are parallel to each other. The present invention can also be realized when the relationships α > β and β < γ are satisfied.

[0087] According to this method for manufacturing a substrate for an electronic device, by using a sapphire substrate 2 made of an inclined sapphire single crystal whose plane orientation (11-20) is inclined at a predetermined angle within a range of 4° to 15° in the [1-100] direction with respect to the normal to the surface, the buffer layer 4 of the buffer metal can be more stably formed in a temperature range of 600° C. or more and 750° C. or less, which is lower than conventional temperatures. This eliminates the need to heat the substrate to a high temperature such as 850° C. in an ultra-high vacuum, and allows for a simpler and smaller-scale heating apparatus, thereby enhancing practicality.

[0088] The reason for this is unclear, but the inventors speculate, as with the above-mentioned method, as follows. The buffer metal single crystal layer and the diamond single crystal layer are subject to significant strain from the underlying sapphire substrate 2 due to differences in lattice constant and thermal expansion coefficient. When the plane orientation (11-20) is tilted by a predetermined angle within the range of 4° to 15° in the [1-100] direction relative to the normal to the surface, the strain can be released in the tilted direction, i.e., laterally. This reduces the strain experienced by the buffer metal single crystal and the diamond single crystal during film formation, and crystal growth proceeds more stably even at low temperatures between 600°C and 750°C, compared to when the plane orientation is not tilted. The predetermined angle is more preferably 4.0° to 6.0°, and even more preferably 5.0°±0.5°.

[0089] Although several examples have been given as embodiments of the present invention, the present invention is not limited to these embodiments, and other well-known configurations may be added, or configurations in which embodiments are combined are also possible. Furthermore, the substrate for an electronic device of the present invention can be used for electronic devices other than the devices exemplified above, for example, for forming integrated circuits.

[0090] The present invention will be specifically explained below by way of examples and in comparison with the drawings, but the present invention is not limited to these examples.

[0091] Example 1 (corresponding to embodiment 2 / sapphire substrate with (0001) plane orientation / Ir single crystal with (111) plane orientation / diamond single crystal with (111) plane orientation) A commercially available sapphire substrate 2 with a (0001) plane orientation was prepared. The sapphire substrate 2 had an outer diameter of 50.8 mm and a thickness of 430 μm. The purity of the sapphire substrate 2 was 6N, and the resistivity was 1×10 １６ The value was Ω·cm.

[0092] The sapphire substrate 2 was set in a sputtering device (product name: 4341, manufactured by ULVAC, Inc.) and subjected to a pressure of 5×10 －４The pressure was reduced to 100 Pa, and the substrate temperature was heated to 450° C. While argon was introduced as a sputtering gas, a high-purity Ir sputtering target was used to deposit Ir single crystals having a (111) plane orientation on the sapphire substrate 2 by RF sputtering at an applied power of 60 W, thereby forming a buffer layer 4 having a thickness of 1.0 μm. The deposition rate Gr of the Ir single crystals was 6 nm / min.

[0093] The sapphire substrate 2 on which the buffer layer 4 was formed was set in a plasma CVD apparatus (product name: 5200, manufactured by Seki Technotron Co., Ltd.), and a pressure of 1.35×10 －６ The pressure was reduced to 100 Pa, and a substrate temperature was set at 700°C by microwave plasma chemical vapor deposition (CVD) to deposit an n-type diamond single crystal with a (111) plane orientation and doped with 100 ppm of phosphorus (P) to a thickness of 1 μm on the buffer layer 4, forming a diamond layer 6. The resistivity of the diamond layer 6 was 1000 Ω cm.

[0094] A sample was cut from the thus obtained electronic device substrate 1 using an excimer laser and set in an X-ray diffractometer (manufactured by Rigaku Corporation under the trade name of SmartLab). A 2θ / θ scan measurement by X-ray diffraction was performed, yielding the results shown in FIG. 5 . From the graph in FIG. 5 , it was confirmed that an Ir single crystal with a (111) plane orientation was deposited as the buffer layer 4 on a sapphire single crystal with a (0001) plane orientation as the sapphire substrate 2. The sapphire (0001) was confirmed by the sapphire (0006) peak and the sapphire (0,0,0,12) peak. The Ir (111) was confirmed by the Ir (222) peak. No island-like single crystals with different plane orientations were formed in the buffer layer 4.

[0095] Furthermore, this electronic device substrate 1 was subjected to Φ scan measurement by X-ray diffraction using the X-ray diffraction apparatus to examine whether the thin film was oriented in the in-plane direction, and the results shown in FIGS. 6 and 7 were obtained. Comparing the graphs of FIGS. 6 and 7, it was confirmed that the angle Φ between the Ir {002} plane orientation in FIG. 6 and the sapphire {3-300} plane orientation in FIG. 7 matched, confirming that the sapphire [11-20] direction of the sapphire substrate 2 and the Ir [-1-12] direction of the buffer layer 4 matched. The sapphire [11-20] direction was confirmed by the sapphire (33-60) peak. The Ir [-1-12] direction was confirmed by the Ir (002) peak.

[0096] The relationship between the above crystal orientations is shown schematically in Figure 8. In Figure 8, the outer hexagon indicates the crystal orientation of the sapphire single crystal that forms the sapphire substrate 2, and the inner triangle indicates the crystal orientation of the Ir single crystal that forms the buffer layer 4. In this way, by forming the sapphire substrate 2 from a sapphire single crystal with a (0001) crystal plane orientation, it was possible to epitaxially grow the Ir single crystal of the buffer layer 4 so that it had a (111) crystal plane orientation.

[0097] It was also confirmed that a diamond single crystal layer 6 with a (111) plane orientation could be epitaxially grown on the buffer layer 4 made of Ir single crystal with a (111) plane orientation. No island-like single crystals with different plane orientations were formed in the diamond single crystal layer 6.

[0098] In Example 1, an n-type diamond single crystal was formed as the diamond layer 6, but it is also possible to make a p-type diamond single crystal by doping the diamond with boron (B) instead of phosphorus (P).

[0099] Example 2 (corresponding to embodiment 3 / sapphire substrate with (1-100) plane orientation / Ir single crystal with (311) plane orientation / diamond single crystal with (311) plane orientation) A commercially available sapphire substrate 2 with a (1-100) plane orientation was prepared. The sapphire substrate 2 had an outer diameter of 50.8 mm and a thickness of 430 μm. The purity of the sapphire substrate 2 was 6N mass % and the resistivity was 1×10 ６ The value was Ω·cm.

[0100] The sapphire substrate 2 was set in a sputtering device (product name: 4341, manufactured by ULVAC, Inc.) and subjected to a pressure of 5×10 －４ The pressure was reduced to 100 Pa, and the sapphire substrate 2 was heated to 700°C. Argon was introduced as a sputtering gas. Using a high-purity Ir sputtering target, Ir single crystals with a (311) crystal plane orientation were deposited on the sapphire substrate 2 by RF sputtering at an applied power of 60 W, forming a 1.0 μm-thick buffer layer 4. The deposition rate Gr of the Ir single crystals was 6 nm / min. When the substrate temperature was heated to 700°C, Ir single crystals with a (311) crystal plane orientation were predominantly formed, but Ir (111) single crystals were scattered as small islands within the Ir (311) single crystals. The size of the island regions was 1 μm or less in the major axis direction in plan view. The area ratio of the island regions was 1% of the total area of ​​the buffer layer 4.

[0101] The sapphire substrate 2 on which the buffer layer 4 was formed was set in a plasma CVD apparatus (product name: 5200, manufactured by Seki Technotron Co., Ltd.), and a pressure of 1.35×10 －６ The pressure was reduced to 100 Pa, and a substrate temperature was 700 ° C. by microwave plasma chemical vapor deposition (CVD) to deposit a 1.0 μm thick n-type diamond single crystal with a (311) plane orientation and doped with 1000 ppm of phosphorus (P) on the buffer layer 4, forming a diamond layer 6. The resistivity of the diamond layer 6 was 1000 Ω cm. In the diamond layer 6, n-type diamond single crystals with a (111) plane orientation were scattered in an island-like manner corresponding to the island-like regions of the Ir (111) single crystal, and the size of the island-like regions was 1 μm or less in the major axis direction in plan view, and the area ratio of the island-like regions was 1% of the total area of ​​the diamond layer 6. However, it was confirmed that there was no problem in terms of performance as a device substrate. As a result, an electronic device substrate 1 of Example 2 was obtained.

[0102] Example 3 (corresponding to embodiment 4 / sapphire substrate with (1-100) plane orientation / Ir single crystal with (111) plane orientation / diamond single crystal with (111) plane orientation) The same sapphire substrate 2 as in Example 2 was prepared, and the sapphire substrate 2 was set in the same sputtering apparatus as in Example 2, and a pressure of 5×10 －４The pressure was reduced to 100 Pa, and the substrate temperature was heated to 450°C while argon was introduced as a sputtering gas. Using a high-purity Ir sputtering target, an Ir single crystal having a (111) crystal plane orientation was deposited on the sapphire substrate 2 by RF sputtering at an applied power of 60 W, forming a buffer layer 4 having a thickness of 1.0 μm. The deposition rate Gr of the Ir single crystal was 6 nm / min. By depositing the Ir single crystal at a temperature lower than that of Example 2, a buffer layer 4 made of Ir single crystal having a (111) crystal plane orientation was formed.

[0103] That is, when the substrate temperature was heated to 450°C, Ir single crystals with a (111) crystal plane orientation were predominantly formed, but Ir (311) single crystals were generated as small islands scattered among the Ir (111) single crystals. The size of the island regions was 1 μm or less in the major axis direction in a plan view. The area ratio of the island regions was 1% of the total area of ​​the buffer layer 4.

[0104] The phenomenon in which Ir(311) single crystal or Ir(111) is predominantly formed depending on the heating temperature of the sapphire substrate 2 will be described with reference to FIG.

[0105] FIG. 21 is a graph showing the conditions under which an Ir layer with a (311) plane orientation appeared, indicated by △, and the conditions under which an Ir layer with a (111) plane orientation appeared, when a buffer layer 4 was formed on a sapphire substrate 2 with a (1-100) plane orientation, with only the substrate temperature Tg (°C) during deposition of the Ir single crystal and the deposition rate Gr (nm / min) of the Ir single crystal being variously changed, with the other conditions being the same as in Examples 2 and 3.

[0106] As shown in Figure 21, it was found that there is a boundary line, indicated by a dotted line in the figure, between the condition △ under which an Ir layer with a (311) plane orientation appears and the condition × under which an Ir layer with a (111) plane orientation appears, and this boundary line can be expressed by the following formula: Gr = Tg / 20-25. Therefore, it was found that if film deposition is performed under the condition Gr > Tg / 20-25, an Ir layer with a (111) plane orientation can be formed, and if film deposition is performed under the condition Gr < Tg / 20-25, an Ir layer with a (311) plane orientation can be formed. The preferred substrate temperature is approximately 700°C or less, as high-temperature heating in a high vacuum places strict demands on heating equipment. Furthermore, since the practically preferable deposition rate Gr of Ir single crystal is 3 to 7 (nm / min), it was found that by selecting preferable conditions within the range that satisfies this, it is possible to selectively and effectively form an Ir layer with a (111) plane orientation or an Ir layer with a (311) plane orientation.

[0107] Next, the sapphire substrate 2 on which the buffer layer 4 was formed was set in a plasma CVD apparatus (product name: 5200, manufactured by Seki Technotron Co., Ltd.), and a pressure of 1.35×10 －６ The pressure was reduced to 100 Pa, and a substrate temperature was set at 700 ° C. by microwave plasma chemical vapor deposition (CVD) to deposit a 1.0 μm thick n-type diamond single crystal with a (111) plane orientation and doped with 1000 ppm of phosphorus (P) on the buffer layer 4, forming a diamond layer 6. The resistivity of the diamond layer 6 was 1000 Ω cm. This resulted in the electronic device substrate 1 of Example 3. In the diamond layer 6, n-type diamond single crystals with a (311) plane orientation were scattered in an island-like manner corresponding to the island-like regions of the Ir (311) single crystal, and the size of the island-like regions was 1 μm or less in the major axis direction in plan view, and the area ratio of the island-like regions was 1% of the total area of ​​the diamond layer 6. However, it was confirmed that there was no problem in terms of performance as a device substrate.

[0108] Samples were cut out from the electronic device substrate 1 of Example 2 using an excimer laser, set in an X-ray diffractometer (manufactured by Rigaku Corporation under the trade name SmartLab), and subjected to 2θ / θ scan measurement by X-ray diffraction, resulting in the results shown in FIG. 9 . The graph in FIG. 9 confirms that sapphire (1-100), Ir (311), and Ir (111) were deposited. The peak intensity ratio indicates that Ir (311) single crystals and Ir (111) single crystals are mixed within the plane at a ratio of approximately 10:1 (approximately 8%). Sapphire (1-100) was confirmed by the sapphire (3-300) peak. Ir (311) was confirmed by the Ir (311) peak, and Ir (111) was confirmed by the Ir (111) peak. In this case, most of the X-rays are diffracted by the buffer layer 4 on the surface, but some of the X-rays reach the underlying sapphire substrate 2, where they are diffracted, pass through the buffer layer 4 and emerge on the surface side, so the diffraction of the underlying sapphire substrate 2 is also recorded.

[0109] When X-ray diffraction Φ scan measurements were performed on the above structure, the results shown in Figures 10 and 11 were obtained, confirming that the sapphire <11-20> direction and the Ir <-1-12> direction were offset by 45 degrees. The sapphire <11-20> direction was confirmed by the sapphire (33-60) peak. The Ir <-1-12> direction was confirmed by the Ir (002) peak.

[0110] Figure 12 shows a schematic diagram of the relationship between the crystal orientations in Example 2. The outer rectangle in Figure 12 indicates the crystal orientation of the sapphire single crystal forming the sapphire substrate 2, and the inner rectangle indicates the crystal orientation of the Ir single crystal forming the buffer layer 4. In this way, by forming the sapphire substrate 2 from a sapphire single crystal with a (11-20) crystal plane orientation, it was possible to epitaxially grow the Ir single crystal of the buffer layer 4 so that it had a (311) or (111) crystal plane orientation.

[0111] Furthermore, it was confirmed from Example 2 that a diamond single crystal with a (311) plane orientation can be epitaxially grown on a buffer layer 4 made of an Ir single crystal with a (311) plane orientation, and from Example 3 it was confirmed that a diamond single crystal with a (111) plane orientation can be epitaxially grown on a buffer layer 4 made of an Ir single crystal with a (111) plane orientation.

[0112] In Examples 2 and 3, n-type diamond single crystal was formed as the diamond layer 6, but it is also possible to make it a p-type diamond single crystal by doping the diamond with boron (B) instead of phosphorus (P).

[0113] Example 4 (corresponding to embodiment 5 / sapphire substrate with (11-20) plane orientation / Ir single crystal with (111) plane orientation / diamond single crystal with (111) plane orientation) A commercially available sapphire substrate 2 with a (11-20) plane orientation was prepared. The sapphire substrate 2 had an outer diameter of 50.8 mm and a thickness of 430 μm. The purity of the sapphire substrate 2 was 6N mass % and the resistivity was 1×10 １４ The value was Ω·cm.

[0114] The sapphire substrate 2 was set in a sputtering device (product name: 4341, manufactured by ULVAC, Inc.) and subjected to a pressure of 5×10 －４ The pressure was reduced to 100 Pa, and the substrate temperature was raised to 450°C. Argon was introduced as a sputtering gas. Using a high-purity Ir sputtering target, Ir single crystals with a (111) crystal plane orientation were deposited on the sapphire substrate 2 by RF sputtering at an applied power of 60 W, forming a buffer layer 4 with a thickness of 1.0 μm. The deposition rate Gr of the Ir single crystals was 6 nm / min. No island-shaped single crystals with different crystal plane orientations were formed in the buffer layer 4.

[0115] The sapphire substrate 2 on which the buffer layer 4 was formed was set in a plasma CVD apparatus (product name: 5200, manufactured by Seki Technotron Co., Ltd.), and a pressure of 1.35×10 －６The pressure was reduced to 100 Pa, and a substrate temperature was set at 700 ° C. by microwave plasma chemical vapor deposition (CVD) to deposit an n-type diamond single crystal with a (111) plane orientation and doped with 1000 ppm of phosphorus (P) on the buffer layer 4 to a thickness of 1.0 μm, forming a diamond layer 6. The resistivity of the diamond layer 6 was 1000 Ω cm. No island-shaped single crystals with different plane orientations were formed in the diamond single crystal layer 6. This resulted in the electronic device substrate 1 of Example 4.

[0116] Example 5 (corresponding to embodiment 13 / method of manufacturing a sapphire substrate with a (11-20) plane orientation / a (001) Ir single crystal / a (001) diamond single crystal) The same sapphire substrate 2 as in Example 4 was prepared, and the sapphire substrate 2 was set in the same sputtering apparatus as in Example 4, and a pressure of 5×10 －４ The pressure was reduced to 100 Pa, and the substrate temperature was raised to 700° C. While argon was introduced as a sputtering gas, a high-purity Ir sputtering target was used to deposit Ir single crystals having a (001) plane orientation on the sapphire substrate 2 by RF sputtering at an applied power of 60 W, forming a buffer layer 4 with a thickness of 1.0 μm. The deposition rate Gr of the Ir single crystals was set to 6 nm / min.

[0117] In Example 4, the buffer layer 4 made of Ir single crystal with a (111) crystal plane orientation was formed by depositing the Ir single crystal at a temperature lower than that in Example 5. This will be described with reference to FIG.

[0118] FIG. 22 is a graph showing the conditions under which an Ir layer with a (111) plane orientation appeared, indicated by an X, and the conditions under which an Ir layer with a (001) plane orientation appeared, when a buffer layer 4 was formed on a sapphire substrate 2 with a plane orientation (11-20), while only the substrate temperature Tg (°C) during deposition of the Ir single crystal and the deposition rate Gr (nm / min) of the Ir single crystal were variously changed and the other conditions were the same as in Examples 4 and 5.

[0119] As shown in Figure 22, it was found that there is a boundary line, indicated by a dotted line in the figure, between the condition x under which an Ir layer with a (111) plane orientation appears and the condition o under which an Ir layer with a (001) plane orientation appears, and this boundary line can be expressed by the following formula: Gr = Tg / 30-15. Therefore, it was found that if film deposition is performed under the condition Gr > Tg / 30-15, an Ir layer with a (111) plane orientation can be formed, and if film deposition is performed under the condition Gr < Tg / 30-15, an Ir layer with a (001) plane orientation can be formed. The preferred substrate temperature is approximately 700°C or less, as high-temperature heating in a high vacuum places strict demands on heating equipment. Furthermore, since the practically preferable deposition rate Gr of the Ir single crystal is 3 to 7 (nm / min), it was found that by selecting preferable conditions within the range that satisfies this, it is possible to selectively and effectively form an Ir layer with a (111) plane orientation or an Ir layer with a (001) plane orientation.

[0120] The sapphire substrate 2 on which the buffer layer 4 was formed was set in a plasma CVD apparatus (product name: 5200, manufactured by Seki Technotron Co., Ltd.), and a pressure of 1.35×10 －６ The pressure was reduced to 100 Pa, and a substrate temperature was set at 700°C by microwave plasma chemical vapor deposition (CVD) to deposit an n-type diamond single crystal with a (001) plane orientation and doped with 1000 ppm of phosphorus (P) on the buffer layer 4 to a thickness of 1.0 μm, forming a diamond layer 6. The resistivity of the diamond layer 6 was 1000 Ω cm. This resulted in the electronic device substrate 1 of Example 5.

[0121] A sample was cut from the electronic device substrate 1 of Example 5 using an excimer laser and set in an X-ray diffractometer (manufactured by Rigaku Corporation under the trade name SmartLab). 2θ / θ scan measurement by X-ray diffraction was performed, yielding the results shown in FIG. 17 . The graph in FIG. 17 confirmed the deposition of sapphire (11-20), Ir (111), and Ir (001). Based on the peak intensity ratio, it was found that Ir (111) single crystals and Ir (001) single crystals were mixed within the plane at a ratio of 1:1755. Sapphire (11-20) was confirmed by the sapphire (11-20) peak. Ir (111) was confirmed by the Ir (111) peak. Ir (001) was confirmed by the Ir (002) peak and Ir (004) peak.

[0122] When an X-ray diffraction Φ scan measurement was performed on the sample of Example 5, the results shown in Figures 18 and 19 were obtained, confirming that the sapphire <1-100> direction and the Ir <-1-12> direction were consistent. The sapphire <-1-100> direction was confirmed by the sapphire (3-300) peak. The Ir <-1-12> direction was confirmed by the Ir (002) peak.

[0123] Figure 20 schematically shows the relationship between the crystal orientations in Examples 4 and 5. The outer rectangle in Figure 20 indicates the crystal orientation of the sapphire single crystal that forms the sapphire substrate 2, and the inner triangle indicates the crystal orientation of the Ir single crystal that forms the buffer layer 4. In this way, by forming the sapphire substrate 2 from a sapphire single crystal with a (11-20) plane orientation, it was possible to epitaxially grow the Ir single crystal of the buffer layer 4 so that it had a (111) or (001) plane orientation.

[0124] 23 is a lattice image of a cross section of the boundary between the sapphire substrate 2 and the buffer layer 4 of a sample cut out of the substrate 1 for electronic devices in Example 5 by an excimer laser, observed with a transmission electron microscope (TEM) at 10,000,000 magnification. As can be seen, almost no disturbance in the crystal orientation at the boundary surface was observed.

[0125] In Examples 4 and 5, n-type diamond single crystal was formed as the diamond layer 6, but it is also possible to make it a p-type diamond single crystal by doping the diamond with boron (B) instead of phosphorus (P).

[0126] Example 6 (corresponding to embodiment 6 and embodiment 15. Manufacturing method 1 of tilted sapphire substrate with (11-20) plane orientation / tilted Ir single crystal with (001) plane orientation / tilted diamond single crystal with (001) plane orientation) A sapphire substrate 2 was prepared, consisting of a tilted sapphire single crystal with a plane orientation (11-20) tilted 5.0° in the

[0001] direction relative to the normal to the surface. The sapphire substrate 2 was set in the same sputtering apparatus as in Example 4, and a pressure of 5×10 －４ The pressure was reduced to 100 Pa, and the substrate temperature was heated to 700°C. Argon was introduced as a sputtering gas. Using a high-purity Ir sputtering target, Ir single crystal was deposited on the sapphire substrate 2 by RF sputtering at an applied power of 60 W to form a buffer layer 4 with a thickness of 1.0 μm. The deposition rate Gr of the Ir single crystal was 6 nm / min. The resulting buffer layer 4 had a plane orientation (001) tilted by 5.0° in the [-110] direction with respect to the normal to the surface.

[0127] The sapphire substrate 2 on which the buffer layer 4 was formed was set in a plasma CVD apparatus (product name: 5200, manufactured by Seki Technotron Co., Ltd.), and a pressure of 1.35×10 －６ The pressure was reduced to 100 Pa, and a substrate temperature was set at 700°C by microwave plasma chemical vapor deposition (CVD) to deposit an n-type diamond single crystal doped with 1000 ppm of phosphorus (P) on the buffer layer 4 to a thickness of 1.0 μm, forming a diamond layer 6. The resistivity of the obtained diamond layer 6 was 1000 Ω cm. The plane orientation (001) of the diamond layer 6 was inclined at 5.0° in the [-110] direction with respect to the normal O to the surface. In this way, the electronic device substrate 1 of Example 6 was obtained.

[0128] A sample was cut from the electronic device substrate 1 of Example 6 using an excimer laser and set in an X-ray diffraction apparatus (manufactured by Rigaku Corporation under the trade name SmartLab). 2θ / θ scan measurement by X-ray diffraction was performed, yielding the results shown in FIG. 25 . From the graph in FIG. 25 , it was confirmed that Ir(111) and Ir(001) were deposited on the sapphire (11-20). Based on the peak intensity ratio, it was found that the Ir(111) single crystal and the Ir(001) single crystal were mixed within the plane at a ratio of 1:4109. Sapphire (11-20) was confirmed by the peaks of sapphire (11-20), (22-40), and (33-60). Ir(111) was confirmed by the Ir(111) peak. Ir(001) was confirmed by the Ir(002) peak and Ir(004) peak. The crystal ratio of Ir(001) to Ir(111) corresponds to the ratio of the Ir(002) intensity to the Ir(111) intensity in the X-ray diffraction results.

[0129] Example 7 (corresponding to embodiment 7 and embodiment 16. Method 2 for manufacturing a tilted sapphire substrate with a (11-20) plane orientation / a tilted Ir single crystal with a (001) plane orientation / a tilted diamond single crystal with a (001) plane orientation) A sapphire substrate 2 was prepared, consisting of a tilted sapphire single crystal with a (11-20) plane orientation tilted by 5.0° in the [-1100] direction relative to the normal to the surface. The sapphire substrate 2 was set in the same sputtering apparatus as in Example 4, and a pressure of 5×10 －４ The pressure was reduced to 100 Pa, and the substrate temperature was raised to 700°C. Argon was introduced as a sputtering gas. Using a high-purity Ir sputtering target, Ir single crystal was deposited on the sapphire substrate 2 by RF sputtering at an applied power of 60 W to form a buffer layer 4 with a thickness of 1.0 μm. The deposition rate Gr of the Ir single crystal was 6 nm / min. The resulting buffer layer 4 had a plane orientation (001) tilted by 5.0° in the

[110] direction with respect to the normal to the surface.

[0130] The sapphire substrate 2 on which the buffer layer 4 was formed was set in a plasma CVD apparatus (product name: 5200, manufactured by Seki Technotron Co., Ltd.), and a pressure of 1.35×10 －６The pressure was reduced to 100 Pa, and a substrate temperature was set at 700°C by microwave plasma chemical vapor deposition (CVD) to deposit an n-type diamond single crystal doped with 1000 ppm of phosphorus (P) on the buffer layer 4 to a thickness of 1.0 μm, forming a diamond layer 6. The resistivity of the obtained diamond layer 6 was 1000 Ω cm. The plane orientation (001) of the diamond layer 6 was inclined at 5.0° in the

[110] direction with respect to the normal O to the surface. In this way, the electronic device substrate 1 of Example 7 was obtained.

[0131] A sample was cut from the electronic device substrate 1 of Example 7 using an excimer laser and placed in an X-ray diffraction apparatus (manufactured by Rigaku Corporation under the trade name SmartLab). 2θ / θ scan measurement by X-ray diffraction was performed, yielding the results shown in FIG. 27 . The graph in FIG. 27 confirmed that Ir(111) and Ir(001) were deposited on the sapphire (11-20). Based on the peak intensity ratio, it was found that the Ir(111) single crystal and the Ir(001) single crystal were mixed within the plane at a ratio of 1:10558. Sapphire (11-20) was confirmed by the peaks of sapphire (11-20), (22-40), and (33-60). Ir(111) was confirmed by the Ir(111) peak. Ir(001) was confirmed by the Ir(002) peak and Ir(004) peak. The crystal ratio of Ir(001) to Ir(111) corresponds to the ratio of the Ir(002) intensity to the Ir(111) intensity in the X-ray diffraction results.

[0132] 17, 25, and 27, it can be seen that the inclination angle of the plane orientation of the sapphire substrate 2 is 5 ｏIt was found that the Ir(002) intensity becomes very strong when the tilt angle increases to 100°. Therefore, FIG. 28 shows a graph plotting the tilt angle dependence of the Ir(002) / Ir(111) X-ray diffraction intensity ratio. FIG. 28 is a graph showing the relationship between the tilt angle of the (11-20) sapphire substrate surface orientation relative to the perpendicular and the Ir(002) / (111) X-ray diffraction intensity ratio in Example 5 (no tilt), Example 6 (Aspect 13), and Example 7 (Aspect 14) of the present invention. The Ir(002) / (111) X-ray diffraction intensity ratio corresponds to the ratio of the area occupied by crystals with the (001) plane orientation to the area occupied by crystals with the (111) plane orientation on the surface of the Ir layer. The tilt direction is the [1-100] direction in Example 6 (Aspect 13), and the

[0001] direction in Example 7 (Aspect 14), both tilted at 5.0°. It was found that the Ir(002) / (111) intensity ratio increased with increasing tilt angle in both the [1-100] and

[0001] directions. Comparing the two tilt directions, tilting in the [1-100] direction was found to be more effective than tilting in the

[0001] direction.

[0133] In Examples 4 to 7, n-type diamond single crystal was formed as the diamond layer 6, but it is also possible to make it a p-type diamond single crystal by doping the diamond with boron (B) instead of phosphorus (P).

[0134] 29 is a graph showing the relationship between the tilt angle of the sapphire substrate's (11-20) plane orientation relative to the perpendicular line and the full width at half maximum (FWHM) of the X-ray diffraction (002) rocking curve of the Ir layer deposited thereon in Example 5 (no tilt), Example 6 (Aspect 13), and Example 7 (Aspect 14) of the present invention. A small full width at half maximum (FWHM) of the X-ray diffraction (002) rocking curve of the Ir layer indicates that the crystals of the Ir layer are aligned with the (001) plane orientation, indicating good crystal quality. A large full width at half maximum (FWHM) of the X-ray diffraction (002) rocking curve of the Ir layer indicates that the crystals of the Ir layer are not aligned with the (001) plane orientation and have large variations, indicating poor crystal quality. Since the quality of the diamond crystals deposited on the Ir layer follows the crystal quality of this Ir film, the crystal quality of the diamond film also shows the same trend as this graph.

[0135] [Example 8] (Corresponding to Aspect 10 / Schottky Barrier Diode) Using the electronic device substrate (sapphire substrate with a (1-100) plane orientation / Ir single crystal with a (311) plane orientation / diamond single crystal with a (311) plane orientation) produced by the method of Example 2, a Ti / Au electrode layer was vapor-deposited on the surface of the first region of the diamond layer 6 in a circular shape with a diameter of 400 μm and a thickness of 50 nm to form a Schottky electrode 8 in Schottky contact with the diamond layer 6. Meanwhile, an Al electrode layer was vapor-deposited on the surface of the second region of the diamond layer 6 in a circular shape with a diameter of 400 μm and a thickness of 50 nm to form an ohmic electrode 10 in ohmic contact. This produced a Schottky barrier diode 12 having the structure of FIG. 2. The second region was formed on both sides of the first region with a gap of 200 μm.

[0136] The Ti / Au electrode layer was vapor-deposited as follows: Two tungsten (W) boards were set in a resistance heating vapor deposition apparatus, and a 1 mm diameter Ti wire was cut and placed on the first W board, and an Au wire was cut and placed on the second W board. Next, a pressure of 5 × 10 －４The chamber was evacuated to a pressure of 50 Pa, and a direct current was passed through the first W board to heat it, causing Ti to be sputtered and vapor-deposited on the surface of the sample. Next, a direct current was passed through the second W board to heat it, causing Au to be sputtered and vapor-deposited on the surface of the sample. Vapor deposition of the Al / Au electrode layer was carried out as follows: Two tungsten (W) boards were set in a resistance heating vapor deposition apparatus, and a 1 mm diameter Al wire was cut and placed on the first W board, and an Au wire was cut and placed on the second W board. Next, a pressure of 5×10 －４ The chamber was evacuated to 100 Pa, and a direct current was passed through the first W board to heat it, and Pt was evaporated onto the surface of the sample. Next, a direct current was passed through the second W board to heat it, and Au was evaporated onto the surface of the sample.

[0137] The characteristics of the obtained Schottky barrier diode 12 were examined and it was found that it had a predetermined rectification effect and performance as a Schottky barrier diode.

[0138] Example 9 (corresponding to embodiment 11 / field-effect transistor) Using the electronic device substrate 1 (sapphire substrate with a (1-100) plane orientation / Ir single crystal with a (311) plane orientation / diamond single crystal with a (311) plane orientation) produced by the method of Example 2, a 10-nm-thick Al ２ O ３ An oxide film was deposited on the Al ２ O ３ The oxide film was deposited as follows: In an atomic layer deposition (ALD) apparatus, the sample was placed in a vacuum chamber and the substrate temperature was set to 350 ℃ The Al source was trimethylaluminum (TMA), and the O source was H ２ High-purity nitrogen gas (purity 6N) was flowed through both of them and bubbled in the cylinder. ２ Gas-diluted TMA and H ２ O was alternately and repeatedly supplied to the sample in the vacuum chamber.

[0139] Al ２ O ３ The outer periphery of the oxide film is etched and removed using developer CD26, and the remaining Al in the second region is ２ O ３The oxide film was used as the gate oxide film 14. Au electrode layers were deposited in rectangular shapes of 80 μm × 120 μm and 50 nm thick on the first and third regions exposed by etching, forming the source electrode 16 and the drain electrode 18. The Au electrode layers were deposited as follows: a tungsten (W) board was set in a resistance heating deposition apparatus, and an Au wire was cut and placed on the W board. The Au wire was then applied with a pressure of 5 × 10 －４ The chamber was evacuated to a pressure of 100 Pa, and a direct current was passed through a W board to heat it, causing Au to be evaporated onto the sample surface. Au was then evaporated onto the gate oxide film 14 to a thickness of 50 μm by resistance heating, forming a gate electrode 20. The Au electrode layer was deposited under the same conditions as described above.

[0140] The characteristics of the obtained field effect transistor 22 were examined and it was found that it had a predetermined field effect and performance as a field effect transistor.

[0141] Figure 44 is a planar photograph of the diamond field-effect transistor fabricated in Example 9, with an actual size of 6 mm x 8 mm. The shiny areas in the photograph (which are actually gold) are the Au electrode layers of the diamond field-effect transistor.

[0142] Example 10 (corresponding to embodiment 12 / bipolar transistor) Using the electronic device substrate 1 (sapphire substrate with a (1-100) orientation / Ir single crystal with a (311) orientation / diamond single crystal with a (311) orientation) produced by the method of Example 2, a 10 nm thick Al ２ O ３ An oxide film was deposited on the Al ２ O ３ The oxide film was deposited as follows: In an atomic layer deposition (ALD) apparatus, the sample was placed in a vacuum chamber and the substrate temperature was set to 350 ℃ The Al source was trimethylaluminum (TMA), and the O source was H ２ High-purity nitrogen gas (purity 6N) was flowed through both of them and bubbled in the cylinder. ２ Gas-diluted TMA and H ２ O was alternately and repeatedly supplied to the sample in the vacuum chamber.

[0143] Al ２ O ３ The outer periphery of the oxide film was removed by etching using developer CD26, and the remaining Al ２ O ３ The oxide film (circular with a diameter of 450 μm) was used as the gate oxide film 24. Au electrode layers (circular with a diameter of 450 μm and a thickness of 50 μm) were deposited on the first and third regions exposed by etching to form the emitter electrode 26 and the collector electrode 28, respectively. The Au electrode layers were deposited as follows: two tungsten (W) boards were set in a resistance heating deposition apparatus, a 1 mm diameter Ti wire was cut and placed on the first W board, and an Au wire was cut and placed on the second W board. Next, the Au electrode layers were deposited under a pressure of 5×10 －４ The chamber was evacuated to 100 Pa, and a direct current was passed through the first W board to heat it and deposit Ti on the sample surface. A direct current was then passed through the second W board to heat it and deposit Au on the sample surface. A 50 μm thick Au layer was then deposited on the gate oxide film 24 by resistance heating to form the gate electrode 30. The deposition of the Au electrode layer was performed under the same conditions as described above.

[0144] The characteristics of the obtained bipolar transistor 32 were examined and it was found that it had a predetermined field effect and the performance required for a bipolar transistor 32 .

[0145] Example 11 (Effect of Annealing on Just-Oriented Sapphire Substrate) A just-orientated substrate with a (11-20) plane orientation (a substrate with no inclination relative to the crystal orientation plane (0° substrate)) was prepared as a sapphire substrate. Other parameters of the sapphire substrate were the same as those of Example 4. The sapphire substrate was annealed at 1050°C in the atmosphere at atmospheric pressure for 1 hour. Ir single crystal was deposited on the annealed sapphire substrate under the same conditions as in Example 4.

[0146] Figure 30 shows the measurement results of the X-ray diffraction 2θ / θ scan of Example 11. It was found that the (001) plane orientation of the Ir buffer layer grew epitaxially along the (11-20) plane orientation of the sapphire substrate. Figure 31 is a graph showing the results of the X-ray diffraction ω scan of the Ir buffer layer of Example 11. The half-width of the graph was 538.8 seconds, which was narrower than the case without annealing, and the crystal quality of the Ir buffer layer was higher.

[0147] 32 and 33 are graphs showing the results of X-ray diffraction Φ scanning of the sapphire substrate and Ir buffer layer of Example 11. The Φ angles of both were the same. That is, sapphire (11-20) / / Ir (001) and sapphire

[0001] / / Ir

[001] . FIG. 34 is an explanatory diagram showing a state in which, within the plane of the sample of Example 11, the crystal axis direction of the sapphire substrate and the crystal axis direction of the buffer layer made of Ir single crystal are aligned.

[0148] Example 12 (Effect of Annealing on a Sapphire Substrate with a 7.5° Inclination) A sapphire substrate with a (11-20) plane orientation and an inclination angle α of 7.5° to the inclination direction [1-100] was prepared. The other parameters of the sapphire substrate were the same as those in Example 4. The sapphire substrate was annealed at 1050°C in air at atmospheric pressure for 1 hour. Ir single crystal was deposited on the annealed sapphire substrate under the same conditions as in Example 4.

[0149] Figure 35 shows the results of an X-ray diffraction 2θ / θ scan of Example 12. It was found that the (001) plane orientation of the Ir buffer layer grew epitaxially along the (11-20) plane orientation of the sapphire substrate. Figure 36 is a graph showing the results of an X-ray diffraction ω scan of the Ir buffer layer of Example 12. The full width at half maximum in the X-ray diffraction ω scan of the Ir buffer layer was 402.9 arcsec, which was even narrower than that of Example 11, which used a just substrate. Therefore, it was found that the quality of the Ir buffer layer could be further improved by combining annealing at 1050°C for 1 hour in air at atmospheric pressure with tilting the crystal orientation of the sapphire substrate by 7.5°.

[0150] 37 and 38 show the results of X-ray diffraction measurement of the Ir buffer layer and the sapphire substrate of Example 12, which revealed that in Example 12, the Ir buffer layer and the sapphire substrate were sapphire (11-20) / / Ir (001) and sapphire

[0001] / / Ir

[110] .

[0151] 39 and 40 are graphs comparing the tilt angles of the crystal orientations of the sapphire substrate and the Ir buffer layer in Example 12, measured by changing Φ by 15° during ω scans of the sapphire substrate (tilt angle of 7.5° to the tilt direction [1-100]) and the Ir buffer layer. In principle, the value obtained by subtracting the angle of the minimum peak from the angle of the maximum peak is twice the tilt angle. The tilt angle of the sapphire shown in FIG. 39 was 7.550°, while the tilt angle of the Ir buffer layer shown in FIG. 40 was 6.050°, with a relationship of α>β.

[0152] Example 13 (Effect of Annealing on a Sapphire Substrate with a 5° Inclination) A sapphire substrate with a (11-20) plane orientation and an inclination angle α of 5.0° to the inclination direction

[0001] was prepared. The other parameters of the sapphire substrate were the same as those in Example 4. The sapphire substrate was annealed at 1050°C in the atmosphere at atmospheric pressure for 1 hour. Ir single crystal was deposited on the annealed sapphire substrate under the same conditions as in Example 4.

[0153] Figure 41 shows the results of X-ray diffraction 2θ / θ scan measurement for Example 13. It was found that the (001) plane orientation of the Ir buffer layer grew epitaxially along the (11-20) plane orientation of the sapphire. Figures 42 and 43 are graphs showing the results of X-ray diffraction Φ scans of the Ir buffer layer and sapphire substrate, respectively, for Example 13. Within the plane of the sample, the crystal axis direction of the sapphire substrate and the crystal axis direction of the buffer layer made of Ir single crystal were consistent. That is, they were sapphire (11-20) / / Ir (001) and sapphire

[0001] / / Ir

[001] .

[0154] Example 14 (Combination of Sapphire Substrate (0001) and Au Buffer Layer) A sapphire substrate with the same (0001) plane orientation as in Example 1 was prepared. The sapphire substrate was set in a sputtering apparatus (manufactured by ULVAC, Inc., product name: 4341) and subjected to a pressure of 5×10 －４ The pressure was reduced to 100 Pa, and the substrate temperature was heated to 450° C. While argon was introduced as a sputtering gas, a high-purity Au sputtering target was used to deposit Au single crystals having a (111) plane orientation on the sapphire substrate by RF sputtering at an applied power of 60 W, forming an Au buffer layer with a thickness of 1.0 μm. The deposition rate Gr of the Au single crystals was 6 nm / min.

[0155] Figure 45 shows the measurement results of the X-ray diffraction 2θ / θ scan of Example 14. It was found that the (111) plane orientation of the Au buffer layer was epitaxially grown along the (0001) plane orientation of the sapphire substrate. This showed that the Au buffer layer can be used instead of the Ir buffer layer on a (0001) sapphire substrate.

[0156] Example 15 (Combination of a (1-100) sapphire substrate and an Au buffer layer) A sapphire substrate with the same (1-100) plane orientation as in Example 2 was prepared, and Au was deposited under the same conditions as in Example 14. Figure 46 shows the measurement results of an X-ray diffraction 2θ / θ scan for Example 15. It was found that the (111) plane orientation of the Au buffer layer grew epitaxially along the (1-100) plane orientation of the sapphire substrate. This showed that an Au buffer layer can be used in place of an Ir buffer layer on a (1-100) sapphire substrate.

[0157] Example 16 (Combination of Sapphire Substrate (11-20) and Au Buffer Layer) A sapphire substrate with the same (11-20) plane orientation as in Example 4 was prepared, and Au was deposited under the same conditions as in Example 14. Figure 47 shows the measurement results of the X-ray diffraction 2θ / θ scan for Example 16. It was found that the (111) plane orientation of the Au buffer layer grew epitaxially along the (11-20) plane orientation of the sapphire substrate. This showed that the Au buffer layer can be used in place of the Ir buffer layer on a sapphire substrate (11-20).

[0158] Example 17 (Combination of Sapphire Substrate (0001) and Ni Buffer Layer) A sapphire substrate with the same (0001) plane orientation as in Example 1 was prepared. The sapphire substrate was set in a sputtering apparatus (manufactured by ULVAC, Inc., product name: 4341) and a pressure of 5×10 －４ The pressure was reduced to 100 Pa, and the substrate temperature was heated to 450°C while argon was introduced as a sputtering gas. Using a high-purity Ni sputtering target, Ni single crystals with a (111) plane orientation were deposited on the sapphire substrate by RF sputtering at an applied power of 60 W, forming a Ni buffer layer with a thickness of 1.0 μm. The deposition rate Gr of the Ni single crystals was 6 nm / min.

[0159] Figure 48 shows the measurement results of the X-ray diffraction 2θ / θ scan of Example 17. It was found that the (111) plane orientation of the Ni buffer layer was epitaxially grown along the (0001) plane orientation of the sapphire substrate. This indicates that the Ni buffer layer can be used instead of the Ir buffer layer on a (0001) sapphire substrate.

[0160] [Example 18] (Combination of sapphire substrate (11-20) and Ni buffer layer) A sapphire substrate with the same (11-20) plane orientation as in Example 4 was prepared, and Ni was deposited under the same conditions as in Example 17. Figure 49 shows the measurement results of the X-ray diffraction 2θ / θ scan in Example 18. It was found that the (111) plane orientation of the Ni buffer layer grew epitaxially along the (11-20) plane orientation of the sapphire substrate. This showed that the Ni buffer layer can be used instead of the Ir buffer layer in the sapphire substrate (11-20).

[0161] Example 19 (Combination of Sapphire Substrate (0001) and Al Buffer Layer) A sapphire substrate with the same (0001) plane orientation as in Example 1 was prepared. The sapphire substrate was set in a sputtering apparatus (manufactured by ULVAC, Inc., product name: 4341) and subjected to a pressure of 5×10 －４The pressure was reduced to 100 Pa, and the substrate temperature was heated to 450° C. While argon was introduced as a sputtering gas, a high-purity Al sputtering target was used to deposit Al single crystals having a (111) plane orientation on the sapphire substrate by RF sputtering at an applied power of 60 W, forming an Al buffer layer with a thickness of 1.0 μm. The deposition rate Gr of the Al single crystals was 6 nm / min.

[0162] Figure 50 shows the measurement results of the X-ray diffraction 2θ / θ scan of Example 19. It was found that the (111) plane orientation of the Al buffer layer was epitaxially grown along the (0001) plane orientation of the sapphire substrate. This showed that the Al buffer layer can be used instead of the Ir buffer layer on a (0001) sapphire substrate.

[0163] [Example 20] Several types of sapphire substrates with the same (11-20) plane orientation as in Example 4 were prepared, each with a different tilt angle, and Ir was deposited on each sapphire substrate under the same conditions as in Example 4. Figure 51 is a graph showing the results of measuring the relationship between the tilt angle α of the sapphire substrate and the tilt angle β of the Ir buffer layer epitaxially grown thereon in Example 20. From the graph in Figure 51, α>β was satisfied at all points, and the maximum difference between α and β was 1.82°. Thus, it was found that a high-quality Ir layer and a high-quality diamond layer could be obtained even when α>β.

[0164] Example 21 (Effect of Annealing on a Sapphire Substrate with a 15° Inclination) A sapphire substrate with a (11-20) plane orientation and an inclination angle α of 15° to the inclination direction [1-100] was prepared. Other parameters of the sapphire substrate were the same as those in Example 4. The sapphire substrate was annealed at 1050°C in the atmosphere at atmospheric pressure for 1 hour. Ir single crystal was deposited on the annealed sapphire substrate under the same conditions as in Example 4.

[0165] 52 is a graph showing the results of an X-ray diffraction ω scan of the Ir buffer layer of Example 21. The full width at half maximum in the X-ray diffraction ω scan of the Ir buffer layer was 364.5 arcsec, and oThis is even narrower than the 402.9 arcsec obtained in Example 12 (FIG. 36) using an inclined substrate. Therefore, it was found that the quality of the Ir buffer layer can be further improved by combining annealing at 1050°C for 1 hour in air at atmospheric pressure with tilting the crystal orientation of the sapphire substrate by 15°.

[0166] 53 and 54 are graphs comparing the tilt angles of the crystal orientations of the sapphire substrate and the Ir buffer layer in Example 21, measured by changing Φ by 15° during ω scans of the sapphire substrate (tilt angle of 15° to the tilt direction [1-100]) and the Ir buffer layer. In principle, the value obtained by subtracting the angle of the minimum peak from the angle of the maximum peak is twice the tilt angle. The tilt angle of the sapphire shown in FIG. 53 was α=15.050°, while the tilt angle of the Ir buffer layer shown in FIG. 54 was β=13.235°, and there was a relationship of α>β.

[0167] According to the present invention, a buffer layer is formed on a sapphire substrate made of a single crystal sapphire, by epitaxially growing a single crystal of a buffer metal, which is a metal selected from Ir, Au, Ni, and Al, or an alloy consisting of two or more of the above metals, and further, an n-type or p-type diamond single crystal is epitaxially grown on the buffer layer to form a diamond layer. Therefore, by setting the respective plane orientations of the sapphire substrate and the buffer layer, it is possible to easily realize a diamond single crystal layer with a plane orientation of (110), (111), or (311) that has excellent electrical properties. Therefore, the present invention is industrially applicable. In addition, according to another aspect of the present invention, the buffer layer of the buffer metal can be formed at a temperature range of 600°C to 750°C, which is lower than the conventional range, so there is no need to heat the substrate to a high temperature such as 850°C under ultra-high vacuum, and a heating device can be simple and small-scale, which improves practicality.

[0168] REFERENCE SIGNS LIST 1 Substrate for electronic device 2 Sapphire substrate 4 Buffer layer 6 Diamond layer 8 Schottky electrode 10 Ohmic electrode 12 Schottky barrier diode 14 Gate oxide film 16 Source electrode 18 Drain electrode 20 Gate electrode 22 Field effect transistor 24 Gate oxide film 26 Emitter electrode 28 Collector electrode 30 Gate electrode 32 Bipolar transistor O Perpendicular α, β, γ Tilt angles

Claims

1. A substrate for an electronic device comprising: a sapphire substrate made of single crystal sapphire; a buffer layer formed on the sapphire substrate by epitaxial growth and made of a single crystal of a buffer metal selected from Ir, Au, Ni, and Al or an alloy made of two or more of the above metals; and a diamond layer formed on the buffer layer by epitaxial growth and made of n-type or p-type single crystal diamond with a (110), (111), or (311) plane orientation.

2. The substrate for electronic devices according to claim 1, wherein the sapphire substrate has a plane orientation of (0001), the buffer layer has a plane orientation of (111), the diamond layer has a plane orientation of (111), and the crystal axis direction <-1-120> of the sapphire substrate, the crystal axis direction <-1-12> of the buffer layer, and the crystal axis direction <-1-12> of the diamond layer are in an orientation relationship that is parallel to one another.

3. The substrate for electronic devices according to claim 1, wherein the sapphire substrate has a plane orientation of (1-100), the buffer layer has a plane orientation of (311), the diamond layer has a plane orientation of (311), and the crystal axis direction <11-20> of the sapphire substrate, the crystal axis direction <-1-12> of the buffer layer, and the crystal axis direction <-1-12> of the diamond layer have an orientation relationship in which an angle of 45° is formed between them.

4. The substrate for electronic devices according to claim 1, wherein the sapphire substrate has a plane orientation of (1-100), the buffer layer has a plane orientation of (111), the diamond layer has a plane orientation of (111), and the crystal axis direction <11-20> of the sapphire substrate, the crystal axis direction <-1-12> of the buffer layer, and the crystal axis direction <-1-12> of the diamond layer have an orientation relationship in which an angle of 45 degrees is formed between them.

5. The substrate for electronic devices according to claim 1, wherein the sapphire substrate has a plane orientation of (11-20), the buffer layer has a plane orientation of (111), the diamond layer has a plane orientation of (111), and the crystal axis direction <1-100> of the sapphire substrate, the crystal axis direction <-1-12> of the buffer layer, and the crystal axis direction <-1-12> of the diamond layer are in an orientation relationship that is parallel to one another.

6. The substrate for electronic devices according to claim 1, wherein the sapphire substrate has a main plane orientation of (11-20) and is tilted at an angle of 5° toward the [0001] direction, the buffer layer has a plane orientation of (001), the diamond layer has a plane orientation of (001), and the crystal axis direction <0001> of the sapphire substrate, the crystal axis direction <110> of the buffer layer, and the crystal axis direction <110> of the diamond layer have an orientation relationship in which they are parallel to one another.

7. The substrate for an electronic device according to claim 1, wherein the sapphire substrate has a main plane orientation of (11-20) and is tilted at an angle of 7.5°±0.5° toward the [-1100] direction, the buffer layer has a main plane orientation of (001), the diamond layer has a main plane orientation of (001), and the crystal axis direction <-1100> of the sapphire substrate, the crystal axis direction <-110> of the buffer layer, and the crystal axis direction <-110> of the diamond layer are in an orientation relationship that is parallel to one another.

8. The resistivity of the buffer layer is 1.0×10 －６ Ω cm or more and 1.0 × 10 －５ 6. The substrate for electronic devices according to claim 1, wherein the resistivity of the diamond layer is 10 Ω·cm or more and 1000 Ω·cm or less.

9. The substrate for an electronic device according to any one of claims 1 to 5, characterized in that the thickness of the sapphire substrate is 100 μm or more and 800 μm or less, the thickness of the buffer layer is 0.1 μm or more and 5 μm or less, and the thickness of the diamond layer is 1 μm or more and 2000 μm or less.

10. A Schottky barrier diode comprising: a substrate for electronic devices according to any one of claims 1 to 7; a Schottky electrode making Schottky contact with the first region of the diamond layer; and an ohmic electrode making ohmic contact with the second region of the diamond layer.

11. A field effect transistor comprising: a substrate for an electronic device according to any one of claims 1 to 7; a gate oxide film formed on a first region of the diamond layer; a source electrode formed on a second region of the diamond layer; a gate electrode formed on the gate oxide film; and a drain electrode formed on a third region of the diamond layer.

12. A bipolar transistor comprising: a substrate for an electronic device according to any one of claims 1 to 7; a gate oxide film formed on a first region of the diamond layer; an emitter electrode formed on a second region of the diamond layer; a gate electrode formed on the gate oxide film; and a collector electrode formed on a third region of the diamond layer.

13. A method for manufacturing a substrate for an electronic device, comprising the steps of: forming a buffer layer on a sapphire substrate made of a single crystal sapphire by epitaxially growing a single crystal of a buffer metal, which is a metal selected from Ir, Au, Ni, and Al, or an alloy consisting of two or more of the above metals; and forming a diamond layer on the buffer layer by epitaxially growing an n-type or p-type diamond single crystal having a (110), (111), or (311) plane orientation.

14. A method for manufacturing a diamond substrate comprising: forming a buffer layer by epitaxially growing a single crystal of a buffer metal, which is a metal selected from Ir, Au, Ni, and Al or an alloy consisting of two or more of the metals, having a (001) plane orientation on a sapphire substrate made of a sapphire single crystal having a (11-20) plane orientation; and forming a diamond layer by epitaxially growing an n-type or p-type diamond single crystal having a (001) plane orientation on the buffer layer, wherein the pressure in the sputtering apparatus is set to 4×10 －４ Pa or more 5×10 －４ a sputtering method using a sputtering target of the buffer metal to deposit a single crystal of the buffer metal having a (001) plane orientation on a sapphire substrate (2) by reducing the pressure to 600 Pa or less and heating the sapphire substrate to a temperature of 600°C or higher and 750°C or lower.

15. A method for manufacturing a diamond substrate, comprising: forming a buffer layer on a sapphire substrate made of an inclined sapphire single crystal with a plane orientation (11-20) inclined at a predetermined angle within a range of 4° to 11° in the [0001] direction relative to a line perpendicular to the surface by epitaxially growing an inclined single crystal of a buffer metal, the buffer metal being a metal selected from Ir, Au, Ni, and Al or an alloy consisting of two or more of the metals, with a plane orientation (001) inclined at the predetermined angle relative to a line perpendicular to the surface; and forming a diamond layer on the buffer layer by epitaxially growing an n-type or p-type inclined diamond single crystal with a plane orientation (001) inclined at the predetermined angle relative to a line perpendicular to the surface, wherein the pressure in the sputtering apparatus is set to 1×10 －４ Pa or more and 5 x 10 －４ a sputtering target of the buffer metal is used to deposit the tilted single crystal of the buffer metal on the sapphire substrate by a sputtering method, while reducing the pressure to 600°C or less and heating the sapphire substrate to a temperature of 600°C or more and 750°C or less, and introducing argon as a sputtering gas.

16. A method for manufacturing a diamond substrate, comprising: forming a buffer layer on a sapphire substrate made of an inclined sapphire single crystal with a plane orientation (11-20) inclined at a predetermined angle within a range of 4° to 15° in the [1-100] direction relative to a line perpendicular to the surface by epitaxially growing an inclined single crystal of a buffer metal, the buffer metal being a metal selected from Ir, Au, Ni, and Al or an alloy consisting of two or more of the metals, with a plane orientation (001) inclined at the predetermined angle relative to a line perpendicular to the surface; and forming a diamond layer on the buffer layer by epitaxially growing an n-type or p-type inclined diamond single crystal with a plane orientation (001) inclined at the predetermined angle relative to a line perpendicular to the surface, wherein the pressure in the sputtering apparatus is set to 1×10 －４ Pa or more and 5 x 10 －４ a sputtering target of the buffer metal is used to deposit the tilted single crystal of the buffer metal on the sapphire substrate by a sputtering method, while reducing the pressure to 600°C or less and heating the sapphire substrate to a temperature of 600°C or more and 750°C or less, and introducing argon as a sputtering gas.

17. A method for manufacturing a substrate for an electronic device according to any one of claims 13 to 16, characterized in that, prior to the step of forming the buffer layer, the sapphire substrate is heat-treated at 1050°C ± 100°C in the air or in an oxygen atmosphere under atmospheric pressure for one hour or more.

18. The substrate for an electronic device according to any one of claims 1 to 9, characterized in that the sapphire substrate is an inclined sapphire single crystal in which the plane orientation of the sapphire single crystal is inclined by an inclination angle α with respect to a normal to the surface of the sapphire substrate; the buffer layer is an inclined single crystal of the buffer metal in which the plane orientation of the single crystal of the buffer metal is inclined by an inclination angle β with respect to a normal to the surface of the buffer layer; and the diamond layer is made of an inclined n-type or p-type diamond single crystal in which the plane orientation of the diamond single crystal is inclined by an inclination angle γ with respect to a normal to the surface of the diamond layer, and the relationships of inclination angle α > inclination angle β and inclination angle β < inclination angle γ are satisfied.

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