Electronic device and method for controlling memory swap

Abstract

Disclosed is an electronic device comprising: a memory including a volatile memory and a non-volatile memory, and for storing instructions; and at least one processor. The instructions may cause the electronic device to: detect a page fault indicating that data corresponding to a page requested to be read does not exist in the volatile memory; identify, on the basis of detecting the page fault, that the data corresponding to the page is stored in a first storage block in the non-volatile memory through a memory swap; determine whether a read operation for the first storage block is possible, on the basis of identifying that the data corresponding to the page is stored in the first storage block; obtain the data corresponding to the page from the non-volatile memory through the read operation for the first storage block on the basis of identifying that the read operation for the first storage block is possible; store the data corresponding to the page in the volatile memory; and put the read operation for the first storage block on standby until a previous read operation for the first storage block is completed, on the basis of identifying that the read operation for the first storage block is not possible.

Description

Electronic device and method for controlling memory swap

[0001] The embodiments of the present disclosure relate to an electronic device and method for controlling memory swapping.

[0002] Driven by advancements in electronic technology, various types of electronic devices are being developed and distributed. In particular, the adoption of portable electronic devices with diverse functions, such as smartphones and tablet computers, has been expanding recently. Electronic devices, including portable ones, can be composed of hardware and software components.

[0003] In terms of hardware, the electronic device may include a processor (e.g., a CPU (control processing unit) or an SOC (system on chip)) for the computation and processing of processes, and memory where data for processes is loaded. In terms of software, the electronic device may include an operating system (OS) (or kernel) that performs basic management of the system, and applications that run on the operating system and execute processes. For example, the processor (e.g., CPU) may load data corresponding to the operating system into memory (e.g., volatile memory) for execution, and load applications into memory and execute them on the operating system while the operating system is running, thereby ultimately allowing processes to be performed by the execution of applications.

[0004] As the variety of services and additional features provided through electronic devices such as smartphones gradually increases, a wide range of applications executable on these devices are being developed. Furthermore, as multiple applications run simultaneously on electronic devices, the importance of memory management for loading and execution is also rising.

[0005] The information described above may be provided as related art for the purpose of aiding understanding of the present disclosure. No claim or determination is made as to whether any of the foregoing may be applied as prior art related to the present disclosure.

[0006] Embodiments of the present disclosure may provide an electronic device and method for controlling memory swapping.

[0007] Embodiments of the present disclosure may provide an electronic device and method for improving system delay caused by page faults during memory swapping.

[0008] Embodiments of the present disclosure may provide an electronic device and method for processing duplicate read requests for the same block of storage used for memory swapping.

[0009] An electronic device according to one embodiment of the present disclosure may include a memory that stores instructions, comprising a volatile memory and a non-volatile memory, and at least one processor. The non-volatile memory may include a plurality of storage blocks used as swap space associated with the volatile memory. When the instructions are executed individually or collectively by the at least one processor, the electronic device may: detect a page fault indicating that data corresponding to a page requested for read does not exist in the volatile memory. When the instructions are executed individually or collectively by the at least one processor, the electronic device may: identify, based on the detection of the page fault, that data corresponding to the page is stored in a first storage block in the non-volatile memory via memory swap. When the instructions are executed individually or collectively by the at least one processor, the electronic device may: determine whether a read operation on the first storage block is possible based on the identification that data corresponding to the page is stored in the first storage block. When the above instructions are executed individually or collectively by the at least one processor, the electronic device may: acquire data corresponding to the page from the non-volatile memory through a read operation on the first storage block based on identifying that a read operation on the first storage block is possible. When the above instructions are executed individually or collectively by the at least one processor, the electronic device may: store data corresponding to the page in the volatile memory.When the above instructions are executed individually or collectively by the at least one processor, the electronic device may: wait for a read operation on the first storage block until a previous read operation on the first storage block is completed, based on identifying that a read operation on the first storage block is not possible.

[0010] A method performed by an electronic device comprising a volatile memory and a non-volatile memory according to an embodiment of the present disclosure, wherein the non-volatile memory comprises a plurality of storage blocks used as swap space associated with the volatile memory, and may include: an operation of detecting a page fault indicating that data corresponding to a page requested for read does not exist in the volatile memory; an operation of identifying, based on the detection of the page fault, that data corresponding to the page is stored in a first storage block in the non-volatile memory through memory swapping; an operation of determining whether a read operation for the first storage block is possible based on identifying that data corresponding to the page is stored in the first storage block; an operation of obtaining data corresponding to the page from the non-volatile memory through a read operation for the first storage block based on identifying that a read operation for the first storage block is possible; an operation of storing data corresponding to the page in the volatile memory; and an operation of waiting for a read operation for the first storage block until a previous read operation for the first storage block is completed based on identifying that a read operation for the first storage block is not possible. there is.

[0011] In a non-transient computer-readable storage medium storing one or more programs according to one embodiment of the present disclosure, the electronic device comprising volatile memory and non-volatile memory when the one or more programs are executed individually or collectively by at least one processor, wherein the non-volatile memory comprises a plurality of storage blocks used as a swap space (232) associated with the volatile memory; detecting a page fault indicating that data corresponding to a page requested for read does not exist in the volatile memory; based on detecting the page fault, identifying that data corresponding to the page is stored in a first storage block in the non-volatile memory through memory swap; based on identifying that data corresponding to the page is stored in the first storage block, determining whether a read operation on the first storage block is possible; based on identifying that a read operation on the first storage block is possible, obtaining data corresponding to the page from the non-volatile memory through a read operation on the first storage block, storing data corresponding to the page in the volatile memory, and determining that a read operation on the first storage block is not possible Based on identification, it may include instructions that wait for a read operation on the first storage block until a previous read operation on the first storage block is completed.

[0012] The technical problems to be solved in this disclosure are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below.

[0013] In relation to the description of the drawings, the same or similar reference numerals may be used for identical or similar components.

[0014] FIG. 1 is a block diagram of an electronic device in a network environment according to various embodiments.

[0015] FIG. 2 illustrates a block diagram of an electronic device according to one embodiment of the present disclosure.

[0016] FIG. 3 is a diagram illustrating a memory swap operation according to one embodiment of the present disclosure.

[0017] FIG. 4 is a flowchart illustrating a procedure for reading data in a swap space according to one embodiment of the present disclosure.

[0018] FIG. 5 is a flowchart illustrating a procedure for reading data for a user application according to one embodiment of the present disclosure.

[0019] FIGS. 6a and FIGS. 6b are drawings for explaining an operation to prevent duplicate reading according to one embodiment of the present disclosure.

[0020] FIG. 7 is a flowchart illustrating a procedure for reading data in a swap space according to one embodiment of the present disclosure.

[0021] FIG. 8 is a flowchart illustrating a procedure for reading data for a user application according to one embodiment of the present disclosure.

[0022] FIGS. 9a and 9b are drawings showing the time required for a storage read operation according to one embodiment of the present disclosure.

[0023] Embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In describing the embodiments of the present disclosure, specific descriptions of related known functions or configurations are omitted if it is determined that such detailed descriptions would unnecessarily obscure the essence of the present disclosure. Furthermore, terms used below are defined considering their functions in the embodiments of the present disclosure, and these may vary depending on the intent or practice of the user or operator. Therefore, such definitions should be based on the content throughout the present disclosure.

[0024] It should be noted that technical terms used in this disclosure are used merely to describe one embodiment and are not intended to limit this disclosure. Alternatively, unless specifically defined otherwise in this disclosure, technical terms used in this disclosure shall be interpreted in the sense generally understood by those skilled in the art to which this disclosure pertains, and shall not be interpreted in an overly broad or overly narrow sense. Alternatively, technical terms used in this disclosure may be understood as being replaced by other technical terms understood by those skilled in the art. General terms used in the embodiments of this disclosure shall be interpreted according to their prior definitions or according to the context, and shall not be interpreted in an overly narrow sense.

[0025] Singular expressions used in this disclosure may include plural expressions unless the context clearly indicates otherwise. In this disclosure, terms such as “composed” or “comprising” should not be interpreted as necessarily including all of the various components or operations described in the specification, and should be interpreted as some of the components or operations may not be included, or additional components or operations may be included.

[0026] Terms including ordinal numbers, such as first or second as used in this disclosure, may be used to describe various components, but said components should not be limited by said terms. Such terms may be used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the rights of this disclosure, the first component may be named the second component, and similarly, the second component may be named the first component.

[0027] When it is stated that one component is "connected" or "connected" to another component, it may be directly connected or connected to that other component, or there may be other components in between. On the other hand, when it is stated that one component is "directly connected" or "directly connected" to another component, it should be understood that there are no other components in between.

[0028] Hereinafter, embodiments according to the present disclosure will be described with reference to the attached drawings. Identical or similar components regardless of drawing symbols are given the same reference numeral, and redundant descriptions thereof will be omitted. In describing the embodiments of the present disclosure, detailed descriptions of related prior art are omitted if it is determined that such detailed descriptions may obscure the essence of the present disclosure. It should be noted that the attached drawings are intended only to facilitate understanding of the embodiments of the present disclosure and should not be interpreted as limiting the present disclosure. The present disclosure should be interpreted as extending to all modifications, equivalents, and substitutions in addition to the attached drawings.

[0029] In this disclosure, embodiments will be described using an electronic device as an example, but the electronic device may be referred to as a terminal, mobile station, mobile equipment (ME), user equipment (UE), user terminal (UT), subscriber station (SS), wireless device, handheld device, or access terminal (AT). In the embodiments of this disclosure, the electronic device may be a device equipped with communication functions, such as a mobile phone, personal digital assistant (PDA), smartphone, wireless modem, or laptop.

[0030] FIG. 1 is a block diagram of an electronic device (101) in a network environment (100) according to various embodiments.

[0031] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) through a first network (198) (e.g., a short-range wireless communication network) or with an electronic device (104) or a server (108) through a second network (199) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (101) may communicate with the electronic device (104) through a server (108). According to one embodiment, the electronic device (101) may include a processor (120), memory (130), input module (150), sound output module (155), display module (160), audio module (170), sensor module (176), interface (177), connection terminal (178), haptic module (179), camera module (180), power management module (188), battery (189), communication module (190), subscriber identification module (196), or antenna module (197). In some embodiments, at least one of these components (e.g., connection terminal (178)) may be omitted from the electronic device (101), or one or more other components may be added. In some embodiments, some of these components (e.g., sensor module (176), camera module (180), or antenna module (197)) may be integrated into a single component (e.g., display module (160)).

[0032] The processor (120) can control at least one other component (e.g., hardware or software component) of the electronic device (101) connected to the processor (120) by executing software (e.g., program (140)), for example, and can perform various data processing or operations. According to one embodiment, as at least part of the data processing or operations, the processor (120) can store commands or data received from other components (e.g., sensor module (176) or communication module (190)) in volatile memory (132), process the commands or data stored in volatile memory (132), and store the resulting data in non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., central processing unit or application processor) or an auxiliary processor (123) that can operate independently or together with it (e.g., graphics processing unit, neural processing unit (NPU), image signal processor, sensor hub processor, or communication processor). For example, if the electronic device (101) includes a main processor (121) and an auxiliary processor (123), the auxiliary processor (123) may be configured to use less power than the main processor (121) or to be specialized for a designated function. The auxiliary processor (123) may be implemented separately from the main processor (121) or as part thereof.

[0033] The auxiliary processor (123) may control at least some of the functions or states associated with at least one component of the electronic device (101) (e.g., display module (160), sensor module (176), or communication module (190)) on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. According to one embodiment, the auxiliary processor (123) (e.g., image signal processor or communication processor) may be implemented as part of another functionally related component (e.g., camera module (180) or communication module (190)). According to one embodiment, the auxiliary processor (123) (e.g., neural network processing unit) may include a hardware structure specialized for processing an artificial intelligence model. The artificial intelligence model may be generated through machine learning. Such learning may be performed, for example, on the electronic device (101) itself where the artificial intelligence is performed, or through a separate server (e.g., server (108)). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model may include a plurality of artificial neural network layers.An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially.

[0034] The memory (130) can store various data used by at least one component of the electronic device (101) (e.g., processor (120) or sensor module (176)). The data may include, for example, input data or output data for software (e.g., program (140)) and related commands. The memory (130) may include volatile memory (132) or non-volatile memory (134).

[0035] The program (140) may be stored as software in memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0036] The input module (150) can receive commands or data to be used for a component of the electronic device (101) (e.g., processor (120)) from outside the electronic device (101) (e.g., user). The input module (150) may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0037] The sound output module (155) can output a sound signal to the outside of the electronic device (101). The sound output module (155) may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as multimedia playback or recording playback. The receiver may be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part thereof.

[0038] The display module (160) can visually provide information to an external (e.g., user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling said device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of the force generated by said touch.

[0039] The audio module (170) can convert sound into an electrical signal or, conversely, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150) or output sound through the sound output module (155) or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphones) connected directly or wirelessly to the electronic device (101).

[0040] The sensor module (176) can detect the operating state of the electronic device (101) (e.g., power or temperature) or the external environmental state (e.g., user state) and generate an electrical signal or data value corresponding to the detected state. According to one embodiment, the sensor module (176) may include, for example, a gesture sensor, a gyroscope sensor, a barometric pressure sensor, a magnetic sensor, an accelerometer sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biosensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0041] The interface (177) may support one or more specified protocols that can be used for the electronic device (101) to be connected directly or wirelessly to an external electronic device (e.g., electronic device (102)). According to one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0042] The connection terminal (178) may include a connector through which the electronic device (101) can be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0043] The haptic module (179) can convert an electrical signal into a mechanical stimulus (e.g., vibration or movement) or an electrical stimulus that the user can perceive through tactile or kinesthetic senses. According to one embodiment, the haptic module (179) may include, for example, a motor, a piezoelectric element, or an electric stimulation device.

[0044] The camera module (180) can capture still images and video. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0045] The power management module (188) can manage the power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented, for example, as at least part of a power management integrated circuit (PMIC).

[0046] The battery (189) can supply power to at least one component of the electronic device (101). According to one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0047] The communication module (190) can support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between an electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may include one or more communication processors that operate independently of the processor (120) (e.g., application processor) and support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., cellular communication module, short-range wireless communication module, or GNSS (global navigation satellite system) communication module) or a wired communication module (194) (e.g., LAN (local area network) communication module, or power line communication module). The corresponding communication module among these communication modules can communicate with an external electronic device (104) through a first network (198) (e.g., a short-range communication network such as Bluetooth, WiFi (wireless fidelity) direct, or IrDA (infrared data association)) or a second network (199) (e.g., a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can identify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) using subscriber information (e.g., International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module (196).

[0048] The wireless communication module (192) can support 5G networks and next-generation communication technologies following 4G networks, for example, new radio access technology. NR access technology can support high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and connection of multiple terminals (massive machine type communications (mMTC)), or high reliability and low latency (ultra-reliable and low-latency communications (URLLC)). The wireless communication module (192) can support a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate, for example. The wireless communication module (192) can support various technologies for securing performance in the high-frequency band, such as beamforming, massive MIMO (multiple-input and multiple-output), full-dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large-scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), external electronic device (e.g., electronic device (104)), or network system (e.g., second network (199)). According to one embodiment, the wireless communication module (192) can support a Peak data rate (e.g., 20 Gbps or more) for realizing eMBB, loss coverage (e.g., 164 dB or less) for realizing mMTC, or U-plane latency (e.g., downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less) for realizing URLLC.

[0049] An antenna module (197) can transmit a signal or power to or from an external source (e.g., an external electronic device). According to one embodiment, the antenna module (197) may include an antenna comprising a radiator made of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). According to one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as a first network (198) or a second network (199), may be selected from the plurality of antennas, for example, by a communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device through the selected at least one antenna. According to some embodiments, in addition to the radiator, other components (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as part of the antenna module (197).

[0050] According to various embodiments, the antenna module (197) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent to a first surface (e.g., bottom surface) of the printed circuit board and capable of supporting a specified high frequency band (e.g., mmWave band), and a plurality of antennas (e.g., array antennas) disposed on or adjacent to a second surface (e.g., top surface or side surface) of the printed circuit board and capable of transmitting or receiving a signal of the specified high frequency band.

[0051] At least some of the above components can be connected to each other via a communication method between peripheral devices (e.g., bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)) and exchange signals (e.g., commands or data) with each other.

[0052] According to one embodiment, commands or data may be transmitted or received between the electronic device (101) and an external electronic device (104) through a server (108) connected to a second network (199). Each of the external electronic devices (102, or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations performed on the electronic device (101) may be performed on one or more of the external electronic devices (102, 104, or 108). For example, if the electronic device (101) needs to perform a function or service automatically or in response to a request from a user or another device, the electronic device (101) may request one or more external electronic devices to perform at least part of the function or service instead of performing the function or service itself or additionally. One or more external electronic devices that receive the above request may execute at least part of the requested function or service, or additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may provide the result as is or additionally processed as at least part of the response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device (101) may provide ultra-low latency services using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server using machine learning and / or neural networks. According to one embodiment, the external electronic device (104) or the server (108) may be included within a second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0053] Cellular wireless communication standards, such as 3GPP (3rd generation partnership project), can define cellular networks based on LTE mobile communication technology or 5G NR mobile communication technology. Cellular networks can be configured to interwork with non-cellular networks not defined in the cellular wireless communication standards. Non-cellular networks may include, for example, WiBro access networks or Wi-Fi networks. Cellular wireless communication standards may support, for example, ePDG (evolved packet data gateway) or N3IWF (non-3GPP interworking function) as network nodes for interworking between non-cellular networks and cellular core networks.

[0054] FIG. 2 illustrates a block diagram of an electronic device according to one embodiment of the present disclosure.

[0055] Referring to FIG. 2, an electronic device (101 of FIG. 1) may include a processor (210) (e.g., processor (120) of FIG. 1), volatile memory (220) (e.g., volatile memory (132)), and non-volatile memory (230) (e.g., non-volatile memory (134)). In one embodiment, the volatile memory (220) may include dynamic random access memory (DRAM). In one embodiment, the volatile memory (220) may include a compressed pool (222) for storing data in a compressed state to save memory capacity. In one embodiment, the non-volatile memory (230) may include storage such as a disk or NAND flash memory. In one embodiment, the non-volatile memory (230) may include a swap space (232) available for memory swapping (e.g., NAND swap) with the volatile memory (220). In one embodiment, the non-volatile memory (230) may receive or output data through storage read operations and / or write operations.

[0056] In one embodiment, an electronic device (101) (e.g., a processor (210)) may provide a memory management process (212) that operates by the execution of an operating system (OS) or kernel, which is software (S / W). In one embodiment, the electronic device (101) may execute the memory management process (212) to perform low-power and large-capacity data operations in a high-performance computing environment, such as on-device artificial intelligence (AI). In one embodiment, the processor (210) may manage data input / output (e.g., memory swap) between volatile memory (220) and non-volatile memory (230) through the execution of the memory management process (212).

[0057] In one embodiment, the electronic device (101) may include any one of a desktop personal computer (PC), a smartphone, a personal digital assistant (PDA), a workstation, a navigation device, or an automotive infotainment system. The electronic device (101) may be provided in any form including the illustrated components (210, 220, 230), but not limited to those disclosed.

[0058] In one embodiment, the processor (210) accesses volatile memory (220) and non-volatile memory (230) and can process at least one instruction for executing a memory management process (212). According to one embodiment, the processor (210) can execute one or more processes (e.g., applications), and one or more processes may be units of execution for software processing in an operating system (OS). In one embodiment, one or more processes may include a user application executed by a user and / or a system process that can be executed without user input. In one embodiment, the system process may include a native process for performing native functions of the electronic device (101), and / or a perceptible process (e.g., a music playback application or a search widget) that is not running in the foreground but is perceptible to the user.

[0059] In one embodiment, the processor (210) may load at least one process into volatile memory (220) used as main memory and execute it. The processor (210) may execute the process by accessing the physical address of the corresponding volatile memory (2200) according to the virtual address space allocated to each process. In one embodiment, the processor (210) may execute at least one process or access volatile memory (220) and / or non-volatile memory (230) through an operating system (OS).

[0060] In one embodiment, the processor (210) may include at least one processing unit that operates as a central processing unit (CPU), an application processor (AP), or a communication processor (CP).

[0061] In one embodiment, the processor (210) can load and execute at least one of at least one software, kernel, program, application, or process into volatile memory (220). The kernel can manage swap operations between volatile memory (220) and non-volatile memory (230) at the request of the processor (210). According to one embodiment, the processor (210) can execute a memory management process (212) at the request of the kernel (K) on the operating system (OS).

[0062] In one embodiment, the volatile memory (220) is used as main memory and may include a storage space (e.g., a memory area other than the compression pool (222)) for storing at least one process executed by the processor (210) and allowing access by the processor (210). In one embodiment, the memory area other than the compression pool (222) may correspond to a code area that stores the program code of the process to be executed as at least part of the remaining storage space excluding the compression pool (222).

[0063] In one embodiment, as the memory usage of applications executable by the processor (210) gradually increases, the importance of memory management by the operating system in a portable electronic device (e.g., electronic device (101)) having a limited physical memory space, such as a smartphone, increases further. The operating system can secure idle memory and process the user's memory allocation request to respond to a memory shortage situation.

[0064] In one embodiment, the processor (210) may support memory swapping to compress data that has been used for a long time among user data stored in volatile memory (220) and store it in a separate storage space (e.g., a compression pool (222) within volatile memory (220)) or to retrieve the compressed data. In one embodiment, the processor (210) may move the compressed data to a swap space (232) within non-volatile memory (230) to further increase the available memory space of volatile memory (220). In one embodiment, data read from volatile memory (220) may be stored in the swap space (232) within non-volatile memory (230) either compressed or uncompressed. In one embodiment, the processor (210) may secure idle space within volatile memory (220) by releasing the area where the data was stored. In one embodiment, the processor (210) can read the data from the swap space (232) of the non-volatile memory (230) in response to a request from a user or process, and then decompress the read data and load it into the volatile memory (220) (e.g., a memory area other than the compressed pool), thereby enabling the user or process to use the data.

[0065] According to one embodiment, the processor (210) may execute one or more processes loaded in the volatile memory (220). If there is insufficient processing space in the volatile memory (2200) for the execution of the processes, the processor (210) may move (e.g., swap out) a portion of the data stored in the volatile memory (220) to the non-volatile memory (230). The data may be input or output in units of a specified data size (e.g., pages). According to one embodiment, if data corresponding to at least one page of the virtual storage space allocated to the process (e.g., the virtual memory (300) of FIG. 3) is stored in the non-volatile memory (230), the processor (210) may move (e.g. swap in) one data corresponding to the memory page from the non-volatile memory (230) to the volatile memory (220).

[0066] FIG. 3 is a diagram illustrating a memory swap operation according to one embodiment of the present disclosure.

[0067] Referring to FIG. 3, a processor (e.g., the processor (210) of FIG. 2) may manage virtual memory (300) corresponding to an application or kernel. Virtual memory (300) may include a plurality of pages (e.g., page (302)) identified by virtual memory addresses, and at least one of the plurality of pages may be mapped to physical memory (e.g., a designated area within the volatile memory (220) of FIG. 2). In one embodiment, data (e.g., data (304)) corresponding to at least one page (e.g., page (302)) within virtual memory (300) may be stored in a compressed state in a compressed pool (e.g., the compressed pool (222) of FIG. 2) of the volatile memory (220).

[0068] In one embodiment, the processor (210) may use a portion of a non-volatile memory (e.g., the non-volatile memory (230) of FIG. 2) as a memory swap space (e.g., the swap space (223) of FIG. 2) through ZRAM writeback, which is one of the memory swap functions. In one embodiment, the processor (210 of FIG. 2) may operate the memory swap function by selecting an "idle page," a "huge page," or both as targets for memory swap according to the page characteristics of each page. In one embodiment, when a ZRAM writeback is triggered by a user, the processor (210) combs through data stored in compressed volatile memory (220) (e.g., a compression pool (222)), selects data corresponding to a target page (e.g., an idle page and / or a large page) that matches the page characteristics requested by the user, and moves the selected data from the volatile memory (220) to the swap space (232) of the non-volatile memory (230), thereby securing available memory space within the volatile memory (220).

[0069] In one embodiment, idle pages may correspond to data that is expected not to be frequently used among the data stored in a compressed state in volatile memory (220) (e.g., a compressed pool (222)). The processor (210) may set an "idle flag" for the data stored in the compressed pool (222) of the volatile memory (220) at a specified time, and the idle flag may be cleared when access to the data occurs or is released. If the idle flag remains set after a specified time has elapsed, the data may be defined as corresponding to idle pages.

[0070] In one embodiment, when a ZRAM writeback for an idle page is triggered, the processor (210) may select an idle page to be subject to memory swap based on an idle flag. The processor (210) may read data (e.g., data (306)) corresponding to the idle page from a compression pool (222) and decompress (314), and then copy the decompressed data (308) to an empty space (e.g., a storage block) in non-volatile memory (230) through a storage write operation, and then increase the available memory space on the volatile memory (230) by clearing the memory space corresponding to the data (306) from the volatile memory (220). In one embodiment, the decompressed data (308) may be moved to the non-volatile memory (230) in units of a specified size (e.g., a page of size 4 KB). In one embodiment, the swap space (232) of the non-volatile memory (230) may include a plurality of storage blocks, and data corresponding to one page may be stored in one storage block. In one embodiment, data corresponding to the idle page (e.g., data (306)) may be read from the compression pool (222) and then copied to the non-volatile memory (230) through a storage write operation without decompression.

[0071] In one embodiment, large pages may correspond to data whose size exceeds a specified value after compression, and since the data corresponding to the large pages is stored in volatile memory (220) in an uncompressed state, the memory saving effect may be small. To secure available memory space within volatile memory (220), the processor (210) may read the data corresponding to the large pages from volatile memory (220) and move the read data to non-volatile memory (230) (e.g., swap space (232)). Since the data corresponding to the large pages is stored in an uncompressed state, the decompression operation may be omitted before moving to non-volatile memory (230).

[0072] FIG. 4 is a flowchart illustrating a procedure for reading data in a swap space according to an embodiment of the present disclosure. According to embodiments, at least one of the operations described below may be omitted, modified, or executed in a different order. In one embodiment, at least one of the operations described below may be executed by a processor of an electronic device (101 of FIG. 1) (e.g., processor (120) of FIG. 1 or processor (210) of FIG. 2). In one embodiment, a memory of the electronic device (101) (e.g., memory (130) of FIG. 1) may store instructions that cause the electronic device (101) to operate according to at least one of the operations described below.

[0073] Referring to FIG. 4, in operation 402, the electronic device (101) (e.g., the processor (210) of FIG. 2) may identify that a page fault is detected due to the unavailability of data corresponding to at least one page that has been requested to be read. In one embodiment, the electronic device (101) (e.g., the processor (210)) may receive a read request including a virtual memory address of said page by any process and may generate said page fault based on the fact that the data corresponding to said page is not stored in a memory area (e.g., a memory area or code area other than the compressed pool (222) of FIG. 2) within the volatile memory (e.g., the volatile memory (220) of FIG. 2) corresponding to said virtual memory address.

[0074] In operation 404, the electronic device (101) (e.g., processor (210)) can determine whether data corresponding to the page is stored in the swap space (e.g., swap space (232) of FIG. 2) of the non-volatile memory (e.g., non-volatile memory (230) of FIG. 2) based on detecting the page fault. If the data is not stored in the swap space (232), the electronic device (101) (e.g., processor (210)) can determine that the data is stored in the compressed pool (e.g., compressed pool (222) of FIG. 2) of the volatile memory (220) and proceed to operation 406. If the data is stored in the swap space (232), the electronic device (101) (e.g., processor (210)) can proceed to operation 408.

[0075] In operation 406, the electronic device (101) (e.g., processor (210)) reads the requested data from the compression pool (222), decompresses it, and stores the decompressed data in another area of ​​the volatile memory (220) (e.g., a memory area or code area other than the compression pool (222)).

[0076] In operation 408, the electronic device (101) (e.g., processor (210)) may perform a storage read operation to read the requested data from non-volatile memory (230) (e.g., swap space (232)). In one embodiment, the electronic device (101) (e.g., processor (210)) may read data corresponding to the requested page and data corresponding to the surrounding pages of the requested page (e.g., previous page and subsequent page) from the swap space (232) of the non-volatile memory (230).

[0077] In operation 410, the electronic device (101) (e.g., processor (210)) may decompress the data read from the non-volatile memory (230) and store the decompressed data in the volatile memory (220) (e.g., a memory area or code area other than the compression pool (222)). The electronic device (101) (e.g., processor (210)) may decompress only the data corresponding to the requested page among the data read from the non-volatile memory (230). In one embodiment, if the data is stored in the non-volatile memory (230) without being compressed, operation 410 may be omitted.

[0078] In operation 412, the electronic device (101) (e.g., processor (210)) can store data corresponding to the remaining pages, excluding the data corresponding to the requested page, among the data read from the non-volatile memory (230), in the compressed pool (222) of the volatile memory (220).

[0079] FIG. 5 is a flowchart illustrating a procedure for reading data for a user application according to one embodiment of the present disclosure. According to the embodiments, at least one of the operations described below may be omitted, modified, or executed in a different order. In one embodiment, at least one of the operations described below may be executed by a processor of an electronic device (101 of FIG. 1) (e.g., processor (120) of FIG. 1 or processor (210) of FIG. 2). In one embodiment, a memory of the electronic device (101) (e.g., memory (130) of FIG. 1) may store instructions that cause the electronic device (101) to operate according to at least one of the operations described below.

[0080] Referring to FIG. 5, in operation 502, the electronic device (101) (e.g., processor (210)) may receive user input requesting the execution of a user application. In another embodiment, instead of receiving user input, the electronic device (101) (e.g., processor (210)) may detect an event (e.g., user action or designated event) that causes the execution of the user application. In one embodiment, if the electronic device (101) includes a foldable structure, the electronic device (101) (e.g., processor (210)) may execute the user application corresponding to the folding event or the unfolding event based on detecting a folding event or an unfolding event. In operation 504, the electronic device (101) (e.g., processor (210)) may execute the user application based on the user input. In one embodiment, an electronic device (101) (e.g., a processor (210)) can identify that an entry event occurs that causes access to data associated with the user application as the user application is executed.

[0081] In operation 506, the electronic device (101) (e.g., processor (210)) may identify that a page fault related to the user application has been detected. In one embodiment, the electronic device (101) (e.g., processor (210)) may identify that a read request including a virtual memory address of at least one page has been made by the user application, and may generate the page fault based on the fact that the data corresponding to the at least one page is not stored in a region (e.g., a memory region or code region other than the compressed pool (222)) within the volatile memory (e.g., the volatile memory (220) of FIG. 2) corresponding to the virtual memory address.

[0082] In operation 508, the electronic device (101) (e.g., processor (210)) can determine whether data corresponding to the page is stored in non-volatile memory (e.g., non-volatile memory (230) of FIG. 2) (e.g., swap space (232) of FIG. 2) based on detecting the page fault. If the data is not stored in non-volatile memory (230), the electronic device (101) (e.g., processor (210)) can determine that the data is stored in the compressed pool of volatile memory (220) (e.g., compressed pool (222) of FIG. 2) and proceed to operation 512. If the data is stored in non-volatile memory (230), the electronic device (101) (e.g., processor (210)) can proceed to operation 510.

[0083] In operation 510, the electronic device (101) (e.g., processor (210)) can perform a storage read operation to read requested data from non-volatile memory (230) (e.g., swap space (232)).

[0084] In operation 512, the electronic device (101) (e.g., processor (210)) can decompress data read from the compressed pool (220) of the volatile memory (220) or data read from the non-volatile memory (230), and store the decompressed data in the volatile memory (220) (e.g., a memory area or code area other than the compressed pool (222)).

[0085] In one embodiment, when a read request occurs for data stored in non-volatile memory (230) through memory swap, the processor (210) can obtain the data from the non-volatile memory (230) through a storage read operation, and the storage read operation may take, for example, tens to hundreds of microseconds per page.

[0086] In one embodiment, for various reasons such as when the swap space (230) of the non-volatile memory (230) is shared by multiple processes, when data is stored in a compressed state in the swap space (230), or when a larger data unit is used for reading / writing the non-volatile memory (230), read requests for the same storage block of the non-volatile memory (230) may occur multiple times simultaneously. When application execution or storage read operations occur frequently, duplicate read requests cause memory copying, CPU consumption, and memory pressure, which can consequently cause overall system delay. In the actual usage environment of the electronic device (101), it may be frequent for hundreds of duplicate read requests to occur simultaneously for the same storage block of the non-volatile memory (230).

[0087] In one embodiment, for an application (e.g., a user application) executed by user input (e.g., a touch of an execution icon), the processor (210) can accurately determine the execution time of the application. In one embodiment, the processor (210) may perform a prefetch operation to read data corresponding to pages associated with the application in advance from non-volatile memory (230) (e.g., swap space (232)) before a direct storage read operation occurs due to a page fault after the execution of the application. The prefetch operation can prevent a storage read operation caused by a page fault in advance, thereby reducing system delay and duplicate reads. An example of an embodiment using a prefetch operation may be described later in FIG. 8.

[0088] In one embodiment, since the user application is executed by user input, the processor (210) can accurately know the execution time of the user application. In a situation where an application requiring large memory, such as on-device AI, is being executed, not only the user application but also the native process or perceptible process may be determined to use process-unit memory swapping. Since the native process or perceptible process does not generate a reentrant event based on the execution of the process, the processor (210) may not be able to read relevant data in advance from non-volatile memory (230) through prefetching.

[0089] In one embodiment, the processor (210) may generate a bitmap to record whether a read operation is in progress in units of storage blocks of non-volatile memory (230) when a page fault occurs for an application (e.g., a native process or a perceptible process) that does not know the reentrant event. The bitmap includes bits corresponding to each of a plurality of storage blocks constituting the non-volatile memory (230) (e.g., swap space (232)), and each bit may indicate whether a read operation for the corresponding storage block is in progress. Each bit may be marked (e.g., set to '1') when the read operation is in progress and demarked (e.g., cleared or set to '0') when the read operation is completed.

[0090] In one embodiment, the electronic device (210) may, based on the bitmap, allow storage read operations only for the first page fault occurring in each storage block of the swap space (232) used for memory swapping, and wait for subsequent duplicate read requests. By waiting for the duplicate read requests until the previous read request is completed, memory allocation and memory copy overhead for processing duplicate read requests for the same storage block may be reduced. An embodiment for waiting for storage read requests based on the bitmap may be described later in FIG. 7.

[0091] In one embodiment, when processing a storage read operation, the processor (210) can read not only the data corresponding to the requested page, but also the data corresponding to surrounding pages (e.g., data corresponding to the page at the previous address of the requested page and data corresponding to the page at the subsequent address) from the swap space (232) of the non-volatile memory (230). Since memory swapping stores data corresponding to multiple pages in the non-volatile memory (230) on a process basis, if one page is requested to be read, there is a possibility that surrounding pages will also be used together by the same process. Therefore, when a storage read operation for a designated page is required, the processor (210) can prevent additional page faults that may occur later by reading the data corresponding to surrounding pages from the non-volatile memory (230) all at once. Additionally, the processor (210) can maximize the storage performance of the non-volatile memory (230) by performing a storage read operation in a unit larger than a designated data unit (e.g., 4KB).

[0092] FIGS. 6a and FIGS. 6b are drawings for explaining an operation to prevent duplicate reading according to one embodiment of the present disclosure.

[0093] Referring to FIG. 6a, an electronic device (101 of FIG. 1) (e.g., processor (210) of FIG. 2) can manage a bitmap (610) corresponding to a memory swap space (e.g., swap space (232) of FIG. 2) for processor #1 (602) (e.g., native process or perceptible process) and process #2 (604) (e.g., native process or perceptible process). In one embodiment, the swap space (232) may include a plurality of storage blocks, each corresponding to at least one page, and the bitmap (610) may include a plurality of bits corresponding to each of the plurality of storage blocks.

[0094] In one embodiment, the swap space (232) of the non-volatile memory (620) (e.g., the non-volatile memory (230) of FIG. 2) may include storage block #A (650). Based on identifying that a read request for data stored in storage block #A (650) has occurred by process #1 (602), the processor (210) may determine whether a bit corresponding to storage block #A (650) among a plurality of bits constituting the bitmap (610) is marked (e.g., set to '1'). If the bit is not marked (e.g., set to '0'), the processor (210) determines that a read operation for storage block #A (650) is possible (e.g., not being read by another process (not shown)) and may perform a storage read operation to obtain data corresponding to process #1 (602) from the storage block (650). While performing the above storage read operation, the bit may remain marked.

[0095] Referring to FIG. 6b, the processor (210) can determine whether a bit corresponding to storage block #A (650) among the multiple bits constituting the bitmap (610) is marked (e.g., set to '1') based on identifying that a read request for data stored in storage block #A (650) of non-volatile memory (620) (e.g., non-volatile memory (230) of FIG. 2) has occurred by process #2 (604). If the bit is marked, the processor (210) determines that a read operation for storage block #A (650) is not possible (e.g., is being read by another process (e.g., process #1 (602))) and may wait for the storage read operation associated with process #2 (604). In one embodiment, the processor (210) may check the bit again at specified time intervals. Based on the fact that the bit is cleared after the data reading operation related to process #1 (602) is completed, the processor (210) may start a storage read operation to obtain data related to process #2 (604) from storage block #A (650).

[0096] FIG. 7 is a flowchart illustrating a procedure for reading data in a swap space according to one embodiment of the present disclosure. According to the embodiments, at least one of the operations described below may be omitted, modified, or executed in a different order. In one embodiment, at least one of the operations described below may be executed by a processor of an electronic device (101 of FIG. 1) (e.g., processor (120) of FIG. 1 or processor (210) of FIG. 2). In one embodiment, a memory of the electronic device (101) (e.g., memory (130) of FIG. 1) may store instructions that cause the electronic device (101) to operate according to at least one of the operations described below.

[0097] Referring to FIG. 7, in operation 702, the electronic device (101) (e.g., the processor (210) of FIG. 2) may identify that a page fault is detected due to the unavailability of data corresponding to at least one page that has been requested to be read. In one embodiment, the electronic device (101) (e.g., the processor (210)) receives a read request from any process that includes a virtual memory address of said page, and may generate said page fault based on the fact that the data corresponding to said page is not stored in a memory area (e.g., a memory area or code area other than the compressed pool (222) of FIG. 2) within the volatile memory (e.g., the volatile memory (220) of FIG. 2) corresponding to said virtual memory address. In one embodiment, said page fault may be an anonymous page fault generated by a system process such as a native process or a perceptible process.

[0098] In operation 704, the electronic device (101) (e.g., processor (210)) can determine whether data corresponding to the page is stored in non-volatile memory (e.g., non-volatile memory (230) of FIG. 2) (e.g., swap space (232) of FIG. 2) based on detecting the page fault. If the data is not stored in non-volatile memory (230), the electronic device (101) (e.g., processor (210)) can determine that the data is stored in the compressed pool of volatile memory (220) (e.g., compressed pool (222) of FIG. 2) and proceed to operation 706. If the data is stored in non-volatile memory (230), the electronic device (101) (e.g., processor (210)) can proceed to operation 708.

[0099] In operation 706, the electronic device (101) (e.g., processor (210)) reads the requested data from the compression pool (222), decompresses it, and stores the decompressed data in another area of ​​the volatile memory (220) (e.g., a memory area or code area other than the compression pool (222)).

[0100] In operation 708, the electronic device (101) (e.g., processor (210)) can determine whether a read operation is possible (e.g., whether it is read in progress) for a storage area (e.g., storage block #A (650) in FIG. 6a) within the non-volatile memory (230) where the requested data is stored. In one embodiment, the electronic device (101) (e.g., processor (210)) can determine a bitmap (e.g., bitmap (610) in FIG. 6a) corresponding to the non-volatile memory (230). In one embodiment, the bitmap (610) may include bits corresponding to each of a plurality of storage blocks constituting the non-volatile memory (230) (e.g., swap space (232)). One bit of the bitmap (610) may be set to '1' when the corresponding storage block is read and cleared to '0' when the read operation is completed.

[0101] In one embodiment, the electronic device (101) (e.g., processor (210)) identifies that a read operation on the storage block (e.g., storage block #A (650) in FIG. 6a) is not possible (e.g., is in the middle of reading) if the bit corresponding to the storage block where the requested data is stored in the bitmap (610) is set to '1', and can proceed to operation 710. In one embodiment, the electronic device (101) (e.g., processor (210)) identifies that a read operation on the storage block is possible (e.g., is not in the middle of reading) if the bit corresponding to the storage block where the requested data is stored in the bitmap (610) is set to '0', and can proceed to operation 712.

[0102] In operation 710, the electronic device (101) (e.g., processor (210)) may wait for a read operation for the requested data. In one embodiment, the electronic device (101) (e.g., processor (210)) may return to operation 704 to check the bits of the bitmap (610) at specified intervals (e.g., at timeouts).

[0103] In operation 712, the electronic device (101) (e.g., processor (210)) can mark the corresponding bit of the bitmap (e.g., set to '1') to indicate that the storage block #A (650) is being read.

[0104] In operation 714, the electronic device (101) (e.g., processor (210)) may perform a storage read operation to read the requested data from the storage block #A (650). In one embodiment, the electronic device (101) (e.g., processor (210)) may read the data corresponding to the requested page from the storage block #A (650) while simultaneously reading the data corresponding to the surrounding pages of the requested page (e.g., previous page and subsequent page) from non-volatile memory (230) (e.g., other storage blocks corresponding to swap space (232)). In one embodiment, the surrounding pages may include pages corresponding to at least one previous address and at least one subsequent address of the virtual memory address of the requested page.

[0105] In operation 716, the electronic device (101) (e.g., processor (210)) may decompress the data read from the non-volatile memory (230) and store the decompressed data in the volatile memory (220) (e.g., a memory area or code area other than the compression pool (222)). The electronic device (101) (e.g., processor (210)) may decompress only the data corresponding to the requested page among the data read from the non-volatile memory (230). In one embodiment, if the data is stored in the non-volatile memory (230) without being compressed, operation 716 may be omitted.

[0106] In operation 718, the electronic device (101) (e.g., processor (210)) can store data corresponding to the remaining pages, excluding the data corresponding to the requested page, among the data read from the non-volatile memory (230), in the compressed pool (222) of the volatile memory (220).

[0107] In operation 720, the electronic device (101) (e.g., processor (210)) can unmark (e.g. clear or set to '0') the corresponding bit of the bitmap to indicate that the read operation for the storage block #A (650) is completed and that it is not being read.

[0108] In one embodiment, the electronic device (101) (e.g., processor (210)) can detect anonymous page faults caused by system processes, such as native processes or perceptible processes. Native processes are low-level processes used by the system and may include, for example, an init process, a kernel swap daemon (kswapd) process, a camera provider process, or an audio server process. Native processes may be executed as needed by the system and do not require an entry event that is recognizable by the user. Perceptible processes are processes that are not running in the foreground but are recognizable by the user and may include, for example, a search widget on the home screen, a music player, or a keyboard process. Perceptible processes also do not require an entry event.

[0109] In the case of a system process, such as a native process or a perceptible process, which cannot recognize the time of execution in one embodiment, duplicate reads may occur due to page faults related to swapped data. The electronic device (101) (e.g., processor (210)) may determine whether to proceed with a read operation for each storage block of non-volatile memory (230) to prevent the aforementioned duplicate reads.

[0110] In one embodiment, a plurality of storage blocks constituting the non-volatile memory (230) may have units of a specified size (e.g., 4KB or a minimum input / output chunk size specified by the user). An electronic device (101) (e.g., a processor (210)) may generate a bitmap (e.g., a bitmap (610)) containing bits corresponding to each of the plurality of storage blocks and store the bitmap (610) in the volatile memory (220). Each bit of the bitmap (610) may correspond to a unit storage block. When a specific bit is cleared (e.g., set to '0'), the electronic device (101) (e.g., a processor (210)) may determine that a read operation for the storage block corresponding to the bit is not in progress and therefore a new read operation for the storage block is possible. Accordingly, the electronic device (101) (e.g., processor (210)) can generate a new read request and mark the bit (e.g., set to '1') to prevent a new read operation caused by a subsequent page fault. When the bit is marked (e.g., set to '1'), the electronic device (101) (e.g., processor (210)) can determine that a read operation for the storage block corresponding to the bit is in progress and therefore a new read operation for the storage block is not possible. Accordingly, the electronic device (101) (e.g., processor (210)) can wait for the preceding read operation to be completed without generating a new read request.

[0111] In one embodiment, when a preceding read operation is successfully completed, the data read from the swap space (232) by the read operation may be stored in the compression pool (222) of the volatile memory (220), and the electronic device (101) (e.g., processor (210)) may decompress the data and move it to an accessible area of ​​the volatile memory (220) (e.g., a memory area other than the compression pool (222)).

[0112] In one embodiment, when process-unit memory swapping is used, since the surrounding pages of a storage block requested for read for a page fault or prefetch may also correspond to data related to the same process, there is a possibility that access to the surrounding pages may occur later by said process. In one embodiment, when an electronic device (101) (e.g., processor (210)) performs a storage read operation, it can prevent additional page faults that may occur later by reading not only the data corresponding to the requested page but also the data corresponding to surrounding pages (e.g., at least one previous page and at least one subsequent page) all at once.

[0113] In one embodiment, the electronic device (101) (e.g., processor (210)) can dynamically determine the read unit for a storage read operation within an available range. In one embodiment, when the read unit is changed from 4KB to 256KB, the read throughput can be improved by about 38 times.

[0114] [Table 1] below shows an example of read throughput according to the size of the read unit.

[0115] Size 4KB 64KB 128KB 256KB Read Throughput 27 MB / s 505 MB / s 790 MB / s 1045 MB / s

[0116] In one embodiment, the range of read units available to the kernel may be from 4 KB to 2 MB, and while using a larger unit allows for maximum utilization of storage performance, it also increases the use of memory for temporary buffers required for a single I / O process. In one embodiment, the electronic device (101) (e.g., processor (210)) may dynamically determine the read unit for a read operation of non-volatile memory (230) according to the system memory state. In one embodiment, the electronic device (101) (e.g., processor (210)) can perform read requests in relatively large read units (e.g., 128KB or 256KB) when there is sufficient available memory space (e.g., available memory space of volatile memory (220)) to be used as a temporary buffer (e.g., greater than a threshold), and perform read requests in relatively small read units (e.g., 4KB) when there is insufficient available memory space (e.g., not greater than a threshold), thereby relieving the system load. In one embodiment, the electronic device (101) (e.g., processor (120)) can identify that a read request for data corresponding to a plurality of storage blocks of non-volatile memory (230) has occurred based on the detection of a page fault. In one embodiment, the electronic device (101) (e.g., processor (120)) can detect a first page fault indicating that data corresponding to the plurality of pages requested for read does not exist in the volatile memory. An electronic device (101) (e.g., a processor (120)) can, based on detecting the first page fault, identify that data corresponding to the plurality of first pages is stored in the plurality of storage blocks in the non-volatile memory through memory swapping, and determine whether a previous read operation for at least one of the plurality of storage blocks is in progress.The electronic device (101) (e.g., processor (120)) may wait for a new read operation for the plurality of storage blocks until the read operation for all storage blocks is completed, if any of the plurality of storage blocks is being read, that is, if the bits of the bitmaps corresponding to the plurality of storage blocks are not all '0'.

[0117] FIG. 8 is a flowchart illustrating a procedure for reading data for a user application according to one embodiment of the present disclosure. According to the embodiments, at least one of the operations described below may be omitted, modified, or executed in a different order. In one embodiment, at least one of the operations described below may be executed by a processor of an electronic device (101 of FIG. 1) (e.g., processor (120) of FIG. 1 or processor (210) of FIG. 2). In one embodiment, a memory of the electronic device (101) (e.g., memory (130) of FIG. 1) may store instructions that cause the electronic device (101) to operate according to at least one of the operations described below.

[0118] Referring to FIG. 8, in operation 802, an electronic device (101) (e.g., a processor (210)) may receive user input requesting the execution of a user application. In one embodiment, the electronic device (101) (e.g., a processor (210)) may identify that an entry event for data related to the user application occurs as the user application is executed. In operation 804, the electronic device (101) (e.g., a processor (210)) may execute the user application based on the user input.

[0119] In operation 806, the electronic device (101) (e.g., processor (210)) may prefetch data corresponding to a plurality of pages associated with the user application from non-volatile memory (e.g., non-volatile memory (230) of FIG. 2) based on identifying that the user application is running. In one embodiment, the electronic device (101) (e.g., processor (210)) may prefetch data for all pages stored in non-volatile memory (230) associated with the user application. In operation 808, the electronic device (101) (e.g., processor (210)) may store the prefetched data in volatile memory (e.g., volatile memory (220)). In one embodiment, the prefetched data may be stored in a compressed state in a compressed pool of volatile memory (220) (e.g., compressed pool (222) of FIG. 2).

[0120] In one embodiment, an electronic device (101) (e.g., a processor (210)) can prefetch data of all pages associated with the user application stored in non-volatile memory (230) regardless of the occurrence of a page fault and store it in advance in volatile memory (220) (e.g., a compression pool (222)). Since all pages associated with the user application are stored in volatile memory (220), the electronic device (101) (e.g., a processor (210)) can obtain the associated data from the compression pool (222) quickly without reading from storage when a page fault associated with the user application occurs.

[0121] In operation 810, the electronic device (101) (e.g., processor (210)) can identify that a page fault related to the user application is detected. In one embodiment, the electronic device (101) (e.g., processor (210)) can identify that a read request including a virtual memory address of at least one page is made by the user application, and can generate the page fault based on the fact that data corresponding to the at least one page is not stored in an area within the volatile memory (220) corresponding to the virtual memory address (e.g., a memory area other than the compressed pool (222)).

[0122] In operation 812, the electronic device (101) (e.g., processor (210)) can, based on detecting the page fault, read data corresponding to the page from the compressed pool (220) of the volatile memory (220), decompress the read data, and store the decompressed data in an accessible area of ​​the volatile memory (220) (e.g., a memory area other than the compressed pool (222)).

[0123] In one embodiment, an electronic device (101) (e.g., processor (210)) may prefetch data of pages swapped in connection with an application (e.g., user application) that cannot determine whether memory access is possible through an entry event from non-volatile memory (230) before a page fault occurs. The prefetched data may be stored in a compressed pool (222) of volatile memory (220). When a page fault occurs, the electronic device (101) (e.g., processor (210)) may read data corresponding to the requested page directly from the compressed pool (222) of volatile memory (220) without storage reading, and may decompress the read data and store it in an accessible area of ​​volatile memory (220) (e.g., a memory area other than the compressed pool (222)).

[0124] Embodiments of the present disclosure can improve system delays that may occur when duplicate read requests occur for the same storage block of non-volatile memory (230) by eliminating storage read load and the resulting memory allocation and memory copy overhead. When an additional page fault related to another process occurs before a storage read operation related to a page fault related to one process is completed, embodiments of the present disclosure can improve system delays by waiting until the previous storage read operation is completed and then performing a decompression operation related to the additional page fault.

[0125] FIGS. 9a and 9b are drawings showing the time required for a storage read operation according to one embodiment of the present disclosure. FIG. 9a shows a storage read operation to which the embodiments of the present disclosure are not applied, and FIG. 9b shows a storage read operation to which the embodiments of the present disclosure are not applied.

[0126] Referring to FIG. 9a, when a first page fault related to content A (e.g., data corresponding to process A) occurs, an IO (input and output) buffer allocation operation (902) and a storage read operation (904) for processing content A may be performed, and after the storage read operation (904) is completed, a decompression operation (906) for content A read from non-volatile memory (230) may be performed.

[0127] In one embodiment, before the storage read operation (904) for content A is completed, a second page fault related to content B (e.g., data corresponding to processor B) stored in the same storage block may occur. When the second page fault occurs, an IO buffer allocation operation (912) and a storage read operation (914) for acquiring content B may be performed at least partially overlapping with the storage read operation (904) for content A, and after the storage read operation (914) is completed, a decompression operation (916) for content B read from non-volatile memory (230) may be performed.

[0128] In one embodiment, a total of 311 μs may be required from the start of processing for content A (e.g., IO buffer allocation operation (902), storage read operation (904), and decompression operation (906)) until the completion of processing for content B (e.g., IO buffer allocation operation (912), storage read operation (914), and decompression operation (916)) through redundant storage read.

[0129] Referring to FIG. 9b, based on the occurrence of a first page fault related to content A (e.g., data corresponding to process A), the electronic device (101) (e.g., the processor (210) of FIG. 2) may perform an IO buffer allocation operation (922) and a storage read operation (924) to process content A. Through the storage read operation (924), content A and surrounding data of content A may be obtained from non-volatile memory (230). After the storage read operation (924) is completed, the electronic device (101) (e.g., the processor (210) of FIG. 2) may obtain uncompressed content A by performing a decompression operation (926) on content A among the data read from non-volatile memory (230).

[0130] In one embodiment, before the storage read operation (924) for content A is completed, a second page fault may occur in relation to content B (e.g., data corresponding to processor B) stored in the same storage block as content A. Based on the occurrence of the second page fault, the electronic device (101) (e.g., processor (210) of FIG. 2) may not perform an operation to acquire content B (e.g., an IO buffer allocation operation and a storage read operation) and may perform a waiting operation (932) until the storage read operation (924) related to content A is completed.

[0131] In one embodiment, after a storage read operation (924) related to content A is completed, the electronic device (101) (e.g., processor (210)) can obtain uncompressed content B by performing a decompression operation (934) on content B among the data read from non-volatile memory (230) through the storage read operation (924).

[0132] In one embodiment, by not separately performing a storage read operation for content B stored in the same storage block, a total of 211 μs is taken from the start of processing for content A (e.g., IO buffer allocation operation (922), storage read operation (924), and decompression operation (926)) until the completion of processing for content B (e.g., decompression operation (916)), thereby improving system latency by 100 μs compared to FIG. 9a.

[0133] Figures 9a and 9b illustrate the case where two read requests occur for the same storage block, but the delay improvement effect can be further increased as the number of duplicate read requests for the same storage block increases.

[0134] An electronic device (101) according to one embodiment of the present disclosure may include a memory (130) that stores instructions and includes a volatile memory (220) and a non-volatile memory (230), and at least one processor (210). The non-volatile memory may include a plurality of storage blocks used as swap space (232) associated with the volatile memory. When the instructions are executed individually or collectively by the at least one processor, the electronic device may: detect a page fault indicating that data corresponding to a page requested for read does not exist in the volatile memory. When the instructions are executed individually or collectively by the at least one processor, the electronic device may: identify, based on the detection of the page fault, that data corresponding to the page is stored in a first storage block in the non-volatile memory via memory swap. When the above instructions are executed individually or collectively by the at least one processor, the electronic device may determine whether a read operation on the first storage block is possible based on identifying that data corresponding to the page is stored in the first storage block. When the above instructions are executed individually or collectively by the at least one processor, the electronic device may obtain data corresponding to the page from the non-volatile memory through a read operation on the first storage block based on identifying that a read operation on the first storage block is possible. When the above instructions are executed individually or collectively by the at least one processor, the electronic device may store data corresponding to the page in the volatile memory.When the above instructions are executed individually or collectively by the at least one processor, the electronic device may: wait for a read operation on the first storage block until a previous read operation on the first storage block is completed, based on identifying that a read operation on the first storage block is not possible.

[0135] In one embodiment, when the instructions are executed individually or collectively by the at least one processor, the electronic device may: store a bitmap (610) containing bits corresponding to each of the plurality of storage blocks in the volatile memory, determine that a read operation for the first storage block is not possible based on whether the first bit of the bitmap corresponding to the first storage block is marked, and determine that a read operation for the first storage block is possible based on whether the first bit is not marked.

[0136] In one embodiment, when the instructions are executed individually or collectively by the at least one processor, the electronic device may: mark the first bit to indicate that the first storage block is being read before acquiring data corresponding to the page through a read operation on the first storage block.

[0137] In one embodiment, when the instructions are executed individually or collectively by the at least one processor, the electronic device may: obtain data corresponding to the page and data corresponding to surrounding pages associated with the page from the non-volatile memory according to a specified read unit, based on identifying that a read operation for the first storage block is possible.

[0138] In one embodiment, when the instructions are executed individually or collectively by the at least one processor, the electronic device may: dynamically determine the read unit based on the system memory state, store data corresponding to the page in the memory area of ​​the volatile memory, and compress data corresponding to the surrounding pages and store it in the compression pool (222) of the volatile memory.

[0139] In one embodiment, the surrounding pages may include pages corresponding to at least one previous address and at least one subsequent address of the virtual memory address of the page.

[0140] In one embodiment, when the instructions are executed individually or collectively by the at least one processor, the electronic device may: detect a first page fault indicating that data corresponding to a plurality of first pages requested for read does not exist in the volatile memory; based on the detection of the first page fault, identify that data corresponding to the plurality of first pages is stored in a plurality of storage blocks in the non-volatile memory through memory swapping; determine whether a previous read operation for at least one of the plurality of storage blocks is in progress; and based on the identification that a previous read operation for the at least one storage block is in progress, wait for a new read operation for the plurality of storage blocks until the previous read operation for the at least one storage block is completed.

[0141] In one embodiment, when the instructions are executed individually or collectively by the at least one processor, the electronic device may: acquire data corresponding to the plurality of first pages from the non-volatile memory through a read operation on the plurality of storage blocks based on identifying that a previous read operation on the at least one storage block is not in progress.

[0142] In one embodiment, when the instructions are executed individually or collectively by the at least one processor, the electronic device may: identify that a user application is executed by user input, and based on identifying that the user application is executed, prefetch data corresponding to a plurality of pages associated with the user application from the non-volatile memory, and store the prefetched data in the compression pool (222) of the volatile memory.

[0143] In one embodiment, when the instructions are executed individually or collectively by the at least one processor, the electronic device may: identify that data corresponding to the plurality of pages is stored in the plurality of storage blocks of the non-volatile memory through memory swapping; determine whether a previous read operation for at least one of the plurality of storage blocks is in progress; wait for a new read operation for the plurality of storage blocks until the previous read operation for the at least one storage block is completed based on identifying that a previous read operation for the at least one storage block is in progress; and acquire data corresponding to the plurality of first pages from the non-volatile memory through a read operation for the plurality of storage blocks based on identifying that a previous read operation for the at least one storage block is not in progress.

[0144] A method performed by an electronic device (101) comprising a volatile memory (220) and a non-volatile memory (230) according to one embodiment of the present disclosure, wherein the non-volatile memory comprises a plurality of storage blocks used as a swap space (232) associated with the volatile memory, and an operation (702) of detecting a page fault indicating that data corresponding to a page requested for read does not exist in the volatile memory; an operation (704) of identifying, based on the detection of the page fault, that data corresponding to the page is stored in a first storage block in the non-volatile memory through memory swapping; an operation (708) of determining whether a read operation on the first storage block is possible based on identifying that data corresponding to the page is stored in the first storage block; an operation (714) of obtaining data corresponding to the page from the non-volatile memory through a read operation on the first storage block based on identifying that a read operation on the first storage block is possible; an operation (716) of storing data corresponding to the page in the volatile memory; and the first storage block Based on identifying that a read operation is not possible, the method may include an operation (710) of waiting for a read operation on the first storage block until a previous read operation on the first storage block is completed.

[0145] In one embodiment, the operation of determining whether a read operation for the first storage block is possible may include: determining that a read operation for the first storage block is not possible based on the fact that a first bit of the bitmap corresponding to the first storage block is marked among bits corresponding to each of the plurality of storage blocks in a bitmap (610); and determining that a read operation for the first storage block is possible based on the fact that the first bit is not marked.

[0146] In one embodiment, the method may further include an operation of marking the first bit to indicate that the first storage block is being read before acquiring data corresponding to the page through a read operation on the first storage block.

[0147] In one embodiment, the operation of acquiring data corresponding to the page from the non-volatile memory may include acquiring data corresponding to the page and data corresponding to surrounding pages associated with the page from the non-volatile memory according to a specified read unit, based on identifying that a read operation for the first storage block is possible.

[0148] In one embodiment, the method may further include the operation of dynamically determining the read unit based on the system memory state, and the operation of storing data corresponding to the page in a memory area of ​​the volatile memory, and compressing data corresponding to the surrounding pages and storing it in a compression pool (222) of the volatile memory.

[0149] In one embodiment, the surrounding pages may include pages corresponding to at least one previous address and at least one subsequent address of the virtual memory address of the page.

[0150] In one embodiment, the method may further include: detecting a first page fault indicating that data corresponding to a plurality of first pages requested for read does not exist in the volatile memory; identifying, based on detecting the first page fault, that data corresponding to the plurality of first pages is stored in a plurality of storage blocks in the non-volatile memory through memory swapping; determining whether a previous read operation for at least one of the plurality of storage blocks is in progress; and, based on identifying that a previous read operation for the at least one storage block is in progress, waiting for a new read operation for the plurality of storage blocks until the previous read operation for the at least one storage block is completed.

[0151] In one embodiment, the method may further include an operation of obtaining data corresponding to the plurality of first pages from the non-volatile memory through a read operation for the plurality of storage blocks based on identifying that a previous read operation for the at least one storage block is not in progress.

[0152] In one embodiment, the method may further include an operation (804) of identifying that a user application is executed by user input, an operation (806) of prefetching data corresponding to a plurality of pages associated with the user application from the non-volatile memory based on identifying that the user application is executed, and an operation (808) of storing the prefetched data in a compressed pool (222) of the volatile memory.

[0153] In one embodiment, the method may further include: identifying that data corresponding to the plurality of pages is stored in the plurality of storage blocks of the non-volatile memory through memory swapping; determining whether a previous read operation for at least one of the plurality of storage blocks is in progress; waiting for a new read operation for the plurality of storage blocks until the previous read operation for the at least one storage block is completed, based on identifying that a previous read operation for the at least one storage block is in progress; and acquiring data corresponding to the plurality of first pages from the non-volatile memory through a read operation for the plurality of storage blocks, based on identifying that a previous read operation for the at least one storage block is not in progress.

[0154] The electronic device according to the various embodiments disclosed in this document may be of various forms. The electronic device may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a consumer electronics device. The electronic device according to the embodiments of this document is not limited to the devices described above.

[0155] The various embodiments of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In this document, phrases such as "A or B," "at least one of A and B," "at least one of A or B," "A, B or C," "at least one of A, B and C," and "at least one of A, B, or C" may each include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used simply to distinguish said components from other said components and do not limit said components in any other aspect (e.g., importance or order). Where any (e.g., 1st) component is referred to as “coupled” or “connected” to another (e.g., 2nd) component, with or without the terms “functionally” or “communicationly,” it means that said any component may be connected to said other component directly (e.g., via a wire), wirelessly, or through a third component.

[0156] The term “module” as used in the various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit, for example. A module may be a component formed integrally, or a minimum unit of said component or a part thereof that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0157] Various embodiments of the present document may be implemented as software (e.g., program (140)) comprising one or more instructions stored in a storage medium (e.g., internal memory (136) or external memory (138)) readable by a machine (e.g., electronic device (101)). For example, a processor (e.g., processor (120)) of the machine (e.g., electronic device (101)) may call at least one of the one or more instructions stored in the storage medium and execute it. This enables the machine to be operated to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The storage medium readable by the machine may be provided in the form of a non-transitory storage medium. Here, 'non-temporary' simply means that the storage medium is a tangible device and does not contain a signal (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily.

[0158] According to one embodiment, the method according to the various embodiments disclosed herein may be provided by being included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)) or an application store (e.g., Play Store). TM It can be distributed online (e.g., downloaded or uploaded) through ) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0159] According to various embodiments, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to various embodiments, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to various embodiments, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In an electronic device (101), A memory (130) for storing instructions, comprising a volatile memory (220) and a non-volatile memory (230) - the non-volatile memory comprises a plurality of storage blocks used as a swap space (232) associated with the volatile memory; and The electronic device includes at least one processor (210), and when the instructions are executed individually or collectively by the at least one processor: Detecting a page fault indicating that data corresponding to the requested page does not exist in the volatile memory, and Based on detecting the above page fault, it is identified that data corresponding to the page is stored in a first storage block within the non-volatile memory through memory swapping, and Based on identifying that data corresponding to the above page is stored in the first storage block, determining whether a read operation on the first storage block is possible, and Based on identifying that a read operation on the first storage block is possible, data corresponding to the page is obtained from the non-volatile memory through a read operation on the first storage block, and Data corresponding to the above page is stored in the volatile memory, and An electronic device that waits for a read operation on the first storage block until a previous read operation on the first storage block is completed, based on identifying that a read operation on the first storage block is not possible.

2. In claim 1, when the instructions are executed individually or collectively by the at least one processor, the electronic device: A bitmap (610) containing bits corresponding to each of the plurality of storage blocks is stored in the volatile memory, and It is determined that a read operation on the first storage block is not possible based on the fact that the first bit of the bitmap corresponding to the first storage block is marked, and An electronic device that determines that a read operation on the first storage block is possible based on the fact that the first bit is not marked.

3. In claim 1 or 2, when the instructions are executed individually or collectively by the at least one processor, the electronic device: An electronic device that marks the first bit to indicate that the first storage block is being read before acquiring data corresponding to the page through a read operation on the first storage block.

4. In any one of claims 1 to 3, when the instructions are executed individually or collectively by the at least one processor, the electronic device: An electronic device that, based on identifying that a read operation is possible for the first storage block, obtains data corresponding to the page and data corresponding to surrounding pages associated with the page from the non-volatile memory according to a specified read unit.

5. In claim 4, when the instructions are executed individually or collectively by the at least one processor, the electronic device: The above read unit is dynamically determined based on the system memory state, and An electronic device that stores data corresponding to the above page in the code area of ​​the volatile memory, compresses data corresponding to the surrounding pages, and stores it in the compression pool (222) of the volatile memory.

6. In Paragraph 4 or 5, the surrounding pages are, An electronic device comprising pages corresponding to at least one previous address and at least one subsequent address of the virtual memory address of the above page.

7. In any one of claims 1 to 6, when the instructions are executed individually or collectively by the at least one processor, the electronic device: Detecting a first page fault indicating that data corresponding to a plurality of first pages requested to be read does not exist in the volatile memory, and Based on detecting the first page fault, it is identified that data corresponding to the plurality of first pages is stored in the plurality of storage blocks within the non-volatile memory through memory swapping, and Determining whether a previous read operation is in progress for at least one storage block among the plurality of storage blocks, and An electronic device that waits for a new read operation on a plurality of storage blocks until the previous read operation on the at least one storage block is completed, based on identifying that a previous read operation on the at least one storage block is in progress.

8. In claim 7, when the instructions are executed individually or collectively by the at least one processor, the electronic device: An electronic device that obtains data corresponding to the plurality of first pages from the non-volatile memory through a read operation on the plurality of storage blocks based on identifying that a previous read operation on at least one storage block is not in progress.

9. In any one of claims 1 through 8, when the instructions are executed individually or collectively by the at least one processor, the electronic device: Identify that a user application is executed by user input, and Based on identifying that the above user application is executed, data corresponding to a plurality of pages associated with the above user application is prefetched from the non-volatile memory, and An electronic device that stores the above-mentioned prefetched data in the compression pool (222) of the above-mentioned volatile memory.

10. In claim 9, when the instructions are executed individually or collectively by the at least one processor, the electronic device: Identifying that data corresponding to the plurality of pages is stored in the plurality of storage blocks of the non-volatile memory through memory swapping, Determining whether a previous read operation is in progress for at least one storage block among the plurality of storage blocks, and Based on identifying that a previous read operation for at least one storage block is in progress, a new read operation for the plurality of storage blocks is waited for until the previous read operation for the at least one storage block is completed, and An electronic device that obtains data corresponding to the plurality of first pages from the non-volatile memory through a read operation on the plurality of storage blocks based on identifying that a previous read operation on at least one storage block is not in progress.

11. A method performed by an electronic device (101) comprising a volatile memory (220) and a non-volatile memory (230), wherein the non-volatile memory comprises a plurality of storage blocks used as a swap space (232) associated with the volatile memory, and Operation (702) of detecting a page fault indicating that data corresponding to the requested page to be read does not exist in the volatile memory; Based on detecting the above page fault, an operation (704) to identify that data corresponding to the page is stored in a first storage block in the non-volatile memory through memory swapping; An operation (708) to determine whether a read operation on the first storage block is possible based on identifying that data corresponding to the above page is stored in the first storage block; Based on identifying that a read operation for the first storage block is possible, an operation (714) of obtaining data corresponding to the page from the non-volatile memory through a read operation for the first storage block; The operation of storing data corresponding to the above page in the volatile memory (716); and A method comprising an operation (710) of waiting for a read operation on the first storage block until a previous read operation on the first storage block is completed, based on identifying that a read operation on the first storage block is not possible.

12. In claim 11, the operation of determining whether a read operation on the first storage block is possible is, An operation to determine that a read operation for the first storage block is not possible based on the fact that the first bit of the bitmap corresponding to the first storage block is marked among the bitmap (610) which includes bits corresponding to each of the plurality of storage blocks; and A method including an operation to determine that a read operation for the first storage block is possible based on the fact that the first bit is not marked.

13. In Paragraph 11 or 12, A method further comprising an operation of marking the first bit to indicate that the first storage block is being read, prior to obtaining data corresponding to the page through a read operation on the first storage block.

14. In any one of claims 11 to 13, the operation of obtaining data corresponding to the page from the non-volatile memory is, Based on identifying that a read operation for the first storage block is possible, the operation includes obtaining data corresponding to the page and data corresponding to surrounding pages associated with the page from the non-volatile memory according to a specified read unit. An operation to dynamically determine the above read unit based on the system memory state; and A method further comprising the operation of storing data corresponding to the above page in the code area of ​​the volatile memory, compressing data corresponding to the surrounding pages, and storing it in the compression pool (222) of the volatile memory.

15. In Clause 14, the aforementioned surrounding pages are, A method comprising pages corresponding to at least one previous address and at least one subsequent address of the virtual memory address of the above page.

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