Capacitor, buried capacitor circuit board and method of manufacturing the same

Abstract

The present invention relates to a capacitor, a buried capacitor circuit board and a manufacturing method thereof. The capacitor comprises a high dielectric constant polymer composite layer, an ion implantation layer formed by implanting ions of a conductive material into the high dielectric constant polymer composite layer at high speed by an ion implantation method, and a metal layer formed on and covering the ion implantation layer.

Description

Technical Field

[0001] This invention relates to capacitors, embedded capacitor circuit boards, and methods for manufacturing the same. Background Technology

[0002] As electronic products become increasingly thinner, lighter, higher-frequency, and more multifunctional, circuit integration is increasing, leading to more integrated circuit pins and circuit layouts, which in turn increases noise. To eliminate noise or provide electrical compensation, passive components can be added to the semiconductor package structure to reduce noise and stabilize the circuit. For example, capacitors, which store charge, can absorb high-frequency noise by temporarily storing energy, thereby reducing system power fluctuations and ensuring the integrity of signal transmission.

[0003] One way to increase capacitance is to integrate passive components onto the substrate using surface mount technology (SMT). However, this can easily lead to impedance and signal crosstalk, and it occupies a large surface mount area, which does not meet the increasingly stringent requirements for thin, light, and small electronic products.

[0004] Another type involves embedding the capacitor within the packaging substrate or PCB circuit board; this is called embedded capacitor (embedded capacitor). The manufacturing of the substrate or circuit board for embedded capacitors mainly involves three key technologies: capacitor embedding technology, internal interconnection technology, and the embedded capacitor technology used. Embedded capacitors have metal layers on both sides and a dielectric layer with "high dielectric constant (Dk), low dielectric loss" in the middle, typically 10μm-25μm thick. This significantly increases the capacitance, helps decoupling and filtering in power supply systems, and reduces the impedance of system power distribution and the resonance effect of high-frequency circuits. They are mainly used in high-speed data transmission / communication equipment, servers, computers, test and measurement, medical, printers, displays, military fields, and the handheld electronic product industry.

[0005] For the same voltage, frequency, and capacitance, the heating effect of a capacitor depends on its dielectric loss, requiring embedded capacitors to have low dielectric loss. Whether it's a surface-mount capacitor on a circuit board (SMT) or an embedded capacitor within the circuit board's core, the goal is to achieve higher and more stable capacitance. To increase capacitance, three factors can be modified: 1) increasing the surface area of ​​the capacitor electrodes; 2) decreasing the dielectric layer thickness; and 3) increasing the dielectric constant Dk. Increasing the capacitor electrode surface area does not align with the trend towards thinner and smaller circuit boards; therefore, reducing the dielectric layer thickness (≤25μm), increasing the dielectric constant Dk, and lowering dielectric loss are the future development directions for embedded capacitors.

[0006] Regarding reducing the thickness of the dielectric layer, some reports suggest that instead of using glass fiber materials for the insulating layer, resin coating is employed on copper foil. This method improves reliability and reduces the thickness of the insulating dielectric to 25 μm. Other reports indicate the use of methods such as sputtering, CVD, and anodizing to attach high-Dk insulating dielectrics (such as SiO2 or ceramic particles) less than 1 μm thick to thick copper foil. This reduces the thickness of the thin insulating dielectric to below 1 μm, significantly increasing the capacitance of the buried capacitor. However, due to the thin dielectric layer's brittleness and susceptibility to breakage, its processability and reliability are poor, limiting its application in buried capacitors.

[0007] On the other hand, it is very difficult to increase the dielectric constant Dk of the insulation as much as possible while ensuring low dielectric loss and processability of the material.

[0008] The manufacturing process of embedded capacitors is generally divided into three types:

[0009] 1) Screen printing: Insulating ink or high-Dk material is printed onto copper foil, cured, and then conductive ink is screen printed on top to form another layer of copper electrodes, thus creating a capacitor. Screen printing is a simple and low-cost process, but the resulting embedded capacitor values ​​have a large dispersion and poor accuracy control.

[0010] 2) Thin film dielectric method below 1μm: It has been reported that sputtering, CVD, anodizing and other methods are used to attach insulating high Dk dielectric (generally inorganic ceramic material) below 1μm onto thick copper foil or semiconductor silicon wafer, and then calcined at a high temperature close to 800ºC to reduce the thickness of the thin insulating dielectric to the extreme, and then another metal electrode is made. This process can significantly increase the capacitance due to the thin dielectric material, but because the dielectric layer is too thin, the processability and reliability are poor (the high temperature calcination of the dielectric thin layer is prone to micro-cracks or bubbles, and the capacitor is prone to leakage current and reduced insulation withstand voltage performance), which limits its application in the field of buried capacitors.

[0011] 3) Lamination + Etching: The industry standard for embedded capacitors in the form of copper-clad laminates is lamination. The common practice is to coat a high-Dk resin material onto a thick copper foil (RZ 2-3μm), dry and semi-cur it, and then laminate another layer of copper foil. The copper foil on both sides is typically 18, 35, and 70μm thick; using thicker copper foil facilitates etching and reduces the risk of breakage and jamming during processing. The intermediate dielectric layer is generally 8, 12, 16, or 25μm thick. The copper foil on both sides of the copper-clad laminate is etched to form the electrodes of the capacitor. Then, a multilayer circuit board is directly laminated as an inner core board, and the embedded capacitor is placed within the multilayer circuit board. This "laminar etching" process for forming embedded capacitors is similar to conventional circuit board manufacturing processes, is simple, and easy for PCB manufacturers to master. This process often utilizes the strong adhesion between epoxy resin and copper foil, adding high-Dk inorganic particles (such as BaTiO3) to create a composite material. However, if the amount added exceeds a certain limit, it affects the bonding force between the resin and the copper foil, easily leading to peeling or blistering during copper foil lamination, or increased brittleness of the material, resulting in poorer subsequent circuit board processing. Furthermore, to avoid wrinkling during copper lamination, this lamination process must use copper foil thicker than 18μm, making it difficult to control the area tolerance of the capacitor electrodes and affecting the accuracy of actual capacitance value control (typically, capacitance value control accuracy is 5-10%). On the other hand, the electrodes of thick copper foil are embedded in the packaging substrate, increasing the overall thickness of the packaging substrate or semiconductor package, which is detrimental to the future trend of thin-plate design. One method to reduce the thickness of copper foil in buried capacitors is to use carrier copper foil, mainly 18μm copper foil or other materials as carrier to ensure rigidity, with 2-5μm thin copper foil attached to the carrier. After lamination, the carrier is peeled off, leaving thin copper to make copper electrodes. This carrier thin copper foil is very expensive, and it is still difficult to overcome the problem of large roughness of copper foil in the lamination method and poor insulation reliability under thin insulating medium conditions.

[0012] 4) Sputtering method: Copper electrodes are etched on the inner core of the circuit board to serve as the "lower copper electrodes" for the buried capacitors. On the "lower copper electrodes", a dielectric material (such as high-Dk ink) is sprayed using a 3D spraying method. Then, a target material such as Ni is sputtered onto the dielectric material, followed by dry film pattern transfer, etching, etc., to form a "upper copper electrode" with a relatively thin copper layer. This method only reduces the thickness of the copper electrode on one side, and its effect on reducing the overall thickness of the circuit board for the buried capacitors is limited. Moreover, the manufacturing process is cumbersome and the process is too long. It is difficult to overcome the disadvantages of excessive pinholes on the surface of the sputtered copper electrodes, unstable capacitor performance, low peel strength, easy peeling and bending, etc. Therefore, this process method is difficult to be widely used in the market.

[0013] In summary, developing a polymer composite material with high dielectric constant Dk (Dk>15), high capacitance, low loss (Df<0.02), a thickness of less than 25μm as the dielectric layer, uniform dielectric thickness, high heat and moisture resistance, thin copper electrode design for both upper and lower layers, fewer copper electrode pinholes, high peel strength, bend resistance, and easy processing is an inevitable requirement for the future development trend of buried capacitors. Summary of the Invention

[0014] To address the above problems, this invention relates to a capacitor, an embedded capacitor circuit board, and its manufacturing method. It employs ion implantation technology to metallize a polymer + high-Dk particle composite material with a thickness ≤25μm, solving the problem of thin copper plating and easy peeling of copper plating in composite materials or thin films with high Dk particle content. Combined with a roll-to-roll continuous manufacturing process of ion implantation + electroplating + pattern transfer + etching + cutting, it enables large-scale production of embedded capacitor composite materials, meeting the future requirements for thinner embedded capacitors in packaging substrates.

[0015] According to a first aspect of the present invention, a capacitor is provided, comprising: a high dielectric constant polymer composite material layer; an ion implantation layer formed by rapidly implanting conductive material ions into the high dielectric constant polymer composite material layer via an ion implantation method; and a metal layer formed and covering the ion implantation layer.

[0016] Preferably, the high dielectric constant polymer composite layer comprises a polymer resin and high dielectric constant particles.

[0017] Preferably, the implanted material of the ion implantation layer forms a doped structure with the high dielectric constant polymer composite material layer, and the doped structure forms a plurality of base piles under the surface of the high dielectric constant polymer composite material layer.

[0018] Preferably, the capacitor further includes a conductor deposition layer covering the ion implantation layer, and a metal layer covering the conductor deposition layer. The conductor deposition layer includes a plasma deposition layer and / or a magnetron sputtering deposition layer. The plasma deposition layer is formed by ion deposition of conductive material through a plasma deposition method; the magnetron sputtering layer is formed by atomic deposition of conductive material through a magnetron sputtering method.

[0019] Preferably, both the plasma deposition layer and the magnetron sputtering layer comprise one or more layers of conductive material, each layer of conductive material being formed through one or more plasma deposition or magnetron sputtering processes.

[0020] Preferably, the material of the ion implantation layer includes one or more of Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, and Nb, or one or more of binary, ternary, and quaternary alloys thereof.

[0021] Preferably, the material of the conductor deposition layer includes one or more of Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, and Nb, or one or more of binary, ternary, and quaternary alloys thereof.

[0022] Preferably, the material of the metal layer comprises one or more of Al, Mn, Fe, Ti, Cr, Co, Ni, Cu, Ag, Au, V, Zr, Mo, Nb, or one or more of binary, ternary, and quaternary alloys thereof.

[0023] Preferably, the polymer resin includes one or more of epoxy resin, BT resin, bismaleimide, cyanate ester, polyethylene, polystyrene, polyvinylidene fluoride, polyester, polycarbonate, polyphenylene sulfide, high-temperature resistant polypropylene, polyethylene 2,6-naphthalate, polyimide, polytetrafluoroethylene, and polyphenylene ether.

[0024] Preferably, the high dielectric constant particles comprise inorganic ceramic particles and / or conductive particles.

[0025] Preferably, the inorganic ceramic particles include one or more of silicon dioxide, barium titanate, strontium titanate, lead zirconate titanate, lanthanum lead titanate, lanthanum lead zirconate, and bismuth strontium tantalate.

[0026] Preferably, the conductive particles include one or more of carbon nanotubes, carbon black, graphite powder, Al, Al2O3, Ag, and Ni.

[0027] Preferably, the high dielectric constant particles account for 10-90% of the weight percentage of the high dielectric constant polymer composite layer.

[0028] Preferably, the high dielectric constant particles account for more than 80% of the weight percentage of the high dielectric constant polymer composite layer.

[0029] Preferably, the metal layer is obtained by one or more of electroplating, electroless plating, and vacuum evaporation plating.

[0030] Preferably, the thickness of the high dielectric constant polymer composite layer is 8-25 μm.

[0031] Preferably, the capacitor is a thin-film capacitor.

[0032] According to a second aspect of the present invention, a method for manufacturing a capacitor according to the present invention is provided, comprising the steps of: a) mixing high dielectric constant particles with a polymer to obtain a high dielectric constant polymer composite material layer; b) ion implanting the high dielectric constant polymer composite material to form an ion implantation layer; and c) coating the ion implantation layer with metal to form the metal layer.

[0033] Preferably, the method further includes the following steps after steps a)-c): d) pretreatment, lamination, exposure, development, etching, AOI inspection; and e) cutting.

[0034] Preferably, the capacitor is manufactured continuously in a roll-to-roll manner.

[0035] According to a third aspect of the present invention, a circuit board with embedded capacitors is provided, comprising: a capacitor according to the present invention; and a circuit board material in which the capacitor is embedded.

[0036] According to a fourth aspect of the present invention, a method for manufacturing an embedded capacitor circuit board is provided, comprising the steps of: the method according to the present invention; and embedding the capacitor layer into a circuit board material to obtain the embedded capacitor circuit board.

[0037] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0038] 1. This invention employs ion implantation technology. Due to the high energy of the implanted metal ions, metallization can be achieved on polymer substrates with a dielectric constant content of over 80%, resulting in a metal layer with high peel strength to the substrate. Compared to existing magnetron sputtering or lamination methods, this allows for the production of capacitors with larger capacitance. Magnetron sputtering produces metal layers with poor adhesion to the substrate, making it impossible to achieve metallization on polymer substrates with a dielectric constant content of over 80%.

[0039] 2. This invention employs ion implantation technology, reducing the number of pinholes. If there are pinholes on the electrodes, during the circuit board manufacturing process, the pickling liquid may corrode the high-Dk inorganic particles in the dielectric layer along the pinholes, leading to pinholes in the thin insulating dielectric as well. This makes the capacitor prone to leakage current and reduces its insulation withstand voltage performance. Pinholes on the electrodes also increase the dielectric loss of the capacitor material.

[0040] Meanwhile, the ion implantation technology of this invention can also solve the problems of thin copper plating and easy copper peeling in "high Dk composite materials", expanding the number of application varieties of buried capacitor polymer composite materials and the range of high Dk particle content. In the circuit board field, for dielectric layer thickness of 8-25μm, it is not necessary to coat or laminate copper foil on copper foil; instead, ion implantation of the metal layer can be performed directly on the dielectric layer thickness of 8-25μm (composite material "resin + high Dk particles"); this can avoid the phenomenon of copper foil peeling due to high high Dk particle content.

[0041] In the process of fabricating embedded capacitors using lamination, the copper foil is prone to peeling or blistering when laminated with a composite material containing high particle content. For embedded capacitors with a dielectric layer thickness of 8-25μm used in circuit boards, a common method is to coat a copper foil with a high Dk material resin on a copper foil with a RZ of 2-3μm, dry and semi-cur it, and then laminate another layer of thick copper foil on top; the copper foil on both sides is 18, 35, and 70μm thick.

[0042] Sputtering, due to the low energy and velocity of sputtered particles, produces many dispersed particle areas from the target material or has a large emission angle, resulting in a large number of particles reaching the composite substrate and forming more pinholes. This leads to easy leakage current and decreased insulation withstand voltage performance of the capacitor. For semiconductors or high-power capacitors with a dielectric layer thickness of less than 1μm, sputtering, CVD, spray coating, and other methods are used to directly sputter or spray "high-Dk particles" (without polymer resin) such as SiO2 and BaTiO3 ceramics onto copper foil.

[0043] 3. This invention employs roll-to-roll continuous "ion implantation + electroplating + pattern transfer + etching + cutting" technology, which can mass-produce embedded capacitors of 10-25μm thickness and thin-film polymer composite materials. This avoids bending or breakage due to the dielectric layer being too thin or brittle during the manufacturing process, thus improving the processability of embedded capacitors in circuit board manufacturing.

[0044] 4. In this invention, the thin copper design and implementation of the upper and lower copper electrodes of the buried capacitor improves the control accuracy of the electrode area during etching, thereby improving the control accuracy of the actual capacitance, and also reduces the total thickness of the buried capacitor in the packaging substrate, ultimately improving the reliability of the semiconductor packaging. Attached Figure Description

[0045] The present invention will be specifically described below with reference to the accompanying drawings and embodiments. The advantages and implementation methods of the present invention will become more apparent from this description. The contents shown in the drawings are for illustrative purposes only and do not constitute any limitation on the present invention. The drawings are schematic and not strictly drawn to scale. In all the drawings, the same reference numerals denote the same or similar parts, wherein:

[0046] Figure 1 A capacitor according to an embodiment of the present invention is shown;

[0047] Figure 2 An embedded capacitor circuit board according to an embodiment of the present invention is shown;

[0048] Figure 3 A method for manufacturing capacitors and embedded capacitor circuit boards according to an embodiment of the present invention is shown.

[0049] Reference number:

[0050] 100 capacitor

[0051] 102 Polymer Resin

[0052] 104 Ion Implanted Layer

[0053] 106 Metal Layer

[0054] 108 High Dk Particles

[0055] 200 Embedded Capacitor Circuit Board

[0056] 202 Polymer Resin

[0057] 204 Ion Implanted Layer

[0058] 206 metal layer

[0059] 208 High Dk Particles

[0060] 210 Circuit board material

[0061] 302 High-Dk particles are mixed with polymer resin and dried to obtain a polymer composite film with high dielectric constant.

[0062] 304. Ion implantation is performed on high dielectric constant polymer composite films to form ion implantation layers.

[0063] 306. A metal layer is formed by coating the ion-implanted layer with metal.

[0064] 308 Pretreatment, lamination, exposure, development, etching, AOI inspection

[0065] 310 cut to obtain capacitor

[0066] 312 The capacitor is laminated into the circuit board material to obtain a buried capacitor circuit board. Detailed Implementation

[0067] This invention relates to capacitors, embedded capacitor circuit boards, and their manufacturing methods. The capacitor comprises polymer resin and high-Dk particles, with a total thickness > 5 μm. A thin-film composite material or a composite material with a high-Dk particle weight content ranging from 10% to 90% is produced by mixing liquid polymer resin and high-Dk particles (without fiberglass or other scaffold support materials). The material has certain bending resistance. Then, a roll-to-roll process is used to fabricate an embedded capacitor containing metal capacitor electrodes, following a design of "ion implantation, copper plating, dry film pretreatment, film lamination, exposure, development, etching, AOI inspection, and cutting." This process is then laminated and embedded into a multilayer circuit board.

[0068] I. Ion Implantation

[0069] Ion implantation can be achieved by using a conductive material as a target. In a vacuum environment, an electric arc is used to ionize the conductive material within the target, generating ions. These ions are then accelerated under a high-voltage electric field to achieve high energies (e.g., 1-1000 keV, such as 50 keV, 100 keV, 200 keV, 500 keV, etc.). These high-energy conductive material ions then directly bombard the surface of a high-dielectric-constant polymer composite material at high velocities, penetrating to a certain depth below the surface. Chemical bonds (e.g., ionic or covalent bonds) are formed between the implanted conductive material ions and the molecules of the high-dielectric-constant polymer composite material, thus forming a doped structure. These chemical bonds enhance the bonding force between the ion-implanted layer and the high-dielectric-constant polymer composite material, making it less likely for the ion-implanted layer to detach from the polymer composite material.

[0070] The resulting ion-implanted layer has an outer surface (or upper surface) flush with the surface of the high-dielectric-constant polymer composite, while its inner surface (or lower surface) extends deep into the interior of the high-dielectric-constant polymer composite. As a specific example, ions from the conductive material can acquire energies of 50-1000 keV (e.g., 50 keV, 100 keV, 200 keV, 300 keV, 400 keV, 500 keV, 600 keV, 700 keV, 800 keV, 900 keV) during ion implantation and can be implanted to depths of 1-500 nm (e.g., 10 nm, 20 nm, 50 nm, 100 nm, 200 nm, 300 nm, 400 nm) below the surface of the high-dielectric-constant polymer composite.

[0071] By controlling various parameters during the ion implantation process, such as implantation current, voltage, and implantation dose, the depth to which the ion-implanted layer penetrates into the high-dielectric-constant polymer composite material can be adjusted; that is, the depth at which the inner surface of the ion-implanted layer lies below the surface of the high-dielectric-constant polymer composite material. For example, the energy of the implanted ions can be 5-1000 keV, and the implantation dose can be 1.0 × 10⁻⁶ keV. 12 Up to 1.0×10 18 ions / cm 2 (More preferably, the injection dose is 1.0 × 10⁻⁶) 15 Up to 5.0×10 16 ions / cm 2This allows the inner surface of the ion-implanted layer to be located at a depth of 5-50 nm below the surface of the high-dielectric-constant polymer composite material. During ion implantation, metals or alloys with strong bonding to the high-dielectric-constant polymer composite material can be used. For example, one or more metals such as Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, Nb, Al, Be, Co, Fe, Mg, Mn, Pt, Ta, and W, as well as binary, ternary, or quaternary alloys (e.g., NiCr, TiCr, VCr, CuCr, MoV, NiCrV, TiNiCrNb) can be used as the target material for ion implantation. Ni, Cr, and Ti are preferred implantation materials. In other words, the resulting ion-implanted layer can be composed of one or more of Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, Nb, Al, Be, Co, Fe, Mg, Mn, Pt, Ta, and W, or alloys of these elements.

[0072] During ion implantation, conductive material ions are forcibly injected into the interior of a high-dielectric-constant polymer composite material at a very high velocity, forming a stable doped structure with the polymer composite material. This is equivalent to forming numerous base piles beneath the surface of the high-dielectric-constant polymer composite material. Due to the presence of these base piles, and the subsequent metal layer being connected to them, the peel strength between the substrate and the subsequently formed metal layer can reach 0.5 N / mm or higher, even exceeding 0.8 N / mm, for example, as high as 0.7-1.5 N / mm. In contrast, under conventional magnetron sputtering, the energy of sputtered particles is only a few electron volts at most. Therefore, these particles deposit on the substrate surface but do not penetrate into the substrate interior. The resulting conductive layer has a low bonding strength with the substrate surface, at most around 0.5 N / mm, significantly lower than that of ion implantation. Moreover, the conductive material used for ion implantation is typically nanoscale in size, with a relatively uniform distribution during ion implantation, and the incident angle to the substrate surface is not significantly different. Therefore, it is possible to ensure that the bonding surface between the substrate and the metal layer subsequently formed thereon has a low surface roughness, for example, below 0.4 μm, or even as low as 0.001-0.1 μm (e.g., about 0.02 μm). As a result, in high-frequency signal transmission, signal loss caused by the conductor layer can be significantly reduced, thereby further reducing overall signal loss.

[0073] Compared with the lamination method for fabricating embedded capacitors, copper foil lamination is prone to peeling or blistering. Ion implantation technology solves the problems of thin copper coating and easy peeling of copper coating in "high dielectric constant polymer composite materials", expanding the number and range of applications of polymer resin materials for embedded capacitors.

[0074] Compared to sputtering, ion implantation involves implanting high-energy ions into the surface of a high-dielectric-constant polymer composite material, forming a stable doped structure and multiple substrates beneath the surface. This results in better adhesion between the conductive ion-implanted layer and the high-dielectric-constant polymer composite material. During circuit board manufacturing processes (such as lamination, etching spraying, roller operation, and handling), the copper layer and the bend-resistant polymer material form a unified whole, preventing breakage, peeling, or blistering upon bending, thus improving processability. However, bending stress can cause unevenness in the copper electrode (equivalent to variations in dielectric layer thickness), leading to localized capacitance changes, which is detrimental to capacitance stability and high-precision control.

[0075] High-Dk inorganic ceramic materials in composite materials are hard and dense, formed by high-temperature calcination. Low-energy, low-velocity ions from sputtering cannot bind well to them. In contrast, ion implantation involves implanting high-energy, high-velocity ions onto the surface of high-Dk inorganic ceramic materials, forming a stable doped structure and multiple substrates beneath the surface. This results in better adhesion between the conductive ion-implanted layer and the substrate. Meanwhile, sputtering, due to its low energy, produces many particles dispersed from the target at a larger angle, resulting in more particles reaching the substrate and creating a greater number of pinholes.

[0076] If there are pinholes on the copper electrodes, the pickling liquid during the circuit board manufacturing process may corrode the high-Dk inorganic particles in the dielectric layer along the pinholes, causing pinholes in the thin insulating dielectric as well. This makes the capacitor prone to leakage current and reduces its insulation withstand voltage performance. The dielectric loss of the capacitor material will also increase if there are pinholes on the copper electrodes.

[0077] II. Plasma Deposition / Magnetron Sputtering

[0078] In addition to the ion implantation layer, a plasma deposition layer and / or a magnetron sputtering layer can also be formed on the surface of the substrate. The plasma deposition layer and / or magnetron sputtering layer are composed of conductive materials and can have a thickness of 1-10000 nm, such as 100 nm, 200 nm, 500 nm, 700 nm, 1 μm, 2 μm, 5 μm, 7 μm, or 10 μm. The thickness of the plasma deposition layer and / or magnetron sputtering layer can be set as needed by adjusting various deposition parameters, for example, to make the surface sheet resistance of the substrate on which the plasma deposition layer and / or magnetron sputtering layer is formed less than 200 Ω / □, 100 Ω / □, 80 Ω / □, 50 Ω / □, etc. Furthermore, the conductive materials constituting the plasma deposition layer and / or magnetron sputtering layer can be various metals, alloys, conductive oxides, conductive carbides, conductive organic materials, etc., which may be the same as or different from those used in the ion implantation layer, but are not limited to these. The conductive material used for plasma deposition and / or magnetron sputtering can be selected based on the chosen substrate, as well as the composition and thickness of the ion-implanted layer. Preferably, a metal or alloy that bonds well with the ion-implanted layer is used for plasma deposition and / or magnetron sputtering. For example, one or more of Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, Nb, and alloys thereof can be used, such as NiCr, TiCr, VCr, CuCr, MoV, NiCrV, TiNiCrNb, etc. Furthermore, the plasma-deposited layer and / or magnetron sputtering can also comprise one or more layers composed of the same or different materials.

[0079] III. Capacitors

[0080] Figure 1 A capacitor 100 according to an embodiment of the present invention is shown, comprising a high dielectric constant polymer composite material layer, an ion implantation layer 104, and a metal layer 106. The high dielectric constant polymer composite material layer comprises a polymer resin 102 (excellent heat resistance, mechanical properties, processability, and low cost) and high-Dk particles 108 (excellent high-Dk dielectric properties). The high dielectric constant polymer composite material layer ensures that the material simultaneously possesses excellent processability, low dielectric loss, and high Dk dielectric properties; furthermore, the polymer can be processed into thin films (8-25 μm thick), maximizing the advantages of high capacitance from a "thin dielectric layer," thus showing promising application prospects.

[0081] High-Dk particles 108 include inorganic ceramic particles and conductive particles; among inorganic ceramic particles, BaTiO3 is widely used as a high-dielectric ceramic; there are also reports that when conductive particles (carbon nanotubes, carbon black, graphite powder, or other metal particles, etc.) are filled into polymer materials, the dielectric constant of the material near the percolation threshold will increase abnormally, but the dielectric properties of such composite materials have poor reproducibility, and the stability of the material's Dk and Df is difficult to control. Polymer resins include two types: "non-polar and polar"; non-polar polymers (such as PTFE, PPE, etc.) only generate induced dipole moments under an external electric field, have low dielectric loss, are basically unaffected by frequency and temperature changes, and have low dielectric constants (less than 2.5); polar polymers, under the action of an external electric field, can generate electron cloud displacement polarization, dipole orientation polarization, and polar group polarization, have larger dielectric losses, are more affected by frequency and temperature, and have larger dielectric constants, generally around 3-10.

[0082] In summary, the increase in dielectric constant and dielectric loss varies among different polymer materials after adding high-Dk fillers. The goal is to create a polymer composite material that simultaneously possesses "high Dk dielectric constant, low loss, and easy processing".

[0083] Polymer resin 102 includes epoxy resin, BT resin, bismaleimide (BMI), cyanate ester (CE), polyethylene (HDPE or LDPE), polystyrene (PS), polyvinylidene fluoride (PVDf), polyester (PET), polycarbonate (PC), polyphenylene sulfide (PPS), high-temperature resistant polypropylene (HTPP), polyethylene 2,6-naphthaleneacetic acid (PEN), polyimide (PI), polytetrafluoroethylene (PTFE), polyphenylene ether (PPE), etc.; the solid content of the polymer resin is 10%-90% by weight.

[0084] High-Dk particles 108 or fillers include inorganic ceramic particles and conductive particles. Inorganic ceramic particles include one or more mixtures of perovskite oxides such as SiO2, barium titanate (BaTiO3), strontium titanate (SrTiO3), lead zirconate titanate Pb(ZrTi)O3 (commonly known as PZT), lanthanum lead titanate (PbLaTiO), lanthanum lead zirconate (PbLaZrO) (commonly known as PLZT), and bismuth strontium tantalate (SrBi2Ta2O9) (commonly known as SBT). Conductive particles include nanoparticles such as carbon nanotubes, as well as one or more mixtures of carbon black, graphite powder, or metal particles such as Al, Al2O3, Ag, and Ni.

[0085] An ion-implanted layer 104 is formed by implanting conductive material ions under the surface of a high dielectric constant polymer composite layer using an ion implantation method. Simultaneously, a metal layer 106 is formed on the ion-implanted layer 104, which is obtained by one or more methods such as electroplating, electroless plating, and vacuum evaporation to obtain a conductor layer with the desired thickness and conductivity.

[0086] In addition to the ion implantation layer, a conductor deposition layer can also be formed on the surface of the high dielectric constant polymer composite layer. The conductor deposition layer covers the ion implantation layer, and a metal layer covers the conductor deposition layer. The conductor deposition layer includes a plasma deposition layer and / or a magnetron sputtering deposition layer. The plasma deposition layer is formed by ion deposition of conductive material through a plasma deposition method; the magnetron sputtering layer is formed by atomic deposition of conductive material through a magnetron sputtering method.

[0087] IV. Embedded Capacitor Circuit Board

[0088] Figure 2 An embedded capacitor circuit board 200 according to an embodiment of the present invention is shown, which includes Figure 1 The capacitor shown is embedded in a circuit board material 210. The capacitor includes a high dielectric constant polymer composite material layer, an ion implantation layer 204, and a metal layer 206, wherein the high dielectric constant polymer composite material layer includes a polymer resin 202 and high Dk particles 208.

[0089] Capacitors are embedded in the packaging substrate or PCB circuit board, thus eliminating the need for soldering, which reduces inductance and power supply impedance. Furthermore, fewer solder joints reduce solder joint failures, improving the reliability of the circuit board or package. On the other hand, embedding capacitors saves valuable surface area, reduces board size, shortens wiring, reduces the distance between capacitors and chips, enhances electrical performance, and enables circuit boards to become increasingly lightweight and thin.

[0090] V. Manufacturing methods for capacitors and embedded capacitor circuit boards

[0091] Figure 3 A method for manufacturing a capacitor and an embedded capacitor circuit board according to an embodiment of the present invention is shown, comprising the following steps:

[0092] Step 302: Mix high Dk particles 108 and 208 with polymer resins 102 and 202 and dry to obtain a high dielectric constant polymer composite material;

[0093] Step 304: Ion implantation is performed on the high dielectric constant polymer composite material to form ion implantation layers 104 and 204;

[0094] Step 306: Coating metal onto ion implantation layers 104 and 204 to form metal layers 106 and 206;

[0095] Step 308: Pretreatment, lamination, exposure, development, etching, AOI inspection;

[0096] Step 310: Cut to obtain a capacitor of 100;

[0097] Step 312: Laminate capacitor 100 into circuit board material 210 to obtain embedded capacitor circuit board 200.

[0098] In the above steps, the high dielectric constant polymer composite material is formed into a thin film and rolled up. The roll-to-roll continuous "ion implantation + copper plating + pattern transfer + etching + cutting" technology can mass-produce capacitors of 10-25μm thickness in thin film form polymer composite material, avoiding bending or breakage due to the dielectric layer being too thin or brittle during the manufacturing process, and improving the processability of capacitors in the circuit board manufacturing process.

[0099] VI. Example 1

[0100] Substrate composition: 20% epoxy resin, 80% BaTiO3

[0101] Resin thickness: 15 micrometers

[0102] Dielectric constant: 20, far lower than the 35 of similar materials in the prior art.

[0103] Dielectric loss factor: 0.009, which is much lower than 0.014 for similar materials in the prior art.

[0104] First, nickel is ion-implanted into the substrate, followed by plasma deposition of a nickel-copper (10-90) alloy to form a metal layer, thus obtaining the capacitor. The final capacitor has a capacitance of 35, exceeding the performance of ordinary capacitors by more than 50%.

[0105] VII. Example 2

[0106] Substrate composition: 15% PI resin, 85% high dielectric constant filler.

[0107] Resin thickness: 10 micrometers

[0108] Dielectric constant: 15, far lower than the 40 of similar materials in the prior art.

[0109] Dielectric loss factor: 0.010, which is much lower than 0.029 for similar materials in the prior art.

[0110] First, a nickel-chromium alloy is implanted into the substrate by ion implantation, followed by nickel deposition by magnetron sputtering, and then copper deposition by magnetron sputtering to obtain the metal layer, thus obtaining the capacitor. The final capacitor has a capacitance of 25, exceeding the performance of ordinary capacitors by more than 80%.

[0111] VIII. Example 3

[0112] Substrate composition: 15% epoxy resin, 85% high dielectric constant filler.

[0113] Resin thickness: 20 micrometers

[0114] Dielectric constant: 15, far lower than the 40 of similar materials in the prior art.

[0115] Dielectric loss factor: 0.010, which is much lower than 0.047 for similar materials in the prior art.

[0116] First, a nickel-chromium alloy is ion-implanted into the substrate, followed by nickel deposition via magnetron sputtering, and then copper deposition via magnetron sputtering to obtain the metal layer, thus obtaining the capacitor. The final capacitor has a capacitance of 30, exceeding the performance of ordinary capacitors by more than 90%.

[0117] IX. Conclusion

[0118] This invention enables metallization on high-dielectric-constant polymer substrates with a dielectric constant particle content of over 80%, resulting in a metal layer with high peel strength to the substrate. Compared to existing magnetron sputtering or lamination methods, it allows for the production of capacitors with larger capacitance. Magnetron sputtering produces metal layers with poor adhesion to the substrate, making it impossible to achieve metallization on high-dielectric-constant polymer substrates with a dielectric constant particle content of over 80%.

[0119] Although the invention has been described in detail with only a limited number of embodiments, it should be readily understood that the invention is not limited to such disclosed embodiments. Rather, the invention may be modified to include any number of alterations, substitutions, replacements, or equivalent arrangements not previously described, but which are commensurate with the spirit and scope of the invention. Furthermore, although various embodiments of the invention have been described, it will be understood that aspects of the invention may include only a few of the described embodiments. Therefore, the invention should not be considered as limited by the foregoing description, but only by the scope of the claims.

Claims

1. A capacitor comprising: High dielectric constant polymer composite layer; An ion implantation layer is formed by rapidly implanting conductive material ions into a high dielectric constant polymer composite material layer using an ion implantation method. as well as A metal layer is formed and covers the ion implantation layer; The capacitor further includes a conductor deposition layer covering the ion implantation layer, and a metal layer covering the conductor deposition layer. The conductor deposition layer includes a plasma deposition layer and / or a magnetron sputtering deposition layer. The plasma deposition layer is formed by ion deposition of conductive material using a plasma deposition method; the magnetron sputtering deposition layer is formed by atomic deposition of conductive material using a magnetron sputtering method. The high dielectric constant polymer composite material layer comprises a polymer resin and high dielectric constant particles; The polymer resin includes one or more of the following: epoxy resin, BT resin, bismaleimide, cyanate ester, polyethylene, polystyrene, polyvinylidene fluoride, polyester, polycarbonate, polyphenylene sulfide, high-temperature resistant polypropylene, polyethylene 2,6-naphthalate, polyimide, polytetrafluoroethylene, and polyphenylene ether. The high dielectric constant particles include inorganic ceramic particles and / or conductive particles; The inorganic ceramic particles include one or more of the following: silicon dioxide, barium titanate, strontium titanate, lead zirconate titanate, lanthanum lead titanate, lanthanum lead zirconate, and bismuth strontium tantalate. The conductive particles include one or more of carbon nanotubes, carbon black, graphite powder, Al, Al2O3, Ag, and Ni. The high dielectric constant particles account for more than 80% of the weight percentage of the high dielectric constant polymer composite layer.

2. The capacitor according to claim 1, characterized in that, The implanted material of the ion implantation layer forms a doped structure with the high dielectric constant polymer composite material layer, and the doped structure forms multiple base piles under the surface of the high dielectric constant polymer composite material layer.

3. The capacitor according to claim 1, characterized in that, Both the plasma deposition layer and the magnetron sputtering deposition layer include one or more layers of conductive material, which are formed by the conductive material layers of the plasma deposition layer through one or more plasma deposition methods, and the conductive material layers of the magnetron sputtering deposition layer are formed by one or more magnetron sputtering methods.

4. The capacitor according to any one of claims 1-3, characterized in that, The material of the ion implantation layer includes one or more of Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, and Nb, or one or more of binary, ternary, and quaternary alloys thereof.

5. The capacitor according to claim 3, characterized in that, The material of the conductor deposition layer includes one or more of Ti, Cr, Ni, Cu, Ag, Au, V, Zr, Mo, and Nb, or one or more of binary, ternary, and quaternary alloys thereof.

6. The capacitor according to any one of claims 1-3, characterized in that, The material of the metal layer includes one or more of Al, Mn, Fe, Ti, Cr, Co, Ni, Cu, Ag, Au, V, Zr, Mo, Nb, or one or more of binary, ternary, and quaternary alloys thereof.

7. The capacitor according to any one of claims 1-3, characterized in that, The metal layer is obtained by one or more of electroplating, electroless plating, and vacuum evaporation plating.

8. The capacitor according to any one of claims 1-3, characterized in that, The thickness of the high dielectric constant polymer composite layer is 8-25 μm.

9. The capacitor according to any one of claims 1-3, characterized in that, The capacitor is a thin-film capacitor.

10. A method for manufacturing a capacitor according to any one of claims 1-9, comprising the following steps: a) The high dielectric constant polymer composite material layer is obtained by mixing high dielectric constant particles with a polymer; b) Ion implanting the high dielectric constant polymer composite material to form an ion implantation layer; and c) Coating the ion-implanted layer with metal to form the metal layer.

11. The method according to claim 10, characterized in that, It also includes the following steps following steps a)-c): d) Pretreatment, lamination, exposure, development, etching, AOI inspection; and e) Cutting.

12. The method according to claim 10 or 11, characterized in that, The capacitor is manufactured continuously in a roll-to-roll manner.

13. A circuit board with embedded capacitors, comprising: The capacitor according to any one of claims 1-9; as well as The capacitor is embedded in the circuit board material.

14. A method for manufacturing a circuit board with embedded capacitors, comprising the following steps: The steps of the method according to any one of claims 10-12; and The capacitor layer is embedded in the circuit board material to obtain the embedded capacitor circuit board.

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