EC Reset Circuit Based on Composite Signal and Electronic Device

Abstract

The present invention discloses an EC reset circuit based on a composite signal for forcibly resetting the EC of a local device, which relates to the technical field of electronic circuits. The circuit includes a detection circuit and a control circuit, wherein: the input end of the detection circuit is used to receive the volume information and Pogo information of the local device; the detection circuit processes the volume information and Pogo information, and when both the volume information and Pogo information meet the corresponding set values, the detection circuit generates a forced reset signal; the output end of the detection circuit is connected to the power-on signal end and the enable signal end of the power supply chip that powers the EC through the control circuit, so as to pull down the power-on signal of the power-on signal end and the enable signal of the enable signal end through the control circuit, and disconnect the power connection of the EC. The embodiment of the present invention also discloses an electronic device including the above-mentioned EC reset circuit based on a composite signal. The embodiment of the present invention can complete forced reset only by means of the volume button.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of electronic circuits, and in particular, to an EC reset circuit and an electronic device based on a composite signal. Background Art

[0002] EC (Embed Controller, Embedded Controller) is widely used in laptop computers, tablet computers, and various industrial control computers. In laptop computers and tablet computers, it is also called KBC (Keyboard Controller, Keyboard Controller). The EC has a high status in the system. During the system startup process, the EC controls the timing of most important signals. After the computer is turned on, the EC controls devices such as the keyboard, indicator lights, fan, and touchpad. In addition, the EC also controls the standby, sleep, and other states of the system.

[0003] If the EC fails and cannot operate, it will affect the stability and operation of the entire system. Under normal circumstances, we have to remove the power supply device and the battery, but some batteries are built-in and it is very inconvenient to operate. At this time, a simple method is needed to perform an EC reset and make the entire system run normally again. Summary of the Invention

[0004] In order to overcome the deficiencies of the prior art, the purpose of the present invention is to provide an EC reset circuit and an electronic device based on a composite signal, which can complete a forced reset only by means of the volume button.

[0005] In the first aspect, the embodiments of the present invention provide an EC reset circuit based on a composite signal, which is used to perform a forced reset on the EC of a local device. It includes a detection circuit and a control circuit, wherein:

[0006] The input end of the detection circuit is used to receive the volume information and Pogo information of the local device. The Pogo information is the voltage information generated by the Pogo interface of the local device and subjected to voltage division processing by an external device. The detection circuit processes the volume information and Pogo information. When both the volume information and Pogo information meet the corresponding set values, the detection circuit generates a forced reset signal.

[0007] The output end of the detection circuit is connected to the power-on signal terminal and the enable signal terminal of the power supply chip that supplies power to the EC through the control circuit, so as to pull down the power-on signal of the power-on signal terminal and the enable signal of the enable signal terminal through the control circuit after the detection circuit generates a forced reset signal, and disconnect the power connection of the EC.

[0008] In a preferred embodiment, the detection circuit includes a first input terminal, a second input terminal, and a third input terminal. Among them, the first input terminal, the second input terminal, and the third input terminal are respectively connected to the volume + terminal of the local device, the volume - terminal of the local device, and the output terminal after voltage division processing of the external device, and are respectively used to receive volume + information, volume - information, and Pogo information;

[0009] When the volume + information, the volume - information, and the Pogo information all meet the corresponding set values, the detection circuit outputs a forced reset signal.

[0010] In a preferred embodiment, the detection circuit further includes a first output terminal corresponding to the first input terminal, a second output terminal corresponding to the second input terminal, and a third output terminal corresponding to the third input terminal; when the volume + information, the volume - information, and the Pogo information all meet the corresponding set values, the first output terminal, the second output terminal, and the third output terminal all output a high level.

[0011] In a preferred embodiment, the detection circuit further includes diode D1 and diode D2; the anodes of diode D1 and diode D2 are both connected to the auxiliary power supply through resistor R1, the cathodes of diode D1 and diode D2 are both connected to the auxiliary power supply through resistor R1, and a combined output terminal is also formed between the anodes of diode D1 and diode D2 and resistor R1 for outputting volume combined information; when both the first output terminal and the second output terminal output a high level, the combined output terminal outputs a high level.

[0012] In a preferred embodiment, a forced line module is further included between the detection circuit and the control circuit. The input terminal of the forced line module is used to receive four kinds of information and outputs a forced reset signal when all the four kinds of information are high levels. The four kinds of information are respectively the volume + information, the volume - information, the volume combined information, and the Pogo information.

[0013] In a preferred embodiment, the forced line module includes one or more of the following:

[0014] A first AND gate, the two input terminals of the first AND gate are respectively connected to the first output terminal and the second output terminal, the output terminal of the first AND gate is connected to the cathode of diode D3, and the anode of diode D3 forms a first reset signal terminal;

[0015] A second AND gate, the two input terminals of the second AND gate are respectively connected to the first output terminal and the combined output terminal, the output terminal of the second AND gate is connected to the cathode of diode D4, and the anode of diode D4 forms a second reset signal terminal;

[0016] The third AND gate, two input terminals of the third AND gate are respectively connected to the second output terminal and the integrated output terminal, an output terminal of the third AND gate is connected to a negative electrode of a diode D5, and a positive electrode of the diode D5 forms a third reset signal terminal;

[0017] The fourth AND gate, two input terminals of the fourth AND gate are respectively connected to the third output terminal and the integrated output terminal, an output terminal of the fourth AND gate is connected to a negative electrode of a diode D6, and a positive electrode of the diode D5 forms a fourth reset signal terminal;

[0018] The first reset signal terminal, the second reset signal terminal, the third reset signal terminal, and the fourth reset signal terminal are all connected to an auxiliary power supply through a resistor R4;

[0019] When the forced line module includes all of the first AND gate, the second AND gate, the third AND gate, and the fourth AND gate, the first reset signal terminal, the second reset signal terminal, the third reset signal terminal, and the fourth reset signal terminal jointly form a forced reset signal terminal for generating a forced reset signal and sending it to an input terminal of the control circuit;

[0020] When the forced line module does not include all of the first AND gate, the second AND gate, the third AND gate, and the fourth AND gate, and the forced line module does not receive all of the four types of information, the remaining reset signal terminals and the existing reset signal terminals jointly form a forced reset signal terminal for generating a forced reset signal and sending it to an input terminal of the control circuit; the remaining reset signal terminals are formed by output terminals corresponding to the information not received among the four types of information via unidirectional diodes, and the remaining reset signal terminals are also connected to the auxiliary power supply through the resistor R4; the existing reset signal terminals are reset signal terminals corresponding to one or more of the first AND gate, the second AND gate, the third AND gate, and the fourth AND gate included in the forced line module.

[0021] In a preferred embodiment, the control circuit is an electronic switch, input terminals of the electronic switch are respectively connected to a power-on signal terminal and an enable signal terminal, an output terminal of the electronic switch is grounded, and a control terminal of the electronic switch is connected to an output terminal of the detection circuit; when the detection circuit receives a forced reset signal and a low-level power-on signal, the electronic switch is turned on to pull down the power-on signal and the enable signal.

[0022] In a preferred embodiment, there are two control circuits, input terminals of the electronic switches of the two control circuits are respectively connected to the power-on signal terminal and the enable signal terminal, and a pull-down resistor is connected in series on the electronic switch of any one or both of the control circuits;

[0023] Or / and;

[0024] The electronic switch is any one of a triode, a MOS transistor, a relay, an IGBT, a thyristor, and a diode current switch.

[0025] In a preferred embodiment, the forced reset signal is a high level, the electronic switch is an NMOS transistor, the gate of the NMOS transistor is connected to the output end of the detection circuit, the source of the NMOS transistor is grounded or grounded through a pull-down resistor, and the drain of the NMOS transistor is connected to the power-on signal end and the enable signal end.

[0026] In a second aspect, an embodiment of the present invention provides an electronic device, which includes the EC reset circuit based on the composite signal described in the first aspect of the present invention.

[0027] Compared with the prior art, in the embodiment of the present invention, by detecting the volume information and the Pogo information, a forced reset signal is generated when the volume information and the Pogo information meet the requirements, and the power connection of the EC is disconnected to achieve the purpose of forced reset, and the operation is flexible. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 is a schematic block diagram of the EC reset circuit based on the composite signal according to Embodiment 1 of the present invention;

[0029] Figure 2 is a schematic circuit diagram of the detection circuit according to Embodiment 1 of the present invention;

[0030] Figure 3 is a schematic circuit diagram of the Pogo signal formation according to Embodiment 1 of the present invention;

[0031] Figure 4 is a schematic circuit diagram of the forced line module according to Embodiment 1 of the present invention;

[0032] Figure 5 is a schematic circuit diagram of the control circuit according to Embodiment 1 of the present invention.

[0033] In the figure: 10, local device; 11, volume terminal; 12, detection circuit; 121, microprocessor; 13, forced line module; 131, first AND gate; 132, second AND gate; 133, third AND gate; 134, fourth AND gate; 14, control circuit; 15, power chip; 16, EC; 17, Pogo interface; 20, external device; 30, Pogo information.

[0034] DETAILED DESCRIPTION OF THE EMBODIMENTS

[0035] Next, in combination with the drawings and the specific embodiments, the embodiments of the present invention will be further described. It should be noted that on the premise of no conflict, the following described embodiments or various technical features can be combined arbitrarily to form new embodiments. Except for special instructions, the materials and equipment used in this embodiment can be purchased from the market.

[0036] Embodiment 1:

[0037] An EC reset circuit based on a composite signal, in which an external device 20 detects the Pogo information of a local device and then combines the volume key information (volume information) of the local device to forcibly reset the EC of the local device 10. That is, when the Pogo information meets the requirements, the EC can be forcibly reset only through the volume key of the local device.

[0038] The local device mainly refers to devices such as tablet computers or notebook computers with an EC (Embed Controller, embedded controller), and can also be various industrial control devices with an EC. In addition to having the EC function, the local device should also have a volume key (volume + key or / and volume - key) and a Pogo pin (Pogo interface 17). The external device is mainly an external fixture that can detect the voltage of the Pogo pin of the local device.

[0039] The local device can be connected to the Pogo pin interface of the external device through a magnetic connector. Please refer to Figure 3 As shown, the Pogo signal (V1) at the main board end of the local device is output to the Pogo pin interface of the local device via the resistor R2, and the Pogo pin interface of the external device forms Pogo information 30 through the voltage - dividing resistor R3.

[0040] In terms of the implementation method, please refer to Figure 1 As shown, it mainly includes a detection circuit 12 and a control circuit 14. Among them: the input end of the detection circuit is used to receive the volume information and Pogo information of the local device; the detection circuit processes the volume information and Pogo information. The processing method is that when both the volume information and Pogo information meet the corresponding set values (set in advance according to needs), the detection circuit generates a forced reset signal.

[0041] The output end of the detection circuit is connected to the power - on signal end and the enable signal end of the power supply chip 15 that supplies power to the EC16 through the control circuit. The output end of the power supply chip is connected to the power supply end of the EC. When the detection circuit generates a forced reset signal, the power - on signal at the power - on signal end and the enable signal at the enable signal end are pulled low through the control circuit, so that the power supply chip stops working, and the EC stops working due to power failure, achieving the purpose of forced reset, and the operation is very flexible.

[0042] The volume information is formed by collecting the voltage of the volume terminal 11 (volume button terminal) of the local device. It can collect only the volume + information (voltage information of the volume + button) or the volume - information (voltage information of the volume - button). Of course, as in the preferred embodiment of the present invention, it can also collect the volume + information and the volume - information simultaneously. When the Pogo information meets the requirements, the EC can be forcibly reset through the volume button of the local device.

[0043] The detection device can use a microprocessor, such as a single-chip microcomputer, or other forms of devices with processing functions, such as FPGA, ARM, etc. It can also be implemented in the form of a comparator.

[0044] For example, when using a microprocessor 121 (similar for other devices with processing functions, and multiple comparators are required to build a comparator), please refer to Figure 2 As shown, the detection circuit includes a first input terminal, a second input terminal, and a third input terminal. Among them, the first input terminal, the second input terminal, and the third input terminal are respectively connected to the volume + terminal of the local device, the volume - terminal of the local device, and the output terminal after voltage division processing of the external device, and are respectively used to receive the volume + information, the volume - information, and the Pogo information. When the volume + information, the volume - information, and the Pogo information all meet the corresponding set values, the detection circuit outputs a forced reset signal.

[0045] Specifically, the detection circuit further includes a first output terminal corresponding to the first input terminal, a second output terminal corresponding to the second input terminal, and a third output terminal corresponding to the third input terminal; when the volume + information, the volume - information, and the Pogo information all meet the corresponding set values, the first output terminal, the second output terminal, and the third output terminal all output a high level. In addition, the detection circuit further includes a diode D1 and a diode D2; the positive electrodes of the diode D1 and the diode D2 are both connected to the auxiliary power supply through a resistor R1, the negative electrodes of the diode D1 and the diode D2 are both connected to the auxiliary power supply through a resistor R1, and a combined output terminal is also formed between the positive electrodes of the diode D1 and the diode D2 and the resistor R1, which is used to output the volume combined information; by using the unidirectional conductivity of the diode D1 and the diode D2, when the first output terminal and the second output terminal both output a high level, the combined output terminal outputs a high level, and when one or both of the first output terminal and the second output terminal output a low level, the combined output terminal outputs a low level, so as to filter out the low levels output by the first output terminal and the second output terminal.

[0046] In order to further filter out the possible low levels at the four output terminals, in a preferred embodiment of the present invention, a forced line module 13 is further provided between the detection circuit and the control circuit. The input end of the forced line module is used to receive four types of information and outputs a forced reset signal when all of the four types of information are at high level. The four types of information are respectively the volume + information, volume - information, volume comprehensive information, and Pogo information.

[0047] Please refer to Figure 4 as shown, the forced line module includes one or more of the following:

[0048] The first AND gate 131, the two input terminals of the first AND gate are respectively connected to the first output terminal and the second output terminal, and the output terminal of the first AND gate is connected to the negative electrode of the diode D3. The positive electrode of the diode D3 forms the first reset signal terminal;

[0049] The second AND gate 132, the two input terminals of the second AND gate are respectively connected to the first output terminal and the comprehensive output terminal, and the output terminal of the second AND gate is connected to the negative electrode of the diode D4. The positive electrode of the diode D4 forms the second reset signal terminal;

[0050] The third AND gate 133, the two input terminals of the third AND gate are respectively connected to the second output terminal and the comprehensive output terminal, and the output terminal of the third AND gate is connected to the negative electrode of the diode D5. The positive electrode of the diode D5 forms the third reset signal terminal;

[0051] The fourth AND gate 134, the two input terminals of the fourth AND gate are respectively connected to the third output terminal and the comprehensive output terminal, and the output terminal of the fourth AND gate is connected to the negative electrode of the diode D6. The positive electrode of the diode D5 forms the fourth reset signal terminal;

[0052] The first reset signal terminal, the second reset signal terminal, the third reset signal terminal, and the fourth reset signal terminal are all connected to the auxiliary power supply through the resistor R4;

[0053] When the forced line module includes all of the first AND gate, the second AND gate, the third AND gate, and the fourth AND gate, the first reset signal terminal, the second reset signal terminal, the third reset signal terminal, and the fourth reset signal terminal jointly form a forced reset signal terminal for generating a forced reset signal and sending it to the input end of the control circuit. This situation can well ensure filtering out the possible low levels at the four output terminals.

[0054] Of course, in some cases, for example, if the forced line module does not include all of the first AND gate, the second AND gate, the third AND gate, and the fourth AND gate, and the forced line module does not receive all of the four types of information, the remaining reset signal terminals and the existing reset signal terminals together form a forced reset signal terminal for generating a forced reset signal and sending it to the input terminal of the control circuit; the remaining reset signal terminals are formed by the outputs corresponding to the information not received among the four types of information via unidirectional diodes, and the remaining reset signal terminals are also connected to the auxiliary power supply through the resistor R4; the existing reset signal terminals are the reset signal terminals corresponding to one or more of the first AND gate, the second AND gate, the third AND gate, and the fourth AND gate included in the forced line module.

[0055] For example, when the forced line module only includes the first AND gate (the existing reset signal terminal is the first reset signal terminal), the third output terminal and the comprehensive output terminal respectively form the first remaining reset signal terminal and the second remaining reset signal terminal through a diode, and the first remaining reset signal terminal and the second remaining reset signal terminal are also connected to the auxiliary power supply through the above-mentioned resistor R4. The first reset signal terminal, the first remaining reset signal terminal, and the second remaining reset signal terminal together form a forced reset signal terminal for generating a forced reset signal and sending it to the input terminal of the control circuit, so as to ensure that the control circuit can receive the forced reset signal when all four signals are at a high level.

[0056] The above-mentioned auxiliary power supply can be added separately for this reset circuit or can be the output voltage V1 of the main board terminal.

[0057] The control circuit can use an electronic switch. The input terminals of the electronic switch are respectively connected to the power-on signal terminal and the enable signal terminal, the output terminal of the electronic switch is grounded, and the control terminal of the electronic switch is connected to the output terminal of the detection circuit; when the detection circuit receives the forced reset signal and a low-level power-on signal, the electronic switch conducts, pulling down the power-on signal and the enable signal.

[0058] Two control circuits can be used. The input terminals of the electronic switches of the two control circuits are respectively connected to the power-on signal terminal and the enable signal terminal. A pull-down resistor is connected in series on the electronic switch of any one or both of the control circuits. Preferably, a pull-down resistor is connected in series on the enable signal terminal, that is, the power-on signal at the power-on signal terminal is directly pulled down to zero.

[0059] The electronic switch can be any one of a triode, a MOS transistor, a relay, an IGBT, a thyristor, and a diode current switch.

[0060] Since the forced reset signal is a high-level signal, when using a triode or a MOS, a triode or a MOS that conducts at a high level needs to be used. Of course, if a NOT gate is added after the forced reset signal, a triode or a MOS that conducts at a low level needs to be used.

[0061] For example, the forced reset signal is a high-level signal, the electronic switch is an NMOS transistor, and the control circuit has two paths. Please refer to Figure 5 As shown, the control circuit includes NMOS transistor Q1 and NMOS transistor Q2. The gates of NMOS transistor Q1 and NMOS transistor Q2 (as the control end of the electronic switch) are connected to the output end of the detection circuit, and if there is a forced line module, they are connected to the output end of the forced line module for receiving the forced reset signal. The sources of NMOS transistor Q1 and NMOS transistor Q2 (as the output end of the electronic switch) are grounded or grounded through a pull-down resistor. The drain of NMOS transistor Q1 (as the input end of the electronic switch) is connected to the power-on signal terminal; the drain of NMOS transistor Q2 is connected to the enable signal terminal through a pull-down resistor R5. It should be noted that the output end and the input end of the electronic switch can be swapped.

[0062] After receiving the high-level forced reset signal, NMOS transistor Q1 and NMOS transistor Q2 are turned on, pulling down the power-on signal and the enable signal, thereby disconnecting the voltage connection of the EC and forcing the EC to reset.

[0063] For a relay, its control end is the relay coil part. After the detection circuit receives the forced reset signal, the relay coil is excited, and its input end and output end are the two ends of the relay normally closed contact. For a diode current switch, its control end is the enable end of the diode current switch.

[0064] Embodiment 2:

[0065] Embodiment 2 discloses an electronic device, which can be a notebook computer, a tablet computer, or an industrial control device, etc. These electronic devices all have an EC; in addition to including the EC reset circuit based on the composite signal in the above embodiment, the electronic device further includes necessary components, such as a PCB board for installing each component of the EC reset circuit based on the composite signal and a housing for installing the PCB board, output interface, indicator light, display screen, etc. Of course, other components can also be included according to needs, such as a radiator, etc.

[0066] The above implementation manners are only the preferred implementation manners of the embodiments of the present invention, and cannot be used to limit the protection scope of the embodiments of the present invention. Any non-substantial changes and substitutions made by those skilled in the art based on the embodiments of the present invention belong to the protection scope required by the embodiments of the present invention.

Claims

1. An EC reset circuit based on a composite signal, used to forcibly reset the EC of a local device, characterized in that: It includes a detection circuit and a control circuit, wherein: The input end of the detection circuit is used to receive volume information and Pogo information of the local device, wherein the Pogo information is voltage information generated by the Pogo interface of the local device after voltage division by an external device; the detection circuit processes the volume information and Pogo information, and when the volume information and Pogo information both meet corresponding set values, the detection circuit generates a forced reset signal; The output end of the detection circuit is connected to the power-on signal end and the enable signal end of the power chip that supplies power to the EC through the control circuit, so that after the detection circuit generates a forced reset signal, the power-on signal at the power-on signal end and the enable signal at the enable signal end are pulled low through the control circuit to disconnect the power connection of the EC; The detection circuit includes a first input terminal, a second input terminal, and a third input terminal, wherein the first input terminal, the second input terminal, and the third input terminal are respectively connected to the volume + terminal of the local device, the volume - terminal of the local device, and the output terminal after voltage division processing of the external device, and are respectively used to receive volume + information, volume - information, and Pogo information; When the volume+ information, volume- information and Pogo information all meet corresponding set values, the detection circuit outputs a forced reset signal.

2. The EC reset circuit based on a composite signal as claimed in claim 1, wherein: The detection circuit also includes a first output end corresponding to the first input end, a second output end corresponding to the second input end, and a third output end corresponding to the third input end; when the volume+ information, volume- information, and Pogo information all meet corresponding set values, the first output end, the second output end, and the third output end all output a high level.

3. The EC reset circuit based on a composite signal as claimed in claim 2, wherein: The detection circuit also includes a diode D1 and a diode D2; the anodes of the diodes D1 and D2 are both connected to the auxiliary power supply via a resistor R1, and the cathodes of the diodes D1 and D2 are both connected to the auxiliary power supply via a resistor R1. A comprehensive output terminal is formed between the anodes of the diodes D1 and D2 and the resistor R1 for outputting comprehensive volume information; when both the first output terminal and the second output terminal output a high level, the comprehensive output terminal outputs a high level.

4. The EC reset circuit based on a composite signal as claimed in claim 3, wherein: A forced circuit module is also included between the detection circuit and the control circuit. The input end of the forced circuit module is used to receive four types of information and output a forced reset signal when the four types of information are all high levels. The four types of information are respectively the volume + information, volume - information, volume comprehensive information and Pogo information.

5. The EC reset circuit based on composite signal according to claim 4, characterized in that: The forced line module includes one or more of the following: a first AND gate, wherein two input terminals of the first AND gate are connected to the first output terminal and the second output terminal respectively, an output terminal of the first AND gate is connected to the cathode of a diode D3, and an anode of the diode D3 forms a first reset signal terminal; a second AND gate, wherein two input terminals of the second AND gate are respectively connected to the first output terminal and the integrated output terminal, an output terminal of the second AND gate is connected to the cathode of the diode D4, and the anode of the diode D4 forms a second reset signal terminal; a third AND gate, wherein two input terminals of the third AND gate are respectively connected to the second output terminal and the integrated output terminal, an output terminal of the third AND gate is connected to the cathode of the diode D5, and an anode of the diode D5 forms a third reset signal terminal; a fourth AND gate, wherein two input terminals of the fourth AND gate are respectively connected to the third output terminal and the integrated output terminal, the output terminal of the fourth AND gate is connected to the cathode of the diode D6, and the anode of the diode D5 forms a fourth reset signal terminal; The first reset signal terminal, the second reset signal terminal, the third reset signal terminal and the fourth reset signal terminal are all connected to the auxiliary power supply through the resistor R4; When the forced circuit module includes all of the first AND gate, the second AND gate, the third AND gate, and the fourth AND gate, the first reset signal terminal, the second reset signal terminal, the third reset signal terminal, and the fourth reset signal terminal together form a forced reset signal terminal, which is used to generate a forced reset signal and send it to the input terminal of the control circuit; When the forced circuit module does not include all of the first AND gate, the second AND gate, the third AND gate and the fourth AND gate, and the forced circuit module does not receive all of the four types of information, the remaining reset signal end and the existing reset signal end together form a forced reset signal end, which is used to generate a forced reset signal and send it to the input end of the control circuit; the remaining reset signal end is formed by a unidirectional diode as the output end corresponding to the four types of information that have not been received, and the remaining reset signal end is also connected to the auxiliary power supply through the resistor R4; the existing reset signal end is the reset signal end corresponding to one or more of the first AND gate, the second AND gate, the third AND gate and the fourth AND gate included in the forced circuit module.

6. The EC reset circuit based on a composite signal according to any one of claims 1 to 5, characterized in that: The control circuit is an electronic switch, the input end of the electronic switch is connected to the power-on signal end and the enable signal end respectively, the output end of the electronic switch is grounded, and the control end of the electronic switch is connected to the output end of the detection circuit; When the detection circuit receives the forced reset signal and the low-level power-on signal, the electronic switch is turned on, pulling down the power-on signal and the enable signal.

7. The EC reset circuit based on a composite signal as claimed in claim 6, wherein: The control circuit is two-way, and the input ends of the electronic switches of the two control circuits are respectively connected to the power-on signal end and the enable signal end, wherein the electronic switches of any one or both control circuits are further connected in series with a pull-down resistor; or / and; The electronic switch is any one of a triode, a MOS tube, a relay, an IGBT, a thyristor, and a diode current switch.

8. The EC reset circuit based on composite signal according to claim 6, characterized in that: The forced reset signal is at a high level, the electronic switch is an NMOS tube, the gate of the NMOS tube is connected to the output end of the detection circuit, the source of the NMOS tube is grounded or grounded through a pull-down resistor, and the drain of the NMOS tube is connected to the power-on signal end and the enable signal end.

9. An electronic device, characterized in that: It includes the EC reset circuit based on composite signals according to any one of claims 1 to 8.

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