Duplex communication circuit and device

Abstract

A duplex communication circuit and device, by adding a first driver, a second driver, a first receiver, a second receiver and a differential cable, realizes the simultaneous bidirectional transmission of serial data signals and control signals through a differential cable, solving the problem in traditional technical solutions that signals cannot be transmitted bidirectionally using a single cable.

Description

Technical Field

[0001] The present invention belongs to the field of communication technology, and in particular relates to a duplex communication circuit and device. Background Art

[0002] At present, conventional duplex communication circuits generally require two cables to simultaneously transmit signals in both directions, or utilize one cable to transmit signals non-simultaneously.

[0003] Therefore, the conventional technical solution has the problem that it is not possible to use one cable to simultaneously perform bidirectional signal transmission. Summary of the invention

[0004] In view of this, an embodiment of the present invention provides a duplex communication circuit and device, aiming to solve the problem existing in the traditional technical solution that a single cable cannot be used to simultaneously perform bidirectional transmission of signals.

[0005] A first aspect of an embodiment of the present invention provides a duplex communication circuit, including:

[0006] A first driver, the first driver is used to receive a serial data signal and convert the serial data signal into a first reference signal and a first differential signal;

[0007] A second driver, the second driver is used to receive the control signal and convert the control signal into a second differential signal and a second reference signal;

[0008] A differential cable, wherein a first end of the differential cable is connected to an output end of the first driver, a second end of the differential cable is connected to an output end of the second driver, and the differential cable is used to access the first differential signal and the second differential signal and transmit them into a superimposed signal through AC coupling;

[0009] a first receiver, wherein an input end of the first receiver is connected to the second end of the differential cable, the first receiver is used to receive the superimposed signal and the second reference signal, and under the action of the second reference signal, obtain the first differential signal from the superimposed signal and output it; and

[0010] A second receiver, wherein the input end of the second receiver is connected to the first end of the differential cable, the second receiver is used to receive the superimposed signal and the first reference signal, and under the action of the first reference signal, obtain the second differential signal from the superimposed signal and output it.

[0011] A second aspect of an embodiment of the present invention provides a duplex communication device, including:

[0012] The duplex communication circuit as described in the first aspect of the embodiment of the present invention;

[0013] a parallel-to-serial conversion circuit, wherein an output end of the parallel-to-serial conversion circuit is connected to an input end of a first driver of the duplex communication circuit, and the parallel-to-serial conversion circuit is used to access a parallel data signal and convert it into the serial data signal; and

[0014] A serial-to-parallel conversion circuit, wherein the input end of the serial-to-parallel conversion circuit is connected to the output end of the first receiver of the duplex communication circuit, and the serial-to-parallel conversion circuit is used to convert the first differential signal output by the first receiver into a parallel data signal and output it.

[0015] The above-mentioned duplex communication circuit and device, by adding a first driver, a second driver, a first receiver, a second receiver and a differential cable, realizes the simultaneous bidirectional transmission of serial data signals and control signals through a differential cable, thereby solving the problem in traditional technical solutions that it is impossible to simultaneously use a single cable to transmit signals in both directions. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0017] Figure 1 A circuit diagram of a duplex communication circuit provided by an embodiment of the present invention;

[0018] Figure 2 for Figure 1 An exemplary circuit schematic diagram of a first driver in a duplex communication circuit is shown;

[0019] Figure 3 for Figure 2 The specific circuit schematic diagram of the first driver in the duplex communication circuit shown;

[0020] Figure 4 for Figure 1 An exemplary circuit schematic diagram of a second driver in a duplex communication circuit is shown;

[0021] Figure 5 for Figure 4 The specific circuit schematic diagram of the second driver in the duplex communication circuit shown;

[0022] Figure 6 for Figure 1 An exemplary circuit schematic diagram of a first receiver in a duplex communication circuit is shown;

[0023] Figure 7 for Figure 6 A specific circuit schematic diagram of a first receiver in the duplex communication circuit shown;

[0024] Figure 8 for Figure 7 An exemplary circuit schematic diagram of a second receiver in a duplex communication circuit is shown;

[0025] Fig. 9 for Figure 8 The specific circuit schematic diagram of the adder unit in the second receiver is shown. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0027] See also Figure 1 , a circuit diagram of a duplex communication circuit provided by an embodiment of the present invention, for the sake of convenience of explanation, only the part related to the present embodiment is shown, which is described in detail as follows:

[0028] The duplex communication circuit in this embodiment includes: a first driver 100, a second driver 200, a differential cable 500, a first receiver 300 and a second receiver 400, wherein the first end of the differential cable 500 and the output end of the first driver 100 are connected to the input end of the second receiver 400, and the second end of the differential cable 500 and the input end of the second driver 200 are connected to the input end of the first receiver 300; the first driver 100 is used to access the serial data signal and convert the serial data signal into a first reference signal and a first differential signal; the second driver 200 is used to access the control signal and convert the control signal into a second reference signal and a second differential signal; the differential cable 500 is used to access the first differential signal and the second differential signal and AC-couple and transmit them as a superimposed signal; the first receiver 300 is used to receive the superimposed signal and the second reference signal, and under the action of the second reference signal, obtain the first differential signal from the superimposed signal and output it: the second receiver 400 is used to receive the superimposed signal and the first reference signal, and under the action of the first reference signal, obtain the second differential signal from the superimposed signal and output it.

[0029] It should be understood that the first driver 100 in the present embodiment converts the serial data signal into a first reference signal and a first differential signal by current mode logic, thereby improving the transmission rate of the serial data signal. Optionally, the first driver 100 can be composed of a CML (Current mode logic) driver. The second driver 200 in the present embodiment converts the serial data signal into a second reference signal and a second differential signal by current mode logic, thereby improving the transmission rate of the control signal. Optionally, the second driver 200 can be composed of a CML driver.

[0030] It should be understood that the communication frequencies of the serial data signal and the control signal in this embodiment are inconsistent. Optionally, the serial data signal can be a high-speed signal and the control signal can be a low-speed signal. The superimposed signal on the differential cable 500 is the superposition of the first differential signal and the second differential signal in the time domain. The serial data signal and the control signal are digital signals, while the first differential signal, the second differential signal, the superimposed signal, the first reference signal and the second reference signal are all analog signals.

[0031] It should be understood that the duplex communication circuit in this embodiment can be applied between parallel-to-serial conversion chips, that is, the first driver 100 and the second receiver 400 can be arranged between the parallel-to-serial conversion chip to serve as the transmitting end of the data signal and the receiving end of the control signal, and the second driver 200 and the first receiver 300 can be arranged between the serial-to-parallel conversion chip to serve as the receiving end of the data signal and the transmitting end of the control signal.

[0032] The duplex communication circuit in this embodiment realizes the simultaneous bidirectional transmission of serial data signals and control signals through a differential cable 500 by adding a first driver 100, a second driver 200, a first receiver 300, a second receiver 400 and a differential cable 500, thereby solving the problem in traditional technical solutions that it is impossible to simultaneously transmit signals in both directions using one cable.

[0033] See also Figure 2In one embodiment, the first driver 100 includes: a first driving unit 110, a second driving unit 120 and a third driving unit 130. The signal input end of the first driving unit 110 is used as the input end of the first driver 100 to access the serial data signal, the signal input end of the second driving unit 120 is connected to the signal output end of the first driving unit 110, the signal output end of the second driving unit 120 is connected to the second receiver 400, the signal input end of the third driving unit 130 is connected to the signal output end of the second driving unit 120, and the output end of the third driving unit 130 is connected to the differential cable 500; the first driving unit 110 is used to perform digital-to-analog conversion on the serial data signal and amplify it into a first analog signal, the second driving unit 120 is used to amplify the first analog signal and output it as a first reference signal, and the third driving unit 130 converts the first reference signal into a first differential signal that matches the impedance of the differential cable 500.

[0034] It should be understood that the first driving unit 110, the second driving unit 120 and the third driving unit 130 are used to progressively amplify the bias current of the serial data signal, thereby increasing the driving capability of the serial data signal, and by adjusting the internal parameters of the third driving unit 130, the output signal of the first driver 100 (i.e., the first differential signal) is matched with the impedance of the differential cable 500, thereby reducing signal reflection.

[0035] See also Figure 3 In one embodiment, the first driving unit 110 includes: a transistor MN1, a transistor MN2, a transistor MN7, a resistor R1, a resistor R2 and a resistor R7, the control end of the transistor MN1 is connected to the positive signal of the serial data signal, the control end of the transistor MN2 is connected to the negative signal of the serial data signal, the control end of the transistor MN7 is connected to the reference voltage, the high potential end of the transistor MN1 and the high potential end of the transistor MN2 are connected to the second end of the resistor R7 through the resistor R1 and the resistor R2 respectively, the first end of the resistor R7 is connected to the reference power supply, the low potential end of the transistor MN1 and the low potential end of the transistor MN2 are connected to the high potential end of the transistor MN7, and the low potential end of the transistor MN7 is grounded.

[0036] See also Figure 3In one embodiment, the second driving unit 120 includes: a transistor MN3, a transistor MN4, a transistor MN8, a resistor R3, a resistor R4 and a resistor R8, the control end of the transistor MN3 is connected to the negative signal of the first analog signal, the control end of the transistor MN4 is connected to the positive signal of the first analog signal, the control end of the transistor MN8 is connected to the reference voltage, the high potential end of the transistor MN3 and the high potential end of the transistor MN4 are connected to the second end of the resistor R8 through the resistor R3 and the resistor R4 respectively, the first end of the resistor R8 is connected to the reference power supply, the low potential end of the transistor MN3 and the low potential end of the transistor MN4 are connected to the high potential end of the transistor MN8, and the low potential end of the transistor MN8 is grounded.

[0037] See also Figure 3 In one embodiment, the third driving unit 130 includes: a transistor MN5, a transistor MN6, a transistor MN9, a resistor R5 and a second resistor, the control end of the transistor MN5 is connected to the positive signal of the first reference signal, the control end of the transistor MN6 is connected to the negative signal of the first reference signal, the high potential end of the transistor MN5 and the second end of the resistor R5 are connected together as the positive signal output end of the first differential signal, the high potential end of the transistor MN6 and the second end of the second resistor are connected together as the negative signal output end of the first differential signal, the first end of the resistor R5 and the second end of the second resistor are connected together to the reference power supply, the low potential end of the transistor MN5 and the low potential end of the transistor MN6 are connected together to the high potential end of the transistor MN9, the control end of the transistor MN9 is connected to the reference voltage, and the low potential end of the transistor MN9 is grounded.

[0038] It should be understood that, in the present embodiment, the signal swing of the first differential signal output by the third driving unit 130 is respectively equal to the bias current of the transistor MN5 multiplied by the resistance value of the resistor R5 and the bias current of the transistor MN6 multiplied by the resistance value of the second resistor, so that the signal swing of the first differential signal is proportional, thereby avoiding the influence of the reference power supply voltage, resistance value and temperature changes on the signal swing of the first differential signal.

[0039] It should be understood that the target signal swing can be obtained by adjusting the magnitudes of the bias currents of the transistors MN5 , MN6 , and MN9 .

[0040] See also Figure 4In one embodiment, the second driver 200 includes: a signal conditioning unit 210 and a signal conversion unit 220, the input end of the signal conditioning unit 210 is used as the input end of the second driver 200 to access the control signal, the output end of the signal conditioning unit 210 is connected to the first receiver 300, the input end of the signal conversion unit 220 is connected to the output end of the signal conditioning unit 210, and the output end of the signal conversion unit 220 is connected to the differential cable 500; the signal conditioning unit 210 is used to access the control signal, control the rise time and fall time of the control signal to output a second reference signal of a target waveform; the signal conversion unit 220 is used to convert the second reference signal into a second differential signal that matches the impedance of the differential cable 500.

[0041] It should be understood that the signal conditioning unit 210 can be composed of capacitors, resistors, transistors, etc., and can control the rise time and fall time of the control signal by controlling the charging and discharging of the capacitor, so that the control signal is converted into a second reference signal with a waveform that is a target waveform, wherein the target waveform can be a triangular wave, a sine wave, etc.

[0042] See also Figure 5 In one embodiment, the signal conditioning unit 210 includes a resistor R9, a resistor R10, a resistor R11, a resistor R12, a capacitor C1, a capacitor C2, a transistor MN10, a transistor MN11, and a transistor MN14. The control end of the transistor MN10 is connected to the positive signal of the control signal, the control end of the transistor MN10 is connected to the negative signal of the control signal, the control end of the transistor MN14 is connected to the reference voltage, the high potential end of the transistor MN10 is connected to the second end of the resistor R9 and the first end of the resistor R11, and the resistor R11 and the second end of the capacitor C1 are connected together as the signal conditioning unit 210. The output negative terminal is used to output the negative signal of the second reference signal, the high potential terminal of the transistor MN11 is connected to the second end of the resistor R10 and the first end of the resistor R12, the resistor R12 and the second end of the capacitor C2 are connected in common as the output positive terminal of the signal adjustment unit 210 to output the positive signal of the second reference signal, the second end of the resistor R9, the second end of the resistor R10, the second end of the capacitor C1 and the second end of the capacitor C2 are connected in common to the reference power supply, the low potential terminal of the transistor MN10 and the low potential terminal of the transistor MN11 are connected in common to the high potential terminal of the transistor MN14, and the low potential terminal of the transistor MN14 is grounded.

[0043] See also Figure 5In one embodiment, the signal conditioning unit 210 includes a resistor R13, a resistor R14, a transistor MN12, a transistor MN13 and a transistor MN15, the control end of the transistor MN12 is connected to the positive signal of the second reference signal, the control end of the transistor MN13 is connected to the negative signal of the second reference signal, the high potential end of the transistor MN12 is connected to the reference power supply through the resistor R13, the high potential end of the transistor MN13 is connected to the reference power supply through the resistor R14, the low potential end of the transistor MN12 and the low potential end of the transistor MN13 are connected to the high potential end of the transistor MN15, the control end of the transistor MN15 is connected to the reference voltage, and the low potential end of the transistor MN15 is grounded.

[0044] See also Figure 6 In one embodiment, the first receiver 300 includes: an inverting amplifier unit 310, a first high-pass filter unit 320 and a second high-pass filter unit 330, the input end of the inverting amplifier unit 310 is connected to the second driver 200, the input end of the first high-pass filter unit 320 is connected to the output end of the inverting amplifier unit 310, and the input end of the second high-pass filter unit 330 is connected to the differential cable 500; the inverting amplifier unit 310 is used to invert the second reference signal and convert the second reference signal into a first adjustment signal with the same amplitude and opposite phase as the first differential signal; the first high-pass filter unit 320 is used to perform high-pass filtering on the first adjustment signal; the input end of the second high-pass filter unit 330 is connected to the superimposed signal, the output end of the second high-pass filter unit 330 and the output end of the first high-pass filter unit 320 are connected together as the output end of the first receiver 300, and the second high-pass filter unit 330 is used to perform high-pass filtering on the superimposed signal; the output signal of the second high-pass filter unit 330 and the output signal of the first high-pass filter unit 320 are added as the second differential signal and output.

[0045] It should be understood that the structure and parameters of the inverting amplifier unit 310 in this embodiment can be completely consistent with the signal conversion unit 220 in the second driver 200, but the input is reversed, so that the first adjustment signal output by the inverting amplifier unit 310 and the first differential signal output by the signal conversion unit 220 are equal in amplitude and opposite in phase. The first high-pass filter unit 320 and the second high-pass filter unit 330 can be composed of capacitors.

[0046] See also Figure 7 In one embodiment, the first receiver 300 further includes an output filter unit, which is connected between the output end of the first receiver 300 and the ground, and is used to filter out clutter interference of the second differential signal output by the first receiver 300 .

[0047] It should be understood that the output filter circuit can be composed of resistors and capacitors in parallel.

[0048] See also Figure 7 The inverting amplifier unit 310 includes an operational amplifier OP3, a positive input terminal of the operational amplifier OP3 is connected to the negative signal of the second reference signal, and a negative input terminal of the operational amplifier OP3 is connected to the positive signal of the second reference signal.

[0049] See also Figure 8 In one embodiment, the second receiver 400 includes: a first amplifier unit 410, an adder unit 420 and a second amplifier unit 430, the input end of the first amplifier unit 410 is connected to the first driver 100, the output end of the first amplifier unit 410 is anti-connected to the first input end of the adder, the second input end of the adder is connected to the differential cable 500, the output end of the adder is connected to the input end of the second amplifier unit 430, and the output end of the second amplifier unit 430 serves as the output end of the second receiver 400; the first amplifier unit 410 is used to access the first reference signal output by the first driver 100, amplify the first reference signal so that the output signal amplitude is the same as the second adjustment signal of the first signal on the differential cable 500; the adder unit 420 adds the second adjustment signal and the superposition signal in anti-phase; the input end of the second amplifier unit 430 is connected to the output end of the adder unit 420, and the second amplifier unit 430 is used to amplify the second differential signal.

[0050] It should be understood that the second adjustment signal in this embodiment is substantially equal to the first differential signal. The first input terminal of the adder unit 420 in this embodiment is connected in reverse phase to the output terminal of the first amplifying unit 410, that is, the positive and negative terminals of the first input terminal of the adder unit 420 are reversely connected to the positive and negative terminals of the output terminal of the first amplifying unit 410, that is, the output positive terminal of the first amplifying unit 410 is connected to the first input negative terminal of the adder unit 420, and the output negative terminal of the first amplifying unit 410 is connected to the first input positive terminal of the adder unit 420, that is, the adder unit 420 is connected in reverse phase to the second adjustment signal, so that the adder unit 420 in this embodiment substantially realizes the subtraction function, that is, the signal at the output terminal of the adder unit 420 is equal to the superposition signal minus the second adjustment signal, thereby obtaining the second differential signal. It should be understood that in other embodiments, a subtractor can be used to replace the adder unit 420 in this embodiment. When a subtractor is used, the minuend terminal of the subtractor should be connected to the superposition signal in positive phase, and the subtrahend terminal of the subtractor should be connected to the second adjustment signal in positive phase.

[0051] It should be understood that in this embodiment, the second receiver 400 achieves acquisition of the second differential signal in the superimposed signal transmitted by the differential cable 500 by adding the first amplification unit 410, the adder unit 420 and the second amplification unit 430, thereby achieving simultaneous bidirectional transmission and separate reception of data signals and control signals on the same differential cable 500.

[0052] See also Fig. 9 In one embodiment, the adder unit 420 includes: a transistor MN16, a transistor MN17, a transistor MN18, a transistor MN19, a transistor MN20, a transistor MN21, a transistor MN22, a transistor MN23, a resistor R19, a resistor R20, a resistor R21 and a resistor R22, the control end of the transistor MN16 is connected to the positive signal of the superimposed signal, the control end of the transistor MN17 is connected to the negative signal of the superimposed signal, the control end of the transistor MN18 is connected to the positive signal of the second adjustment signal, the control end of the transistor MN19 is connected to the negative signal of the second adjustment signal, the high potential end of the transistor MN16, the high potential end of the transistor MN19 and the second end of the resistor R22 are connected in common, the high potential end of the transistor MN17, the high potential end of the transistor MN18 and the first end of the resistor R21 are connected in common, The two ends are connected in common, the low potential end of the transistor MN16, the first end of the resistor R19 and the high potential end of the transistor MN20 are connected in common, the low potential end of the transistor MN17, the second end of the resistor R19 and the high potential end of the transistor MN21 are connected in common, the low potential end of the transistor MN18, the first end of the resistor R20 and the high potential end of the transistor MN22 are connected in common, the low potential end of the transistor MN19, the second end of the resistor R20 and the high potential end of the transistor MN23 are connected in common, the control end of the transistor MN20, the control end of the transistor MN21, the control end of the transistor MN22 and the control end of the transistor MN23 are connected in common to the reference voltage, and the low potential end of the transistor MN20, the low potential end of the transistor MN21, the low potential end of the transistor MN22 and the low potential end of the transistor MN23 are connected in common to the ground.

[0053] It should be understood that the adder unit 420 in this embodiment, by adding the resistor R19 and the resistor R20, separates the source voltages of MN1 and MN2, thereby increasing the swing of the differential input signal.

[0054] See also Figure 8 In one embodiment, the second receiver 400 further includes: a differential hysteresis comparison unit 440, the input end of the differential hysteresis comparison unit 440 is connected to the output end of the second amplification unit 430, the output end of the differential hysteresis comparison unit 440 serves as the output end of the second receiver 400, and the differential hysteresis comparison unit 440 is used to filter out interference signals of the second differential signal.

[0055] It should be understood that the adder unit 420 may still have the first differential signal remaining. The second receiver 400 in this embodiment, by adding a differential hysteresis comparison unit 440, further implements filtering of the second differential signal output by the second amplification unit 430 to eliminate the influence of small fluctuations of the first differential signal.

[0056] The second aspect of the embodiments of the present invention provides a duplex communication device, comprising: a parallel-to-serial conversion circuit, a serial-to-parallel conversion circuit, and a duplex communication circuit as in the first aspect of the embodiments of the present invention; the output end of the parallel-to-serial conversion circuit is connected to the input end of the first driver 100 of the duplex communication circuit, and the input end of the serial-to-parallel conversion circuit is connected to the output end of the first receiver 300 of the duplex communication circuit; the serial conversion circuit is used to access parallel data signals and convert them into serial data signals; the serial-to-parallel conversion circuit is used to convert the first differential signal output by the first receiver 300 into a parallel data signal and output it.

[0057] Various embodiments are described herein for various devices, circuits, apparatuses, systems and / or methods. Many specific details are set forth to provide a thorough understanding of the overall structure, function, manufacture and use of the embodiments as described in the specification and shown in the drawings. However, those skilled in the art will appreciate that the embodiments may be implemented without such specific details. In other examples, well-known operations, parts and elements are described in detail so as not to make the embodiments in the specification difficult to understand. Those skilled in the art will appreciate that the embodiments herein and shown are non-limiting examples, and therefore it will be appreciated that the specific structural and functional details disclosed herein may be representative and do not necessarily limit the scope of the embodiments.

[0058] References to "various embodiments", "in an embodiment", "one embodiment", or "an embodiment" throughout the specification, etc., mean that a particular feature, structure, or characteristic described with respect to an embodiment is included in at least one embodiment. Therefore, the appearance of the phrases "in various embodiments", "in some embodiments", "in an embodiment", or "in an embodiment", etc., in appropriate places throughout the specification, do not necessarily refer to the same embodiment. In addition, particular features, structures, or characteristics may be combined in any appropriate manner in one or more embodiments. Therefore, a particular feature, structure, or characteristic shown or described with respect to one embodiment may be combined in whole or in part with features, structures, or characteristics of one or more other embodiments without assuming that such a combination is not an illogical or non-functional limitation. Any directional references (e.g., plus, minus, upper, lower, up, down, left, right, leftward, rightward, top, bottom, above, below, vertical, horizontal, clockwise, and counterclockwise) are used for identification purposes to help the reader understand the present disclosure, and do not create limitations, particularly with respect to the location, orientation, or use of the embodiments.

[0059] Although certain embodiments are described above with a certain degree of detail, those skilled in the art may make many changes to the disclosed embodiments without departing from the scope of the present disclosure. Connection references (e.g., attachment, coupling, connection, etc.) should be interpreted broadly and may include intermediate members between the connection of elements and relative motion between elements. Therefore, connection references do not necessarily imply that two elements are directly connected / coupled and are in a fixed relationship with each other. The use of "for example" throughout the specification should be interpreted broadly and used to provide non-limiting examples of embodiments of the present disclosure, and the present disclosure is not limited to such examples. It is intended that all matters included in the above description or shown in the accompanying drawings should be interpreted as merely illustrative rather than restrictive. Changes in details or structure may be made without departing from the present disclosure.

[0060] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A duplex communication circuit, characterized in that: include: A first driver, the first driver is used to receive a serial data signal and convert the serial data signal into a first reference signal and a first differential signal; A second driver, the second driver is used to receive the control signal and convert the control signal into a second differential signal and a second reference signal; a differential cable, wherein a first end of the differential cable is connected to an output end of the first driver, a second end of the differential cable is connected to an output end of the second driver, and the differential cable is used to access the first differential signal and the second differential signal and AC-couple the two to transmit them as a superimposed signal; a first receiver, wherein an input end of the first receiver is connected to the second end of the differential cable, the first receiver is used to receive the superimposed signal and the second reference signal, and under the action of the second reference signal, obtain the first differential signal from the superimposed signal and output it; as well as a second receiver, wherein an input end of the second receiver is connected to the first end of the differential cable, and the second receiver is used to receive the superimposed signal and the first reference signal, and under the action of the first reference signal, obtain the second differential signal from the superimposed signal and output it; The first driver comprises: a first driving unit, wherein a signal input terminal of the first driving unit is connected to the serial data signal, and the first driving unit is used to perform digital-to-analog conversion on the serial data signal and amplify the serial data signal into a first analog signal; a second driving unit, wherein a signal input end of the second driving unit is connected to a signal output end of the first driving unit, a signal output end of the second driving unit is connected to the second receiver, and the second driving unit is used to amplify the first analog signal and output it as the first reference signal; and a third driving unit, wherein a signal input end of the third driving unit is connected to a signal output end of the second driving unit, and the third driving unit converts the first reference signal into the first differential signal that matches the impedance of the differential cable; The second driver comprises: a signal conditioning unit, wherein an output end of the signal conditioning unit is connected to the first receiver, and the signal conditioning unit is used to access the control signal and control the rise time and fall time of the control signal to output a second reference signal of a target waveform; and a signal conversion unit, the signal conversion unit being connected to the output end of the signal adjustment unit, and the signal conversion unit being used to convert the second reference signal into the second differential signal that matches the impedance of the differential cable; The first receiver comprises: an inverting amplifier unit, the inverting amplifier unit being used to invert the second reference signal and convert the second reference signal into a first adjustment signal having an amplitude equal to that of the first differential signal and an opposite phase; a first high-pass filtering unit, wherein an input end of the first high-pass filtering unit is connected to an output end of the inverting amplifying unit, and the first high-pass filtering unit is used to perform high-pass filtering on the first adjustment signal; and a second high-pass filtering unit, wherein an input end of the second high-pass filtering unit is connected to the superimposed signal, an output end of the second high-pass filtering unit and an output end of the first high-pass filtering unit are connected together as an output end of the first receiver, and the second high-pass filtering unit is used to perform high-pass filtering on the superimposed signal; The output signal of the second high-pass filter unit and the output signal of the first high-pass filter unit are added together as the second differential signal and outputted; The second receiver comprises: a first amplifying unit, the first amplifying unit being used to access the first reference signal output by the first driver, and to amplify the first reference signal so as to output a second regulating signal having the same signal amplitude as the first signal on the differential cable; an adder unit, the adder unit being configured to add the second adjustment signal and the superimposed signal in an inverse phase and output the resultant signal as the second differential signal; and A second amplifying unit, wherein an input end of the second amplifying unit is connected to an output end of the adder unit, and the second amplifying unit is used to amplify the second differential signal.

2. The duplex communication circuit according to claim 1, wherein: The third driving unit includes: a first transistor, a second transistor, a third transistor, a first resistor and a second resistor, the control end of the first transistor is connected to the positive signal of the first reference signal, the control end of the second transistor is connected to the negative signal of the first reference signal, the high potential end of the first transistor and the second end of the first resistor are connected together as the positive signal output end of the first differential signal, the high potential end of the second transistor and the second end of the second resistor are connected together as the negative signal output end of the first differential signal, the first end of the first resistor and the second end of the second resistor are connected together to a reference power supply, the low potential end of the first transistor and the low potential end of the second transistor are connected together to the high potential end of the third transistor, the control end of the third transistor is connected to the reference voltage, and the low potential end of the third transistor is grounded.

3. The duplex communication circuit according to claim 1, wherein: The first receiver further includes an output filter unit, which is connected between the output end of the first receiver and the ground, and is used to filter out clutter interference of the second differential signal output by the first receiver.

4. The duplex communication circuit according to claim 1, wherein: The adder unit includes: a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor, the control end of the fourth transistor is connected to the positive signal of the superimposed signal, the control end of the fifth transistor is connected to the negative signal of the superimposed signal, the control end of the sixth transistor is connected to the positive signal of the second adjustment signal, the control end of the seventh transistor is connected to the negative signal of the second adjustment signal, the high potential end of the fourth transistor, the high potential end of the seventh transistor and the second end of the sixth resistor are connected in common, the high potential end of the fifth transistor, the high potential end of the sixth transistor and the second end of the fifth resistor are connected in common, and the The low potential end, the first end of the third resistor and the high potential end of the eighth transistor are connected in common, the low potential end of the fifth transistor, the second end of the third resistor and the high potential end of the ninth transistor are connected in common, the low potential end of the sixth transistor, the first end of the fourth resistor and the high potential end of the tenth transistor are connected in common, the low potential end of the seventh transistor, the second end of the fourth resistor and the high potential end of the eleventh transistor are connected in common, the control end of the eighth transistor, the control end of the ninth transistor, the control end of the tenth transistor and the control end of the eleventh transistor are connected in common to a reference voltage, and the low potential end of the eighth transistor, the low potential end of the ninth transistor, the low potential end of the tenth transistor and the low potential end of the eleventh transistor are connected in common to ground.

5. The duplex communication circuit according to claim 1, wherein: The second receiver also includes: a differential hysteresis comparison unit, the input end of the differential hysteresis comparison unit is connected to the output end of the second amplification unit, the output end of the differential hysteresis comparison unit serves as the output end of the second receiver, and the differential hysteresis comparison unit is used to filter out interference signals of the second differential signal.

6. A duplex communication device, characterized in that: include: The duplex communication circuit according to any one of claims 1 to 5; a parallel-to-serial conversion circuit, wherein an output end of the parallel-to-serial conversion circuit is connected to an input end of a first driver of the duplex communication circuit, and the parallel-to-serial conversion circuit is used to access a parallel data signal and convert it into the serial data signal; and A serial-to-parallel conversion circuit, wherein the input end of the serial-to-parallel conversion circuit is connected to the output end of the first receiver of the duplex communication circuit, and the serial-to-parallel conversion circuit is used to convert the first differential signal output by the first receiver into a parallel data signal and output it.

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