Heat treatment method and heat treatment apparatus
By counting and warning the loss value of the dummy wafer in the heat treatment device, the deterioration problem caused by repeated heating of the dummy wafer is solved, ensuring the quality and processing safety of the semiconductor wafer.
Patent Information
- Application Number
- CN201910764284.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-09-20
- Filing Date
- 2019-08-19
- Publication Date
- 2024-12-24
- Estimated Expiration
- 2039-08-19
AI Technical Summary
During the heat treatment process of semiconductor wafers, the dummy wafer is deteriorated due to repeated heat treatment, which can easily lead to wafer rupture or warping, and the existing management methods cannot effectively grasp the deterioration state, resulting in incorrect processing.
The loss value of the dummy wafer is counted by using the counting step, and a warning is issued when the specified threshold is reached to prevent excessive deterioration and mishandling, and the management of the dummy wafer is realized through the counting unit and the transmitting unit in the heat treatment device.
Effectively manage the deterioration state of the dummy wafer, prevent misprocessing, and ensure the normal operation of the heat treatment device and the quality of the semiconductor wafer.
Smart Images

Figure CN110931357B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a heat treatment method and a heat treatment device for managing dummy wafers. Background Art
[0002] In the process of manufacturing semiconductor devices, flash lamp annealing (FLA), which heats semiconductor wafers in a very short time, has attracted much attention. Flash lamp annealing is a heat treatment technology that heats only the front side of the semiconductor wafer in a very short time (less than a few milliseconds) by irradiating the front side of the semiconductor wafer with a xenon flash lamp (hereinafter referred to as "flash lamp").
[0003] The radiation spectrum distribution of the xenon flash lamp is from the ultraviolet region to the near infrared region, and the wavelength is shorter than that of the conventional halogen lamp, which is roughly consistent with the basic absorption band of the silicon semiconductor wafer. Therefore, when the semiconductor wafer is irradiated with a flash from the xenon flash lamp, less light is transmitted, so that the temperature of the semiconductor wafer can be rapidly increased. In addition, it has been found that if the flash irradiation is extremely short, less than a few milliseconds, it is possible to selectively increase the temperature of only the front surface of the semiconductor wafer.
[0004] This flash lamp annealing is applied to processes that require heating in a very short time, such as activation of impurities implanted in semiconductor wafers. If a flash lamp is irradiated on the front side of a semiconductor wafer into which impurities have been implanted by ion implantation, the front side of the semiconductor wafer can be heated to the activation temperature in a very short time, and only activation of the impurities can be performed without deep diffusion of the impurities.
[0005] Typically, semiconductor wafer processing (not limited to heat treatment) is performed in batches (a group of semiconductor wafers that are processed with the same content under the same conditions). In a single-wafer substrate processing device, multiple semiconductor wafers constituting a batch are processed continuously in sequence. In a flash lamp annealing device, multiple semiconductor wafers constituting a batch are also moved into a chamber one by one and heat treated in sequence.
[0006] However, during the process of sequentially processing a plurality of semiconductor wafers constituting a batch, the temperature of the chamber structures such as the susceptor holding the semiconductor wafers may change. This phenomenon occurs when the process is restarted in a flash lamp annealing device that was temporarily stopped, or when the process conditions such as the process temperature of the semiconductor wafer are changed. If the temperature of the chamber structures such as the susceptor changes during the process of processing a plurality of semiconductor wafers constituting a batch, the following problem may occur: the temperature records during the processing are different for the semiconductor wafers at the beginning of the batch and the semiconductor wafers at the end of the batch.
[0007] In order to solve this problem, before starting a batch of processing, a dummy wafer that is not the processing target is moved into the chamber and supported by a susceptor, and then flash heating treatment is performed under the same conditions as the batch of processing targets, thereby raising the temperature of the susceptor and other chamber structures in advance (dummy operation). Patent document 1 discloses the following content: flash heating treatment is performed on about 10 dummy wafers to make the temperature of the susceptor and other chamber structures reach a stable temperature during processing.
[0008] [Background Technology Literature]
[0009] [Patent Document]
[0010] [Patent Document 1] Japanese Patent Application Publication No. 2017-092102 Summary of the invention
[0011] [Problems to be solved by the invention]
[0012] Dummy wafers that are not to be processed will be used for multiple virtual runs and repeatedly subjected to heat treatment. As a result, the dummy wafers degrade, which makes it easy for the wafers to crack or warp. If cracks or warps occur during virtual operation, it will lead to contamination in the chamber or transport failure. Therefore, it is necessary to accurately grasp the degradation state of the dummy wafers and replace the excessively degraded dummy wafers at the appropriate time. However, in the past, the processing records of dummy wafers were managed by operators observing with the naked eye or writing on paper, so there was a problem that the degradation state could not be fully grasped, and overly degraded dummy wafers were mistakenly transported for heat treatment.
[0013] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a heat treatment method and a heat treatment apparatus capable of preventing erroneous treatment of excessively degraded dummy wafers.
[0014] [Technical means to solve the problem]
[0015] In order to solve the above-mentioned problem, the invention of Technical Solution 1 is a heat treatment method, characterized in that it manages dummy wafers and includes: a counting step for counting the loss value of the dummy wafer caused by the heat treatment; and a reporting step for issuing a warning when the loss value of the dummy wafer is above a specified threshold.
[0016] In addition, the invention of claim 2 is a heat treatment method according to the invention of claim 1, characterized in that the counting step and the reporting step are performed when the dummy wafer is being processed in the heat treatment apparatus.
[0017] In addition, the invention of technical solution 3 is a heat treatment method according to the invention of technical solution 1, characterized in that the reporting step is executed when an instruction to start transporting the dummy wafer whose loss value reaches the threshold is received in the heat treatment device.
[0018] In addition, the invention of technical solution 4 is a heat treatment method according to the invention of technical solution 3, characterized in that when the transfer start instruction is received, the transfer of the dummy wafer is also prohibited.
[0019] In addition, the invention of technical solution 5 is a heat treatment method according to any one of the inventions of technical solutions 1 to 4, characterized in that the loss value is the number of preheating performed by continuously lighting the lamp or the number of flash heating performed by the flash lamp.
[0020] In addition, the invention of technical solution 6 is a heat treatment device, characterized in that it manages dummy wafers and includes: a heat treatment unit, which performs heat treatment on dummy wafers; a conveying unit, which conveys the dummy wafers to the heat treatment unit; a counting unit, which counts the loss value of the dummy wafer caused by the heat treatment; and a reporting unit, which issues a warning when the loss value of the dummy wafer is above a specified threshold.
[0021] In addition, the invention of Technical Solution 7 is a heat treatment device according to the invention of Technical Solution 6, characterized in that when the dummy wafer is being heat treated in the heat treatment section, the counting section counts the loss value of the dummy wafer; and when the loss value reaches the threshold value, the alarm section issues a warning.
[0022] In addition, the invention according to claim 8 is a heat treatment device according to the invention according to claim 6, characterized in that:
[0023] The notification unit issues a warning when receiving an instruction to start transporting the dummy wafer whose loss value reaches the threshold value.
[0024] In addition, the invention according to claim 9 is a heat treatment apparatus according to the invention according to claim 8 , characterized in that when the transfer start instruction is received, the transfer unit is prohibited from transferring the dummy wafer.
[0025] In addition, the invention of technical solution 10 is a heat treatment device according to any one of the inventions of technical solution 6 to technical solution 9, characterized in that the heat treatment part has a continuously lighting lamp and a flash lamp, and the loss value is the number of pre-heating performed by the continuously lighting lamp, or the number of flash heating performed by the flash lamp.
[0026] [Effects of the Invention]
[0027] According to the invention of claims 1 to 5 , when the loss value of the dummy wafer is greater than a specified threshold, a warning is issued, so that the degradation of the dummy wafer can be properly managed, thereby preventing erroneous processing of excessively degraded dummy wafers.
[0028] In particular, according to the invention of claim 4, the transfer of dummy wafers whose loss values have reached a threshold value is prohibited, thereby more reliably preventing erroneous processing of excessively degraded dummy wafers.
[0029] According to the invention of technical solutions 6 to 10, when the loss value of the dummy wafer is above a specified threshold, a warning is issued, so that the degradation of the dummy wafer can be properly managed, thereby preventing the erroneous processing of the excessively degraded dummy wafer.
[0030] In particular, according to the invention of claim 9, the transfer of dummy wafers whose loss values have reached a threshold value is prohibited, thereby more reliably preventing erroneous processing of excessively degraded dummy wafers. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] Figure 1 It is a top view showing the heat treatment apparatus of the present invention.
[0032] Figure 2 yes Figure 1 Front view of the heat treatment device.
[0033] Figure 3 It is a longitudinal sectional view showing the structure of the heat treatment part.
[0034] Figure 4 It is a perspective view showing the overall appearance of the holding portion.
[0035] Figure 5 This is a top view of the base.
[0036] Figure 6 is a cross-sectional view of the base.
[0037] Figure 7 It is a top view of the transfer mechanism.
[0038] Figure 8 It is a side view of the transfer mechanism.
[0039] Fig. 9 It is a top view showing the arrangement of a plurality of halogen lamps.
[0040] Fig.10 It is a block diagram showing the configuration of a control unit.
[0041] Fig.11 This is a flowchart showing the management procedure of the dummy wafer according to the first embodiment.
[0042] Fig.12This is a flowchart showing the management procedure of the dummy wafer according to the second embodiment. DETAILED DESCRIPTION
[0043] Below, refer to the attached Figure 1 Embodiments of the present invention will be described in detail.
[0044] <First embodiment>
[0045] First, the heat treatment apparatus of the present invention will be described. Figure 1 is a top view showing a heat treatment apparatus 100 of the present invention, Figure 2 is a front view thereof. The heat treatment apparatus 100 is a flash lamp annealing apparatus that irradiates a circular plate-shaped semiconductor wafer W as a substrate with a flash to heat the semiconductor wafer W. The size of the semiconductor wafer W to be processed is not particularly limited, and is, for example, φ300 mm or φ450 mm. Impurities have been injected into the semiconductor wafer W before being transported into the heat treatment apparatus 100, and the injected impurities are activated by the heat treatment performed by the heat treatment apparatus 100. In addition, Figure 1 In the following figures, the size or quantity of each part is exaggerated or simplified as needed for easy understanding. Figure 1 to Figure 3 In order to clarify the directional relationship between them, an XYZ orthogonal coordinate system is indicated in each figure, in which the Z-axis direction is the vertical direction and the XY plane is the horizontal plane.
[0046] like Figure 1 and Figure 2 As shown, the heat treatment apparatus 100 includes: a loading unit 101 for carrying unprocessed semiconductor wafers W from outside into the apparatus and carrying processed semiconductor wafers W out of the apparatus; an alignment unit 230 for positioning unprocessed semiconductor wafers W; two cooling units 130 and 140 for cooling the semiconductor wafers W after heat treatment; a heat treatment unit 160 for performing flash heat treatment on the semiconductor wafers W; and a transfer robot 150 for transferring the semiconductor wafers W to and from the cooling units 130 and 140 and the heat treatment unit 160. In addition, the heat treatment apparatus 100 includes a control unit 3 for controlling the motion mechanisms provided in the above-mentioned processing units and the transfer robot 150 so that they promote the flash heat treatment of the semiconductor wafers W.
[0047] The loading unit 101 includes a loading port 110 for placing a plurality of carriers C (two in the present embodiment) in parallel, and a transfer robot 120 for taking out unprocessed semiconductor wafers W from each carrier C and storing processed semiconductor wafers W in each carrier C. The carrier C containing unprocessed semiconductor wafers W is transported and placed on the loading port 110 by an unmanned transport vehicle (AGV, OHT) or the like, and the carrier C containing processed semiconductor wafers W is taken away from the loading port 110 by the unmanned transport vehicle.
[0048] In addition, in the load port 110, the carrier C can be configured as Figure 2 The carrier C is lifted and lowered as shown by the arrow CU, so that the transfer robot 120 can take and place any semiconductor wafer W relative to the carrier C. In addition, as a form of the carrier C, in addition to a FOUP (front opening unified pod) that stores semiconductor wafers W in a closed space, it can also be a SMIF (Standard Mechanical Interface Face) box, or an OC (open cassette) that exposes the stored semiconductor wafers W to the external atmosphere.
[0049] In addition, the transfer robot 120 can perform the following operations: Figure 1 The handover robot 120 performs the sliding movement shown by the arrow 120S, and the rotation and lifting movements shown by the arrow 120R. Thus, the delivery robot 120 takes and places the semiconductor wafer W relative to the two carriers C, and delivers the semiconductor wafer W to the alignment unit 230 and the two cooling units 130, 140. The taking and placing of the semiconductor wafer W relative to the carrier C by the delivery robot 120 is performed by the sliding movement of the hand 121, and the lifting and lowering movement of the carrier C. In addition, the delivery robot 120 delivers the semiconductor wafer W to the alignment unit 230 or the cooling unit 130, 140 by the sliding movement of the hand 121, and the lifting and lowering movement of the delivery robot 120.
[0050] The alignment unit 230 is connected to the side of the loading unit 101 along the Y-axis direction. The alignment unit 230 is a processing unit that rotates the semiconductor wafer W in a horizontal plane to face a direction suitable for flash heating. The alignment unit 230 is arranged inside an alignment chamber 231 which is an aluminum alloy shell, and is composed of the following components: a mechanism for supporting the semiconductor wafer W in a horizontal posture and rotating it; and a mechanism for optically detecting the grooves or orientation plates formed on the peripheral edge of the semiconductor wafer W.
[0051] The delivery of the semiconductor wafer W to the alignment unit 230 is performed by the delivery robot 120. The semiconductor wafer W is delivered from the delivery robot 120 to the alignment chamber 231 in a manner such that the center of the wafer is located at a specified position. In the alignment unit 230, the semiconductor wafer W is rotated around a vertical axis with the center of the semiconductor wafer W received from the loading unit 101 as the rotation center, and the direction of the semiconductor wafer W is adjusted by optical detection grooves, etc. The semiconductor wafer W after the direction adjustment is completed is taken out from the alignment chamber 231 by the delivery robot 120.
[0052] As a transfer space for the transfer robot 150 to transfer the semiconductor wafer W, a transfer chamber 170 is provided to accommodate the transfer robot 150. The transfer chamber 170 is connected in three directions to the processing chamber 6 of the heat treatment unit 160, the first cooling chamber 131 of the cooling unit 130, and the second cooling chamber 141 of the cooling unit 140.
[0053] The heat treatment unit 160, which is the main part of the heat treatment apparatus 100, is a substrate processing unit that performs flash heating by irradiating flash light from a xenon flash lamp FL onto the preheated semiconductor wafer W. The structure of the heat treatment unit 160 will be described in detail below.
[0054] The two cooling units 130 and 140 have substantially the same structure. The cooling units 130 and 140 are provided with a metal cooling plate and a quartz plate (omitted in the figure) placed on the upper surface thereof in the first cooling chamber 131 and the second cooling chamber 141, which are respectively aluminum alloy shells. The cooling plate is adjusted to room temperature (about 23° C.) by a Peltier element or constant temperature water circulation. The semiconductor wafer W that has been subjected to flash heating treatment in the heat treatment unit 160 is moved into the first cooling chamber 131 or the second cooling chamber 141 and placed on the quartz plate for cooling.
[0055] The first cooling chamber 131 and the second cooling chamber 141 are both located between the loading part 101 and the transfer chamber 170, and are connected to both. Two openings for carrying in and out the semiconductor wafer W are formed in the first cooling chamber 131 and the second cooling chamber 141. Of the two openings of the first cooling chamber 131, the opening connected to the loading part 101 can be opened and closed by a gate valve 181. On the other hand, the opening of the first cooling chamber 131 connected to the transfer chamber 170 can be opened and closed by a gate valve 183. In other words, the first cooling chamber 131 is connected to the loading part 101 via the gate valve 181, and the first cooling chamber 131 is connected to the transfer chamber 170 via the gate valve 183.
[0056] When the semiconductor wafer W is transferred between the loader 101 and the first cooling chamber 131, the gate valve 181 is opened. When the semiconductor wafer W is transferred between the first cooling chamber 131 and the transfer chamber 170, the gate valve 183 is opened. When the gate valves 181 and 183 are closed, the interior of the first cooling chamber 131 becomes a closed space.
[0057] In addition, of the two openings of the second cooling chamber 141, the opening connected to the loading unit 101 can be opened and closed by the gate valve 182. On the other hand, the opening of the second cooling chamber 141 connected to the transfer chamber 170 can be opened and closed by the gate valve 184. That is, the second cooling chamber 141 and the loading unit 101 are connected via the gate valve 182, and the second cooling chamber 141 and the transfer chamber 170 are connected via the gate valve 184.
[0058] When the semiconductor wafer W is transferred between the loader 101 and the second cooling chamber 141, the gate valve 182 is opened. When the semiconductor wafer W is transferred between the second cooling chamber 141 and the transfer chamber 170, the gate valve 184 is opened. When the gate valves 182 and 184 are closed, the interior of the second cooling chamber 141 becomes a closed space.
[0059] Furthermore, the cooling units 130 and 140 are respectively provided with a gas supply mechanism for supplying clean nitrogen gas to the first cooling chamber 131 and the second cooling chamber 141, and an exhaust mechanism for exhausting the atmosphere in the chamber. These gas supply mechanisms and exhaust mechanisms can also switch the flow rates in two stages.
[0060] The transport robot 150 disposed in the transport chamber 170 can rotate as indicated by arrow 150R with the axis along the vertical direction as the center. The transport robot 150 has two link mechanisms composed of a plurality of arm segments, and transport hands 151a and 151b for holding the semiconductor wafer W are respectively disposed at the front ends of the two link mechanisms. These transport hands 151a and 151b are arranged at a specified interval up and down, and can slide linearly and independently in the same horizontal direction through the link mechanisms. In addition, the transport robot 150 lifts and lowers the base on which the two link mechanisms are disposed, so that the two transport hands 151a and 151b are lifted and lowered in a state of being separated by a specified interval.
[0061] When the transfer robot 150 transfers (takes and places) the semiconductor wafer W with the first cooling chamber 131, the second cooling chamber 141, or the processing chamber 6 of the heat treatment unit 160 as the transfer partner, first, the two transfer hands 151a and 151b rotate to face the transfer partner, and then (or during the rotation) move up and down, and any one of the transfer hands is located at a height to transfer the semiconductor wafer W to the transfer partner. Then, the transfer hand 151a (151b) slides linearly in the horizontal direction to transfer the semiconductor wafer W to the transfer partner.
[0062] The semiconductor wafer W can be transferred between the transfer robot 150 and the delivery robot 120 via the cooling units 130 and 140. That is, the first cooling chamber 131 of the cooling unit 130 and the second cooling chamber 141 of the cooling unit 140 also function as a path for transferring the semiconductor wafer W between the transfer robot 150 and the delivery robot 120. Specifically, the semiconductor wafer W is transferred by receiving the semiconductor wafer W transferred by the other party to the first cooling chamber 131 or the second cooling chamber 141 by one of the transfer robot 150 and the delivery robot 120. The transfer robot 150 and the delivery robot 120 constitute a transfer mechanism for transferring the semiconductor wafer W from the carrier C to the heat treatment unit 160.
[0063] As described above, gate valves 181 and 182 are provided between the first cooling chamber 131 and the second cooling chamber 141 and the loading section 101, respectively. In addition, gate valves 183 and 184 are provided between the transfer chamber 170 and the first cooling chamber 131 and the second cooling chamber 141, respectively. Furthermore, a gate valve 185 is provided between the transfer chamber 170 and the processing chamber 6 of the thermal treatment section 160. When the semiconductor wafer W is transferred in the thermal treatment apparatus 100, these gate valves are opened and closed as appropriate. In addition, nitrogen gas is also supplied from the gas supply section to the transfer chamber 170 and the alignment chamber 231, and the atmosphere therein is exhausted through the exhaust section (all omitted in the figure).
[0064] Next, the configuration of the heat treatment unit 160 will be described. Figure 3 1 is a longitudinal cross-sectional view showing the structure of the heat treatment section 160. The heat treatment section 160 includes: a processing chamber 6 for accommodating a semiconductor wafer W for heat treatment; a flash lamp cabin 5 for housing a plurality of flash lamps FL; and a halogen lamp cabin 4 for housing a plurality of halogen lamps HL. The flash lamp cabin 5 is provided on the upper side of the processing chamber 6, and the halogen lamp cabin 4 is provided on the lower side. In addition, the heat treatment section 160 includes a holding section 7 for holding the semiconductor wafer W in a horizontal position inside the processing chamber 6, and a transfer mechanism 10 for transferring the semiconductor wafer W between the holding section 7 and the transfer robot 150.
[0065] The processing chamber 6 is formed by installing quartz chamber windows on the upper and lower parts of a cylindrical chamber side portion 61. The chamber side portion 61 has a roughly cylindrical shape with upper and lower openings, and the upper opening is blocked by installing an upper chamber window 63, and the lower opening is blocked by installing a lower chamber window 64. The upper chamber window 63 constituting the top wall of the processing chamber 6 is a disk-shaped component formed of quartz, and functions as a quartz window that allows the flash emitted from the flash lamp FL to be transmitted into the processing chamber 6. In addition, the lower chamber window 64 constituting the bottom plate of the processing chamber 6 is also a disk-shaped component formed of quartz, and functions as a quartz window that allows the light from the halogen lamp HL to be transmitted into the processing chamber 6.
[0066] In addition, a reflection ring 68 is installed on the upper part of the inner wall surface of the chamber side portion 61, and a reflection ring 69 is installed on the lower part. The reflection rings 68 and 69 are both formed in a circular ring shape. The upper reflection ring 68 is installed by embedding from the upper side of the chamber side portion 61. On the other hand, the lower reflection ring 69 is installed by embedding from the lower side of the chamber side portion 61 and fixing it with screws omitted in the figure. In other words, the reflection rings 68 and 69 are both installed on the chamber side portion 61 so as to be freely loaded and unloaded. The inner space of the processing chamber 6, that is, the space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61 and the reflection rings 68 and 69 is defined as a heat treatment space 65.
[0067] By installing the reflection rings 68 and 69 on the chamber side portion 61, a recessed portion 62 is formed on the inner wall surface of the processing chamber 6. That is, the recessed portion 62 is formed to be surrounded by the central portion of the inner wall surface of the chamber side portion 61 where the reflection rings 68 and 69 are not installed, the lower end surface of the reflection ring 68, and the upper end surface of the reflection ring 69. The recessed portion 62 is formed in a circular ring shape along the horizontal direction on the inner wall surface of the processing chamber 6, and surrounds the holding portion 7 holding the semiconductor wafer W. The chamber side portion 61 and the reflection rings 68 and 69 are formed of a metal material (for example, stainless steel) having excellent strength and heat resistance.
[0068] In addition, a transport opening (furnace port) 66 for carrying in and out the semiconductor wafer W from the processing chamber 6 is formed on the chamber side portion 61. The transport opening 66 can be opened and closed by the gate valve 185. The transport opening 66 is connected to the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transport opening 66, the semiconductor wafer W can be carried in and out of the heat treatment space 65 from the transport opening 66 through the recess 62. In addition, if the gate valve 185 closes the transport opening 66, the heat treatment space 65 in the processing chamber 6 becomes a closed space.
[0069] In addition, a gas supply hole 81 is formed at the upper portion of the inner wall of the processing chamber 6 for supplying a processing gas to the heat treatment space 65. The gas supply hole 81 is formed and arranged at a position higher than the recess 62, and may also be arranged at the reflection ring 68. The gas supply hole 81 is connected to a gas supply pipe 83 via a buffer space 82 formed in a circular ring shape inside the side wall of the processing chamber 6. The gas supply pipe 83 is connected to a processing gas supply source 85. In addition, a valve 84 is inserted in the middle of the path of the gas supply pipe 83. If the valve 84 is opened, the processing gas is transported from the processing gas supply source 85 to the buffer space 82. The processing gas flowing into the buffer space 82 flows in a diffused manner in the buffer space 82 where the fluid resistance is smaller than that of the gas supply hole 81, and is supplied from the gas supply hole 81 to the heat treatment space 65. Nitrogen (N 2 ) or other inert gases, or hydrogen (H 2 ), ammonia (NH 3 ) and other reactive gases (in this embodiment, nitrogen).
[0070] On the other hand, a gas discharge hole 86 for discharging the gas in the heat treatment space 65 is formed at the lower part of the inner wall of the processing chamber 6. The gas discharge hole 86 is formed and arranged at a lower position than the recess 62, and can also be arranged at the reflection ring 69. The gas discharge hole 86 is connected to the gas discharge pipe 88 through the buffer space 87 formed in an annular shape inside the side wall of the processing chamber 6. The gas discharge pipe 88 is connected to the exhaust mechanism 190. In addition, a valve 89 is inserted in the middle of the path of the gas discharge pipe 88. If the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas discharge hole 86 to the gas discharge pipe 88 through the buffer space 87. In addition, the gas supply hole 81 and the gas discharge hole 86 can be arranged in a plurality along the circumferential direction of the processing chamber 6, or in a slit shape. In addition, the processing gas supply source 85 and the exhaust mechanism 190 can be a mechanism arranged in the heat treatment device 100, or a common entity of the factory where the heat treatment device 100 is arranged.
[0071] In addition, a gas exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is also connected to the front end of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust mechanism 190 via a valve 192. When the valve 192 is opened, the gas in the processing chamber 6 is exhausted through the transfer opening 66.
[0072] Figure 4 : is a perspective view showing the overall appearance of the holding part 7. The holding part 7 is composed of a base ring 71, a connecting part 72 and a base 74. The base ring 71, the connecting part 72 and the base 74 are all formed of quartz. In other words, the holding part 7 is formed of quartz as a whole.
[0073] The base ring 71 is a quartz component with an arc shape in which a portion of the circular ring is missing. The missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 described below and the base ring 71. The base ring 71 is placed on the bottom surface of the recess 62 and is thereby supported by the wall surface of the processing chamber 6 (see Figure 3 ). On the upper surface of the base ring 71, a plurality of connection parts 72 (four in this embodiment) are vertically provided along the circumferential direction of the annular shape. The connection part 72 is also a quartz component, and is fixed to the base ring 71 by welding.
[0074] The base 74 is supported by four connecting parts 72 provided on the base ring 71 . Figure 5 74 is a top view of the base. Figure 6 74. The susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular flat plate-shaped member formed of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. In other words, the holding plate 75 has a larger plane size than the semiconductor wafer W.
[0075] A guide ring 76 is provided on the peripheral portion of the upper surface of the retaining plate 75. The guide ring 76 is a ring-shaped component having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is φ300 mm, the inner diameter of the guide ring 76 is φ320 mm. The inner periphery of the guide ring 76 is formed as an inclined surface that expands upward from the retaining plate 75. The guide ring 76 is formed of quartz, the same as the retaining plate 75. The guide ring 76 can be fused to the upper surface of the retaining plate 75, or it can be fixed to the retaining plate 75 by a pin or the like obtained by separate processing. Alternatively, the retaining plate 75 and the guide ring 76 can be processed into an integral component.
[0076] The area on the upper surface of the holding plate 75 that is closer to the inner side than the guide ring 76 becomes a planar holding surface 75a for holding the semiconductor wafer W. On the holding surface 75a of the holding plate 75, a plurality of substrate support pins 77 are vertically arranged. In the present embodiment, a total of 12 substrate support pins 77 are vertically arranged at intervals of 30° along the circumference of the holding surface 75a that is concentric with the outer circumference (the inner circumference of the guide ring 76). The diameter of the circle on which the 12 substrate support pins 77 are arranged (the distance between the substrate support pins 77 facing each other) is smaller than the diameter of the semiconductor wafer W. If the diameter of the semiconductor wafer W is φ300 mm, the diameter of the circle is φ270 mm to φ280 mm (φ270 mm in the present embodiment). Each substrate support pin 77 is formed of quartz. A plurality of substrate support pins 77 may be arranged on the upper surface of the holding plate 75 by welding, or may be processed into one piece with the holding plate 75.
[0077] Return to Figure 4, the four connecting parts 72 erected on the base ring 71 are fixedly connected to the peripheral part of the holding plate 75 of the base 74 by welding. That is, the base 74 and the base ring 71 are fixedly connected by the connecting parts 72. By supporting the base ring 71 of the holding part 7 on the wall surface of the processing chamber 6 in this way, the holding part 7 is installed in the processing chamber 6. When the holding part 7 is installed in the processing chamber 6, the holding plate 75 of the base 74 is in a horizontal posture (a posture in which the normal line is consistent with the vertical direction). In other words, the holding surface 75a of the holding plate 75 becomes a horizontal plane.
[0078] The semiconductor wafer W carried into the processing chamber 6 is placed and held in a horizontal position on a susceptor 74 of a holding portion 7 installed in the processing chamber 6. At this time, the semiconductor wafer W is supported by 12 substrate support pins 77 vertically provided on the holding plate 75 and held on the susceptor 74. More precisely, the upper ends of the 12 substrate support pins 77 contact the lower surface of the semiconductor wafer W to support the semiconductor wafer W. The heights of the 12 substrate support pins 77 (the distance from the upper ends of the substrate support pins 77 to the holding surface 75a of the holding plate 75) are equal, so the semiconductor wafer W can be supported in a horizontal position by the 12 substrate support pins 77.
[0079] In addition, the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a predetermined interval from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Therefore, the guide ring 76 prevents the semiconductor wafer W supported by the plurality of substrate support pins 77 from being displaced in the horizontal direction.
[0080] In addition, if Figure 4 and Figure 5 As shown, the retaining plate 75 of the base 74 is formed with an opening 78 extending vertically. The opening 78 is for the radiation thermometer 20 (see Figure 3 ) is provided to receive radiation light (infrared light) emitted from the lower surface of the semiconductor wafer W held on the susceptor 74. That is, the radiation thermometer 20 receives the light emitted from the lower surface of the semiconductor wafer W held on the susceptor 74 through the opening 78, and measures the temperature of the semiconductor wafer W. Furthermore, four through holes 79 are provided through the holding plate 75 of the susceptor 74, through which the lift pins 12 of the transfer mechanism 10 described below pass in order to transfer the semiconductor wafer W.
[0081] Figure 7 1 is a top view of the transfer mechanism 10. Figure 81 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arms 11 are formed in an arc shape along the substantially annular recess 62. Two lifting pins 12 are vertically provided on each transfer arm 11. Each transfer arm 11 can be rotated by a horizontal moving mechanism 13. The horizontal moving mechanism 13 enables a pair of transfer arms 11 to be in a transfer operation position ( Figure 7 The solid line position) and the retreat position ( Figure 7 The transfer action position is a position for transferring the semiconductor wafer W, and the retreat position is a position that does not overlap with the semiconductor wafer W held by the holding portion 7 when viewed from above. The transfer action position is below the base 74, and the retreat position is further outside than the base 74. As the horizontal moving mechanism 13, each transfer arm 11 can be rotated separately by an individual motor, or a link mechanism can be used to rotate a pair of transfer arms 11 in conjunction with one motor.
[0082] In addition, the pair of transfer arms 11 are moved up and down together with the horizontal moving mechanism 13 by the lifting mechanism 14. When the lifting mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see Figure 4 , 5 ), so that the upper end of the lift pin 12 protrudes from the upper surface of the base 74. On the other hand, the lifting mechanism 14 lowers the pair of transfer arms 11 at the transfer action position and pulls the lift pin 12 out of the through hole 79. If the horizontal moving mechanism 13 moves the pair of transfer arms 11 in an open manner, each transfer arm 11 moves to the retreat position. The retreat position of the pair of transfer arms 11 is located directly above the base ring 71 of the holding portion 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retreat position of the transfer arm 11 is located on the inner side of the recess 62. In addition, near the portion of the transfer mechanism 10 where the drive portion (the horizontal moving mechanism 13 and the lifting mechanism 14) is provided, an exhaust mechanism (not shown) is also provided, and is configured to exhaust the ambient gas around the drive portion of the transfer mechanism 10 to the outside of the processing chamber 6.
[0083] Return to Figure 3The flash lamp cabin 5 disposed above the processing chamber 6 is on the inner side of the shell 51, and is provided with a light source including a plurality of (in the present embodiment, 30) xenon flash lamps FL, and a reflector 52 disposed so as to cover the upper part of the light source. In addition, a light irradiation window 53 is installed at the bottom of the shell 51 of the flash lamp cabin 5. The light irradiation window 53 constituting the bottom plate portion of the flash lamp cabin 5 is a plate-shaped quartz window formed of quartz. By disposing the flash lamp cabin 5 above the processing chamber 6, the light irradiation window 53 is opposite to the upper chamber window 63. The flash lamp FL irradiates the heat treatment space 65 with flash light from above the processing chamber 6 through the light irradiation window 53 and the upper chamber window 63.
[0084] The flash lamps FL are rod-shaped lamps each having a long cylindrical shape, and are arranged in a plane so that their length directions are parallel to each other along the main surface (that is, along the horizontal direction) of the semiconductor wafer W held by the holding portion 7. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.
[0085] The xenon flash lamp FL includes: a rod-shaped glass tube (discharge tube) in which xenon gas is sealed, and an anode and a cathode connected to a capacitor are arranged at both ends; and a trigger electrode is attached to the outer peripheral surface of the glass tube. Xenon gas is an electrical insulator, so even if there is charge stored in the capacitor, no electricity will flow in the glass tube under normal conditions. However, when a high voltage is applied to the trigger electrode to break the insulation, the electricity stored in the capacitor will instantly flow into the glass tube, and light will be emitted by the excitation of xenon atoms or molecules at this time. In this xenon flash lamp FL, the static electricity stored in the capacitor in advance is converted into an extremely short light pulse of 0.1 milliseconds to 100 milliseconds, so it has the characteristic of being able to emit extremely strong light compared to a continuously lit light source such as a halogen lamp HL. In other words, the flash lamp FL is a pulse light lamp that emits light instantly in an extremely short time of less than 1 second. In addition, the light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power supply that supplies power to the flash lamp FL.
[0086] In addition, the reflector 52 is provided above the plurality of flash lamps FL in a manner covering the entirety of the plurality of flash lamps FL. The basic function of the reflector 52 is to reflect the flash emitted from the plurality of flash lamps FL toward the heat treatment space 65. The reflector 52 is formed of an aluminum alloy plate, and the front surface (the surface facing the flash lamp FL) is roughened by sandblasting.
[0087] The halogen lamp cabin 4 disposed below the processing chamber 6 has a plurality of (40 in this embodiment) halogen lamps HL built inside a housing 41. The plurality of halogen lamps HL irradiate the heat treatment space 65 with light from below the processing chamber 6 through the lower chamber window 64.
[0088] Fig. 9 It is a top view showing the configuration of multiple halogen lamps HL. In the present embodiment, 20 halogen lamps HL are provided in each of the upper and lower sections. Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. In the upper section and the lower section, the 20 halogen lamps HL are arranged in parallel with each other along the main surface of the semiconductor wafer W held by the holding portion 7 (that is, along the horizontal direction) in their respective length directions. Therefore, in the upper section and the lower section, the planes formed by the arrangement of the halogen lamps HL are all horizontal planes.
[0089] In addition, if Fig. 9 As shown, in the upper and lower sections, the arrangement density of the halogen lamps HL in the area opposite to the peripheral portion is higher than the arrangement density in the area opposite to the central portion of the semiconductor wafer W held by the holding portion 7. In other words, in the upper and lower sections, the arrangement spacing of the halogen lamps HL in the peripheral portion is shorter than the arrangement spacing in the central portion of the lamp arrangement. Therefore, the peripheral portion of the semiconductor wafer W, whose temperature is easily reduced when heated by light irradiation from the halogen lamps HL, can be irradiated with a larger amount of light.
[0090] The upper halogen lamps HL and the lower halogen lamps HL are arranged in a grid pattern. That is, a total of 40 halogen lamps HL are arranged so that the length direction of the upper halogen lamps HL is perpendicular to the length direction of the lower halogen lamps HL.
[0091] The halogen lamp HL is a filament-type light source that emits light by energizing a filament disposed inside a glass tube, turning the filament incandescent. A gas obtained by introducing a trace amount of halogen elements (iodine, bromine, etc.) into an inert gas such as nitrogen or argon is sealed inside the glass tube. By introducing the halogen elements, the breakage of the filament can be suppressed, and the temperature of the filament can be set to a high temperature. Therefore, the halogen lamp HL has the following characteristics: compared with ordinary incandescent bulbs, it has a longer life and can continuously irradiate strong light. In other words, the halogen lamp HL is a continuously lit lamp that emits light continuously for at least 1 second. In addition, since the halogen lamp HL is a rod-shaped lamp, it has a longer life, and by arranging the halogen lamp HL in the horizontal direction, the radiation efficiency to the semiconductor wafer W above is excellent.
[0092] In addition, a reflector 43 ( Figure 3 ). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the side of the heat treatment space 65 .
[0093] The control unit 3 controls the various operating mechanisms provided in the heat treatment apparatus 100 . Fig.10It is a block diagram showing the structure of the control unit 3. The hardware structure of the control unit 3 is the same as that of an ordinary computer. That is, the control unit 3 includes: a CPU (Central Processing Unit), which is a circuit for performing various calculations; a ROM (Read Only Memory), which is a read-only memory for storing basic programs; a RAM (Random Access Memory), which is a free read-write memory for storing various information; and a disk 35 for storing control software or data, etc. The processing in the heat treatment device 100 is carried out by the CPU of the control unit 3 executing a specified processing program. For example, the control unit 3 controls the conveying mechanism 38 including the conveying robot 150 and the transfer robot 120 to convey the semiconductor wafer W along the set conveying path. In addition, in Figure 1 In FIG. 1 , the control unit 3 is shown in the loading unit 101 , but the present invention is not limited thereto and the control unit 3 may be disposed at any position in the heat treatment apparatus 100 .
[0094] like Fig.10 As shown, the control unit 3 includes a counting unit 31 and a transmitting unit 32. The counting unit 31 and the transmitting unit 32 are functional processing units that are implemented by the CPU of the control unit 3 executing a specified processing program. The processing contents of the counting unit 31 and the transmitting unit 32 will be further described below.
[0095] In addition, the control unit 3 is connected to a display unit 34 and an input unit 33. The control unit 3 displays various information on the display unit 34. The operator of the heat treatment device 100 can input various instructions or parameters from the input unit 33 while confirming the information displayed on the display unit 34. As the input unit 33, for example, a keyboard or a mouse can be used. As the display unit 34, for example, a liquid crystal display can be used. In the present embodiment, as the display unit 34 and the input unit 33, a liquid crystal touch panel provided on the outer wall of the heat treatment device 100 is used, and it has the functions of both.
[0096] In addition to the above-mentioned configuration, the heat treatment section 160 is also provided with various cooling structures to prevent the temperature of the halogen lamp cabin 4, the flash lamp cabin 5, and the processing chamber 6 from excessively rising due to the heat energy generated from the halogen lamp HL and the flash lamp FL when the semiconductor wafer W is heat treated. For example, a water cooling pipe (not shown) is provided on the wall of the processing chamber 6. In addition, the halogen lamp cabin 4 and the flash lamp cabin 5 are formed into an air-cooling structure for dissipating heat by forming an air flow inside. In addition, air is also supplied to the gap between the upper chamber window 63 and the light radiating window 53 to cool the flash lamp cabin 5 and the upper chamber window 63.
[0097] Next, the processing operation of the heat treatment device 100 of the present invention is described. Here, the processing operation performed on the normal semiconductor wafer W is described first, and then the management of the dummy wafer is described. The semiconductor wafer W as the processing object is a semiconductor substrate to which impurities (ions) are added by ion implantation. The activation of the impurities is performed by flash irradiation heating treatment (annealing) implemented by the heat treatment device 100.
[0098] First, a plurality of unprocessed semiconductor wafers W injected with impurities are placed in a carrier C and loaded on the load port 110 of the loading unit 101. Then, the transfer robot 120 takes out the unprocessed semiconductor wafers W from the carrier C one by one and moves them into the alignment chamber 231 of the alignment unit 230. In the alignment chamber 231, the semiconductor wafer W is rotated around a vertical axis in a horizontal plane with its center as the rotation center, and the direction of the semiconductor wafer W is adjusted by optical detection grooves, etc.
[0099] Next, the transfer robot 120 of the loading unit 101 takes out the semiconductor wafer W whose direction has been adjusted from the alignment chamber 231 and carries it into the first cooling chamber 131 of the cooling unit 130 or the second cooling chamber 141 of the cooling unit 140. The unprocessed semiconductor wafer W carried into the first cooling chamber 131 or the second cooling chamber 141 is carried out to the transfer chamber 170 by the transfer robot 150. When the unprocessed semiconductor wafer W is transferred from the loading unit 101 to the transfer chamber 170 through the first cooling chamber 131 or the second cooling chamber 141, the first cooling chamber 131 and the second cooling chamber 141 function as a path for transferring the semiconductor wafer W.
[0100] After taking out the semiconductor wafer W, the transfer robot 150 rotates to face the heat treatment unit 160. Then, the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170, and the transfer robot 150 moves the unprocessed semiconductor wafer W into the processing chamber 6. At this time, if there is a semiconductor wafer W that has been previously heat-treated and has been processed in the processing chamber 6, one of the transfer hands 151a and 151b takes out the heat-treated semiconductor wafer W, and then moves the unprocessed semiconductor wafer W into the processing chamber 6 to perform wafer replacement. Thereafter, the gate valve 185 closes the space between the processing chamber 6 and the transfer chamber 170.
[0101] After the semiconductor wafer W carried into the processing chamber 6 is preheated by the halogen lamp HL, a flash heating process is performed by flash irradiation from the flash lamp FL. The impurities implanted into the semiconductor wafer W are activated by the flash heating process.
[0102] After the flash heat treatment is completed, the gate valve 185 opens the space between the processing chamber 6 and the transfer chamber 170 again, and the transfer robot 150 transfers the semiconductor wafer W after the flash heat treatment from the processing chamber 6 to the transfer chamber 170. After taking out the semiconductor wafer W, the transfer robot 150 rotates from the processing chamber 6 to the first cooling chamber 131 or the second cooling chamber 141. In addition, the gate valve 185 closes the space between the processing chamber 6 and the transfer chamber 170.
[0103] Thereafter, the transfer robot 150 transfers the semiconductor wafer W after the heat treatment into the first cooling chamber 131 of the cooling unit 130 or the second cooling chamber 141 of the cooling unit 140. At this time, if the semiconductor wafer W has passed through the first cooling chamber 131 before the heat treatment, it is still transferred into the first cooling chamber 131 after the heat treatment, and if the semiconductor wafer W has passed through the second cooling chamber 141 before the heat treatment, it is still transferred into the second cooling chamber 141 after the heat treatment. In the first cooling chamber 131 or the second cooling chamber 141, the semiconductor wafer W after the flash heat treatment is cooled. The temperature of the semiconductor wafer W as a whole is relatively high when it is transferred out of the processing chamber 6 of the heat treatment unit 160, so it is cooled to near room temperature in the first cooling chamber 131 or the second cooling chamber 141.
[0104] After the specified cooling time, the transfer robot 120 moves the cooled semiconductor wafers W out of the first cooling chamber 131 or the second cooling chamber 141 and returns them to the carrier C. Once the carrier C contains a specified number of processed semiconductor wafers W, the carrier C is moved out of the loading port 110 of the loading unit 101.
[0105] The heat treatment in the heat treatment unit 160 is further described. Before the semiconductor wafer W is loaded into the processing chamber 6, the valve 84 for gas supply is opened, and the valves 89 and 192 for exhaust are opened to start supplying and exhausting gas in the processing chamber 6. After the valve 84 is opened, nitrogen gas is supplied from the gas supply hole 81 to the heat treatment space 65. In addition, after the valve 89 is opened, the gas in the processing chamber 6 is exhausted from the gas exhaust hole 86. As a result, the nitrogen gas supplied from the upper part of the heat treatment space 65 in the processing chamber 6 flows downward and is exhausted from the lower part of the heat treatment space 65.
[0106] In addition, by opening the valve 192, the gas in the processing chamber 6 is also exhausted from the transfer opening 66. Furthermore, the atmosphere around the driving part of the transfer mechanism 10 is also exhausted by the exhaust mechanism (not shown). In addition, when the semiconductor wafer W is subjected to heat treatment in the heat treatment part 160, nitrogen gas is continuously supplied to the heat treatment space 65, and the supply amount thereof is appropriately changed according to the processing steps.
[0107] Then, the gate valve 185 is opened to open the transfer opening 66, and the semiconductor wafer W to be processed is transferred into the heat treatment space 65 in the processing chamber 6 through the transfer opening 66 by the transfer robot 150. The transfer robot 150 moves the transfer hand 151a (or the transfer hand 151b) holding the unprocessed semiconductor wafer W in and out to a position just above the holding portion 7 and stops there. Then, the pair of transfer arms 11 of the transfer mechanism 10 horizontally move from the retreat position to the transfer operation position and rise, thereby the lift pins 12 protrude from the upper surface of the holding plate 75 of the base 74 through the through holes 79 to receive the semiconductor wafer W. At this time, the lift pins 12 rise to a position higher than the upper ends of the substrate support pins 77.
[0108] After placing the unprocessed semiconductor wafer W on the lift pins 12, the transport robot 150 withdraws the transport hand 151a from the heat treatment space 65, and the transport opening 66 is closed by the gate valve 185. Then, the pair of transfer arms 11 descends, whereby the semiconductor wafer W is transferred from the transfer mechanism 10 to the base 74 of the holding portion 7 and is held from below in a horizontal posture. The semiconductor wafer W is supported by a plurality of substrate support pins 77 erected on the holding plate 75 and is held on the base 74. In addition, the semiconductor wafer W is held on the holding portion 7 with the front surface on which the pattern is formed and impurities are injected as the upper surface. A specified interval is formed between the back surface (the main surface on the opposite side to the front side) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75a of the holding plate 75. The pair of transfer arms 11 that have descended to the bottom of the base 74 retreat to the retreat position, that is, the inner side of the recess 62, through the horizontal moving mechanism 13.
[0109] After the semiconductor wafer W is held horizontally from below by the base 74 of the holding portion 7, 40 halogen lamps HL are lit at the same time to start preheating (auxiliary heating). The halogen light emitted from the halogen lamp HL is irradiated onto the lower surface of the semiconductor wafer W through the lower chamber window 64 and the base 74 formed by quartz. The semiconductor wafer W is preheated by receiving light from the halogen lamp HL, thereby increasing the temperature. In addition, since the transfer arm 11 of the transfer mechanism 10 has retreated to the inner side of the recess 62, it will not hinder the halogen lamp HL from heating.
[0110] When preheating is performed by the halogen lamp HL, the temperature of the semiconductor wafer W is measured by the radiation thermometer 20. That is, the infrared light radiated from the lower surface of the semiconductor wafer W held on the base 74 through the opening 78 is received by the radiation thermometer 20 to measure the temperature of the wafer being heated. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The control unit 3 controls the output of the halogen lamp HL while monitoring whether the temperature of the semiconductor wafer W heated by the light irradiation from the halogen lamp HL reaches the specified preheating temperature T1. That is, the control unit 3 feedback controls the output of the halogen lamp HL based on the measured value measured by the radiation thermometer 20 so that the temperature of the semiconductor wafer W becomes the preheating temperature T1. The preheating temperature T1 is about 600°C to 800°C (in the present embodiment, 700°C) at which there is no concern that impurities added to the semiconductor wafer W will diffuse through heat.
[0111] After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, at the time point when the temperature of the semiconductor wafer W measured by the radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL to maintain the temperature of the semiconductor wafer W approximately at the preheating temperature T1.
[0112] By preheating with the halogen lamp HL in this way, the temperature of the semiconductor wafer W as a whole is uniformly raised to the preheating temperature T1. In the preheating stage with the halogen lamp HL, there is a tendency that the temperature of the peripheral portion of the semiconductor wafer W, which is more likely to dissipate heat, is lower than that of the central portion. However, in the halogen lamp chamber 4, the arrangement density of the halogen lamp HL in the area opposite to the peripheral portion of the semiconductor wafer W is higher than that in the area opposite to the central portion. Therefore, the amount of light irradiated to the peripheral portion of the semiconductor wafer W, which is more likely to dissipate heat, increases, so that the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be uniform.
[0113] At a time point after the temperature of the semiconductor wafer W reaches the preheating temperature T1 and a specified time has passed, the flash lamp FL performs flash irradiation on the front surface of the semiconductor wafer W. At this time, a portion of the flash emitted from the flash lamp FL is directly directed into the processing chamber 6, and the other portion is temporarily reflected by the reflector 52 and then directed into the processing chamber 6. The semiconductor wafer W is flash heated by the irradiation of these flashes.
[0114] Flash heating is performed by irradiating a flash light from a flash lamp FL, so that the temperature of the front surface of the semiconductor wafer W can be raised in a short time. That is, the flash light irradiated from the flash lamp FL is a strong flash light that is converted from the electrostatic energy stored in the capacitor in advance into an extremely short light pulse, and the irradiation time is extremely short, about 0.1 milliseconds to 100 milliseconds. Moreover, the temperature of the front surface of the semiconductor wafer W that is flash-heated by the flash light irradiation from the flash lamp FL instantly rises to a processing temperature T2 of more than 1000°C, and the impurities injected into the semiconductor wafer W are activated, and then the front surface temperature drops rapidly. In this way, in flash heating, the temperature of the front surface of the semiconductor wafer W can be raised and lowered in a very short time, so that the impurities injected into the semiconductor wafer W can be activated while suppressing the diffusion of impurities by heat. In addition, the time required for the activation of the impurities is extremely short compared to the time required for its thermal diffusion, so the activation can be completed in a short time of about 0.1 milliseconds to 100 milliseconds before diffusion occurs.
[0115] After the flash heating treatment is completed and after a specified time has passed, the halogen lamp HL is turned off. As a result, the semiconductor wafer W is rapidly cooled from the preheating temperature T1. The temperature of the semiconductor wafer W being cooled is measured by the radiation thermometer 20, and the measurement result is transmitted to the control unit 3. The control unit 3 monitors whether the temperature of the semiconductor wafer W has dropped to the specified temperature based on the measurement result of the radiation thermometer 20. Then, after the temperature of the semiconductor wafer W has dropped below the specified temperature, the pair of transfer arms 11 of the transfer mechanism 10 are horizontally moved from the retreat position to the transfer action position again and rise, so that the lift pins 12 protrude from the upper surface of the base 74, and the heat-treated semiconductor wafer W is received from the base 74. Then, the transport opening 66 locked by the gate valve 185 is opened, and the processed semiconductor wafer W placed on the lift pins 12 is moved out by the transfer hand 151b (or transfer hand 151a) of the transfer robot 150. The transfer robot 150 moves the transfer hand 151b to a position directly below the semiconductor wafer W lifted by the lift pins 12 and stops there. Then, the semiconductor wafer W after flash heating is transferred and placed on the transfer hand 151b by the descent of the pair of transfer arms 11. Thereafter, the transfer robot 150 withdraws the transfer hand 151b from the processing chamber 6 and carries out the processed semiconductor wafer W.
[0116] However, it is more typical to process the semiconductor wafers W in batches. A batch refers to a group of semiconductor wafers W that are subjected to the same processing under the same conditions. In the heat treatment apparatus 100 of the present embodiment, a plurality of semiconductor wafers W (for example, 25) constituting a batch are accommodated in a carrier C and loaded on the loading port 110 of the loading unit 101, and then the semiconductor wafers W are moved from the carrier C one by one into the processing chamber 6 for heat treatment.
[0117] Here, when batch processing is started in the heat treatment device 100 that has not been processed for a period of time, the first semiconductor wafer W of the batch is moved into the processing chamber 6 at approximately room temperature for preheating and flash heating treatment. This situation is, for example, a situation where the heat treatment device 100 is started after maintenance and then the first batch is processed; or a long time has passed since the previous batch was processed. During the heating treatment, heat is transferred from the heated semiconductor wafer W to the chamber structure such as the susceptor 74, so the susceptor 74, which is initially at room temperature, will slowly heat up through heat storage as the number of semiconductor wafers W processed increases. In addition, a portion of the infrared light emitted from the halogen lamp HL will be absorbed by the lower chamber window 64, so the temperature of the lower chamber window 64 will also slowly heat up as the number of semiconductor wafers W processed increases.
[0118] Furthermore, when the heat treatment of about 10 semiconductor wafers W is performed, the temperature of the susceptor 74 and the lower chamber window 64 reaches a fixed stable temperature. In the susceptor 74 that has reached the stable temperature, the heat conducted from the semiconductor wafer W to the susceptor 74 is balanced with the heat dissipated from the susceptor 74. Before the temperature of the susceptor 74 reaches the stable temperature, the heat conducted from the semiconductor wafer W is greater than the heat dissipated from the susceptor 74, so the temperature of the susceptor 74 gradually rises through heat storage as the number of processed semiconductor wafers W increases. In contrast, after the temperature of the susceptor 74 reaches the stable temperature, the heat conducted from the semiconductor wafer W is balanced with the heat dissipated from the susceptor 74, so the temperature of the susceptor 74 is maintained at a fixed stable temperature. In addition, after the temperature of the lower chamber window 64 reaches the stable temperature, the heat absorbed by the lower chamber window 64 from the irradiation light of the halogen lamp HL is balanced with the heat released from the lower chamber window 64, so the temperature of the lower chamber window 64 is also maintained at a fixed stable temperature.
[0119] If the processing is started in the processing chamber 6 at room temperature as described above, there is a problem that the temperature history of the semiconductor wafers W at the beginning of the batch and the semiconductor wafers W at the middle and later stages is not uniform due to the different temperatures of the structures in the processing chamber 6. In addition, the initial semiconductor wafers W are supported on the low-temperature susceptor 74 and flash heated, so there is also a problem of wafer warping. Therefore, before starting the batch processing, the following virtual operation is performed: a dummy wafer that is not the processing object is moved into the processing chamber 6 and preheated and flash heated in the same manner as the semiconductor wafer W that is the processing object, and the susceptor 74 and other chamber structures are heated to a stable temperature. By preheating and flash heating about 10 dummy wafers, the susceptor 74 and other chamber structures can be heated to a stable temperature. This virtual operation is performed not only when the processing is started in the processing chamber 6 at room temperature, but also when the preheating temperature T1 or the processing temperature T2 is changed. As described above, the dummy wafer is repeatedly subjected to preheating and flash heating, so the dummy wafer is degraded and easily cracked or warped. Therefore, it is necessary to properly manage the degraded state of the dummy wafer. The management of the dummy wafer in the heat treatment apparatus 100 is described below.
[0120] Fig.11 This is a flowchart showing the management sequence of the dummy wafer of the first embodiment. The dummy wafer is a disk-shaped silicon wafer that is the same as the semiconductor wafer W to be processed, and has the same size and shape as the semiconductor wafer W. However, patterning or ion implantation is not performed on the dummy wafer. In other words, the dummy wafer is a so-called bare wafer.
[0121] When implementing virtual operation, first, confirm whether the wafer to be transported is a dummy wafer (step S11). The dummy wafer is contained in a carrier C (dummy carrier) dedicated to dummy wafers that is different from the carrier C that accommodates normal semiconductor wafers W for use. Once this carrier C dedicated to dummy wafers is placed on the load port 110 of the loading unit 101, the label attached to the carrier C will be read, and the control unit 3 will identify whether the carrier C is a dummy carrier. When the wafer to be transported is a wafer accommodated in a dummy carrier, the control unit 3 determines that the wafer is a dummy wafer. In the case where the wafer to be transported is not a dummy wafer, the virtual operation is not started. In addition, the shape of the carrier C dedicated to dummy wafers is the same as that of the carrier C that accommodates normal semiconductor wafers W. In this embodiment, it is a FOUP.
[0122] When the wafer to be transported is a dummy wafer, the process proceeds from step S11 to step S12, and the dummy wafer is transported from the loading unit 101 to the thermal processing unit 160 by the transport mechanism 38 (the transfer robot 120 and the transport robot 150). The transport sequence of the dummy wafer is substantially the same as the transport sequence of the semiconductor wafer W to be processed.
[0123] Next, it is determined whether to perform preheating using the halogen lamp HL (step S13). Unlike the normal heat treatment of the semiconductor wafer W, during virtual operation, there is a case where the dummy wafer is not preheated but only flash heated. In this case, preheating is not performed. The determination of step S13 can be appropriately made by the operator of the heat treatment device 100, or by the control unit 3 based on a preset recipe data.
[0124] When preheating is to be performed, the dummy wafer is preheated by irradiating light from the halogen lamp HL in the same manner as for the normal semiconductor wafer W. Then, the counting unit 31 ( Fig.10 ) adds 1 to the preheating count (step S14). The so-called preheating count is a parameter indicating the number of times the dummy wafer is preheated by the halogen lamp HL. Fig.10 As shown, a virtual database 39 is stored in the storage unit of the control unit 3, that is, the disk 35. The dummy carrier is associated with the preheating times and flash heating times of the plurality of dummy wafers contained therein and is registered in the virtual database 39. The counting unit 31 of the control unit 3 extracts the preheating times of the dummy wafer being processed from the virtual database 39 and uses the value as the preheating count. Then, when the dummy wafer is preheated by the halogen lamp HL, the counting unit 31 adds 1 to the preheating count.
[0125] Then, the control unit 3 determines whether the preheating count obtained by adding 1 to the counting unit 31 has become or exceeded a predetermined specified threshold value (step S15). As the threshold value of the preheating count, for example, it is set to 500 times. In the case where the preheating count has become or exceeded the threshold value, the process proceeds from step S15 to step S16, and the alarm unit 32 of the control unit 3 issues an alarm. For example, the alarm unit 32 displays a warning on the display unit 34 that the number of preheating times of the dummy wafer has reached the usage limit. After the alarm is issued by the alarm unit 32, the process proceeds to step S17 to determine whether flash heating using the flash lamp FL is to be performed.
[0126] On the other hand, when the preheating count does not reach the threshold, the process proceeds to step S17 to determine whether to perform flash heating using the flash lamp FL. In addition, when it is determined in step S13 that preheating is not to be performed, the process proceeds to step S17. During virtual operation, there is a case where only preheating is performed without flash heating. The determination of step S17 is similar, and can be appropriately determined by the operator of the heat treatment device 100, or by the control unit 3 based on a preset recipe data.
[0127] When flash heating is to be performed, the dummy wafer is flash heated by flash irradiation from the flash lamp FL in the same manner as for the normal semiconductor wafer W. Then, the counting unit 31 of the control unit 3 adds 1 to the flash heating count (step S18). The so-called flash heating count is a parameter indicating the number of times flash heating is performed on the dummy wafer. The counting unit 31 extracts the number of flash heating times of the dummy wafer from the virtual database 39 during the processing, and uses the value as the flash heating count. Then, when the dummy wafer is flash heated by the flash lamp FL, the counting unit 31 adds 1 to the flash heating count.
[0128] Then, the control unit 3 determines whether the flash heating count obtained by adding 1 to the counting unit 31 has become or exceeded a predetermined threshold value (step S19). The threshold value of the flash heating count is set to 50 times, for example. When the flash heating count has become or exceeded the threshold value, the process proceeds from step S19 to step S20, and the alarm unit 32 issues an alarm. For example, the alarm unit 32 displays a warning on the display unit 34 to the effect that the number of flash heating times of the dummy wafer has reached the usage limit.
[0129] On the other hand, when both the preheating count and the flash heating count do not reach their respective threshold values, no alarm is issued. In this case, the dummy wafer after the heat treatment is sent back from the heat treatment unit 160 to the original carrier C of the loading unit 101 by the transfer mechanism 38. In addition, when an alarm is issued in at least one of step S16 and step S20, the dummy wafer is also sent back to the original carrier C of the loading unit 101 by the transfer mechanism 38.
[0130] Regarding the first embodiment, during the virtual operation, that is, when the dummy wafer is being processed in the heat treatment device 100, the preheating count and the flash heating count are incremented, and an alarm is issued when these counts become above the threshold. The preheating count and the flash heating count are indicators that are grasped as loss values that represent the degree of degradation of the dummy wafer. In short, in the first embodiment, when the loss value of the dummy wafer becomes above the threshold in the middle of the virtual operation, an alarm is issued. As a result, the operator of the heat treatment device 100 can know that the degradation of the dummy wafer has reached the set critical value, and thus replace the dummy wafer with a new dummy wafer. As a result, the erroneous processing of excessively degraded dummy wafers can be prevented.
[0131] <Second embodiment>
[0132] Next, a second embodiment of the present invention will be described. The configuration of the heat treatment apparatus 100 and the processing procedure of the semiconductor wafer W in the second embodiment are the same as those in the first embodiment. The second embodiment is different from the first embodiment in the management form of the dummy wafer.
[0133] Fig.12 It is a flowchart showing the management sequence of the dummy wafer of the second embodiment. In the second embodiment, the carrier C (dummy carrier) containing the dummy wafer is placed on the load port 110 of the loading section 101, and the operator of the heat treatment device 100 indicates the start of the virtual operation process from the input section 33 (step S21). If the process is indicated to start, the control section 3 extracts the number of preheating times of the dummy wafer as the object from the virtual database 39 and uses it as the preheating count. In addition, the control section 3 extracts the number of flash heating times of the dummy wafer as the object from the virtual database 39 and uses it as the flash heating count. Then, the control section 3 determines whether the preheating count of the dummy wafer as the object is above a predetermined specified threshold (step S22). As the threshold of the preheating count, it is set to 500 times, for example, as in the first embodiment.
[0134] If the preheating count does not reach the threshold, the process proceeds to step S23, and the control unit 3 determines whether the flash heating count of the dummy wafer is greater than a predetermined threshold (step S23). The threshold of the flash heating count is set to 50 times, for example, as in the first embodiment. Then, if the flash heating count does not reach the threshold, the transfer of the dummy wafer as the target is started and a virtual operation is performed (step S24).
[0135] On the other hand, when the preheating count or the flash heating count is equal to or greater than the threshold, the process proceeds to step S25, and the alarm is issued by the alarm transmitter 32. Furthermore, the controller 3 prohibits the conveying mechanism 38 from performing the conveying operation (step S26).
[0136] In the second embodiment, when the dummy wafer is about to be transported in the heat treatment apparatus 100, an alarm is issued when the loss value of the dummy wafer is greater than a threshold value. Thus, the operator of the heat treatment apparatus 100 can know that the degradation of the dummy wafer has reached the set critical value, and the processing of the dummy wafer is stopped.
[0137] Even if the operator ignores the alarm and forcibly starts processing the dummy wafer, the control unit 3 prohibits the transfer mechanism 38 from performing the transfer operation, thereby preventing the dummy wafer from being transferred to the thermal processing unit 160 for processing. As a result, erroneous processing of excessively degraded dummy wafers can be reliably prevented.
[0138] <Example of Change>
[0139] Above, the embodiments of the present invention have been described, but the present invention can be changed in various ways beyond the above contents without departing from the scope of its main purpose. For example, the second embodiment can be applied not only to the case of heat treatment of dummy wafers, but also to the case of non-heat treatment of dummy wafers. The so-called non-heat treatment refers to the process of transporting dummy wafers only between the loading unit 101 and the heat treatment unit 160 without heat treatment of dummy wafers. This non-heat treatment is, for example, performed after the teaching operation of the transport mechanism 38 is performed to confirm whether the dummy wafer can be transported to the position shown in the teaching content. There is a situation where the dummy wafer that is excessively degraded due to heat treatment is warped. If such a dummy wafer is transported by the transport mechanism 38 even if it is non-heat treatment, then it will cause a transport failure. If the second embodiment is applied to the non-heat treatment of dummy wafers, then the transport failure caused by the deformation of the dummy wafer can be prevented in advance.
[0140] In the above embodiment, the flash lamp cabin 5 includes 30 flash lamps FL, but the present invention is not limited thereto, and the number of flash lamps FL may be any number. In addition, the flash lamp FL is not limited to a xenon flash lamp, and may be a krypton flash lamp. In addition, the number of halogen lamps HL included in the halogen lamp cabin 4 is not limited to 40, and may be any number.
[0141] In addition, in the above-described embodiment, a filament-type halogen lamp HL is used as a continuous-lighting lamp that continuously emits light for more than 1 second to preheat the semiconductor wafer W, but the present invention is not limited thereto, and a discharge-type arc lamp (e.g., a xenon arc lamp) may be used instead of the halogen lamp HL as a continuous-lighting lamp for preheating. In this case, the dummy wafer is also preheated by irradiation with light from the arc lamp.
[0142] In addition, the substrate to be processed by the heat treatment apparatus 100 is not limited to a semiconductor wafer, and may be a glass substrate used for a flat panel display such as a liquid crystal display device or a substrate for a solar cell.
[0143] [Explanation of Symbols]
[0144] 3. Control Unit
[0145] 4 Halogen lamp compartment
[0146] 5 Flash Pod
[0147] 6 Processing Chamber
[0148] 7. Maintaining part
[0149] 10 Transfer mechanism
[0150] 31 Counting unit
[0151] 32. Transmission Department
[0152] 33 Input section
[0153] 34 Display
[0154] 35 Disk
[0155] 38 Transport Agency
[0156] 39 Virtual Database
[0157] 65 Heat treatment space
[0158] 74 Base
[0159] 100 Heat treatment device
[0160] 101 Loading Department
[0161] 120 Handover Robot
[0162] 130, 140 Cooling unit
[0163] 150 Transport Robot
[0164] 151a, 151b Carrying hand
[0165] 160 Heat Treatment Department
[0166] FL Flash
[0167] HL halogen lamp
[0168] W Semiconductor Wafer
Claims
1. A heat treatment method, characterized in that: Manage virtual wafers, including: a counting step of counting the loss value of the dummy wafer caused by the heat treatment; and A warning step, when the loss value of the dummy wafer is above a specified threshold, issuing a warning; The loss value is the number of preheatings performed by continuously lighting the lamp or the number of flash heatings performed by a flash lamp.
2. The heat treatment method according to claim 1, characterized in that: The counting step and the reporting step are performed when the dummy wafer is being processed in a thermal processing device.
3. The heat treatment method according to claim 1, characterized in that: The notification step is performed when a transfer start instruction of the dummy wafer whose loss value reaches the threshold is received in the thermal processing apparatus.
4. The heat treatment method according to claim 3, characterized in that: When the transfer start instruction is received, the transfer of the dummy wafer is also prohibited.
5. A heat treatment device, characterized in that: Manage virtual wafers, including: A heat treatment section performs heat treatment on the dummy wafer; A conveying unit, conveying the dummy wafer to the heat treatment unit; a counting unit, for counting the loss value of the dummy wafer caused by the heat treatment; and A reporting unit, which issues a warning when the loss value of the dummy wafer is above a specified threshold; The heat treatment unit is provided with a continuous lighting lamp and a flash lamp, and The loss value is the number of times of preheating by the continuously lit lamp or the number of times of flash heating by the flash lamp.
6. The heat treatment device according to claim 5, characterized in that: When the heat treatment of the dummy wafer is being performed in the heat treatment section, the counting section counts the loss value of the dummy wafer; and when the loss value reaches the threshold value, the alarming section issues a warning.
7. The heat treatment device according to claim 5, characterized in that: The notification unit issues a warning when receiving an instruction to start transporting the dummy wafer whose loss value reaches the threshold value.
8. The heat treatment device according to claim 7, characterized in that: When the transfer start instruction is received, the transfer unit is prohibited from transferring the dummy wafer.
