A PCB of a high-speed connector and its optimization method and system

Abstract

The present invention discloses a PCB of a high-speed connector and an optimization method and system thereof. The PCB optimization method of the high-speed connector includes the following steps: establishing a three-dimensional PCB model according to PCB stacking; importing a three-dimensional high-speed connector model; establishing a simulation port and setting the operating frequency of the high-speed connector; parameterizing the key components of the PCB that affect impedance; and optimizing the structural parameters of the key components by parameter scanning. The present invention achieves the reduction of link return loss, TDR impedance fluctuation amplitude, and signal insertion loss vibration amplitude, improves the linearity of signal insertion loss, thereby improving the overall test performance of the entire link, significantly improving the signal bandwidth throughput capacity of the PCB of the high-speed connector, and providing technical support for future high-speed and high-frequency application scenarios.

Description

Technical Field

[0001] The present invention relates to the technical field of PCB of high-speed connectors, and in particular to a PCB of high-speed connectors and an optimization method and system thereof. Background Art

[0002] With the rapid development and application of new products and technologies, a new generation of high-speed technology has begun to become popular, and the application of radio frequency (RF) has expanded to 67GHz and even higher frequency applications, such as 77GHz RF radar.

[0003] As the frequency of RF signals increases, the signals become more sensitive to application design, and the design considerations will also increase accordingly. How to effectively and quickly design a path that meets the requirements of high-frequency signals has become a difficult problem that technical personnel in this field need to solve urgently. Summary of the invention

[0004] The present invention provides a PCB of a high-speed connector and an optimization method and system thereof, which achieve the reduction of link return loss, TDR impedance fluctuation amplitude and signal insertion loss vibration amplitude, improve the linearity of signal insertion loss, thereby improving the overall test performance of the entire link, and significantly improve the signal bandwidth throughput capacity of the PCB of the high-speed connector, meet the high-frequency signal path requirements of the high-speed connector for the PCB, thereby ensuring the efficient operation of the high-speed connector, and providing technical support for future high-speed and high-frequency application scenarios.

[0005] The technical solution provided by the present invention is as follows:

[0006] A PCB optimization method for a high-speed connector comprises the following steps:

[0007] Establish a three-dimensional PCB model based on the PCB stack;

[0008] Import 3D high-speed connector models;

[0009] Establish emulation ports and set the operating frequency of high-speed connectors;

[0010] Parameterizing key components of the PCB that affect impedance;

[0011] The structural parameters of the key components are optimized by parameter scanning.

[0012] In the above technical scheme, the link between the corresponding high-speed connector and PCB is simulated through three-dimensional modeling, and the key components affecting the impedance in the PCB are optimized, which reduces the link return loss, TDR impedance fluctuation amplitude and signal insertion loss vibration amplitude, and improves the linearity of the signal insertion loss, thereby improving the overall test performance of the entire link, and significantly improving the signal bandwidth throughput capacity of the PCB of the high-speed connector, meeting the high-frequency signal path requirements of the high-speed connector to the PCB, thereby ensuring the efficient operation of the high-speed connector and providing technical support for future high-speed and high-frequency application scenarios.

[0013] Furthermore, the optimization of the structural parameters of the key components by parameter scanning specifically includes the steps of: optimizing the structural parameters of each key component one by one by parameter scanning; wherein the next key component to be optimized is optimized based on the last key component that has been optimized.

[0014] In the above technical solution, by further optimizing the structural parameters of the next key component that needs to be optimized based on the key component whose structural parameters have been optimized before, the structural parameters of all key components are finally achieved, thereby ensuring the optimal design, manufacturing and application of the PCB of the high-speed connector.

[0015] Furthermore, the key components are one or more of the outer copper layer of the high-speed connector pad, the inner copper layer of the high-speed connector pad, the narrow line of the high-speed connector pad outlet, the outer copper layer of the high-speed connector outlet, the peripheral GND via or the GND hole accompanying the high-speed connector outlet area.

[0016] In the above technical solution, in actual applications, the number of key components may be one or more. During the optimization process, one may be selected as the first object to be optimized, and then other key components may be optimized. Of course, an optimization sequence may also be set for these key components, and then they may be optimized according to the pre-set sequence. The specific operation may be performed according to actual needs to meet the optimization of the PCB of the high-speed connector corresponding to the high-speed connectors with different operating frequencies.

[0017] Furthermore, the hollowed-out diameter of the outer copper layer of the high-speed connector pad is 30-90 mil; the hollowed-out diameter of the inner copper layer of the high-speed connector pad is 20-60 mil; the length of the narrow line of the high-speed connector pad outlet is 50-150 mil, and the width of the narrow line of the high-speed connector pad outlet is 4-12 mil; the hollowed-out width of the outer copper layer of the high-speed connector outlet is 25-75 mil; the diameter of the peripheral GND via is 5-15 mil, and the center distance between the peripheral GND via and the high-speed connector pad is 40-120 mil; the center distance between the two GND holes of the high-speed connector outlet area, which are respectively arranged on both sides of the narrow line of the high-speed connector pad outlet and are oppositely arranged, is 15-45 mil.

[0018] In the above technical solution, the optimized design of the PCB of the high-speed connector is achieved by limiting the sizes of multiple key mechanisms and the positional relationship of each key mechanism.

[0019] Furthermore, the hollowed-out diameter of the outer copper layer of the high-speed connector pad is 60 mil; the hollowed-out diameter of the inner copper layer of the high-speed connector pad is 40 mil; the length of the narrow line of the high-speed connector pad outlet is 105 mil, and the width of the narrow line of the high-speed connector pad outlet is 8 mil; the hollowed-out width of the outer copper layer of the high-speed connector outlet is 50 mil; the diameter of the peripheral GND via is 10 mil, and the center distance between the peripheral GND via and the high-speed connector pad is 83 mil; the center distance between two GND holes of the high-speed connector outlet area which are respectively arranged on both sides of the narrow line of the high-speed connector pad outlet and are relatively arranged is 33 mil; and / or the total number of the peripheral GND vias and the GND holes of the high-speed connector outlet area is 9 to 17.

[0020] In the above technical scheme, the structural parameters of each key component (the size of the key components, the parameters between them and the quantity) can be adaptively adjusted according to the stacking, material, size, operating frequency of the high-speed connector, etc. of the PCB, thereby achieving the optimal design of the PCB of the high-speed connector.

[0021] Furthermore, before establishing the three-dimensional PCB model according to the PCB stacking, the method also includes the step of designing the PCB stacking, that is, the impedance control form.

[0022] In the above technical solution, the PCB stacking can be designed before establishing the PCB three-dimensional model, which is convenient for parameterizing the key components of the PCB that affect the impedance, simplifying the optimization method, making the PCB optimization more efficient and purposeful, providing a basis for the design and production of the optimized PCB, and making it easier to implement and operate.

[0023] Furthermore, before importing the three-dimensional high-speed connector model, the method further includes the step of establishing and pre-storing the three-dimensional high-speed connector model according to the high-speed connector.

[0024] In the above technical solution, the three-dimensional model of the high-speed connector can be pre-stored (mainly for existing high-speed connectors with existing three-dimensional models) or constructed on site (mainly for newly designed high-speed connectors that have not yet been manufactured and are in the design stage).

[0025] The present invention also provides a PCB optimization system for a high-speed connector, comprising: a modeling module for establishing a three-dimensional PCB model according to PCB stacking; an import module for importing a three-dimensional high-speed connector model; a simulation port establishment module for establishing a simulation port and setting the operating frequency of the high-speed connector; a parameterization module for parameterizing key components of the PCB that affect impedance; and an optimization module for optimizing the structural parameters of the key components through parameter scanning.

[0026] The present invention also provides a PCB of a high-speed connector, comprising: a PCB body, wherein the PCB body is provided with a high-speed connector pad, an outer copper sheet of the high-speed connector pad, an inner copper sheet of the high-speed connector pad, a narrow line of a high-speed connector pad outlet, an outer copper sheet of the high-speed connector outlet, a peripheral GND via hole or a GND hole accompanying the high-speed connector outlet area; the hollowing diameter of the outer copper sheet of the high-speed connector pad is 30-90 mil; the hollowing diameter of the inner copper sheet of the high-speed connector pad is 20-60 mil; the high-speed connector pad outlet is The length of the narrow line is 50-150mil, and the width of the narrow line of the high-speed connector pad is 4-12mil; the hollow width of the outer copper foil of the high-speed connector outlet is 25-75mil; the diameter of the peripheral GND via is 5-15mil, and the center distance between the peripheral GND via and the high-speed connector pad is 40-120mil; the center distance between the two GND holes of the high-speed connector outlet area, which are respectively arranged on both sides of the narrow line of the high-speed connector pad and are relatively arranged, is 15-45mil.

[0027] Furthermore, the hollowed-out diameter of the outer copper layer of the high-speed connector pad is 60 mil; the hollowed-out diameter of the inner copper layer of the high-speed connector pad is 40 mil; the length of the narrow line of the high-speed connector pad outlet is 105 mil, and the width of the narrow line of the high-speed connector pad outlet is 8 mil; the hollowed-out width of the outer copper layer of the high-speed connector outlet is 50 mil; the diameter of the peripheral GND via is 10 mil, and the center distance between the peripheral GND via and the high-speed connector pad is 83 mil; the center distance between two GND holes of the high-speed connector outlet area which are respectively arranged on both sides of the narrow line of the high-speed connector pad outlet and are relatively arranged is 33 mil; and / or the total number of the peripheral GND vias and the GND holes of the high-speed connector outlet area is 9 to 17.

[0028] Compared with the prior art, the PCB of the high-speed connector and its optimization method and system have the following beneficial effects:

[0029] The link return loss, TDR impedance fluctuation amplitude and signal insertion loss vibration amplitude are reduced, and the linearity of signal insertion loss is improved, thereby improving the overall test performance of the entire link. The signal bandwidth throughput capacity of the PCB of the high-speed connector is significantly improved, and the high-frequency signal path requirements of the high-speed connector to the PCB are met, thereby ensuring the efficient operation of the high-speed connector and providing technical support for future high-speed and high-frequency application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The preferred implementation scheme will be described below in a clear and understandable manner in conjunction with the accompanying drawings to further illustrate the above-mentioned characteristics, technical features, advantages and implementation methods of a PCB of a high-speed connector and its optimization method and system.

[0031] Figure 1 It is a flow chart of an embodiment of a method for optimizing a PCB of a high-speed connector of the present invention;

[0032] Figure 2 It is a flow chart of another embodiment of the method for optimizing the PCB of the high-speed connector of the present invention;

[0033] Figure 3 It is a flow chart of another embodiment of the method for optimizing the PCB of the high-speed connector of the present invention;

[0034] Figure 4 It is a schematic structural diagram of a PCB embodiment of a high-speed connector of the present invention;

[0035] Figure 5 It is a structural schematic diagram of another embodiment of a PCB of a high-speed connector of the present invention;

[0036] Figure 6It is a schematic structural diagram of an embodiment of a high-speed connector PCB and a high-speed connector in a connection process of the present invention;

[0037] Figure 7 This is a schematic structural diagram of an embodiment of the high-speed connector of the present invention in which the PCB and the high-speed connector are in a connected state.

[0038] Figure 8 It is a schematic structural diagram of an exploded view of another embodiment of the high-speed connector of the present invention in which the PCB and the high-speed connector are in the process of being connected;

[0039] Figure 9-11 It is a signal loss data chart of the existing PCB corresponding to ARDENT's high-speed TR70 connector after the high-speed TR70 connector establishes a link with the existing PCB through 3D modeling simulation;

[0040] Figure 12-14 The present invention is Figure 9-11 The signal loss data chart after the existing PCB described in the above is optimized and connected to the high-speed TR70 connector of ARDENT through 3D modeling simulation;

[0041] Figure 15-17 is based on Figure 12-14 The signal loss data chart of the actual PCB product produced after optimization and connected to ARDENT's high-speed TR70 connector.

[0042] Description of Figure Numbers:

[0043] 11. PCB body, 111. High-speed connector pad, 112. Outer copper sheet, 1121. Outer copper sheet of high-speed connector pad, 1122. Outer copper sheet of high-speed connector outlet, 113. Inner copper sheet of high-speed connector pad, 114. Narrow line of high-speed connector pad outlet, 115. Peripheral GND via, 116. GND hole accompanying the outlet area of ​​high-speed connector, 117. Copper column, 2. High-speed connector, A. Hollowing diameter of the outer copper sheet of the high-speed connector pad, B. Hollowing diameter of the inner copper sheet of the high-speed connector pad, C. Length of the narrow line of the outlet of the high-speed connector pad, D. Hollowing width of the outer copper sheet of the outlet of the high-speed connector, E. Diameter of the peripheral GND via, F. Center distance between the peripheral GND via and the high-speed connector pad, H. Center distance between two GND holes accompanying the outlet area of ​​the high-speed connector, which are respectively arranged on both sides of the narrow line of the outlet of the high-speed connector pad and are arranged opposite to each other, K. Width of the narrow line of the outlet of the high-speed connector pad. DETAILED DESCRIPTION

[0044] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0045] It should be understood that when used in this specification and the appended claims, the term "comprising" indicates the presence of the described features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or collections.

[0046] In order to simplify the drawings, only the parts related to the present invention are schematically shown in each figure, and they do not represent the actual structure of the product. In addition, in order to simplify the drawings and facilitate understanding, in some figures, only one of the parts with the same structure or function is schematically drawn or marked. In this article, "one" not only means "only one", but also means "more than one".

[0047] It should be further understood that the term “and / or” used in the specification and appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0048] In one embodiment of the present invention, Figure 1 As shown, a PCB optimization method for a high-speed connector includes the following steps:

[0049] Establish a three-dimensional PCB model based on the PCB stack;

[0050] Import 3D high-speed connector models;

[0051] Establish emulation ports and set the operating frequency of high-speed connectors;

[0052] Parameterizing key components of the PCB that affect impedance;

[0053] The structural parameters of the key components are optimized by parameter scanning.

[0054] In this embodiment, the link between the corresponding high-speed connector and PCB is simulated by three-dimensional modeling, and the key components in the PCB that affect the impedance are optimized, which significantly improves the signal bandwidth passability of the PCB of the high-speed connector, meets the high-frequency signal path requirements of the high-speed connector to the PCB, and thus ensures the efficient operation of the high-speed connector, providing technical support for future high-speed and high-frequency application scenarios. In practical applications, the structural parameters formed in the process of optimizing the structural parameters of the key components through parameter scanning will become the final design parameters of the PCB, and the PCB can be produced and manufactured later according to the final design parameters.

[0055] In another embodiment of the present invention, Figure 2 As shown, a PCB optimization method for a high-speed connector includes the following steps:

[0056] Establish a three-dimensional PCB model based on the PCB stack;

[0057] Import 3D high-speed connector models;

[0058] Establish emulation ports and set the operating frequency of high-speed connectors;

[0059] Parameterizing key components of the PCB that affect impedance;

[0060] The structural parameters of each of the key components are optimized one by one through parameter scanning; wherein the next key component to be optimized is optimized based on the last key component that has been optimized.

[0061] In this embodiment, by further optimizing the structural parameters of the next key component that needs to be optimized based on the key component whose structural parameters have been optimized before, the structural parameters of all key components are finally achieved, thereby ensuring the optimal design, manufacturing and application of the PCB of the high-speed connector.

[0062] In another embodiment of the present invention, Figure 3 As shown, a PCB optimization method for a high-speed connector includes the following steps:

[0063] Design PCB stack-up, i.e. impedance control form;

[0064] Establish a three-dimensional PCB model based on the PCB stack;

[0065] Import 3D high-speed connector models;

[0066] Establish emulation ports and set the operating frequency of high-speed connectors;

[0067] Parameterizing key components of the PCB that affect impedance;

[0068] The structural parameters of the key components are optimized by parameter scanning.

[0069] In this embodiment, the PCB stacking can be designed before establishing the PCB three-dimensional model, which facilitates the parameterization of key components of the PCB that affect impedance, simplifies the optimization method, makes the PCB optimization more efficient and purposeful, provides a basis for the design and production of the optimized PCB, and is easier to implement and operate.

[0070] In another embodiment of the present invention, Figure 1-3 As shown, a PCB optimization method for a high-speed connector, based on any of the above embodiments, further includes the step of: establishing and pre-storing the three-dimensional high-speed connector model according to the high-speed connector. In practical applications, when the three-dimensional model of the high-speed connector itself exists, the three-dimensional model of the high-speed connector is pre-stored in a device equipped with modeling software and called.

[0071] In another embodiment of the present invention, Figure 1-8 As shown, a PCB optimization method for a high-speed connector, based on any of the above embodiments, the key components are one or more of the outer copper sheet of the high-speed connector pad, the inner copper sheet of the high-speed connector pad, the narrow line of the high-speed connector pad, the outer copper sheet of the high-speed connector line, the peripheral GND via or the GND hole accompanying the high-speed connector line outlet area. Preferably, the hollowing diameter of the outer copper sheet of the high-speed connector pad is 60mil; the hollowing diameter of the inner copper sheet of the high-speed connector pad is 40mil; the length of the narrow line of the high-speed connector pad line outlet is 105mil, and the width of the narrow line of the high-speed connector pad line outlet is 8mil; the hollowing width of the outer copper sheet of the high-speed connector line outlet is 50mil; the diameter of the peripheral GND via is 10mil, and the center distance between the peripheral GND via and the high-speed connector pad is 83mil; the center distance between the two GND holes accompanying the high-speed connector line outlet area, which are respectively arranged on both sides of the narrow line of the high-speed connector pad line outlet and are arranged oppositely, is 33mil. Preferably, the adjustable range of any value among the hollowed-out diameter of the outer copper layer of the high-speed connector pad, the hollowed-out diameter of the inner copper layer of the high-speed connector pad, the length of the narrow line of the high-speed connector pad outlet, the width of the narrow line of the high-speed connector pad outlet, the hollowed-out width of the outer copper layer of the high-speed connector outlet, the diameter of the peripheral GND via, the center distance between the peripheral GND via and the high-speed connector pad, and the center distance between two GND holes accompanying the high-speed connector outlet area which are respectively arranged on both sides of the narrow line of the high-speed connector pad outlet and are opposite to each other is ±50%.

[0072] For example, the hollowing diameter of the outer copper sheet of the high-speed connector pad is 60 mil. The hollowing diameter of the outer copper sheet of the high-speed connector pad can be optimized at 30-90 mil according to the stacking, material, size of the PCB and the operating frequency of the high-speed connector. Preferably, the total number of holes of the peripheral GND vias and the accompanying GND holes in the high-speed connector outlet area is 9 to 17. In practical applications, the number of peripheral GND vias and the accompanying GND holes in the high-speed connector outlet area may be the same or different, and the center distances of two adjacent peripheral GND vias or accompanying GND holes in the high-speed connector outlet area may be the same or different; the peripheral GND vias are GND vias arranged around the periphery of the high-speed connector pad; the accompanying GND holes in the high-speed connector outlet area are GND holes arranged beside the narrow line of the high-speed connector pad outlet; the peripheral GND vias and the accompanying GND holes in the high-speed connector outlet area are used to install copper columns. And the peripheral GND vias and the accompanying GND holes in the high-speed connector outlet area of ​​the present invention are GND holes set for corresponding high-speed connectors. Of course, it is worth pointing out that this PCB (the PCB in this article refers to the PCB of this high-speed connector) will also have other GND holes that are not related to or not close to the high-speed connector (but it does not mean that they are not related to the high-speed connector). The outer copper layer of the high-speed connector pad and the outer copper layer of the high-speed connector outlet are set on the same outer copper layer, and the outer copper layer is the layer of copper closest to the high-speed connector; and the other copper layers far away from the high-speed connector are all inner copper layers, and the inner copper layer can be one or more layers.

[0073] In another embodiment of the present invention, a PCB optimization system for a high-speed connector includes: a modeling module for establishing a three-dimensional PCB model according to the PCB stacking; an import module for importing a three-dimensional high-speed connector model; a simulation port establishment module for establishing a simulation port and setting the operating frequency of the high-speed connector; a parameterization module for parameterizing the key components of the PCB that affect the impedance; and an optimization module for optimizing the structural parameters of the key components through parameter scanning. Preferably, the optimization module includes more than one parameter input module corresponding to each key component setting, so as to optimize the structural parameters of the key component by modifying more than one parameter of each key component. Specifically, the parameter input module includes: a first input module for inputting the hollowing diameter of the outer copper foil of the high-speed connector pad; a second input module for inputting the hollowing diameter of the inner copper foil of the high-speed connector pad; a third input module for inputting the length of the narrow wire of the high-speed connector pad outlet, a fourth input module for inputting the width of the narrow wire of the high-speed connector pad outlet; a fifth input module for inputting the hollowing width of the outer copper foil of the high-speed connector outlet; a sixth input module for inputting the diameter of the peripheral GND via hole, a seventh input module for inputting the center distance between the peripheral GND via hole and the high-speed connector pad; an eighth input module for inputting the center distance between the two GND holes of the high-speed connector outlet area respectively arranged on both sides of the narrow wire of the high-speed connector pad outlet and arranged oppositely. Preferably, the modeling module can also establish a three-dimensional model of the high-speed connector.

[0074] In another embodiment of the present invention, Figure 1-8 As shown, a PCB of a high-speed connector includes: a PCB body 11, the PCB body 11 is provided with a high-speed connector pad 111, an outer copper sheet 1121 of the high-speed connector pad, an inner copper sheet 113 of the high-speed connector pad, a high-speed connector pad outlet narrow line 114, an outer copper sheet 1122 of the high-speed connector outlet, a peripheral GND via 115 or a GND hole 116 accompanying the high-speed connector outlet area; the hollowing diameter A of the outer copper sheet of the high-speed connector pad is 60 mil; the hollowing diameter B of the inner copper sheet of the high-speed connector pad is 40mil; the length C of the narrow line of the high-speed connector pad outlet is 105mil, and the width K of the narrow line of the high-speed connector pad outlet is 8mil; the hollow width D of the outer copper foil of the high-speed connector outlet is 50mil; the diameter E of the peripheral GND via is 10mil, and the center distance F between the peripheral GND via 115 and the high-speed connector pad 111 is 83mil; the center distance H between the two high-speed connector outlet area accompanying GND holes respectively arranged on both sides of the high-speed connector pad outlet narrow line and oppositely arranged is 33mil.

[0075] In another embodiment of the present invention, Figure 1-8As shown, a PCB of a high-speed connector, based on the above embodiments, the adjustable range of any value among the hollowing diameter A of the outer copper foil of the high-speed connector pad, the hollowing diameter B of the inner copper foil of the high-speed connector pad, the length C of the narrow line of the high-speed connector pad outlet, the width K of the narrow line of the high-speed connector pad outlet, the hollowing width D of the outer copper foil of the high-speed connector outlet, the diameter E of the peripheral GND via hole, the center distance F between the peripheral GND via hole 115 and the high-speed connector pad, and the center distance H between the accompanying GND holes of the two high-speed connector outlet areas respectively arranged on both sides of the narrow line of the high-speed connector pad outlet and arranged opposite to each other is ±50%.

[0076] For example, the hollowing diameter B of the inner copper foil of the high-speed connector pad is 40 mils. The hollowing diameter B of the inner copper foil of the high-speed connector pad can be optimized at 20-60 mils according to the stacking, material, size of the PCB and the operating frequency of the high-speed connector 2. Preferably, the total number of the peripheral GND vias 115 and the accompanying GND holes 116 in the high-speed connector outlet area is 9 to 17. In practical applications, the number of the peripheral GND vias 115 and the accompanying GND holes 116 in the high-speed connector outlet area can be the same or different, and the center distances of two adjacent peripheral GND vias 115 or the accompanying GND holes 116 in the high-speed connector outlet area can be the same or different; the peripheral GND vias 115 are GND vias arranged around the periphery of the high-speed connector pad; the accompanying GND holes 116 in the high-speed connector outlet area are GND holes arranged beside the high-speed connector pad outlet narrow line 114; the peripheral GND vias 115 and the accompanying GND holes 116 in the high-speed connector outlet area are used to install copper columns 117. And the peripheral GND via 115 and the accompanying GND hole 116 of the high-speed connector outlet area of ​​the present invention are GND holes set for the corresponding high-speed connector 2. Of course, it is worth explaining that the present PCB (the PCB in this article refers to the PCB of the present high-speed connector) will also set other GND holes that are not related to the high-speed connector 2 or are not set close to it (but it does not mean that it is not related to the high-speed connector 2). The outer copper skin 1121 of the high-speed connector pad (the outer copper skin arranged around the outer periphery of the high-speed connector pad 111) and the outer copper skin 1122 of the high-speed connector outlet (the outer copper skin arranged around the outer periphery of the high-speed connector outlet narrow line) are arranged on the same outer copper skin 112, and the outer copper skin 112 is the layer of copper skin closest to the high-speed connector 2; and the other copper skins far away from the high-speed connector 2 are all inner copper skins, and the inner copper skin can be one or more layers.

[0077] In order to illustrate that the signal bandwidth passing capacity of the PCB of the present invention is higher than that of the existing PCB corresponding to the high-speed connector 2, Figure 9-11 (in, Fig. 9 The horizontal axis is the frequency in GHz, and the vertical axis is the return loss; Fig.10The horizontal axis is the frequency in GHz, and the vertical axis is the insertion loss; Fig.11 The horizontal axis is nanoseconds (ns), and the vertical axis is impedance). The signal loss data after the high-speed TR70 connector and the existing PCB with ARDENT are simulated through three-dimensional modeling: the overall return loss is higher than -10db; the TDR impedance fluctuates greatly, exceeding the 10% specification; the signal insertion loss vibrates significantly, and the linearity is poor. Figure 12-14 (in, Fig.12 The horizontal axis is the frequency in GHz, and the vertical axis is the return loss; Fig.13 The horizontal axis is the frequency in GHz, and the vertical axis is the insertion loss; Fig.14 The horizontal axis is picoseconds (ps), and the vertical axis is impedance) is the signal loss data after the existing PCB is optimized by the present invention and the high-speed TR70 connector is linked through three-dimensional modeling simulation: the return loss S(25, 25) is significantly reduced, the TDR impedance fluctuation is reduced, the insertion loss S(25, 26) is significantly improved, and the linearity is enhanced. Further, Figure 15-17 (in, Fig.15 The horizontal axis is the frequency in GHz, and the vertical axis is the return loss; Fig.16 The horizontal axis is the frequency in GHz, and the vertical axis is the insertion loss; Fig.17 The horizontal axis is nanoseconds (ns), and the vertical axis is impedance). The applicant further tested the actual product to obtain measured data, and found that the measured data and the simulation data have basically the same trend, and the signal return loss and insertion loss are improved. This shows that the present invention is effective and has obvious effects, and significantly improves the bandwidth of the signal channel.

[0078] It should be noted that the above embodiments can be freely combined as needed. The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered as the protection scope of the present invention.

Claims

1. A PCB optimization method for a high-speed connector, characterized in that: Includes steps: Establish a three-dimensional PCB model based on the PCB stack; Import 3D high-speed connector models; Establish emulation ports and set the operating frequency of high-speed connectors; Parameterizing key components of the PCB that affect impedance; Optimizing the structural parameters of the key components by parameter scanning; The optimization of the structural parameters of the key components by parameter scanning specifically comprises the following steps: The structural parameters of each of the key components are optimized one by one through parameter scanning; wherein the next key component to be optimized is optimized based on the last key component that has been optimized.

2. The PCB optimization method for a high-speed connector according to claim 1, characterized in that: The key components are one or more of the outer copper layer of the high-speed connector pad, the inner copper layer of the high-speed connector pad, the narrow wire of the high-speed connector pad outlet, the outer copper layer of the high-speed connector outlet, the peripheral GND via or the GND hole accompanying the high-speed connector outlet area.

3. The PCB optimization method of the high-speed connector according to claim 2, characterized in that: The hollowing diameter of the outer copper layer of the high-speed connector pad is 30-90 mil; The hollowing diameter of the inner copper layer of the high-speed connector pad is 20-60 mil; The length of the narrow line of the high-speed connector pad is 50-150 mil, and the width of the narrow line of the high-speed connector pad is 4-12 mil; The hollowing width of the outer copper layer of the high-speed connector outlet is 25-75 mil; The diameter of the peripheral GND via is 5-15 mil, and the center distance between the peripheral GND via and the high-speed connector pad is 40-120 mil; The center distance between the two high-speed connector outlet area accompanying GND holes which are respectively arranged on both sides of the high-speed connector pad outlet narrow line and are arranged opposite to each other is 15-45 mil.

4. The PCB optimization method for a high-speed connector according to claim 3, characterized in that: The hollow diameter of the outer copper foil of the high-speed connector pad is 60 mil; the hollow diameter of the inner copper foil of the high-speed connector pad is 40 mil; the length of the narrow line of the high-speed connector pad outlet is 105 mil, and the width of the narrow line of the high-speed connector pad outlet is 8 mil; the hollow width of the outer copper foil of the high-speed connector outlet is 50 mil; the diameter of the peripheral GND via is 10 mil, and the center distance between the peripheral GND via and the high-speed connector pad is 83 mil; the center distance between the two GND holes of the high-speed connector outlet area respectively arranged on both sides of the narrow line of the high-speed connector pad outlet and arranged opposite to each other is 33 mil; and / or, The total number of the peripheral GND vias and the accompanying GND vias in the high-speed connector outlet area is 9 to 17.

5. The PCB optimization method for a high-speed connector according to any one of claims 1 to 4, characterized in that: Before establishing the three-dimensional PCB model according to the PCB stacking, the steps include: Design the PCB stack-up, i.e. the impedance control form.

6. The PCB optimization method for a high-speed connector according to any one of claims 1 to 4, characterized in that: The step of importing the three-dimensional high-speed connector model also includes: The three-dimensional high-speed connector model is established and pre-stored according to the high-speed connector.

7. A PCB optimization system for a high-speed connector, characterized in that: include: Modeling module, used to build a three-dimensional PCB model based on PCB stacking; Import module, used to import 3D high-speed connector models; A simulation port establishment module is used to establish a simulation port and set the working frequency of the high-speed connector; A parameterization module, used to parameterize key components of the PCB that affect impedance; The optimization module is used to optimize the structural parameters of the key components through parameter scanning, including the steps of optimizing the structural parameters of each key component one by one through parameter scanning; wherein the next key component to be optimized is optimized based on the last key component that has been optimized.

8. A PCB of a high-speed connector, characterized in that: The PCB optimization system of the high-speed connector according to claim 7 is optimized, comprising: A PCB body, wherein the PCB body is provided with a high-speed connector pad, an outer copper layer of the high-speed connector pad, an inner copper layer of the high-speed connector pad, a narrow line of a high-speed connector pad outlet, an outer copper layer of the high-speed connector outlet, a peripheral GND via hole or a GND hole accompanying the high-speed connector outlet area; the peripheral GND via hole is a GND via hole arranged around the periphery of the high-speed connector pad; the peripheral GND via hole and the GND hole accompanying the high-speed connector outlet area are used to install copper columns; The hollowing diameter of the outer copper layer of the high-speed connector pad is 30-90 mil; The hollowing diameter of the inner copper layer of the high-speed connector pad is 20-60 mil; The length of the narrow line of the high-speed connector pad is 50-150 mil, and the width of the narrow line of the high-speed connector pad is 4-12 mil; The hollowing width of the outer copper layer of the high-speed connector outlet is 25-75 mil; The diameter of the peripheral GND via is 5-15 mil, and the center distance between the peripheral GND via and the high-speed connector pad is 40-120 mil; The center distance between the two high-speed connector outlet area accompanying GND holes which are respectively arranged on both sides of the high-speed connector pad outlet narrow line and are arranged opposite to each other is 15-45 mil.

9. The PCB of the high-speed connector according to claim 8, characterized in that: The hollow diameter of the outer copper foil of the high-speed connector pad is 60 mil; the hollow diameter of the inner copper foil of the high-speed connector pad is 40 mil; the length of the narrow line of the high-speed connector pad outlet is 105 mil, and the width of the narrow line of the high-speed connector pad outlet is 8 mil; the hollow width of the outer copper foil of the high-speed connector outlet is 50 mil; the diameter of the peripheral GND via is 10 mil, and the center distance between the peripheral GND via and the high-speed connector pad is 83 mil; the center distance between the two GND holes of the high-speed connector outlet area respectively arranged on both sides of the narrow line of the high-speed connector pad outlet and arranged opposite to each other is 33 mil; and / or, The total number of the peripheral GND vias and the accompanying GND vias in the high-speed connector outlet area is 9 to 17.

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