A layout circuit board for a multi-device parallel power module

Abstract

The present invention discloses a layout circuit board of a multi-device parallel power module. In the layout circuit board of the multi-device parallel power module, a first lotus-shaped BNC interface (including the load positive output terminal and the load negative output terminal) is located at the center of a PCB board, and a plurality of parallel silicon carbide devices in a silicon carbide device parallel module adopt a circular layout with the first lotus-shaped BNC interface as the center; a plurality of parallel decoupling capacitors in a decoupling capacitor parallel module adopt a circular layout with the first lotus-shaped BNC interface as the center, which optimizes the arrangement position of the parallel devices, matches the circuit parasitic parameters, reduces the distribution difference of the circuit stray inductance and eliminates the current coupling effect, can change the transient current imbalance of the multi-device parallel power module, and achieve better current sharing characteristics of the parallel silicon carbide devices.

Description

Technical Field

[0001] The present invention relates to the technical field of multi-device parallel current sharing, and in particular to a layout circuit board of a multi-device parallel power module. Background Art

[0002] With the increasing requirements for efficiency, power density, reliability and maintenance, large-capacity converters are becoming more and more popular. Silicon carbide majority carrier device technology is gradually maturing, which can eliminate the limitations of silicon material device switching technology and gradually be applied to high-density and high-efficiency power converters. Due to the trade-off between current rating and chip cost, the current rating of a single commercial silicon carbide chip is usually limited to tens of amperes. The limited current carrying capacity poses a challenge to the high-current application of silicon carbide devices. In order to improve the current capability, multi-device power modules in parallel are usually used. In multi-device parallel power modules, the current distribution between parallel chips should be uniform, because the unbalanced current between devices will cause thermal imbalance and low strength of the power module. Transient current imbalance is mainly caused by the mismatch between device parameters and circuit parameters. Traditional silicon carbide parallel power modules use direct copper layout, in which the current coupling effect will aggravate transient current imbalance. Summary of the invention

[0003] The purpose of the present invention is to provide a layout circuit board for a multi-device parallel power module to solve the problem that the direct copper layout method used in traditional silicon carbide parallel power modules has a current coupling effect, which leads to an aggravation of transient current imbalance.

[0004] To achieve the above object, the present invention provides the following solutions:

[0005] A layout circuit board for a multi-device parallel power module, comprising: a PCB board and the multi-device parallel power module located on the PCB board; the multi-device parallel power module comprises: a silicon carbide device parallel module, a load positive output terminal, a load negative output terminal, a gate drive signal terminal, an auxiliary source drive signal terminal, a drain power collection terminal, a source power collection terminal and a decoupling capacitor parallel module; the silicon carbide device parallel module comprises a plurality of silicon carbide devices directly connected in parallel; the decoupling capacitor parallel module comprises a plurality of decoupling capacitors directly connected in parallel;

[0006] The load positive output terminal is respectively connected to the drain power terminal of each of the multiple silicon carbide devices and the positive terminal of each of the multiple decoupling capacitors; the load negative output terminal is respectively connected to the source power terminal of each of the multiple silicon carbide devices and the negative terminal of each of the multiple decoupling capacitors; the load positive output terminal and the load negative output terminal are led out through a first lotus-shaped BNC interface; the first lotus-shaped BNC interface is located at the center of the PCB board; the multiple silicon carbide devices are arranged in a circle with the first lotus-shaped BNC interface as the center; the multiple decoupling capacitors are arranged in a circle with the first lotus-shaped BNC interface as the center;

[0007] The gate drive signal terminals are respectively connected to the gate signal terminals of the plurality of silicon carbide devices; the auxiliary source drive signal terminals are respectively connected to the auxiliary source signal terminals of the plurality of silicon carbide devices; the gate drive signal terminals and the auxiliary source signal terminals are led out through a second lotus-shaped BNC interface; the second lotus-shaped BNC interface is arranged adjacent to the first lotus-shaped BNC interface;

[0008] The drain power collection terminal is connected to the load positive output terminal; the source power collection terminal is connected to the load negative output terminal; the drain power collection terminal and the source power collection terminal are arranged at the periphery of the PCB board.

[0009] Optionally, when the number N of the silicon carbide devices directly connected in parallel in the silicon carbide device parallel module is ≤8, the shape of the PCB board is a regular N-gon or a circle.

[0010] Optionally, when the number N of the silicon carbide devices directly connected in parallel in the silicon carbide device parallel module is greater than 8, the shape of the PCB board is circular.

[0011] Optionally, the distance between the pin end of each silicon carbide device in the silicon carbide device parallel module and the first lotus-shaped BNC interface is equal; the angular interval between two adjacent silicon carbide devices is 360° / N; and N is the number of the silicon carbide devices directly connected in parallel in the silicon carbide device parallel module.

[0012] Optionally, a pin end of each of the silicon carbide devices faces a side away from the first lotus-shaped BNC interface.

[0013] Optionally, the distance between the positive polarity terminal of each decoupling capacitor in the decoupling capacitor parallel module and the first lotus-shaped BNC interface is equal; the angular interval between two adjacent decoupling capacitors is 360° / M; and M is the number of the decoupling capacitors directly connected in parallel in the decoupling capacitor parallel module.

[0014] Optionally, the positive terminal of each of the decoupling capacitors faces a side close to the first lotus-shaped BNC interface; and the negative terminal of each of the decoupling capacitors faces a side away from the first lotus-shaped BNC interface.

[0015] Optionally, a circle formed by the multiple decoupling capacitors is located outside a circle formed by the multiple silicon carbide devices.

[0016] Optionally, the first lotus-shaped BNC interface and the second lotus-shaped BNC interface are spaced 5 mm apart.

[0017] Optionally, the number N of the silicon carbide devices directly connected in parallel in the silicon carbide device parallel module is 5; the number M of the decoupling capacitors directly connected in parallel in the decoupling capacitor parallel module is 20; and the shape of the PCB board is a regular pentagon.

[0018] According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0019] The present invention provides a layout circuit board of a multi-device parallel power module. In the layout circuit board of the multi-device parallel power module, a first lotus-shaped BNC interface (including the load positive output terminal 8 and the load negative output terminal 7) is located at the center of a PCB board 19, and a plurality of parallel silicon carbide devices in a silicon carbide device parallel module are arranged in a circle with the first lotus-shaped BNC interface as the center; a plurality of parallel decoupling capacitors in a decoupling capacitor parallel module are arranged in a circle with the first lotus-shaped BNC interface as the center, thereby optimizing the arrangement position of the parallel devices, matching the circuit parasitic parameters, reducing the distribution difference of the circuit stray inductance and eliminating the current coupling effect, being able to change the transient current imbalance of the multi-device parallel power module, and achieving better current sharing characteristics of the parallel silicon carbide devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained according to the drawings provided by the present invention without paying creative labor.

[0021] Figure 1 A schematic diagram of the structure of a layout circuit board of a multi-device parallel power module provided by an embodiment of the present invention;

[0022] Figure 2 A schematic diagram of circuit connection of a multi-device parallel power module provided by an embodiment of the present invention;

[0023] Figure 3A schematic diagram of the layout principle of a multi-device parallel power module provided in an embodiment of the present invention;

[0024] The reference numerals in the figure are: drain power collection terminal 1, first silicon carbide device 2 ( Figure 2 MOS1), the second silicon carbide device 3 ( Figure 2 MOS2), auxiliary source drive signal terminal 4 ( Figure 2 SS1), gate drive signal terminal 5 ( Figure 2 G1), the third silicon carbide device 6 ( Figure 2 MOS3), load negative output terminal 7 ( Figure 2 DC-), load positive output terminal 8 ( Figure 2 DC+), the fourth silicon carbide device 9 ( Figure 2 MOS4), the fifth silicon carbide device 10 ( Figure 2 MOS5), decoupling capacitor 11, source power collection terminal 12, drain power terminal 13 of silicon carbide device ( Figure 2 D), source power terminal 14 ( Figure 2 S), auxiliary source signal terminal 15 ( Figure 2 SS), gate signal terminal 16 ( Figure 2 G), the positive terminal 17 of the decoupling capacitor, the negative terminal 18, and the PCB board 19. DETAILED DESCRIPTION

[0025] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0026] The purpose of the present invention is to provide a layout circuit board for a multi-device parallel power module to solve the problem that the direct copper layout method used in traditional silicon carbide parallel power modules has a current coupling effect, which leads to an aggravation of transient current imbalance.

[0027] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0028] Figure 1 A schematic diagram of the structure of a layout circuit board of a multi-device parallel power module provided by an embodiment of the present invention; Figure 2 A schematic diagram of the circuit connection of a multi-device parallel power module provided by an embodiment of the present invention. Figure 1 and Figure 2The layout circuit board of the multi-device parallel power module provided by the present invention includes: a PCB board 19 and the multi-device parallel power module located on the PCB board 19. The multi-device parallel power module specifically includes: a silicon carbide device parallel module, a load positive output terminal 8 ( Figure 2 DC+), load negative output terminal 7 ( Figure 2 DC-), gate drive signal terminal 5 ( Figure 2 G1), auxiliary source drive signal terminal 4 ( Figure 2 SS1), drain power collection terminal 1, source power collection terminal 12 and decoupling capacitor parallel module. The silicon carbide device parallel module includes a plurality of silicon carbide devices directly connected in parallel; the decoupling capacitor parallel module includes a plurality of decoupling capacitors directly connected in parallel. Figure 1 and Figure 2 As shown, in the embodiment of the present invention, the silicon carbide device parallel module includes five silicon carbide devices directly connected in parallel, namely, the first silicon carbide device 2 ( Figure 2 MOS1), the second silicon carbide device 3 ( Figure 2 MOS2), the third silicon carbide device 6 ( Figure 2 MOS3), the fourth silicon carbide device 9 ( Figure 2 MOS4), the fifth silicon carbide device 10 ( Figure 2 MOS5); the decoupling capacitor parallel module includes 20 decoupling capacitors 11 ( Figure 2 (C1~C20).

[0029] The load positive output terminal 8 ( Figure 2 DC+) are connected to the drain power terminals ( Figure 2 D) and the positive terminals of the multiple decoupling capacitors. The load negative output terminal 7 ( Figure 2 DC-) are connected to the source power terminals of multiple silicon carbide devices ( Figure 2 The load positive output terminal 8 ( Figure 2 DC+) and the load negative output terminal 7 ( Figure 2 DC-) through the first lotus-shaped BNC interface ( Figure 2 Specifically, the load positive output terminal 8 ( Figure 2 DC+) to the first lotus-shaped BNC interface ( Figure 2 BCN1) interface 1, the load negative output terminal 7 ( Figure 2 DC-) connects the first lotus-shaped BNC interface ( Figure 2 Interface 2 of BCN1).

[0030] like Figure 1 As shown, the first lotus-shaped BNC interface (including the load positive output terminal 8 and the load negative output terminal 7) is located at the center of the PCB board 19. The plurality of silicon carbide devices are arranged in a circle with the first lotus-shaped BNC interface as the center. The plurality of decoupling capacitors are arranged in a circle with the first lotus-shaped BNC interface as the center. That is, the center of the circle layout coincides with the center of the PCB board 19.

[0031] like Figure 1 and Figure 2 As shown, the gate drive signal terminal 5 ( Figure 2 G1) are connected to the gate signal terminals ( Figure 2 G) connected; the auxiliary source drive signal terminal 4 ( Figure 2 SS1) are respectively connected to the auxiliary source signal terminals ( Figure 2 The gate drive signal terminal 5 ( Figure 2 G1) and the auxiliary source signal terminal 4 ( Figure 2 SS1) through the second lotus-shaped BNC interface ( Figure 2 BCNGS1) is introduced. Figure 2 As shown, the second lotus-shaped BNC interface (including the gate drive signal terminal 5 and the auxiliary source drive signal terminal 4) is arranged adjacent to the first lotus-shaped BNC interface. Preferably, the first lotus-shaped BNC interface and the second lotus-shaped BNC interface are spaced 5 mm apart.

[0032] The drain power collection terminal 1 is connected to the load positive output terminal 8; the source power collection terminal 12 is connected to the load negative output terminal 7. The drain power collection terminal 1 and the source power collection terminal 12 are arranged on the periphery of the PCB board 19.

[0033] In order to facilitate the circuit design on the PCB board 19, when the number N of the silicon carbide devices directly connected in parallel in the silicon carbide device parallel module is ≤8, the shape of the PCB board 19 is a regular N-gon or a circle. When the number N of the silicon carbide devices directly connected in parallel in the silicon carbide device parallel module is >8, the shape of the PCB board 19 is a circle.

[0034] The distances between the pin ends (including the drain power terminal 13, the source power terminal 14, the auxiliary source signal terminal 15 and the gate signal terminal 16) of each silicon carbide device in the silicon carbide device parallel module and the first lotus-shaped BNC interface are all equal. The angular interval between two adjacent silicon carbide devices is 360° / N; N is the number of silicon carbide devices directly connected in parallel in the silicon carbide device parallel module. Preferably, the pin ends of each silicon carbide device are facing the side away from the first lotus-shaped BNC interface.

[0035] The distance between the positive terminal 17 of each decoupling capacitor 11 in the decoupling capacitor parallel module and the first lotus-shaped BNC interface is equal. The angular interval between two adjacent decoupling capacitors 11 is 360° / M; M is the number of the decoupling capacitors 11 directly connected in parallel in the decoupling capacitor parallel module. Preferably, the positive terminal 17 of each decoupling capacitor 11 faces the side close to the first lotus-shaped BNC interface; the negative terminal 18 of each decoupling capacitor 11 faces the side away from the first lotus-shaped BNC interface. The circumference surrounded by the multiple decoupling capacitors is located outside the circumference surrounded by the multiple silicon carbide devices.

[0036] like Figure 1 As shown, in the embodiment of the present invention, the number of silicon carbide devices directly connected in parallel in the silicon carbide device parallel module is N=5, and the shape of the PCB board 19 is a regular pentagon. The five silicon carbide devices directly connected in parallel in the silicon carbide device parallel module adopt a circular layout, and the angle between two adjacent silicon carbide devices is 72°, and the spacing distance is the same. The number of decoupling capacitors directly connected in parallel in the decoupling capacitor parallel module is M=20; the twenty decoupling capacitors 11 directly connected in parallel in the decoupling capacitor parallel module adopt a circular layout, and the interval between two adjacent decoupling capacitors is 18°, and the spacing distance is the same. Since the center of the circular layout coincides with the center of the pentagonal PCB board 19, the circle surrounded by the five silicon carbide devices and the circle surrounded by the twenty decoupling capacitor units 11 are concentric circles.

[0037] The drain power terminals 13 of the five silicon carbide devices are simultaneously connected to the load positive output terminal 8. Since the five silicon carbide devices are arranged in a circle with the first lotus-shaped BNC interface as the center, the connection lengths between the drain power terminal 13 of each silicon carbide device and the load positive output terminal 8 are equal.

[0038] The source power terminals 14 of the five silicon carbide devices are simultaneously connected to the load negative output terminal 7. Since the five silicon carbide devices are arranged in a circle with the first lotus-shaped BNC interface as the center, the connection lengths between the source power terminal 14 of each silicon carbide device and the load negative output terminal 7 are equal.

[0039] The gate signal terminals 16 of the five silicon carbide devices are connected to the gate drive signal terminal 5 at the same time. Since the five silicon carbide devices are arranged in a circle with the first lotus-shaped BNC interface as the center, and the second lotus-shaped BNC interface is adjacent to the first lotus-shaped BNC interface, the connection lengths between the gate signal terminal 16 of each silicon carbide device and the gate drive signal terminal 5 are substantially equal.

[0040] The auxiliary source signal terminals 15 of the five silicon carbide devices are connected to the auxiliary source drive signal terminals 4 at the same time. Since the five silicon carbide devices are arranged in a circle with the first lotus-shaped BNC interface as the center, and the second lotus-shaped BNC interface is adjacent to the first lotus-shaped BNC interface, the connection lengths between the auxiliary source signal terminals 15 of each silicon carbide device and the auxiliary source drive signal terminals 4 are also basically equal.

[0041] Therefore, the present invention ensures the symmetry of the power circuit and the drive circuit of the parallel devices by adopting a three-dimensional circular layout for multiple parallel silicon carbide devices, reduces the dispersion and inconsistency of the stray inductance of the main power circuit between the devices, eliminates the current coupling effect between the parallel devices, and thus improves the uniformity of the current distribution. The symmetry mainly refers to the symmetrical distribution of the five parallel silicon carbide devices about the center of the regular pentagon, which ensures that the length of the connection between the drain of each silicon carbide device and the positive electrode of the load is equal, and the length of the connection between the source of each silicon carbide device and the negative electrode of the load is equal. The specific connection can be realized by a multi-layer board design. Specifically, the multi-layer board design adopts a six-layer PCB board, and the electrical connection of different layers is realized by punching holes on the PCB board. The connection of the driving source (G) and the auxiliary source (SS) of the silicon carbide device is wired in two layers of PCB.

[0042] In the present invention, the connection length between the gate 16 of each parallel silicon carbide power device and the gate drive signal terminal 5 is substantially equal, and the connection length between the auxiliary source 15 of each parallel silicon carbide power device and the auxiliary source drive signal terminal 4 is substantially equal. In this way, the lead inductance of the drive circuit of each silicon carbide device is designed to be the same, which can eliminate the delay difference of the drive signal. The use of a multi-layer PCB design with large-area copper plating can ensure the symmetry of the layout of the gate signal terminal 16 and the auxiliary source signal terminal 15 of the parallel device, improve the consistency of the stray inductance of the drive circuit, reduce the delay difference of the drive signal, and ensure the synchronization of the switch.

[0043] It can be seen that the parallel devices in the silicon carbide device parallel module and the decoupling capacitor parallel module of the present invention both adopt a three-dimensional circular layout, which optimizes the arrangement position of the parallel devices, matches the circuit parasitic parameters, reduces the distribution difference of the circuit stray inductance and eliminates the current coupling effect, can change the transient current imbalance of the multi-device parallel power module, and achieve better current sharing characteristics of the parallel silicon carbide devices.

[0044] Figure 3 A schematic diagram of the layout principle of a multi-device parallel power module provided by an embodiment of the present invention, such as Figure 3 As shown, U DC It is a DC voltage source used to power the power circuit of a multi-device parallel power module (referred to as power module). Figure 3 The dashed line on the right side of the figure represents the power circuit, and the dashed line on the left side represents the drive circuit. DC is the busbar capacitor, used to maintain voltage stability. L is the load inductance; D is the freewheeling diode, used to provide freewheeling when the silicon carbide device is turned off. d is the drain stray inductance, V drive It is the gate drive power supply, used to power the drive circuit. g is the driving resistor; MOS1 is the first silicon carbide device 2, L s1 Its source stray inductance and lead inductance, L sx1 MOS2 is the second silicon carbide device 3, L s2 Its source stray inductance and lead inductance, L sx2 MOS3 is the third silicon carbide device 6, L s3 Its source stray inductance and lead inductance, L sx3 MOS4 is the fourth silicon carbide device 9, L s4 Its source stray inductance and lead inductance, L sx4 MOS5 is the fifth silicon carbide device 10, L s5 Its source stray inductance and lead inductance, L sx5 is its auxiliary source lead inductance; L ss is the source lead inductance. The layout principle of the parallel module of silicon carbide devices is deduced and proved as follows:

[0045] The drain current i of SiC device D It can be expressed as follows:

[0046] i D =g fs (V GS -V th )

[0047] where gfs is the transconductance of the SiC device, V GS is the gate-source voltage, V th is the threshold voltage. V GS The driving circuit can be expressed as follows:

[0048]

[0049] where i G is the gate drive loop current, L XS represents the auxiliary source stray inductance.

[0050] Since the current in the drive circuit is very small and can be ignored, the threshold voltages of different SiC devices are close, and the unbalanced current of parallel devices is mainly affected by V GS The influence of V GS The difference can be expressed as follows:

[0051] V GS1 -V GS2 =(V G1 -V S1 )-(V G2 -V S2 )=V S2 -V S1

[0052] Where V GS1 、V GS2 Represent the gate-source voltage of two parallel SiC devices, V G1 、V G2 Represent the gate voltage of two parallel SiC devices, V S1 、V S2 Respectively represent the source voltage of two parallel silicon carbide devices.

[0053] It can be seen that V GS The difference is mainly caused by the different source voltages. The unbalanced current of two parallel silicon carbide devices can be expressed by the following expression:

[0054]

[0055] where i D2 、i D1 They represent the drain current of two parallel SiC devices, L b is the source stray inductance of the silicon carbide device MOS1, L 12 is the source lead inductance between two parallel silicon carbide devices MOS1 and MOS2. When multiple devices are connected in parallel, the source lead inductances of the two silicon carbide devices couple the currents of other devices, increasing the unbalanced current of the parallel devices.

[0056] The multi-device parallel power module of the present invention adopts a three-dimensional circular layout on the PCB board to ensure that the lead lengths of the five directly parallel silicon carbide devices in the power module are the same, so that the source lead inductance is the same, and the V GS The difference can be expressed as follows:

[0057]

[0058]

[0059]

[0060]

[0061]

[0062] Where V S1 、V S2 、V S3 、V S4 、V S5 are the source voltages of five parallel silicon carbide devices MOS1, MOS2, MOS3, MOS4, and MOS5; L S1 ~L S5 are the source stray inductance and lead inductance of five parallel-connected silicon carbide devices MOS1 to MOS5; i D1 ~i D5 They are the drain currents of five parallel-connected silicon carbide devices MOS1 to MOS5.

[0063] The above formula shows that the unbalanced current of five directly parallel-connected silicon carbide devices MOS1 to MOS5 can be expressed as follows:

[0064]

[0065]

[0066]

[0067]

[0068]

[0069] The matrix form can be expressed as:

[0070]

[0071] where i D12 =i D1 -i D2 ,i D23 =iD2 -i D3 ,i D34 =i D3 -i D4 ,i D45 =i D4 -i D5 ,i D51 =i D5 -i D1 .

[0072] The layout circuit board of the multi-device parallel power module of the present invention adopts a three-dimensional circular layout of five directly parallel silicon carbide devices, and the unbalanced current of MOS1 and MOS2 is only caused by L S1 , L S2 and D1 、i D2 The unbalanced current of MOS2 and MOS3 is determined by L S2 , L S3 and D2 、i D3 The unbalanced current of MOS3 and MOS4 is determined by L S3 , L S4 and D3 、i D4 The unbalanced current of MOS4 and MOS5 is determined by L S4 , L S5 and D4 、i D5 The unbalanced current of MOS5 and MOS1 is determined by L S5 , L S1 and D5 、i D1 That is to say, after adopting the layout mode of the multi-device parallel power module described in the present invention, there is no coupling term in the unbalanced current between the two parallel devices, which reduces the unbalanced current. Therefore, it can be proved that the three-dimensional layout mode of the present invention can eliminate the current coupling effect, reduce the unbalanced current between the parallel devices, and achieve better current sharing characteristics of the parallel silicon carbide devices.

[0073] Of course, the above layout principle description is not limited to the embodiment of the present invention. The above embodiment and drawings are only used to illustrate the technical solution of the present invention and are not intended to limit the present invention. When n devices are connected in parallel, the angle between the two devices is The layout of the present invention can also eliminate the current coupling effect. The unbalanced current between parallel devices can be expressed in the following matrix:

[0074]

[0075] where i D(n-2)(n-1) =i D(n-2)-i D(n-1) ,i Dn is the drain current of the nth parallel device.

[0076] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

[0077] This article uses specific examples to illustrate the principles and implementation methods of the present invention. The above examples are only used to help understand the device and its core ideas of the present invention. At the same time, for those skilled in the art, according to the ideas of the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A layout circuit board for a multi-device parallel power module, characterized in that: include: A PCB board and the multi-device parallel power module located on the PCB board; the multi-device parallel power module includes: a silicon carbide device parallel module, a load positive output terminal, a load negative output terminal, a gate drive signal terminal, an auxiliary source drive signal terminal, a drain power collection terminal, a source power collection terminal and a decoupling capacitor parallel module; the silicon carbide device parallel module includes a plurality of silicon carbide devices directly connected in parallel; the decoupling capacitor parallel module includes a plurality of decoupling capacitors directly connected in parallel; The load positive output terminal is respectively connected to the drain power terminal of each of the multiple silicon carbide devices and the positive terminal of each of the multiple decoupling capacitors; the load negative output terminal is respectively connected to the source power terminal of each of the multiple silicon carbide devices and the negative terminal of each of the multiple decoupling capacitors; the load positive output terminal and the load negative output terminal are led out through a first lotus-shaped BNC interface; the first lotus-shaped BNC interface is located at the center of the PCB board; the multiple silicon carbide devices are arranged in a circle with the first lotus-shaped BNC interface as the center; the multiple decoupling capacitors are arranged in a circle with the first lotus-shaped BNC interface as the center; The gate drive signal terminals are respectively connected to the gate signal terminals of the plurality of silicon carbide devices; the auxiliary source drive signal terminals are respectively connected to the auxiliary source signal terminals of the plurality of silicon carbide devices; the gate drive signal terminals and the auxiliary source signal terminals are led out through a second lotus-shaped BNC interface; the second lotus-shaped BNC interface is arranged adjacent to the first lotus-shaped BNC interface; The distance between the pin end of each silicon carbide device in the silicon carbide device parallel module and the first lotus-shaped BNC interface is equal; the angular interval between two adjacent silicon carbide devices is 360° / N; N is the number of silicon carbide devices directly connected in parallel in the silicon carbide device parallel module; The distance between the positive terminal of each decoupling capacitor in the decoupling capacitor parallel module and the first lotus-shaped BNC interface is equal; the angular interval between two adjacent decoupling capacitors is 360° / M; M is the number of the decoupling capacitors directly connected in parallel in the decoupling capacitor parallel module; The drain power collection terminal is connected to the load positive output terminal; the source power collection terminal is connected to the load negative output terminal; the drain power collection terminal and the source power collection terminal are arranged at the periphery of the PCB board.

2. The layout circuit board of a multi-device parallel power module according to claim 1, characterized in that: When the number N of the silicon carbide devices directly connected in parallel in the silicon carbide device parallel module is ≤8, the shape of the PCB board is a regular N-gon or a circle.

3. The layout circuit board of a multi-device parallel power module according to claim 1, characterized in that: When the number N of the silicon carbide devices directly connected in parallel in the silicon carbide device parallel module is greater than 8, the shape of the PCB board is circular.

4. The layout circuit board of a multi-device parallel power module according to claim 1, characterized in that: The pin end of each of the silicon carbide devices faces a side away from the first lotus-shaped BNC interface.

5. The layout circuit board of a multi-device parallel power module according to claim 1, characterized in that: The positive terminal of each of the decoupling capacitors faces a side close to the first lotus-shaped BNC interface; and the negative terminal of each of the decoupling capacitors faces a side away from the first lotus-shaped BNC interface.

6. The layout circuit board of a multi-device parallel power module according to claim 1, characterized in that: The circumference formed by the multiple decoupling capacitors is located outside the circumference formed by the multiple silicon carbide devices.

7. The layout circuit board of a multi-device parallel power module according to claim 1, characterized in that: The first lotus-shaped BNC interface and the second lotus-shaped BNC interface are spaced 5 mm apart.

8. The layout circuit board of a multi-device parallel power module according to claim 1, characterized in that: The number of the silicon carbide devices directly connected in parallel in the silicon carbide device parallel module is N=5; the number of the decoupling capacitors directly connected in parallel in the decoupling capacitor parallel module is M=20; and the shape of the PCB board is a regular pentagon.

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