Optical transceiver with heat dissipation

Abstract

An optical transceiver provides substantial thermal isolation between an IC die and an optical element in electrical communication with the IC die. The IC die is further in electrical communication with a substrate that supports the optical element and the IC die. The transceiver includes an IC heat sink configured to dissipate heat generated by the IC die. The IC die and the optical element may be substantially thermally isolated from each other to prevent heat generated from the IC die from causing overheating of the optical element.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] The present disclosure claims priority to U.S. Provisional Patent Application Serial No. 62 / 527,711 filed on June 30, 2017 and U.S. Provisional Patent Application Serial No. 62 / 614,626 filed on January 8, 2018, the disclosures of each of which are hereby incorporated by reference as if fully set forth herein.

[0003] background

[0004] An optical transceiver typically includes an optical transmitter and an optical receiver. The optical transmitter typically receives an electrical signal and activates a light source to generate an optical carrier signal corresponding to the received electrical signal for use in an optical communication system. The light source is generally a laser light source, such as a VCSEL or some other type of laser. The optical transmitter typically includes an integrated circuit (IC) die configured as a driver, which is electrically connected to the VCSEL and drives the pulses of the VCSEL. Unfortunately, VCSEL performance is reduced when operating at elevated temperatures. Depending on the type of VCSEL used, operating the VCSEL at a temperature exceeding 70C, 80C, or 85C may result in unacceptable VCSEL lifetime or electrical-to-optical conversion efficiency. Typically, the upper limit of the VCSEL operating temperature is significantly lower than the operating temperature limit of the IC, which may be located near the VCSEL. For example, the IC may have an operating temperature limit of 100C. Although the IC can withstand higher operating temperatures, the IC typically generates an order of magnitude more waste heat than the VCSEL. For example, in operation, the IC may generate 2.0 W of waste heat, while the VCSEL generates only 0.1 W of waste heat.

[0005] The optical receiver typically includes one or more photodetectors that receive an optical signal from an optical cable and convert the optical signal into an electrical signal whose current level may be proportional to the number of photons received in the optical signal per unit time. The optical receiver typically also includes a current-to-voltage converter, such as a transimpedance amplifier (TIA) that amplifies the electrical signal to a voltage level that can be used in a data communication system. The TIA is generally constructed as an integrated circuit (IC) die. As required, the IC die providing the TIA may be the same as the IC die providing the VCSEL driver, or the IC die may be a separate IC die. The photodetector is typically configured as a photodiode, which, like the VCSEL, is adversely affected by high operating temperatures. The light source of the transmitter and the photodiode of the receiver may generally be referred to as optical elements because they both involve either the conversion of an electrical signal to an optical signal or the conversion of an optical signal to an electrical signal.

[0006] Since the performance of the optical element is adversely affected by high operating temperatures, it is generally desirable to place these components near their respective IC die, which generates and / or receives high-speed electrical signals. The high-speed electrical signals can be digital signals with communication rates greater than 10 Gpbs, and in some cases can be digital signals with significantly higher rates, such as 28 Gpbs, 56 Gpbs, or even higher data rates. In order to maintain acceptable signal integrity for these high-speed signals, it is desirable to make the conductive path between the IC and the optical element as short as possible. A convenient, low-cost method of making the conductive path is to use wire bonding to electrically connect the conductive pads located on the top of the IC die and the conductive pads on the optical element.

[0007] Therefore, it is necessary to provide a thermal path to dissipate the heat generated by the closely packed optical elements and electrical components during operation. It is also necessary to provide thermal isolation between the IC and the optical elements so that the heat generated by the IC does not raise the temperature of the optical elements above their operating limits. Summary of the invention

[0008] In one aspect of the present disclosure, an optical transceiver includes a substrate defining an upper surface and a lower surface that are opposite to each other in a lateral direction, and at least one first electrical pad disposed on the upper surface. The transceiver may also include an IC heat sink, and an IC die in thermal communication with the IC heat sink, a first group of at least one IC electrical pad disposed on the IC die, and a second group of at least one IC electrical pad disposed on the IC die. The transceiver may also include a thermal conductor and an optical element in thermal communication with the thermal conductor. The transceiver may also include at least one optical element electrical pad disposed on the optical element. The transceiver may also include at least one first electrical conductor, the at least one first electrical conductor extending from a corresponding one of the at least one first electrical pad of the substrate to a corresponding one of the at least one IC electrical pad of the first group. The transceiver may also include at least one second electrical conductor, the at least one second electrical conductor extending from a corresponding one of the at least one IC electrical pad of the second group to a corresponding one of the at least one optical element electrical pad.

[0009] BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1A is an exploded perspective view of a portion of an optical transceiver according to an example;

[0011] Figure 1B is a perspective view of a portion of the optical transceiver shown in FIG1 ;

[0012] FIG. 1C is a perspective view of a portion of an optical transceiver constructed according to another example;

[0013] Figure 2 is a schematic top view of a transceiver substrate constructed according to one embodiment;

[0014] Figure 3A yes Figure 2 A top view of the transceiver substrate shown in , but including a pair of notches according to one embodiment;

[0015] Figure 3B yes Figure 3A an exploded top view of a portion of a transceiver substrate as shown, but including a pair of notches according to another embodiment;

[0016] Figure 4A is a schematic top view of an IC heat sink assembly including an IC heat sink and an IC die supported by the IC heat sink;

[0017] Figure 4B It was taken along route 4B-4B Figure 4A A cross-sectional side view of an IC heat sink assembly is shown;

[0018] Figure 4C It was taken along route 4C-4C Figure 4A A cross-sectional side view of an IC heat sink assembly is shown;

[0019] Figure 5A is a schematic top view of an optical element heat dissipation assembly including an optical element heat sink and an optical element supported by the optical element heat sink;

[0020] Figure 5B It was taken along route 5B-5B Figure 5A A side view of the optical element heat dissipation assembly is shown;

[0021] Figure 5C It was taken along route 5C-5C Figure 5A A side view of the optical element heat dissipation assembly is shown;

[0022] Figure 6 is a schematic top view of a portion of an optical transceiver, the optical transceiver comprising Figure 4A The IC heat sink assembly is shown and mounted to Figure 3A The transceiver substrate shown Figure 5A Optical element heat dissipation components;

[0023] Fig. 7A It is taken along route 7A-7A Figure 6 a cross-sectional side view of a portion of the optical transceiver shown;

[0024] Figure 7B is similar to Fig. 7A A cross-sectional side view of a portion of an optical transceiver of FIG. 1 , but showing the IC die in a tilted position;

[0025] Figure 7C is similar to Fig. 7A A cross-sectional side view of a portion of an optical transceiver including Figure 3B The transceiver substrate shown in ;

[0026] Fig. 8A It is taken along route 8A-8A Figure 6 A cross-sectional side view of a portion of the optical transceiver is shown illustrating heat dissipation paths for electrical components;

[0027] Figure 8B is similar to Fig. 8A A cross-sectional side view of a portion of an optical transceiver of FIG. 1 , but showing the transceiver substrate as including a thermally conductive layer in thermal communication with an IC heat sink;

[0028] Figure 8C is similar to Figure 8B but showing the transceiver substrate as including a thermally conductive center layer in thermal communication with both the IC die and the IC heat sink, and a peripheral thermally conductive layer in thermal communication with the IC heat sink;

[0029] Fig. 9A is a cross-sectional side view of a portion of an optical transceiver illustrating a heat dissipation path of an optical component;

[0030] Fig. 9B is a top view of an optical transceiver according to another embodiment;

[0031] Fig. 10A yes Fig. 9A a cross-sectional side view of a portion of the optical transceiver as shown, but including a heat sink in one embodiment;

[0032] Fig. 10B is similar to Fig. 10A A cross-sectional side view of a portion of an optical transceiver of the type shown in FIG. 1 but showing a heat sink constructed in accordance with another embodiment;

[0033] Fig.11 is a top view of a portion of an optical transceiver including a split heat sink according to another embodiment;

[0034] Fig. 12A is an exploded perspective view of a portion of an optical transceiver including a thermal conductor according to another example, and a heat sink, wherein the thermal conductor includes a slot separating at least one optical element from an IC die, the heat sink being in thermal communication with the thermal conductor to establish a heat conduction path;

[0035] Fig. 12B yes Fig. 12A a perspective view of a portion of an optical transceiver shown;

[0036] Fig. 12Cyes Fig. 12A a cross-sectional side view of a portion of the optical transceiver shown showing an IC heat sink in contact with a thermal conductor;

[0037] Fig.12D is similar to Fig. 12C a cross-sectional side view of a portion of an optical transceiver of the type shown in FIG. 1 but showing a thermal conductor, wherein the thermal conductor includes a first region and a second region having different heights to increase the height of the optical element;

[0038] Fig.12E is similar to Fig. 12C A cross-sectional side view of a portion of an optical transceiver of the present invention, but showing a thermal conductor in another example, wherein the thermal conductor includes a first region and a second region having different heights to reduce the height of the IC die;

[0039] Fig.12F is similar to Fig. 12C A cross-sectional side view of a portion of an optical transceiver of FIG. 1 but showing a thermal conductor supporting the IC die in an inclined position;

[0040] Fig.13A It is the top, left and front perspective views of the thermal conductor;

[0041] Fig. 13B It is the perspective view of the thermal conductor from above, from behind, and from the right;

[0042] Fig. 13C is a top view of the thermal conductor;

[0043] Fig.13D It is a bottom view of the thermal conductor;

[0044] Fig.13E It is the front view of the thermal conductor;

[0045] Fig.13F is the rear view of the thermal conductor;

[0046] Figure 13G is a right side view of the thermal conductor; and

[0047] Fig.13H It is the left side view of the thermal conductor. DETAILED DESCRIPTION

[0048] First reference Figures 1A to 1C, the optical transceiver 20 includes a transceiver substrate 22 and at least one optical element 28 supported by the substrate 22. The term "at least one" as used herein refers to examples including one and examples including a plurality. In addition, unless otherwise specified, the elements described with reference to "one" or "the" herein may also include a plurality of elements. Similarly, the elements described with reference to "a plurality" herein may also include a single element. Therefore, unless otherwise specified, the terms "one" or "an" or "the", the term "at least one" and the term "a plurality" may be used interchangeably herein.

[0049] In one example, the optical transceiver 20 may include an optical transmitter. The optical transmitter may be configured to receive an electrical signal, and to activate a light source to generate an optical carrier signal for use in an optical communication system, the optical carrier signal corresponding to the received electrical signal. Therefore, the optical transceiver may include an electrical component 24. The electrical component 24 may be configured as an electrical transmitter component. For example, the electrical transmitter component may be configured as an integrated circuit (IC). The integrated circuit may be constructed as an IC die 26, and therefore, references to the integrated circuit may apply to the IC die 26, and vice versa. The optical element 28 of the transmitter, and therefore the optical element 28 of the optical transceiver 20, may be configured as at least one light source 30, which generates and transmits an optical carrier signal corresponding to the received electrical signal. The light source is typically a laser light source, such as a VCSEL or an alternative type of laser. The IC die 26 may be in electrical communication with both the transceiver substrate 22 and the light source 30. Therefore, the IC die 26 may be configured as a light source driver, which drives the pulses of the light source 30. Therefore, the IC die 26 is in electrical communication with the optical element 28. At high operating temperatures, the performance of the light source may be adversely affected. It should be understood that the at least one optical element may include multiple optical elements as required. Generally, multiple light sources 30 are included.

[0050] Although various elements of the optical transceiver 20 have been described with reference to an optical transmitter, it should be understood that the optical transceiver 20 may alternatively or additionally include an optical receiver. The optical receiver is configured to receive an optical signal and convert the received optical signal into an electrical signal suitable for transmission in a data communication system. Therefore, the optical element 28 can be configured as a photodetector array that receives an optical signal from an optical cable and converts the optical signal into an electrical signal, the current level of which can be proportional to the number of photons in the optical signal received per unit time. The photodetector can be configured as a photodiode, the performance of which can be adversely affected at high operating temperatures. The electrical component 24 can be configured as a current-to-voltage converter, such as a transimpedance amplifier (TIA) that receives an electrical signal from a photodetector, and the transimpedance amplifier (TIA) amplifies the electrical signal to a voltage level that can be used in a data communication system. The TIA can be constructed as an IC die, so that the IC die 26 can be configured as a TIA. The IC die 26 that provides the TIA can be the same as the IC die 26 that provides the light source driver. Alternatively, separate IC dies may define the TIA and the light source driver, respectively.It should be appreciated that the optical element 28 may include one or both of at least one light source 30 and at least one photodetector, as desired.

[0051] As will be understood from the following description, the optical transceiver 20 includes a heat dissipation system that allows heat generated from both the IC die 26 and the optical element 28 to be dissipated while eliminating heat transfer from the IC die 26 to the optical element 28, or reducing the heat transfer to a level that does not adversely affect the operation of the optical element 28 compared to conventional optical transceivers. The heat dissipation system may include an IC heat sink 34 that may be mounted to or otherwise coupled to the substrate 22. Specifically, the IC heat sink 34 may be mechanically coupled to the substrate 22 by any suitable attachment member, such as one or more fasteners, solder, adhesive, etc. Therefore, it can be considered that the IC heat sink 34 may be supported by or coupled to the substrate 22. Alternatively, the IC heat sink 34 may be supported in any suitable alternative manner so as to be arranged in a position juxtaposed with the substrate 22 as desired. The IC heat sink 34 may also be referred to as an electrical component heat sink. For example, when the IC heat sink 34 is incorporated into an optical transmitter, it may be referred to as a driver heat sink. Alternatively or additionally, the IC heat sink 34 can be referred to as a converter heat sink when incorporated into an optical receiver, such that the electrical component is a current-to-voltage converter. Because the converted current-to-voltage can be configured as a TIA, the IC heat sink 34 can also be referred to as a TIA heat sink.

[0052] The IC heat sink 34 can be in thermal communication with the IC die 26 and thus be configured to dissipate heat from the IC die 26. For example, the IC die 26 can be mounted on the IC heat sink 34. The heat dissipation system can also include a thermal conductor 100 in thermal communication with the optical element 28. For example, the optical element 28 can be mounted on the thermal conductor 100. The thermal conductor 100 can be configured to dissipate heat from the optical element 28. In this regard, in some examples, the thermal conductor 100 can be referred to as the optical element heat sink 36. Therefore, unless otherwise indicated, the terms "thermal conductor" and "optical element heat sink" can be used interchangeably. In the following references Figures 12A to 12F In some of the examples described, the IC die 26 may also be mounted to the thermal conductor 100. When incorporated into an optical transmitter, the optical element heat sink 36 may also be referred to as a light source heat sink. Alternatively or additionally, when incorporated into an optical receiver, the optical element heat sink 36 may also be referred to as a photodetector heat sink. In one example, the thermal conductor 100 may be configured as a thermally conductive plate. The thermal conductor 100 may be arranged adjacent to the IC heat sink 34.

[0053] IC heat sink 34 and thermal conductor 100 can be made of materials with high thermal conductivity, such as metal or ceramic. In some embodiments, IC heat sink 34 can have a thermal expansion coefficient that substantially matches the thermal expansion coefficient of IC die 26. Similarly, optical element heat sink 36 can have a thermal expansion coefficient that substantially matches optical element 28. A non-limiting list of materials that can be used as IC heat sink 34 includes copper, copper tungsten, molybdenum, aluminum oxide, beryllium oxide, silicon carbide, diamond, aluminum nitride, carbon nanotubes, boron nitride, graphite, silver, or any other material commonly used in applications where heat dissipation is required. Similarly, a non-limiting list of materials that can be used as thermal conductor 100 includes copper, copper tungsten, molybdenum, aluminum oxide, beryllium oxide, silicon carbide, diamond, aluminum nitride, carbon nanotubes, boron nitride, graphite, silver, or any other material commonly used in applications where heat dissipation is required. IC heat sink 34 can be made of the same material as optical element heat sink 36. Alternatively, IC heat sink 34 can be made of different materials from optical element heat sink 36. IC heat sink 34 may have a heterogeneous structure, such as having a diamond layer adjacent to IC die 26, to further assist in removing heat from IC die 26. Similarly, optical element heat sink 36 may have a heterogeneous structure, such as having a diamond layer adjacent to optical element 28, to further assist in removing heat from optical element 28.

[0054] Reference now Figures 1A to 2, the transceiver substrate 22 is configured to support the integrated circuit and the optical element 28. For example, the integrated circuit can be supported by an IC heat sink 34, which in turn is supported by the substrate 22 or otherwise coupled to the substrate 22. Therefore, it can be considered that the integrated circuit is supported by the substrate 22. Similarly, the optical element 28 can be supported by an optical element heat sink 36, which in turn is supported by the substrate 22 or otherwise coupled to the substrate 22. Therefore, it can be considered that the optical element is supported by the substrate 22. As described above, the integrated circuit can be configured as an IC die 26. Therefore, the substrate 22 can be configured to support the IC die 26. In one example, the transceiver substrate 22 can be configured as a printed circuit board. The transceiver substrate 22 has a substrate body 38, which defines a first surface or upper surface 40 and a second surface or lower surface 42, and the lower surface 42 is opposite to the upper surface along the lateral direction T (see Fig. 7A ). The upper surface may be considered to be disposed above the lower surface 42. Similarly, the lower surface 42 may be considered to be disposed below the upper surface 40. Therefore, unless otherwise indicated, the terms "upper", "upwardly", "above" and their derivatives used herein may refer to the direction from the lower surface 42 to the upper surface 40. Similarly, unless otherwise indicated, the terms "lower", "downwardly", "below" and their derivatives used herein may refer to the direction from the upper surface 40 to the lower surface 42. Although the transverse direction T is shown as a vertical direction in the drawings for clarity and convenience, it should be noted that the orientation of the transverse direction T may change during use.

[0055] The thermal conductor 100 defines a first or upper surface 102 and a second or lower surface 104 that is opposite the upper surface 102 along a transverse direction T. The thermal conductor 100 may be mounted to or otherwise coupled to or supported by the upper surface 40 of the substrate 22 such that the lower surface 104 faces the upper surface 40 of the substrate 22. Therefore, unless otherwise noted, the terms "upper," "upward," "above," and derivatives thereof as used herein may refer to a direction from the lower surface 104 to the upper surface 102. Similarly, unless otherwise noted, the terms "lower," "downward," "below," and derivatives thereof as used herein may refer to a direction from the upper surface 102 to the lower surface 104. Although the transverse direction T is illustrated as a vertical direction in the drawings for clarity and convenience, it should be noted that the orientation of the transverse direction T may change during use.

[0056] The substrate body 38 further defines two pairs of opposing first and second outer edges. Specifically, the substrate body 38 can define opposing first and second outer edges 44 spaced apart from each other along a lateral direction A, wherein the lateral direction A is oriented substantially perpendicular to the transverse direction T (see Figure 6). The substrate body 38 also defines opposing first and second outer longitudinal edges 46 spaced apart from each other along a longitudinal direction L, wherein the longitudinal direction L is substantially perpendicular to each of the transverse direction T and the lateral direction A. The substrate 22 defines a thickness measured from the upper surface 40 to the lower surface 42 along the transverse direction. The substrate 22 defines a width measured from one of the side edges 44 to the other side edge 44 along the lateral direction A. The substrate 22 defines a length measured from one of the longitudinal edges 46 to the other longitudinal edge 46 along the longitudinal direction L. The thickness is less than both the width and the length. The width may be less than the length. The upper surface 40 and the lower surface 42 may each be oriented along respective planes defined by both the longitudinal direction L and the lateral direction A.

[0057] The IC heat sink 34 may include at least one raised area 35. In one example, the raised area 35 may be disposed entirely below the substrate 22, such as Figures 1A to 1B Alternatively, Figure 1C As shown, the raised area can extend above the lower surface 42 of the substrate 22. For example, the raised area 35 can extend above the upper surface 40 of the substrate 22. Therefore, the raised area 35 can extend to a height such that the upper surface 40 of the substrate 22 is disposed between the lower surface 42 and the upper surface 62 of the IC heat sink 34 at the raised area 35. In one example, the IC heat sink 34 can include opposing raised areas. The raised areas 35 can be disposed at respective ends of the IC heat sink 34. Therefore, the raised areas 35 can be disposed at respective end areas 37 of the IC heat sink 34. Therefore, the end areas 37 can be considered to define the raised areas 35. Alternatively, the end areas 37 can be free of raised areas such that the upper surface 62 of the IC heat sink 34 at the end areas is not higher than the upper surface 62 of the IC heat sink 34 at the middle area, which extends to the base 66 (see Figures 4A to 4C ). The end regions 37 can define the terminal ends of the IC heat sink along the selected direction 45. The end regions 37 can also be aligned with each other along the selected direction 45. In some examples that are more fully described below, the end regions 37 can be free of raised regions 35. The raised regions 35 can be spaced apart from each other along the selected direction 45. The selected direction 45 can be defined by a plane defined along the longitudinal direction L and the lateral direction A. The raised regions 35 can be arranged adjacent to the first and second opposing outer edges of the substrate 22 so that the outer edges are arranged between the raised regions 35 relative to the selected direction 45. In one example, the substrate 22 does not extend outwardly relative to the raised regions 35 along the selected direction 45. For example, the first and second opposing outer edges can be continuously straight and linear along their respective full lengths.

[0058] In one example, the IC heat sink 34 can be oriented such that the selection direction 45 is defined by the lateral direction A. Thus, the raised areas 35 can be spaced apart from each other along the lateral direction A. Thus, the raised areas 35 can also be aligned with each other along the lateral direction A. Thus, the first and second opposing outer edges can be defined by the side edges 44. The side edges 44 can be substantially straight and linear continuously between the opposing longitudinal edges 46 so that the outermost edges of the raised areas 35 are disposed outside of their respective bodies relative to the opposing side edges 44.

[0059] However, it should be noted that the selected direction 45 can be any suitable direction as desired. For example, the selected direction 45 can be defined by the longitudinal direction L. Therefore, the raised areas 35 can be spaced apart from each other along the lateral direction A. In addition, the raised areas 35 can be aligned with each other along the lateral direction L. Therefore, the first and second opposing outer edges can be defined by the longitudinal edge 46. The longitudinal edge 46 can be substantially straight and linear continuously between the opposing side edges 44, so that the outermost edges of the raised areas 35 are arranged outside of their respective integral bodies relative to the opposing side edges 46.

[0060] Continue to refer to Figures 1A to 2 , the substrate 22 may define a mounting area 48 configured to support an integrated circuit. In one example, the mounting area 48 may be defined by a mounting hole 50 that extends through the substrate body 38 from the upper surface 40 to the lower surface 42 along a lateral direction T. As described in more detail below, the IC die 26 may be mounted to a portion of the IC heat sink 34, which in turn is disposed in the mounting hole 50. The mounting hole 50 may have a closed perimeter along a plane defined by the longitudinal direction L and the lateral direction A. The closed perimeter may be defined by the substrate body 38.

[0061] The substrate 22 may also include at least one first electrical pad 52, such as a plurality of first electrical pads 52, disposed on the upper surface 40. In one example, the electrical pad 52 and all electrical pads described herein may be configured as wire bonding pads configured to be attached to an electrical conductor without any additional filler or adhesive such as solder, conductive epoxy, etc. The electrical pad 52 may be disposed adjacent to the mounting hole 50. Specifically, the electrical pad 52 may be disposed close to the perimeter of the mounting hole 50 to minimize the distance extending from the electrical pad 52 to the electrical conductor of the IC die 26, wherein the IC die 26 is disposed in the mounting hole 50 or aligned with the mounting hole 50 along the lateral direction T, as described in more detail below.

[0062] Furthermore, electrical pads 52 may define alignment marks that facilitate accurate positioning of mounting holes 50 relative to electrical pads 52. Specifically, mounting holes 50 may be constructed in transceiver substrate 22 such that the perimeter of mounting holes 50 is spaced a predetermined distance from electrical pads 52.

[0063] The finished dimensions of the mounting hole 50 can be formed in any suitable manner as desired to define the perimeter of the mounting hole 50. For example, the finished dimensions of the mounting hole 50 can be formed by laser routing, in which a high energy laser beam is scanned across the surface of the substrate 22 to precisely remove material from the substrate body 38. Alternatively, the finished dimensions of the mounting hole 50 can be formed by water jet cutting, conventional cutting, or any suitable alternative manufacturing technique. Certain manufacturing methods provide more precise dimensional tolerances than those obtained using conventional mechanical cutting methods. For example, laser cutting can be used to manufacture mounting holes 50 with dimensions within ±25 microns (±0.001") along the lateral direction A and the longitudinal direction L. Similarly, the distance between the perimeter of the mounting hole 50 and the electrical pad 52 can have a tolerance of ±25 microns (±0.001"). The distance from the electrical pad 52 to the mounting hole 50 can be in a range from about 50 microns to about 300 microns, such as from about 75 microns to about 200 microns, and specifically about 100 microns (0.004"). It should be understood that the terms "substantially" and "approximately" as described herein indicate that the various distances and measurements are not always exact due to a number of reasons, some of which include manufacturing tolerances. It should also be understood that the distances and measurements provided herein are by way of example, and the present disclosure should not be construed as being limited to these examples unless otherwise specified herein. As otherwise noted herein. For example, the terms "substantially" and "approximately" as used herein may encompass variations of up to 10% of the stated values. The mounting hole 50 may be sized so that the IC die 26 fits tightly within the mounting hole 50 with minimal clearance between the IC die 26 and the perimeter of the mounting hole 50, particularly in areas adjacent to the electrical pads 52. By way of example, representative dimensions for the IC die 26 and mounting hole 50 may be approximately 3 mm in width and approximately 5 mm in length, although smaller or larger IC die and mounting holes may also be used.

[0064] like Figure 3AAs shown, the substrate 22 may include at least one second electrical pad 54, such as a plurality of second electrical pads 54. The second electrical pad 54 may be arranged on the upper surface 40 of the substrate 22. Of course, it should be understood that the first electrical pad 52 and the second electrical pad 54 may be carried by any surface of the substrate 22, wherein any surface includes the upper surface 40 and the lower surface 42. The second electrical pad 54 may be arranged distally relative to the mounting hole 50 and the IC die 26. In this regard, the first electrical pads 52 of the substrate 22 may be referred to as proximal electrical pads because they are arranged proximal to the mounting hole 50 and the IC die 26. The second electrical pads 54 of the substrate 22 may be referred to as distal electrical pads. The second electrical pad 54 may be arranged adjacent to one of the outer edges of the substrate 22. For example, the second electrical pad 54 may be arranged adjacent to one of the longitudinal edges 46. The substrate 22 may include one or more electrical traces 53 carried by the substrate body 38, and the one or more electrical traces 53 are in electrical communication with corresponding electrical pads of both the proximal electrical pads 52 and the distal electrical pads 54. Therefore, the substrate 22 may be configured to transmit high-speed electrical signals between the one or more second electrical pads 54 and the one or more proximal electrical pads 52.

[0065] The second electrical pad 54 can be arranged to be in electrical and mechanical contact with the electrical connector. The electrical connector can be configured as an edge card connector. In one example, the edge card connector can be a UEC5 connector manufactured by Samtec Inc., with a principal place of business located in New Albany, IN. Thus, when the electrical connector is in electrical communication with the distal electrical pad 54 and the IC die 26 is in electrical communication with the proximal electrical pad 52, the electrical connector is arranged to be in electrical communication with the IC die 26.

[0066] like Figure 3BAs shown, the substrate 22 can define at least one heat transfer region 55. Specifically, the heat transfer region 55 can be configured to promote heat transfer through the substrate 22 in a transverse direction T. The heat transfer region 55 is offset from the mounting region 48 in one or both of the longitudinal direction L and the lateral direction A. It can therefore be considered that the heat transfer region 55 is offset from the mounting region 48 in a direction extending along a plane, which in turn is defined by the upper surface 40 of the substrate 22. Similarly, it can be considered that the heat transfer region 55 is offset from the mounting region 48 in a direction extending along a plane, which in turn is defined by the lower surface 42 of the substrate 22. Therefore, the direction can be defined by one or both of the longitudinal direction L and the lateral direction A. In one example, the at least one heat transfer region 55 can include at least one opening, the at least one opening T extending through the substrate 22 in a transverse direction. The opening can be configured as a notch 56, which extends to a corresponding at least one of the first and second opposing outer edges in a selected direction. For example, the base plate 22 may define a pair of notches 56 extending into corresponding outer edges of the first and second opposing outer edges along a selected direction. As will be understood from the following description, the IC heat sink 34 may extend into the at least one notch 56, such as each notch 56, thereby transferring heat upwardly through the base plate 22 along the lateral direction T.

[0067] Thus, the substrate 22 can define respective recessed edges 60 disposed between adjacent segments of the outer edge of the substrate 22 to define each recess 56. The recesses 56 can be spaced apart from one another along the selected direction. For example, the recesses 56 can be aligned with one another along the selected direction. When the recesses 56 extend into the substrate body 38 along the lateral direction A, the width of the substrate 22 along the lateral direction A between the first and second opposing side edges 44 is greater than the distance along the lateral direction A between the opposing recessed edges 60.

[0068] In one example, the notch 56 has a depth along the selected direction 45 that is greater than or equal to the corresponding length of the corresponding raised area 35 along the selected direction. Thus, the entire IC heat sink 34 can be disposed between the opposing first and second outer edges relative to the selected direction. Alternatively, the opposing outer surfaces of the IC heat sink 34 along the selected direction 45 can be substantially aligned with the opposing edges of the substrate 22, wherein the opposing edges of the substrate 22 are opposite to each other along the selected direction. Regardless of whether the opposing first and second outer edges are substantially straight and continuous or notched, the IC heat sink 34 provides a thermal path with low thermal resistance between the upper surface 40 of the substrate 22 and the lower surface 42 of the substrate.

[0069] As described above, in one example, the selection direction 45 may be defined by the lateral direction A. Thus, the notch 56 may extend into the outer side edge 44 . Alternatively, the selection direction 45 may be defined by the longitudinal direction L. Thus, the notch 56 may extend into the outer longitudinal edge 46 .

[0070] like Figures 1A to 2 As shown, the substrate body 38 can be a single unitary substrate body that defines the entirety of both the opposing side edges 44 and the opposing longitudinal edges 46. Alternatively, as shown in FIG. Figure 3B As shown, the substrate 22 may be a composite substrate including a plurality of (i.e., at least two) substrate bodies that collectively define the entirety of both the opposite side edges 44 and the opposite longitudinal edges 46. For example, the substrate 22 may include separate first and second plurality of substrate bodies 38a and 38b that collectively define the entirety of both the opposite side edges 44 and the opposite longitudinal edges 46. Therefore, it can be considered that the substrate 22 may include at least one substrate body that collectively defines the entirety of both the opposite side edges 44 and the opposite longitudinal edges 46.

[0071] The first substrate body 38a can define the proximal electrical pad 52 and the distal electrical pad 54, as well as the electrical traces extending between the proximal electrical pad 52 and the distal electrical pad 54. The first substrate body 38a and the second substrate body 38b can be combined to define the mounting hole 50. For example, one of the first substrate body 38a and the second substrate body 38b can define opposing first and second legs 58, which define corresponding portions of the outer perimeter of the mounting hole 50 when the first substrate body 38a and the second substrate body 38b are joined together. The legs 58 can be defined by one of the first substrate body 38a and the second substrate body 38b. Alternatively, one of the legs 58 can be defined by the first substrate body 38a, and the other of the legs 58 can be defined by the second substrate body 38b. It can therefore be considered that each of the first substrate body 38a and the second substrate body 38b can define at least a portion of the mounting hole 50.

[0072] Similarly, the substrate 22 including the first substrate body 38a and the second substrate body 38b may also define a recess 56. Specifically, the recess 56 may be defined by at least one of the first substrate body 38a and the second substrate body 38b. For example, the second substrate body 38b may define opposite recessed edges 60, and the opposite recessed edges 60 define the corresponding innermost boundaries of the recess 56. Alternatively, the first substrate body 38a may define the recessed edges 60. Alternatively, the first substrate body 38a may define one of the recessed edges 60, and the second substrate body 38b may define another of the recessed edges 60. Alternatively, each of the first substrate body 38a and the second substrate body 38b may define a corresponding portion of at least one or both of the recessed edges 60. In another example, the composite substrate 22 does not include a recess.

[0073] like Figures 4A to 4CAs shown, the IC heat sink 34 defines a middle region 39 extending between the end regions 37. For example, the middle region 39 can extend from one of the end regions 37 to another of the end regions 37. The IC heat sink 34 defines a first or upper surface 62 and a second or lower surface 64, wherein the lower surface 64 is opposite the upper surface 62 along the lateral direction T. The IC die 26 can be mounted to the upper surface of the IC heat sink 34. Specifically, the IC die 26 can be mounted to the upper surface of the IC heat sink 34 in the middle region 39.

[0074] In one example, the IC heat sink 34 may define a base 65 and a pedestal 66 extending upward from the base 65. The base 65 may be elongated along the selected direction 45. The raised area 35 may also extend upward from the base 65. Therefore, the upper surface 62 of the IC heat sink 34 at the pedestal 66 may be arranged above the upper surface 62 of the IC heat sink 34 at the middle portion, which is located between the pedestal 66 and each of the end regions 37. The upper surface 62 of the IC heat sink 34 at the middle portion may extend below the lower surface of the substrate 22. The IC die 26 may be mounted to the IC heat sink 34 with a thermally conductive epoxy, solder, or any suitable alternative attachment mechanism that provides a low thermal resistance path between the IC die 26 and the IC heat sink 34. For example, the IC die may be mounted to the pedestal 66. Specifically, the IC die 26 may be mounted to the pedestal 66 at the upper surface 62. Even though IC die 26 is disposed above the upper surface of substrate 22, IC die 26 may still be considered mounted at mounting region 48 because IC die 26 is mounted to a structure that extends through mounting hole 50. Thus, it may be considered that at least one of base 66 and IC die 26 extends at least into or through mounting hole 50.

[0075] Refer again Figures 1A to 1B As shown, the thermal conductor 100 may also include a plate aperture 106 extending therethrough from the upper surface 102 to the lower surface 104. The plate aperture 106 may be sized to accommodate one or both of the base 66 of the IC heat sink 34 and the IC die 26. As previously described with respect to the mounting hole 50 of the substrate 22, the plate aperture 106 may be sized so that the IC die 26 fits tightly into the plate aperture 106, with minimal clearance between the IC die 26 and the perimeter of the plate aperture 106, particularly in the area adjacent to the electrical pads 52 of the substrate 22. Thus, the plate aperture 106 may be substantially aligned with the mounting hole 50 of the substrate 22 along the transverse direction T. The plate aperture 106 may define an outer perimeter surrounded by the thermal conductor 100 along a plane defined by the longitudinal direction L and the lateral direction A. Alternatively, one or more ends may be open along a plane defined by the longitudinal direction L and the lateral direction A.

[0076] In one example, the base 66, the rest of the middle region 39, the end region 37, and the raised region 35 can all be integral with each other. Alternatively, the IC heat sink 34 can be made of separate components that are attached to each other. For example, one or more of the base 66, the rest of the middle region 39, the end region 37, and the raised region 35, up to the entirety, can define a discrete structure that is attached to each other and is in thermal communication with each other.

[0077] IC die 26 may have any suitable thickness in the lateral direction. As a non-limiting representative example, the thickness of the IC die may be about 250 microns, but thinner or thicker dies may be used. IC die 26 and base 66 may define respective widths. In one example, the width of IC die 26 may be greater than the width of base 66. Thus, IC die 26 may overhang one or both of the opposite edges of base 66 that define the width of base 66. The respective widths may be defined in the lateral direction A. Alternatively, the respective widths may be defined in the longitudinal direction L.

[0078] The IC die 26 may include at least one IC electrical pad 68, such as a plurality of IC electrical pads 68, arranged on the upper surface of the IC die 26. Thus, the IC electrical pad 68 may extend outwardly from the upper surface of the IC die 26 along the lateral direction T. In one example, the IC electrical pad 68 may be configured as a wire bonding pad. The IC electrical pad 68 may include a first group 68a of at least one IC electrical pad 68 arranged adjacent to the first at least one electrical pad 52 of the substrate 22. The first group 68a may include a plurality of IC electrical pads 68. The first group 68a of the IC electrical pads 68 may be arranged adjacent to the first edge 69 of the IC die 26. For example, the IC electrical pads 68 of the first group 68a may be aligned with each other along the first edge 69 of the IC die 26. In one example, the electrical pads 68 of the first group 68a may be spaced apart from the first edge 69 along a plane defined by the longitudinal direction L and the lateral direction A by a distance ranging from about 10 microns to about 200 microns, such as about 20 microns to about 50 microns.

[0079] The IC electrical pads 68 may include a second group 68b of at least one IC electrical pad 68 disposed adjacent to the optical element 28. The second group 68b may include a plurality of IC electrical pads 68. The second group 68b of the IC electrical pads 68 may be disposed adjacent to the second edge 71 of the IC die 26. For example, the IC electrical pads 68 of the second group 68b may be aligned with each other along the second edge 71 of the IC die 26. The first edge 69 may be spaced apart from the second edge 71 along a plane defined by the longitudinal direction L and the lateral direction A. For example, the first edge 69 and the second edge 71 may be opposite to each other. In one example, the first edge 69 and the second edge 71 may be opposite to each other along the longitudinal direction L. In another example, the first edge 69 and the second edge 71 may be opposite to each other along the lateral direction A. In one example, the electrical pads 68 of the second group 68b may be spaced apart from the second edge 71 by a distance of about 10 microns to about 200 microns, such as about 20 microns to about 50 microns.

[0080] As described above, the IC heat sink 34 may include opposite raised areas 35, and the opposite raised areas 35 are arranged so that the base 66 is arranged between the opposite raised areas 35. The raised areas 35 and the base 66 may have respective heights along the lateral direction T. The height of the raised areas 35 may be greater than the height of the base 66. Therefore, the upper surface 62 of the IC heat sink 34 at the raised areas 35 may be arranged above the upper surface 62 of the IC heat sink 34 at the base 66. Alternatively, the height of the raised areas 35 may be substantially equal to the height of the base 66. Therefore, the upper surface 62 of the IC heat sink 34 at the raised areas 35 may be substantially coplanar with the upper surface 62 of the IC heat sink 34 at the base 66 along a plane defined by the longitudinal direction L and the lateral direction A. Alternatively, the height of the raised areas 35 may be less than the height of the base 66. Therefore, the upper surface 62 of the IC heat sink 34 at the raised areas 35 may be arranged below the upper surface 62 of the IC heat sink 34 at the base 66.

[0081] The term "substantially coplanar" as used herein may be applicable to structures that are located in the same plane or at a distance from the same plane. In one example, the distance may be up to 200 microns. For example, the distance may be 100 microns. Specifically, the distance may be 50 microns. In addition, unless otherwise indicated, the terms "substantially coplanar" and "coplanar" are used herein as along a plane defined by the longitudinal direction L and the lateral direction A. Therefore, the terms "substantially coplanar" and "coplanar" are also used herein as along a plane defined by a selected direction 45 and a direction 73 perpendicular to the selected direction. It should be further understood that components that are substantially coplanar with each other along a plane defined by the longitudinal direction L and the lateral direction A may also be referred to as being located at substantially the same position along the transverse direction T. For example, unless otherwise indicated, the term "substantially coplanar" may include an offset of up to about 100 microns along the transverse direction T. For example, the offset may be about 50 microns. It should also be understood that the term "substantially coplanar" may include coplanarity, wherein "coplanarity" means an offset of no more than 10 microns. In one example, “coplanar” may mean that there is no offset along the transverse direction T.

[0082] When IC die 26 is mounted on base 66, upper surface 62 of IC heat sink 34 at raised area 35 may be disposed above upper surface 62 of IC die 26. In another example, upper surface 62 of IC heat sink 34 at raised area 35 may be substantially coplanar with the upper surface of IC die 26. Alternatively, upper surface 62 of IC heat sink 34 at raised area 35 may be below the upper surface of IC die 26. In yet another example, as described above, IC heat sink 34 may not have raised area 35.

[0083] Reference now Figures 5A to 5C , the optical element 28 may be mounted to the upper surface 41 of the optical element heat sink 36. Specifically, the optical element 28 may be mounted to the optical element heat sink 36 using a thermally conductive epoxy, solder, or any suitable alternative attachment mechanism that provides a low thermal resistance path between the optical element 28 and the optical element heat sink 36. For example, representative dimensions of the optical element 28 may be about 120 microns by about 300 microns by about 3 millimeters, although smaller or larger optical elements may also be used.

[0084] The optical element 28 may be mounted along a selected edge 70 of the optical element heat sink 36. The selected edge 70 may define a portion of the outer perimeter of the optical element 28 within a plane defined by the longitudinal direction L and the lateral direction A. For example, the selected edge 70 may define a boundary of the outer perimeter of the optical element 28 relative to the longitudinal direction L. Alternatively, the selected edge 70 may define a boundary of the outer perimeter of the optical element 28 relative to the lateral direction A. The selected edge 70 may face a second edge 71 of the IC heat sink 34. The optical element 28 may include at least one optical element electrical pad 72, such as a plurality of optical element electrical pads 72. For example, the optical element electrical pads 72 may be arranged on an upper surface of the optical element 28. The optical element electrical pads 72 may be arranged along the selected edge 70. For example, the optical element electrical pads 72 may be aligned with each other along the selected edge 70. In one example, the optical element electrical pad 72 can be spaced apart from the selection edge 70 along a plane defined by the longitudinal direction L and the lateral direction A by a distance ranging from about 10 microns to about 200 microns, such as from about 20 microns to about 50 microns.

[0085] For example, representative dimensions of the optical element heat sink 36 along a plane defined by the longitudinal direction L and the lateral direction A can be approximately 3 mm by approximately 10 mm, although smaller or larger optical elements can also be used. In one example, the optical element heat sink 36 can be a rectangular parallelepiped. The optical element heat sink can be made of a material with a high thermal conductivity, such as previously described with respect to the IC heat sink 34. The optical element heat sink 36 can have a thermal expansion coefficient that substantially matches the thermal expansion coefficient of the optical element 28. In one example, the optical element 28 and the optical element heat sink 36 can be made of the same material. Alternatively, the optical element 28 and the optical element heat sink 36 can be made of different materials. The optical element heat sink 36 can have a heterogeneous structure, such as having a diamond layer arranged adjacent to the optical element 28 to further assist in dissipating heat from the optical element 28.

[0086] For example Figure 6As shown, the base 65 of the IC heat sink 34 can extend along the lower surface 42 of the substrate 22. The base 66 can extend from the base 65 at least into the mounting hole 50 along the lateral direction T. For example, in one example, the base 66 can extend from the base 65 through the mounting hole 50. Therefore, a portion of the upper surface 62 of the IC heat sink 34 can be arranged above the upper surface 40 of the substrate 22. Alternatively, the upper surface 62 of the IC heat sink 34 can be arranged below the upper surface 40 of the substrate 22. Alternatively, the upper surface 62 of the IC heat sink 34 can be substantially coplanar with the upper surface 40 of the substrate 22. Therefore, when the IC die 26 is mounted to the base 66, the entirety of the IC die 26 can be arranged above the upper surface 40 of the substrate 22. Alternatively, the upper surface 40 of the substrate 22 can be aligned with a portion of the IC die 26 relative to a plane defined by the longitudinal direction L and the lateral direction A.

[0087] The end region 37 of the IC heat sink 34 can be aligned with the corresponding notch 56 of the substrate 22 along the lateral direction T. Therefore, in one example, the IC heat sink 34 does not extend outward relative to the substrate 22 relative to the plane defined by the lateral direction A and the longitudinal direction L. Alternatively, the IC heat sink 34 can extend from the notch 56 to a position spaced outward relative to the substrate 22 relative to the plane defined by the lateral direction A and the longitudinal direction L. Alternatively, as shown in Figures 1 to 2, if the substrate 22 is not notched, the end region 37 of the IC heat sink can extend outward relative to the substrate 22 along the plane defined by the lateral direction A and the longitudinal direction L. In one example, the end region 37 of the IC heat sink can extend outward relative to the substrate 22 along the lateral direction A relative to a corresponding one of the outer edges 44 of the substrate 22. Therefore, the raised region 35 can also be arranged outward relative to the substrate 22 relative to the plane defined by the lateral direction A and the longitudinal direction L. For example, the raised region 35 can be arranged outward relative to the substrate 22 along the lateral direction A. Thus, the end region 37 and the raised region 35 may be arranged outside the footprint defined by the substrate 22 .

[0088] The optical element heat sink 36 may be mounted to the substrate 22 or otherwise coupled to the substrate 22. In one example, the optical element heat sink 36 may be mounted to the upper surface 40 of the substrate 22. For example, the optical element heat sink 36 may be mechanically attached to the substrate 22 by any suitable attachment member, such as one or more fasteners, solder, adhesive, etc. Alternatively, the optical element heat sink 36 may be disposed above the upper surface 40 of the substrate 22 and not mechanically attached to the substrate 22. Thus, at least a portion of the optical element heat sink 36 may extend along the upper surface 40 of the substrate 22. At least a portion of the IC heat sink 34 described above may extend along the lower surface 42 of the substrate 22. Thus, the substrate 22 may be disposed between at least a portion of the optical element heat sink 36 and at least a portion of the IC heat sink 34 along the lateral direction. Thus, the substrate 22 may thermally isolate at least a portion of the optical element heat sink 36 from at least a portion of the IC heat sink 34. In one example, at least a portion of the optical element heat sink 36 can define a body of at least a portion of the optical element heat sink 36. For example, at least a portion of the optical element heat sink 36 can define the entire optical element heat sink 36. Similarly, at least a portion of the IC heat sink 34 can define the entire IC heat sink 34.

[0089] The optical element heat sink 36 can have a length along the selected direction 45 that is substantially equal to the length of the IC heat sink 34 along the selected direction 45. The IC heat sink 34 and the optical element heat sink 36 can have substantially equal lengths along the selected direction 45. The length can be substantially equal to the width of the substrate 22 along the selected direction 45 between opposing edges, where the opposing edges are opposite to each other along the selected direction 45. Thus, the edges can be defined by opposing first and second outer edges 44. Alternatively, the edges can be defined by opposing first and second longitudinal edges 46. If the substrate 22 includes a notch 56, the width of the substrate 22 can be defined at a location adjacent to the notch 56 (and thus not defined by the notch 60).

[0090] Thus, the IC heat sink 34 and the optical element heat sink 36 can be positioned relative to the substrate 22 such that the total width of the optical transceiver 20 along the lateral direction A is defined by the maximum width of the substrate 22. For example, neither the IC heat sink 34 nor the optical element heat sink 36 extends beyond the footprint of the substrate 22 along a plane defined by the longitudinal direction L and the lateral direction A. In one example, neither the IC heat sink 34 nor the optical element heat sink 36 extends beyond the footprint of the substrate 22 along the selected direction 45. Thus, in one example, neither the IC heat sink 34 nor the optical element heat sink extends outside the side edge 44 of the substrate 22 in the lateral direction, and neither the IC heat sink nor the optical element heat sink 36 extends outside the longitudinal edge 46 of the substrate 22 in the longitudinal direction. When the substrate 22 includes the notch 56, the IC heat sink 34 can extend outwardly from the notch 60 of the substrate 22 along the selected direction 45. Thus, the end region 37 of the IC heat sink 34 can be substantially aligned with the notch 56 along the lateral direction T. When the IC heat sink includes raised areas 35, the raised areas 35 may be disposed in corresponding recesses 56. For example, the raised areas 35 may substantially fill the recesses 56.

[0091] In some examples, when the substrate 22 does not include the notch 56, the footprint of the optical transceiver 20 along a plane defined by the longitudinal direction L and the lateral direction A can be partially defined by one or both of the IC heat sink 34 and the optical element heat sink 36. For example, one or both of the IC heat sink 34 and the optical element heat sink 36 can extend outwardly toward outer edges of the substrate 22, wherein the outer edges are spaced apart from each other along the select direction 45.

[0092] like Fig. 7A As shown, the IC heat sink 34 and the optical element heat sink 36 can be separate structures spaced apart from each other along a plane defined by the longitudinal direction L and the lateral direction A. Specifically, the IC heat sink 34 can be spaced apart from the optical element heat sink 36 along a plane defined by the longitudinal direction L and the lateral direction A to define a gap 83 therebetween (see FIG. Figures 1A to 1C). Thus, the IC heat sink 34 and the optical element heat sink 36 can be substantially thermally isolated from each other along both the selected direction 45 and the direction 73, wherein the direction 73 is perpendicular to the selected direction 45. Thus, in one example, the IC heat sink 34 may not be in mechanical contact with the optical element heat sink 36. For example, air may thermally insulate the IC heat sink 34 from the optical element heat sink 36. Of course, it should be understood that any alternative thermal insulator may be arranged between the IC heat sink 34 and the optical element heat sink 36 as desired. It should be understood that the present disclosure is not intended to limit the example where the entirety of the IC heat sink 34 and the optical element heat sink 36 are thereby isolated from each other. For example, the IC heat sink 34 may have minimal mechanical contact or thermal communication with the optical element heat sink 36. In one example, one or both of the end regions 37 of the IC heat sink 34 may be in contact with the thermal conductor 100. Alternatively or additionally, one or both of the end regions 37 of the IC heat sink 34 may be spaced apart from the thermal conductor 100. Thus, it can be considered that the IC heat sink 34 is at least substantially thermally isolated from the optical element heat sink 36.

[0093] Due to the at least substantial thermal isolation between IC heat sink 34 and optical element heat sink 36, heat generated by IC die 26 can be dissipated without conduction of heat to optical element 28 sufficient to substantially affect the operation of optical element 28. Stated further, IC heat sink 34 can define a surface on which IC die 26 is mounted that receives thermal energy from IC die 26 and receives substantially no thermal energy from optical element 28. That is, in one example, more heat generated by IC die 26 is dissipated through IC heat sink 34 than through optical element heat sink 36. For example, at least 75% of the heat generated by IC die 26 is dissipated through IC heat sink 34 than through optical element heat sink 36.

[0094] Continue to refer Fig. 7A, the transceiver 20 may include at least one first electrical conductor 74a, the at least one first electrical conductor 74a being electrically connected at a first end to a corresponding one of the at least one first electrical pad 52 of the substrate 22, and being electrically connected at a second end to a corresponding one of the first group 68a of at least one IC electrical pad 68. For example, the transceiver 20 may include a plurality of first electrical conductors 74a, the plurality of first electrical conductors 74a being electrically connected at a first end to a corresponding one of the plurality of first electrical pads 52 of the substrate 22, and being electrically connected at a second end to a corresponding one of the first group 68a of the plurality of IC electrical pads 68. The transceiver 20 may include at least one second electrical conductor 74b, the at least one second electrical conductor being electrically connected at a first end to a corresponding one of the second group 68b of the at least one IC electrical pad 68, and being electrically connected at a second end to at least one optical element electrical pad 72. For example, the transceiver 20 may include a plurality of second electrical conductors 74b electrically connected at respective first ends to a respective one of the second set 68b of the plurality of IC electrical pads 68 and electrically connected at second ends to a respective one of the plurality of optical element electrical pads 72. In one example, the electrical conductors 74a and 74b may be defined by one or more conductive wires or conductive ribbons bonded to the pads using conventional wire bonding and / or ribbon bonding techniques.

[0095] When the IC heat sink 34 and the optical element heat sink 36 are coupled to the substrate 22, the electrical pads 68 of the second group 68b of IC electrical pads can be offset relative to the optical element electrical pads 72 along the lateral direction T. Specifically, it should be noted that the upper surface of the IC die can be arranged between the upper surface 40 of the substrate 22 and the upper surface of the optical element 28 relative to the lateral direction T, as desired. Thus, the first electrical pads 52 of the substrate 22 can be offset relative to the first group 68a of IC electrical pads 68 along the lateral direction T, and the second group 68b of IC electrical pads 68 can be offset relative to the optical element electrical pads 72 along the lateral direction T. For example, the first group 68a and the second group 68b of electrical pads of the IC die 26 can be arranged along the lateral direction T between the first electrical pads 52 of the substrate 22 and the optical element electrical pads 72.

[0096] For example, it may be noted that the optical element heat sink 36 is mounted to the upper surface 40 of the substrate 22, and the optical element 28 is mounted to the upper surface 41 of the optical element heat sink 36. Thus, the upper surface 41 of the optical element heat sink 36 is offset in the lateral direction relative to the upper surface 40 of the substrate 22. Specifically, the upper surface 41 of the optical element heat sink 36 may be spaced above the upper surface 40 of the substrate 22. To keep the lengths of the first and second electrical conductors 74a, 74b substantially equal (and not increase the length of one of the electrical conductors 74a and 74b to an undesirable length), it may be desirable to arrange the upper surface of the IC die 26 at a position between the upper surface 40 of the substrate 22 and the upper surface of the optical element 28 relative to the lateral direction T. Thus, it may be considered that the upper surface of the IC die 26 is stepped relative to each of the upper surface 40 of the substrate 22 and the upper surface of the optical element 28. In one example, the first group 68a and the second group 68b of the IC electrical pads 68 can be substantially equidistantly spaced from the first electrical pad 52 and the optical element electrical pad 72 of the substrate 22 relative to the transverse direction T. Therefore, the first group 68a and the second group 68b of the IC electrical pads 68 can be substantially coplanar with each other along the corresponding planes defined by the longitudinal direction L and the lateral direction A. In one example, the first group 68a and the second group 68b of the IC electrical pads 68 can be arranged to be equidistantly spaced from each of the first electrical pad 52 and the optical element electrical pad 72 of the substrate 22 relative to the transverse direction T within about 100 microns. For example, the first group 68a and the second group 68b of the IC electrical pads 68 can be arranged to be equidistantly spaced from each of the first electrical pad 52 and the optical element electrical pad 72 of the substrate 22 relative to the transverse direction T within about 50 microns. Furthermore, the first and second groups 68 a and 68 b of the IC electrical pads 68 may be equally spaced relative to the lateral direction T from each of the first electrical pads 52 and the optical element electrical pads 72 of the substrate 22 .

[0097] As described above, IC die 26 can be mounted to base 66 on upper surface 62 of IC heat sink 34. By positioning the upper surface of IC die 26 between upper surface 40 of substrate 22 and upper surface of optical element 28, the length of electrical conductors 74a and 74b can be kept short. For example, the lengths of electrical conductors 74a and 74b can be kept substantially equal. By shortening the lengths of electrical conductors 74a and 74b, electrical conductors 74a and 74b can carry high-speed electrical signals while reducing or minimizing impedance discontinuities.

[0098] In one example, the first electrical conductor 74a and the second electrical conductor 74b may each have a length of less than 1 mm. For example, the length may be about 500 microns or less. In one example, the length may be in the range of about 50 microns to about 250 microns. It should be understood that the height of the IC heat sink base 66 may be adjusted relative to the upper surface 40 of the substrate 22 so that the first group 68a of the IC electrical pads 68 is offset relative to the first electrical pads 52 of the substrate 22 along the lateral direction T by a distance substantially equal to the offset of the second group 68b of the IC electrical pads 68 and the optical element electrical pads 72 along the lateral direction T. Wire bonding may be considered to form a stair step between the successive elements so that the difference in height required for each electrical conductor to bridge the corresponding gap is minimized.

[0099] The first group 68a of electrical pads may be aligned with corresponding first ones of the first electrical pads 52 of the substrate 22 along a plane defined by the lateral direction T and a direction 73, wherein the direction 73 is substantially perpendicular to the selected direction 45. The second group 68b of electrical pads may be aligned with corresponding ones of the optical element electrical pads 72 along a plane defined by the lateral direction T and a direction 73, wherein the direction 73 is substantially perpendicular to the selected direction 45.

[0100] The lower surface of IC die 26 and upper surface 40 of substrate 22 may be substantially located in the same plane. Alternatively, the lower surface of IC die 26 may be offset relative to upper surface 40 of substrate 22 in a lateral direction T. The upper surface of IC die 26 may be offset from upper surface 40 of substrate 22 in a lateral direction T by a distance equal to the sum of the thickness of IC die 26 in the lateral direction T and the thickness of a bonding layer that bonds IC die 26 to upper surface 62 of IC heat sink 34. Thus, in one example, if the thickness of IC die 26 is approximately 200 microns and the thickness of the bonding layer is approximately 25 microns, the upper surface of the IC die will be approximately 250 microns above upper surface 40 of substrate 22 in the lateral direction T.

[0101] Similarly, the upper surface of the optical element 28 may be offset from the upper surface 40 of the substrate 22 in the lateral direction T by a distance equal to the sum of the thickness of the optical element 28 in the lateral direction T, the thickness of the optical element heat sink 36, and the thickness of the bonding layer that bonds the optical element to the upper surface 41 of the optical element heat sink 36. Thus, for example, if the optical element is 150 microns thick, the bonding layer is 25 microns thick, and the optical element heat sink 36 is 250 microns thick, the upper surface of the optical element 28 will be 425 microns above the upper surface 40 of the substrate 22. The offset in the lateral direction T is less than the distance between the IC die 26 and the proximal electrical pad 52 of the substrate 22.

[0102] Alternatively, it should be understood that IC die 26 may lie in a plane that is angled relative to a plane defined by lateral direction A and longitudinal direction L. For example, Figure 7B As shown, IC die 26 can be tilted so that first edge 69 is offset relative to second edge 71 along lateral direction T. Specifically, first edge 69 can be arranged below second edge 71. Therefore, first group 68a of electrical pads 68 can be offset relative to second group 68b of electrical pads 68 along lateral direction T. Specifically, first group 68a can be arranged below second group 68b. When IC die 26 is as described above with respect to Fig. 7A When oriented in a plane defined by the longitudinal direction L and the lateral direction A, the first group 68a of the electrical pads 68 can be offset relative to the first electrical pads 52 of the substrate 22 along the lateral direction T by a distance that is less than the offset of the first group 68a of the electrical pads 68 relative to the first group of electrical pads 52 of the substrate 22 along the lateral direction T. In one example, the first group 68a of the electrical pads 68 can be substantially coplanar with the first electrical pads 52 of the substrate 22. Similarly, when the IC die 26 is disposed as described above with respect to Fig. 7A When oriented in a plane defined by the longitudinal direction L and the transverse direction A, the second group 68 b of the electrical pads 68 may be offset relative to the optical element electrical pads 72 along the transverse direction T by a distance that is less than the offset of the second group 68 b of the electrical pads 68 relative to the optical element electrical pads 72 along the transverse direction T. In one example, the second group 68 b of the electrical pads 68 may be substantially coplanar with the electrical pads 52 of the optical element 28.

[0103] In one example, the upper surface of IC heat sink 34 at base 66 may be angled relative to a plane defined by longitudinal direction L and lateral direction A. Thus, when IC die 26 is mounted to the upper surface of IC heat sink 34 at base, the upper surface of IC die 26 may be angled as previously described with respect to FIG. Figure 7B The way described is tilted.

[0104] Or, now refer to Figure 7C By positioning the first group 68a and the second group 68b of the IC pads 68 to be substantially coplanar with the first pad 52 and the optical element pad 72 of the substrate 22, the length of the electrical conductors 74a and 74b can be further reduced. The coplanarity can be oriented along a plane defined by the longitudinal direction L and the lateral direction A. When the first group 68a and the second group 68b of the IC pads 68 are substantially coplanar with the first pad 52 and the optical element pad 72 of the substrate 22, the electrical conductors 74a and 74b are not offset across the vertical direction, and thus the length of the electrical conductors 74a and 74b can be shortened compared to when the first group 68a and the second group 68b of the IC pads 68 are offset along the lateral direction T relative to the first pad 52 and the optical element pad 72 of the substrate 22. Figure 7CAs shown, upper surface 62 of IC die 26 may be substantially coplanar with optical element 28 .

[0105] In one example, as described above with respect to Figure 3B As described, the substrate 22 may be a composite substrate, the composite substrate comprising a separate first substrate body 38a and a second substrate body 38b, the first substrate body 38a and the second substrate body 38b jointly defining the relative side edges 44 and the relative longitudinal edges 46 of the respective wholes. The IC heat sink 34 may be mounted to the first substrate body 38a, and the optical element heat sink 36 may be mounted to the second substrate body 38b. The second substrate body 38b may be offset along the lateral direction relative to the first substrate body 38a. Specifically, the second substrate body 38b may be offset below the first substrate body 38a. Therefore, the upper surface 40 of the substrate 22 at the second substrate body 38b may be offset below the upper surface 40 of the substrate 22 at the first substrate body 38a. Similarly, the lower surface 42 of the substrate 22 at the second substrate body 38b may be offset below the lower surface 42 of the substrate 22 at the first substrate body 38a.

[0106] Thus, optical element electrical pads 72 may be positioned substantially coplanar with first electrical pads 52 of substrate 22. Furthermore, when optical element electrical pads 72 are offset relative to electrical pads 52 of substrate 22 along lateral direction T, and when optical element electrical pads 72 are substantially coplanar with electrical pads 52 of substrate 22, electrical pads 72 may be aligned with corresponding first ones of first electrical pads 52 of substrate 22 along a plane including lateral direction T and direction 73, wherein direction 73 is substantially perpendicular to selection direction 45.

[0107] Furthermore, the height of the base 66 of the IC heat sink 34 may be selected such that the first group 68a of the IC electrical pads 68 are substantially coplanar with the first electrical pads 52 of the substrate 22 along a plane defined by the longitudinal direction L and the lateral direction A, and the second group 68b of the IC electrical pads 68 are substantially coplanar with the optical element electrical pads 72 along a plane defined by the longitudinal direction L and the lateral direction A. The first group 68a of the electrical pads may also be aligned with corresponding ones of the first electrical pads 52 of the substrate 22 along a plane defined by the transverse direction T and a direction 73, wherein the direction 73 is substantially perpendicular to the selected direction 45. The second group 68b of the electrical pads may also be aligned with corresponding ones of the optical element electrical pads 72 along a plane defined by the transverse direction T and a direction 73, wherein the direction 73 is substantially perpendicular to the selected direction 45.

[0108] In another example, the substrate 22 may be made of Figure 3A. As described above, the height of the base 66 of the IC heat sink 34 can be selected so that the IC electrical pads 68 of the first group 68a are substantially coplanar with the first electrical pads 52 of the substrate 22 along the plane defined by the longitudinal direction L and the lateral direction A. In addition, a recess can be formed into the upper surface 40 of the substrate body 38. The recess can have a depth along the lateral direction that is sufficient so that when the optical element heat sink 36 is supported by the substrate 22 in the recess, the second group 68b of the IC electrical pads 68 are substantially coplanar with the optical element electrical pads 72 along the plane defined by the longitudinal direction L and the lateral direction A.

[0109] In another example, the substrate 22 may be made of Figure 3A The IC heat sink 34 may be defined by a single unitary body 38 as shown. The height of the base 66 of the IC heat sink 34 may be selected so that the IC electrical pads 68 of the second group 68b are substantially coplanar with the optical element electrical pads 72 along a plane defined by the longitudinal direction L and the lateral direction A. In addition, the first electrical pads 52 of the substrate 22 may have a height relative to the upper surface 40 of the substrate 22 that is sufficient to make the first electrical pads substantially coplanar with the first group 68a of the IC electrical pads 68.

[0110] Whether offset or substantially coplanar along the transverse direction T, it can be considered that: 1) the first group 68a of IC electrical pads 68 can be arranged adjacent to the first electrical pads 52 of substrate 22 along a plane defined by the longitudinal direction L and the lateral direction A, and 2) the second group 68b of IC electrical pads 68 can be arranged adjacent to the optical element electrical pads 72 along the plane. For example, the first group 68a of IC electrical pads 68 can be arranged adjacent to the first electrical pads 52 of substrate 22 along a direction 73, wherein the direction 73 is substantially perpendicular to the selected direction 45. Similarly, the second group 68b of IC electrical pads 68 can be arranged adjacent to the optical element electrical pads 72 along a direction 73, wherein the direction 73 is substantially perpendicular to the selected direction 45.

[0111] Reference now Fig. 8A During operation, at least a portion of the heat generated by the IC die 26 is conducted along the first heat dissipation path 85 so as to remove the generated heat from the optical element 28. The first heat dissipation path 85 can be defined by the IC heat sink 34. Alternatively, it can be understood from the following description that the first heat dissipation path 85 can be defined by both the IC heat sink 34 and the substrate 22. Therefore, it can be considered that the first heat dissipation path 85 can be at least partially defined by the IC heat sink 34.

[0112] The first heat dissipation path 85 may include a first segment 85a that flows through the substrate 22 substantially along the transverse direction T. Thus, the first segment 85a may be considered to span across the substrate 22 along the transverse direction T. Specifically, the first segment may extend downwardly through the mounting area 48. Thus, when the mounting area 48 is defined by the mounting hole 50, the first segment 85a may pass through the mounting hole 50. In this regard, it should be understood that the first segment 85a may be oriented along the transverse direction T, or may extend in a direction having the transverse direction T as a directional component. For example, the first segment 85a may flow downwardly from the IC and into the IC heat sink 34. When the IC heat sink 34 includes a base 66, the first segment 85a of the heat dissipation path 85 may flow through the base into the base 65. Furthermore, the first segment 85a may be substantially linear, i.e., the heat flow may be generally downwardly in a direction substantially parallel to the transverse direction T. Alternatively, the first segment 85a may define one or more bends.

[0113] The first heat dissipation path 85 may further include a second segment 85b extending from the first segment 85a in a direction toward the end region 37 of the IC heat sink 34. Thus, the second segment 85b may extend along the substrate 22. The second segment 85b may also be disposed below the lower surface 42 of the substrate 22. Thus, it should be understood that the second segment 85b may have a directional component extending along one or both of the longitudinal direction L and the lateral direction A. Thus, the second segment 85b may extend substantially along the selected direction 45 away from the IC die 26. It may be understood that the second segment 85b may also have a directional component along the transverse direction T. However, the directional component of the second segment 85b may be primarily along one or both of the longitudinal direction L and the lateral direction A. Furthermore, the second segment 85b may be substantially linear, i.e., the heat flow may be primarily in a direction substantially parallel to the selected direction 45. Alternatively, the second segment 85b may define one or more bends.

[0114] The first heat dissipation path 85 may also include a third segment 85c extending from the second segment 85b along the lateral direction T. In one example, the third segment 85c may extend upward through the substrate 22. For example, when the substrate 22 includes the heat transfer region 55 (see Figure 3A ), the third section 85c may travel upward through the heat transfer region 55. In one example, the third section 85c defined by the end region 37 may be constrained to a position that does not extend beyond the outer footprint of the substrate 22 relative to the respective planes defined by the lateral direction A and the longitudinal direction L (see Figures 1A to 1B ).like Figures 1A to 1B As shown, the entire IC heat sink can be arranged below the substrate 22. Alternatively, when the heat transfer area 55 is configured as a recess 56, the third section 85c can extend upward through the recess 56 (see Fig. 12BAlternatively, the third section 85c defined by the end region 37 may extend to a location outside the footprint of the substrate 22 (see Figure 1C ).

[0115] Regardless, in one example, when the IC heat sink 34 is Figure 1C When the raised region 35 is included as shown, the third segment 85c can be referred to as crossing the substrate 22 along the lateral direction T. Specifically, the third segment 85c can extend upward from a first position below the lower surface 42 of the substrate 22. The third segment 85c can extend upward from the first position to a second position above the lower surface 42 of the substrate 22. For example, the third segment 85c can extend upward from the first position to a second position above the upper surface 40 of the substrate 22. Regardless of whether the IC heat sink 34 includes the raised region 35, the third segment 85c can extend upward from the second segment 85b.

[0116] Thus, the third section 85c can be directed to be substantially opposite to the first section 85a. In addition, the third section 85c can be spaced apart from the first section 85a in a direction perpendicular to the transverse direction T. For example, the third section 85c can be spaced apart from the mounting area 48 in a direction perpendicular to the transverse direction T. The direction perpendicular to the transverse direction T can be defined by the selection direction 45. The third section 85c can extend in the transverse direction T. It can be noted that the third section 85c can also have a directional component along one or both of the longitudinal direction L and the lateral direction A. However, it can be considered that the third section 85c mainly travels in the transverse direction T. In addition, the third section 85c can be substantially linear, that is, the heat flow can be mainly upward in a direction substantially parallel to the transverse direction T. Alternatively, the third section 85c can define one or more bends.

[0117] Reference now Figure 8B , at least one heat transfer region 55 of the substrate 22 includes at least one corresponding heat conductive layer 78. The at least one heat conductive layer 78 can place the upper surface 40 of the substrate 22 in thermal communication with the lower surface 42 of the substrate 22. Because the at least one heat conductive layer 78 can be arranged circumferentially relative to the mounting area 48, the heat conductive layer 78 can be referred to as a peripheral heat conductive layer. In one example, the at least one heat conductive layer 78 can define at least a portion of the outer edge of the substrate 22. For example, the at least one heat conductive layer 78 can define at least a portion of the corresponding outer edge of the outer edge 44. Therefore, the corresponding edges of the substrate 22 defined by the heat conductive layer 78 can be spaced apart from each other along a selected direction. Alternatively, the at least one heat conductive layer 78 can be surrounded by the substrate body 38 along a plane defined by the lateral direction A and the longitudinal direction L. The at least one heat conductive layer 78 can be arranged outward from the mounting area 48. For example, the at least one heat conductive layer 78 can be arranged outward from the mounting area 48 along the selected direction 45.

[0118] In one example, each heat transfer area 55 may include a thermally conductive layer 78. Alternatively, one or two of the heat transfer areas 55 may include a thermally conductive layer 78, and another of the heat transfer areas 55 may define a recess 56 that accommodates the IC heat sink 34. In one example, the peripheral thermally conductive layer 78 may be defined by, for example, a highly thermally conductive metal block or ceramic block, or may be defined by an array of thermally conductive circumferential pillars 82 extending from the upper surface 40 through the substrate body 38 to the lower surface 42. The circumferential pillars 82 may be defined by through holes plated and filled with a metal (e.g., copper) that extend from the upper surface 40 through the substrate body 38 to the lower surface 42. The layer 78 may be integral with the substrate body 38, or attached to the substrate body 38 as desired. In this example, it should be understood that at least a portion of the third segment 85c of the first heat dissipation path 85 may be defined by the thermally conductive layer 78 at the heat transfer area 55.

[0119] In addition, if Figure 8C As shown, the substrate 22 may include a thermally conductive core layer 80 at the mounting area 48. The thermally conductive core layer 80 may place the upper surface 40 of the substrate 22 in thermal communication with the lower surface 42 of the substrate 22. In this regard, the mounting area 48 may also be referred to as a central heat transfer area. Thus, the base 66 of the IC heat sink 34 may be reduced in height or removed entirely so that the upper surface 62 of the IC heat sink 34 is in mechanical contact with the thermally conductive core layer 80 and is therefore in thermal communication with the thermally conductive core layer 80. The thermally conductive core layer 80 may be defined by, for example, a highly thermally conductive metal block or ceramic block, or may be defined by an array of thermally conductive core pillars 84 extending from the upper surface 40 through the substrate body 38 to the lower surface 42. The core pillars 84 may be defined by a through hole plated with metal (e.g., copper) and filled with metal, extending from the upper surface 40 through the substrate body 38 to the lower surface 42. The layer 80 may be integral with the substrate body 38 or attached to the substrate body 38 as desired. In one example, the peripheral thermally conductive layers 78 can be separate from the thermally conductive core layer 80 as described above. Alternatively, one or both of the peripheral thermally conductive layers 78 can be continuous with the thermally conductive core layer 80. For example, one or both of the peripheral thermally conductive layers 78 can be in contact with the thermally conductive core layer 80. Alternatively or additionally, one or both of the peripheral thermally conductive layers 78 can be integral with the thermally conductive core layer 80. In this example, it should be understood that at least a portion of the first section 85a of the first heat dissipation path 85 can be defined by the thermally conductive layer 80 at the mounting area 48. It should also be understood that in some examples, the first heat dissipation path 85 can be a thermally conductive heat dissipation path along the total length of the first heat dissipation path.

[0120] IC die 26 may be mounted to the upper surface of thermally conductive core layer 80. Thus, heat removed by IC die 26 may be conducted downwardly through thermally conductive core layer 80 to IC heat sink 34, and may be conducted to end regions 37 in the manner described above. The heat may then be conducted upwardly through peripheral thermally conductive layer 78.

[0121] As can be appreciated from the above, the first heat dissipation path 85 for the IC die 26 extends through the substrate 22 and surrounds at least a portion of the substrate 22 .

[0122] In contrast, reference Fig. 9A , the optical element heat sink 36 is disposed above the upper surface 40 of the substrate 22. Thus, the optical element heat sink 36 may at least partially or completely define a second heat dissipation path 87 for the optical element 28. The second heat dissipation path 87 is disposed above the substrate 22. In one example, the second heat dissipation path 87 does not cross the substrate 22 along the lateral direction T. Furthermore, in one example, the second heat dissipation path 87 does not wrap around the substrate 22. Instead, the entire second heat dissipation path 87 defined by the optical element heat sink 36 remains above the substrate 22. Thus, the substrate 22 may separate the second heat dissipation path 87 of the optical element 28 from at least a portion of the first heat dissipation path 85 of the IC die 26 relative to the lateral direction T. At one or more locations where the first heat dissipation path 85 and the second heat dissipation path 87 are aligned along a plane including the longitudinal direction L and the lateral direction A, the first heat dissipation path 85 and the second heat dissipation path 87 may be spaced apart from each other so as to keep the first heat dissipation path 85 and the second heat dissipation path 87 at least substantially thermally isolated from each other. It should be understood that in some examples, the second heat dissipation path 87 may be a thermally conductive heat dissipation path along the entire length of the second heat dissipation path.

[0123] It should be understood that a method for dissipating heat from an optical transceiver may be provided. The method may include the step of generating heat at an electrical component 24, the electrical component 24 being supported at a mounting area 48 of a substrate 22. The method may also include the step of dissipating at least a portion of the heat generated at the electrical component 24 through an electrical component heat sink 34, wherein the electrical component heat sink 34 is in thermal communication with the electrical component 24 along a first heat dissipation path 85. As described above, the first heat dissipation path 85 may have a first section 85a extending from the electrical component 24 through the substrate 22, a second section 85b extending from the first section 85a along the substrate 22 at a location below the substrate 22, and a third section 85c extending upward from the second section 85b so as to cross the substrate 22 at a position spaced apart from the first section 85a. The method may also include the step of generating heat at an optical element 28, wherein the optical element 28 is supported by the substrate 22 and is in electrical communication with the electrical component 24. The method may also include the step of dissipating at least a portion of the heat generated at the optical element 28 via an optical element heat sink 36 , wherein the optical element heat sink 36 is in thermal communication with the optical element 28 and is at least substantially thermally isolated from the IC heat sink 34 .

[0124] Or, if Fig. 9B As shown, it should be understood that the optical element heat sink 36 can be configured as described above with respect to the IC heat sink 34. Therefore, the optical element heat sink can include a base of an optical element mounting area 75 extending through the substrate 22. Therefore, the optical element mounting area 75 can be configured as a mounting hole 89, which extends through the substrate 22 in the transverse direction T as described above with respect to the mounting hole 50. The mounting hole 50 and the hole of the optical element mounting area 75 can be spaced apart from each other. For example, the mounting hole 50 and the hole of the optical element mounting area 75 can be spaced apart from each other in the longitudinal direction L. Alternatively, the optical element mounting area 75 can be configured as a corresponding thermally conductive core layer, as described above with respect to the thermally conductive core layer 80. Therefore, the thermally conductive core layer of the optical element mounting area 75 can be in thermal communication with the optical element heat sink 36. As described above with respect to the IC heat sink 34, the optical element heat sink 36 can include a base extending below the lower surface of the substrate 22.

[0125] The optical element heat sink 36 may also include opposing end regions 79, which may be configured as described above with respect to the end regions 37 of the IC heat sink 34. Thus, in one example, the optical element heat sink 36 may include at least one raised region 91, which may be configured as described above with respect to the raised region 35 of the IC heat sink 34. Specifically, the optical element heat sink 36 may include a pair of end regions 79, which may be spaced apart from each other and aligned with each other along the selected direction 45. In addition, the substrate 22 may include at least one heat transfer region 81 for the optical element heat sink 36. The heat transfer region 81 may be configured as described above with respect to the heat transfer region 55. Thus, the heat transfer region 81 may be configured as at least one opening extending through the substrate 22 along the lateral direction T. The raised region 91 may extend at least into or through a corresponding one of the at least one opening. The opening may be configured as a recess 93, which may be configured as described above with respect to the recess 56. The recess 93, and thus the opening, can be configured to receive the raised area 91 of the optical element heat sink 36. The raised area 91 can extend at least into or through the recess 93. The raised area 91 of the optical element heat sink 36 can be spaced apart from the raised area 35 of the IC heat sink 34, thereby defining a gap 95 that keeps the IC heat sink 34 and the optical element heat sink 36 at least substantially thermally isolated from each other. Any suitable thermally insulating material can be disposed in the gap 95, such as air or any alternative material as desired.

[0126] Alternatively, the heat transfer region 81 may include at least one peripheral heat conductive layer, such as a pair of peripheral heat conductive layers, for the optical element heat sink 36. The peripheral heat conductive layer for the optical element heat sink 36 may be configured as described above with respect to the peripheral heat conductive layer 78 of the IC heat sink 34. Thus, the end region 79 of the optical element heat sink 36 may be thermally connected to the lower surface of the heat conductive layer of the optical element heat sink 36 in the manner described above with respect to the end region 37 and the heat conductive layer 78. Thus, it should be understood that the second heat transfer path 87 may include a first segment, a second segment, and a third segment, as described above with respect to the first, second, and third segments 85a to 85c of the first heat transfer path 85 (see Fig. 8A ).

[0127] Reference now Fig. 10A, the transceiver 20 may include a thermally conductive heat sink 76 that is in mechanical contact with, and is therefore thermally connected to, the upper surface 62 of the IC heat sink 34. It should be understood that, unless otherwise noted, the term "thermally connected" as used herein should not be interpreted as being limited to direct mechanical contact. For example, the heat sink 76 may have a heat sink lower surface 77 that is in mechanical contact with, and is therefore thermally connected to, the upper surface 62 of the IC heat sink 34 at the end region 37. When the end region 37 defines a raised region 35, the heat sink 76 may be in mechanical contact with, and is therefore thermally connected to, the upper surface 62 of the IC heat sink 34 at the raised region 35. Heat generated by the IC die 26 may be transferred to the heat sink 76 via the IC heat sink 34. The heat sink 76 may include a plurality of heat dissipation structures 86, such as fins or pins, to dissipate heat into the surrounding air. The heat sink 76 may also have a recessed area 88 that extends upward into the lower surface 77. The recessed area may be aligned with the IC die 26 in a lateral direction to provide a space for the electrical conductors 74a and 74b (see Fig. 7A ), optical element 28, and a gap is provided for optical coupling to and from the optical element 28.

[0128] It should also be understood that when the substrate 22 defines at least one peripheral thermally conductive layer 78, the heat sink 76 can be in mechanical contact with, and thus in thermal communication with, the upper surface of the at least one peripheral thermally conductive layer 78. Thus, heat dissipated by the IC die 26 can flow through the mounting area 48 and through the IC heat sink 34.

[0129] like Fig. 10B As shown, at least a portion of the heat dissipated by the IC die 26 can flow from the IC die 26 to the heat sink 76 without passing through the IC heat sink 34. Specifically, the heat sink 76 can also be in mechanical contact with a portion of the upper surface of the IC die 26 and thus in thermal communication. Specifically, the heat sink 76 can define a protrusion 90 that extends downward in the lateral direction T and is in mechanical contact with the IC die 26. For example, the protrusion 90 can contact at least a portion of the upper surface of the IC die 26. The protrusion 90 can contact the upper surface of the IC die 26 at a position separated from the first group 68a and the second group 68b of the IC electrical pads 68. Therefore, the heat sink 76 can define an auxiliary heat dissipation path from the IC die 26. Specifically, the heat dissipation path can be defined directly from the upper surface of the IC die 26 through the protrusion upward to the rest of the heat sink 76 disposed above the IC die 26. A thermal adhesive or grease may be disposed between the heat sink 76 and the IC heat spreader 34 (and further between the heat sink 76 and the IC die 26, if applicable) to help provide a continuous conductive heat transfer path from the IC die 26 to the heat sink 76. The heat sink 76 may also be in mechanical contact with the optical element heat spreader 36 as desired, and thus in thermal communication.

[0130] Thus, an assembly may include a heat sink 76 configured to establish a thermal conduction path with a first component. For example, the heat sink 76 may mechanically contact the first component. In one example, the heat sink 76 may directly contact the first component at the protrusion 90 in the manner described above. The first component may be as described above with respect to Figure 1B The electrical component 24 is described. Therefore, in one example, the electrical component 24 can be configured as an IC die 26. However, it should be understood that the first component can be any suitable heat-generating component. For example, in another example, the first component can be alternatively configured as an optical component. For example, the first component can be configured as a VCSEL.

[0131] The heat sink 76 can also define a gap between the lower surface of the heat sink 76 and the second component. The gap can be oriented in the transverse direction T. For example, the upper end of the gap can be defined by the lower surface of the heat sink 76 at the recessed area 88. The lower end of the gap can be defined by the second component. Therefore, in one example, the heat sink 76 does not contact the second component. Therefore, the heat sink 76 can maintain conductive thermal isolation relative to the second component because the heat sink 76 does not contact the second component in a manner that provides a thermally conductive path for the second component. Therefore, with respect to thermal conduction, the first component and the second component are thermally isolated from each other.

[0132] The second component may be in communication with the first component. That is, a signal may be transmitted from at least one of the first component and the second component to the other of the first component and the second component. In one example, the second component may be configured as an optical component 28 of the above type. Therefore, in one example, the optical component 28 may be configured as a VCSEL. However, it should be understood that the second component may be configured as any suitable component as needed. In some other examples, for example, it is conceivable that the second component may be configured as an electrical connector in electrical communication with the first component. In one example, the electrical connector may send an electrical signal to the first component. Alternatively or additionally, the first component may send an electrical signal to the second component. The electrical signal may be configured as electrical data. Alternatively, the electrical signal may be configured as power. In examples where the first component is an integrated circuit and the second component is an electrical connector, it is conceivable that the first component and the second component may be mounted on a substrate so that at least one electrical trace of the substrate may enable the first component and the second component to be in mutual communication. In one example, the second component may include a plurality of electrical connectors, each of which is in communication with the first component. For example, the electrical connector may be arranged along a path around the second component. The heat sink 76 may be mechanically supported by the substrate or any suitable alternative structure as desired. In one example, the heat sink 76 may be mounted to the substrate.

[0133] Of course, it should be understood that the heat sink 76 can be configured to maintain a substantial thermal isolation between the first component and the second component. In addition, the heat sink 76 can be configured to maintain a substantial thermal isolation between the IC heat sink 34 and the optical element heat sink 36. In one example, now referring to Fig.11 , the first portion 76a of the heat sink 76 may be in thermal communication with the IC die 26, and the second portion 76b of the heat sink 76 may be in thermal communication with the optical element 28. For example, the first portion 76a may be in thermal communication with the IC heat sink 34, and therefore in thermal communication with the IC die 26. Alternatively or additionally, the first portion 76a may be in mechanical contact with the IC die 26. Similarly, the second portion 76b may be in thermal communication with the optical element heat sink 36, and therefore in thermal communication with the optical element 28. Alternatively or additionally, the second portion 76b may be in mechanical contact with the optical element 28. Thus, at least 75% of the heat released by the IC die 26 may be dissipated out of the heat sink 76. Similarly, at least 75% of the heat released from the optical element 28 may be dissipated out of the heat sink 76. The first portion 76a may be integral with the second portion 76b. Thus, the common heat sink 76 may define both the first portion 76a and the second portion 76b.

[0134] The common heat sink 76 can further maintain a substantial thermal isolation between the IC die 26 and the optical element 28. For example, the common heat sink 76 can define a groove 96 extending from the upper surface to the lower surface through the common heat sink 76 at one of the locations between the first portion 76a and the second portion 76b, wherein the first portion 76a and the second portion 76b are in thermal communication with the IC heat sink 34 and the optical element heat sink 36, respectively. The groove 96 can contain a thermal insulator, such as air or any suitable alternative material. For example, a glass or polymer material having a low thermal conductivity can be disposed within the groove 96. Thus, the groove 96 can define a thermal isolation region between the IC heat sink 34 and the optical element heat sink 36, thereby allowing only minimal heat transfer from the IC die 26 to the optical element 28.

[0135] It should be understood that the common heat sink 76 can define a margin 98 extending between the first portion 76a and the second portion 76b. The margin 98 can be aligned with the elongated central axis of the slot 96. However, the margin 98 can have a cumulative length along the elongated central axis of the slot 96 that is less than the length of the slot 96 along the elongated central axis. In one example, the cumulative distance can be less than 25% of the length of the slot 96 along the elongated central axis. The common heat sink 76 can be referred to as a split heat sink because it is divided into the first portion 76a and the second portion 76b, with an increased thermal resistance between the first portion 76a and the second portion 76b relative to the thermal resistance of the remaining portion of the split heat sink 76. Alternatively, the first portion 76a and the second portion 76b can be separated from each other and can define a first heat sink and a second heat sink, respectively, that are thermally connected to the IC heat sink 34 and the optical element heat sink 36.

[0136] Thus, IC heat sink 34 may define a surface to which IC die 26 is mounted, and optical element heat sink 36 may define a surface to which optical element 28 is mounted. The surfaces may be substantially thermally isolated from one another so that IC die 26 may operate at a higher temperature than optical element 28 without causing the temperature of optical element 28 to rise to a level that substantially affects the performance or life of optical element 28. It should be noted that the surface defined by IC heat sink 34 and the surface defined by optical element heat sink 36 may be surfaces of two separate heat sinks that are adjacent to and spaced apart from one another, as previously described.

[0137] Now the main reference Figures 12A to 12F 13A to 13H, although the IC die 26 and the optical element 28 can be supported by the substrate 22 in the above manner, one or both of the IC die 26 and the optical element 28 can also be supported by the substrate 22 according to another example. For example, the IC die 26 and the optical element 28 can be mounted to the thermal conductor 100. Specifically, the IC die 26 and the optical element 28 can be mounted to the upper surface 102 of the thermal conductor 100. The IC die 26 and the optical element 28 can be offset relative to each other along a direction 73 perpendicular to the selection direction 45.

[0138] The thermal conductor 100 may also include a thermal isolation groove 108 extending through the thermal conductor 100 from the upper surface 102 to the lower surface 104. The thermal isolation groove 108 is arranged between the IC die 26 and the optical element 28 along a direction 73 perpendicular to the selection direction 45. Therefore, the thermal isolation groove 108 can be arranged between the IC die 26 and the optical element 28 along the longitudinal direction L. In one example, the thermal isolation groove 108 can be defined by a perimeter, the entirety of which is surrounded by the thermal conductor 100. The perimeter can be defined by a plane defined by the longitudinal direction L and the lateral direction A. The thermal isolation groove 108 can extend a distance along the lateral direction A so as to span a majority of the width of the thermal conductor 100 along the lateral direction A. For example, the thermal isolation groove 108 can span at least 80% of the width of the thermal conductor 100 along the lateral direction A. In one example, the thermal isolation groove 108 can span at least 90% of the width of the thermal conductor 100 along the lateral direction A. For example, the thermal isolation trench 108 may span along the lateral direction A at least 95% of the width of the thermal conductor 100 .

[0139] Because the thermal isolation trench 108 is disposed between the IC die 26 and the optical element 28, the thermal isolation trench is configured to disrupt a linear heat conduction path from the IC die 26 along the thermal conductor 100 to the optical element 28. Thus, in one example, there is no straight line from the IC die 26 to any optical element 28 that does not cross the thermal isolation trench 108. Thus, with respect to heat transfer along the thermal conductor 100, the thermal isolation trench 108 can at least substantially thermally isolate the IC die 26 from the optical element 28. The thermal isolation trench 108 can define an air gap, or can alternatively be defined by any suitable thermally insulating material.

[0140] The thermal isolation groove 108 can define the middle region 107 and the corresponding first and second terminal ends 109, which extend outward from opposite ends of the middle region 107. The ends 109 can be opposite to each other along the selected direction 45 or the lateral direction A. Therefore, it should be understood that the thermal isolation groove 108 can be elongated along the selected direction 45. The middle region 107 can extend between the IC die 26 and the optical element 28. In addition, the middle region 107 can be aligned with one or both of the IC die 26 and the optical element 28. In this regard, it should be appreciated that the IC die 26 and the optical element 28 can have different lengths along the selected direction 45 or the lateral direction A. Therefore, the first portion of the middle region 107 can be aligned with the IC die 26 and the optical element 28 along the longitudinal direction L.

[0141] In addition, a second portion of the middle region 107 may extend outward relative to one of the IC die 26 and the optical element 28 relative to the lateral direction A, and may be aligned with the other of the IC die 26 and the optical element 28 along the longitudinal direction L. Therefore, each of the IC die 26 and the optical element 28 may be completely disposed between the end portions 109 relative to the selected direction 45. At least a portion of the end portion 109 of the groove 108 may extend from the middle region 107 in a direction away from the IC die 26 along the longitudinal direction L. Therefore, at least a portion of the end portion 109 may be aligned with the optical element 28 along the selected direction 45. Therefore, at least a portion of the end portion 109 may be aligned with the optical element 28 along the longitudinal direction A. Therefore, the middle region 107 and the end portion 109 may be combined so as to at least partially surround three sides of the optical element 28. In one example, the end portion 109 may be convex, with the concave surface facing the optical element 28 and spaced apart from the optical element along the lateral direction A. For example, the end portions 109 may be curved or otherwise geometrically configured such that they flare outwardly from opposite ends of the intermediate region 107 .

[0142] The thermal conductor 100 may define a first region 110 and a second region 112 that are separated by a thermal isolation groove 108 along a longitudinal direction L. Unless otherwise indicated, the first region 110 and the second region 112 are arranged on opposite sides of the groove 108 relative to the longitudinal direction L. The IC die 26 may be mounted to the upper surface 102 at the first region 110, and the optical element 28 may be mounted to the upper surface 102 at the second region 112. During operation, the thermal conductor 100 may dissipate heat from the optical element 28. Therefore, even if the IC die 26 is mounted to the thermal conductor 100, the thermal conductor may be referred to as an optical element heat sink. For example, the second region 112 of the thermal conductor may define an optical element heat sink.

[0143] The thermal isolation groove 108 can define a width suitable for thermally isolating the IC die 26 from the optical element 28. The width can be perpendicular to the thickness of the thermal conductor 100, and further perpendicular to the length of the thermal isolation groove 108 at the measurement of the width. When the thermal conductor 100 is a plane along a plane defined by the lateral direction A and the longitudinal direction L, the thickness is oriented along the transverse direction T. In one example, the width can be within a range of about 25 microns at a lower limit and 500 microns at an upper limit, such as in applications with low data transmission rates. In high-speed data applications, the lower limit of the range can be about 25 microns, and the upper limit of the range can be about 200 microns. For example, the lower limit of the range can be about 50 microns, and the upper limit of the range can be about 150 microns. It should be understood that in one example, the width of the groove 108 can be constant from the upper surface 102 to the lower surface 104. In another example, the groove 108 can flare outward as it extends downward between the upper surface 102 and the lower surface 104. For example, the groove 108 can flare outward from the upper surface 102 to the lower surface 104. In one example, the groove 108 can flare outward straight and linearly. Alternatively, at least a portion of the groove 108 can flare outward in a curved line. Alternatively, the groove 108 can flare outward along one or more straight lines and straight line segments. Therefore, the width of the groove 108 at the upper surface 102 can be less than the width of the groove at the lower surface 104.

[0144] The thickness of the thermal conductor 100 may be within a range of about 150 microns at a lower limit and about 300 microns at an upper limit. For example, the thickness of the thermal conductor 100 may be about 150 microns. The thickness may be measured at any position between the slot or IC die 26 and the optical element 28. The thickness may be constant along the thermal conductor 100 in the region coplanar along the lateral direction A and the longitudinal direction L. Therefore, when the entire thermal conductor 100 is a plane, the thickness of the thermal conductor 100 may be constant along the entire thermal conductor 100.

[0145] The IC heat sink 34 can be constructed in the above manner. For example, the base 65 of the IC heat sink 34 can extend along the lower surface 42 of the substrate 22 as described above. Therefore, the base 65 of the IC heat sink 34 can be spaced apart from the thermal conductor 100 along the lateral direction T. The raised area 35 can extend at least into the recess 56 of the substrate 22 along the lateral direction T. Therefore, the upper surface 62 of the IC heat sink 34 at the raised end area 37 can be arranged above the lower surface 42 of the substrate 22 relative to the lateral direction T. In one example, the upper surface 62 of the IC heat sink 34 at the raised end area 37 can be arranged above the lower surface 42 of the substrate 22 and between the upper surface 40 relative to the lateral direction T. In another example, the raised end area 37 can extend above the substrate 22. Therefore, the upper surface 40 of the substrate 22 can be arranged between the lower surface 42 of the substrate 22 and the upper surface 62 of the IC heat sink 34 at the raised end area 37 relative to the lateral direction T. The raised end region 37 can be spaced apart from the thermal conductor 100. Alternatively, the raised end region 37 can contact the thermal conductor 100 as desired. Furthermore, in one example, the end region 37 can be confined within the footprint of the substrate 22 along a plane defined by the lateral direction A and the longitudinal direction L. Thus, in one example, the raised end region 37 does not extend outwardly relative to the footprint of the substrate 22.

[0146] In addition, the base 66 can extend from the base 65 at least into the mounting hole 50 of the substrate 22 along the lateral direction T. For example, in one example, the base 66 can extend from the base 65 through the mounting hole 50. The upper surface 62 of the IC heat sink 34 at the base 66 can contact the lower surface 104 of the thermal conductor 100. Therefore, the IC heat sink 34 can be in thermal communication with the thermal conductor 100. In this regard, it should be noted that the thermal conductor 100 can extend over at least a portion of the mounting hole 50 of the substrate 22. For example, the thermal conductor 100 can extend over the entirety of the mounting hole 50. In one example, at least a portion of the upper surface 62 of the IC heat sink 34 at the base 66 can be in surface contact with the lower surface 104 of the thermal conductor 100. For example, the entirety of the upper surface 62 of the IC heat sink 34 at the base 66 can be in surface contact with the lower surface 104 of the thermal conductor 100.

[0147] In addition, at least a portion of the pedestal 66 can be aligned with at least a portion of the IC die 26 mounted to the upper surface 102 along the lateral direction T. In one example, the pedestal 66 can be aligned with the IC die 26 along the lateral direction T. Therefore, the IC die 26 is in thermal communication with the IC heat sink 34 through the thermal conductor 100. Specifically, heat can be conductively dissipated from the IC die 26 to the pedestal 66 by flowing through the thermal conductor 100 along the lateral direction T. The IC heat sink 34 can be used as described above with respect to Figures 8A to 8CIn the manner described, heat is conducted and dissipated from the base 66. The thermal isolation trench 108 substantially thermally isolates the optical element 28 from the IC heat sink 34.

[0148] As described above, a first end of at least one first electrical conductor 74a may be electrically connected to a corresponding first electrical pad in at least one first electrical pad 52 of substrate 22, and a second end of at least one first electrical conductor 74a may be electrically connected to a corresponding IC electrical pad in the first group 68a of at least one IC electrical pad 68. For example, transceiver 20 may include a plurality of first electrical conductors 74a electrically connected at a first end to a corresponding first electrical pad in the plurality of first electrical pads 52 of substrate 22, and electrically connected at a second end to a corresponding IC electrical pad in the first group 68a of the plurality of IC electrical pads 68. Furthermore, as described above, a first end of at least one second electrical conductor 74b may be electrically connected to a corresponding IC electrical pad in the second group 68b of at least one IC electrical pad 68, and a second end of at least one second electrical conductor 74b may be electrically connected to at least one optical element electrical pad 72. For example, the transceiver 20 may include a plurality of second electrical conductors 74b electrically connected at respective first ends to a respective one of the second set 68b of the plurality of IC electrical pads 68 and electrically connected at second ends to a respective one of the plurality of optical element electrical pads 72. In one example, the electrical conductors 74a and 74b may be defined by one or more of conductive wires or conductive ribbons bonded to the pads using conventional wire and / or ribbon bonding techniques.

[0149] like Fig. 12C As shown, IC die 26 may have a height greater than optical element 28. Thus, an upper surface of optical element 28 may be disposed between an upper surface of IC die 26 and an upper surface of substrate 22 relative to lateral direction T. Thus, a length of at least one first electrical conductor 74a may be greater than a length of at least one second electrical conductor 74b. Upper surface 102 at first region 110 may be substantially coplanar with upper surface 102 at second region 112.

[0150] like Fig.12DAs shown, in one example, at least one IC electrical pad 68 of the second group 68b can be at least substantially coplanar with at least one optical element electrical pad 72. For example, the upper surface 102 of the thermal conductor 100 at the second region 112 can have a height along the lateral direction T that is greater than the height of the upper surface 102 of the thermal conductor at the first region 110. In one example, the second region 112 of the thermal conductor can define a thickness along the lateral direction T from the upper surface 102 to the lower surface 104 that is greater than the thickness of the first region 110. Therefore, when the optical element 28 is mounted to the upper surface 102 at the second region 112, the at least one IC electrical pad 68 of the second group 68b can be at least substantially coplanar with at least one optical element electrical pad 72.

[0151] like Fig.12E As shown, the first electrical pads 52 of the substrate 22 may be offset relative to the first group 68a of the IC electrical pads 68 along the lateral direction T, and the second group 68b of the IC electrical pads 68 may be offset relative to the optical element electrical pads 72 along the lateral direction T. For example, the first group 68a and the second group 68b of the electrical pads of the IC die 26 may be arranged between the first electrical pads 52 and the optical element electrical pads 72 of the substrate 22 along the lateral direction T. For example, at least the recessed portion 114 of the upper surface 102 of the first region 110 of the thermal conductor 100 may be recessed relative to the upper surface 102 of the second region 112 of the thermal conductor 100 along the lateral direction T. In addition, a portion 114 of the upper surface 102 of the first region 110 may be recessed relative to at least one other portion of the upper surface 102 of the first region 110. The portion 114 may extend into the mounting hole 50 of the substrate 22. Therefore, the upper surface 102 of the portion 114 may be recessed relative to the upper surface 40 of the substrate 22.

[0152] The IC die 26 may be mounted to the upper surface 102 at the recessed portion 114. In one example, the upper surface 102 at the recessed portion 114 may be recessed a distance in the lateral direction relative to the upper surface 102 at the second region 112 so that the first electrical pads 52 of the substrate 22 are offset relative to the first group 68a of the IC electrical pads 68 along the lateral direction T, and the second group 68b of the IC electrical pads 68 may be offset relative to the optical element electrical pads 72 along the lateral direction T. For example, the first group 68a and the second group 68b of the IC electrical pads 68 may be substantially equidistantly spaced from the first electrical pads 52 of the substrate 22 and the optical element electrical pads 72 relative to the lateral direction T. Thus, the first group 68a and the second group 68b of the IC electrical pads 68 may be substantially coplanar with each other along respective planes defined by the longitudinal direction L and the lateral direction A. Alternatively, the upper surface 102 at the recessed portion 114 may be recessed a distance in the lateral direction T relative to the upper surface 102 at the second region 112 so that the IC pads 68 of the second group 68 b of IC pads 68 are substantially coplanar with the optical element pads 72 .

[0153] Or, refer to Fig.12F , the first group 68a of the IC electrical pads can be at least substantially coplanar with the electrical pads 52 of the substrate 22. In addition, the second group 68b of the IC electrical pads can be substantially coplanar with the optical element electrical pads 72. For example, the IC die 26 can be tilted so that the first edge 69 is offset relative to the second edge 71 along the lateral direction T. Specifically, the first edge 69 can be arranged below the second edge 71. Therefore, the first group 68a of the electrical pads 68 can be offset relative to the second group 68b of the electrical pads 68 along the lateral direction T. Specifically, the first group 68a can be arranged below the second group 68b. The first group 68a of the electrical pads 68 can be offset relative to the first electrical pads 52 of the substrate 22 along the lateral direction T by a distance compared to when the IC die 26 is as described above with respect to Fig. 7A When the IC die 26 is oriented in a plane defined by the longitudinal direction L and the lateral direction A, the first group 68a of the electrical pads 68 is offset relative to the first electrical pads 52 of the substrate 22 along the transverse direction T by a smaller distance. In one example, the first group 68a of the electrical pads 68 can be substantially coplanar with the first electrical pads 52 of the substrate 22. Similarly, the second group 68b of the electrical pads 68 can be offset relative to the optical element electrical pads 72 along the transverse direction T by a distance that is smaller than when the IC die 26 is oriented as described above with respect to FIG. Fig. 7A The second group 68b of electrical pads 68 when oriented in a plane defined by the longitudinal direction L and the lateral direction A is offset relative to the optical element electrical pads 72 along the transverse direction T by a smaller distance. In one example, the second group 68b of electrical pads 68 can be substantially coplanar with the electrical pads 52 of the optical element 28.

[0154] In one example, at least one angled portion 116 of the upper surface 102 of the first region 110 of the thermal conductor 100 can be angled relative to a plane defined by the longitudinal direction L and the lateral direction A. Thus, the angled portion 116 can be angled relative to the upper surface 102 of the second region 112 of the thermal conductor 100 along the lateral direction T. In addition, the angled portion 116 of the upper surface 102 of the first region 110 can be recessed relative to at least one other portion of the upper surface 102 of the first region 110. The angled portion 116 can extend into the mounting hole 50 of the substrate 22. Thus, when the IC die 26 is mounted to the upper surface 102 of the thermal conductor 100 at the angled portion 116 of the thermal conductor 100, the upper surface of the IC die 26 can be tilted in the manner described above. It should be understood that the upper surface 62 of the IC heat sink 34 at the base 66 can also be angled to maintain surface contact with the lower surface 104 of the thermal conductor 100 at the angled portion 116.

[0155] In addition, as mentioned above Figures 10A to 10B As described, the thermally conductive heat sink 76 can be in mechanical contact with at least one or both of the IC heat sink 34 and the IC die 26, and thus be in thermal communication. Thus, the heat sink 76 can be in mechanical contact with the raised end region 37. The heat sink 76 can also define a recessed region 88 aligned with the IC die 26, and the first and second electrical conductors 74a, 74b are aligned with the recessed region 88. In addition, the heat sink 76 can define a protrusion 90 that contacts the IC die 26 at a position spaced apart from the first and second electrical conductors 74a, 74b. Fig.11 As shown, heat sink 76 may define a first portion 76a in thermal communication with IC die 26 and a second portion 76b in thermal communication with optical element 28. In addition, heat sink 76 may define a trench 96 disposed between first portion 76a and second portion 76b to substantially thermally isolate IC die 26 and optical element 28 from each other.

[0156] It should be understood that the illustration and discussion of the embodiments shown in the figures are for exemplary purposes only and should not be construed in a limiting sense to the present disclosure. For example, the foregoing description is generally applicable to a mid-panel mounted optical transceiver; however, the present invention is not limited thereto. It can be used in a front panel mounted optical transceiver. In this case, the electrical component heat sink and the optical element heat sink can be thermally connected to the transceiver housing instead of a heat sink. When the transceiver is inserted into the front panel, the transceiver housing is thermally connected to a heat sink outside the transceiver. Those skilled in the art will understand that the present disclosure contemplates various embodiments. In addition, it should be understood that the concepts described in the above embodiments may be used alone or in combination with any of the other embodiments described above. It should be further understood that, unless otherwise noted, the various optional embodiments described with respect to one illustrated embodiment may be applied to all embodiments described herein.

Claims

1. A light transmitter, include: a substrate defining an upper surface and a lower surface opposite to each other in a lateral direction, and at least one first electrical pad is disposed on the upper surface; An IC heat sink and an IC die in thermal communication with the IC heat sink, wherein the IC die is a light source driver; a first group of at least one IC electrical pads disposed on the IC die; at least one first electrical conductor extending from a respective one of the at least one first electrical pad of the substrate to a respective one of the first set of at least one IC electrical pads, wherein the at least one first electrical conductor comprises a first wire bond or a ribbon bond; a second set of at least one IC electrical pads disposed on the IC die; a thermal conductor and an optical element in thermal communication with the thermal conductor, wherein the optical element is a light source driven by the light source driver; at least one optical element electrical pad disposed on the optical element, and at least one second electrical conductor extending from a corresponding one of the second set of at least one IC electrical pads to a corresponding one of the at least one optical element electrical pads, wherein the at least one second electrical conductor comprises a second wire bond or ribbon bond, wherein the substrate defines a mounting area configured to support the IC die, and The mounting area includes a mounting hole extending from the upper surface through the substrate to the lower surface. 2 . The light emitter of claim 1 , wherein the first electrical conductor and the second electrical conductor each have a respective length of less than 1 mm.

3. The light emitter of claim 2, wherein the corresponding length is less than 500 microns.

4. The light transmitter of any preceding claim, wherein the IC die is mounted to the IC heat sink.

5. The light emitter of claim 4, wherein the optical element is mounted to the thermal conductor.

6. The optical transmitter of claim 5, wherein the first and second groups of at least one IC electrical pads are arranged between the at least one first electrical pad of the substrate and the at least one optical element electrical pad with respect to the lateral direction.

7. The optical transmitter of claim 6, wherein the at least one IC electrical pad of the first group and the at least one IC electrical pad of the second group are substantially equidistantly spaced relative to the lateral direction between the proximal at least one first electrical pad and the at least one optical element electrical pad.

8. The optical transmitter of claim 7, wherein a first set of at least one IC electrical pads is at least substantially coplanar with a second set of at least one IC electrical pads.

9. An optical transmitter according to any one of claims 1 to 3, wherein the at least one IC electrical pad of the first group is at least substantially coplanar with at least one proximal first electrical pad, and the at least one IC electrical pad of the second group is at least substantially coplanar with at least one optical element electrical pad.

10. The optical transmitter of claim 9, wherein the first group of at least one IC die is at least substantially coplanar with the second group of at least one IC die. 11 . The light emitter according to claim 9 , wherein the substrate comprises a first substrate body and a second substrate body separated from each other, the IC heat sink is supported by the first substrate body, and the thermal conductor is supported by the second substrate body. 12 . The light emitter of claim 11 , wherein the first substrate body and the second substrate body are offset from each other in a lateral direction.

13. The light emitter of claim 9, wherein the upper surface extends along a plane defined by a longitudinal direction and a lateral direction, the longitudinal direction being substantially perpendicular to the lateral direction, and the lateral direction being substantially perpendicular to each of the longitudinal direction and the lateral direction, and the IC die is tilted relative to the plane.

14. The light emitter of claim 13, wherein the IC die defines a first edge disposed adjacent the substrate and a second edge disposed adjacent the optical element, and the second edge is disposed above the first edge relative to the lateral direction.

15. The optical transmitter according to any one of claims 1 to 3, wherein the substrate comprises a first substrate body and a second substrate body separated from each other, the IC heat sink is supported by the first substrate body, and the thermal conductor is supported by the second substrate body.

16. The light emitter of claim 15, wherein the first substrate body and the second substrate body are offset from each other along the lateral direction.

17. An optical transmitter according to any one of claims 1 to 3, wherein the upper surface extends along a plane defined by a longitudinal direction and a lateral direction, the longitudinal direction being substantially perpendicular to the lateral direction, and the lateral direction being substantially perpendicular to each of the longitudinal direction and the lateral direction, and the IC die is tilted relative to the plane.

18. The light emitter of claim 17, wherein the IC die defines a first edge disposed adjacent the substrate and a second edge disposed adjacent the optical element, and the second edge is disposed above the first edge relative to the lateral direction.

19. The light emitter of claim 1, wherein the IC heat sink comprises a base extending along a lower surface of the substrate.

20. The light emitter of claim 19, wherein the IC heat sink comprises a pedestal extending upwardly from the base.

21. The light emitter of claim 20, wherein at least one of the base and the IC die extends at least into the mounting hole.

22. The light emitter of claim 21, wherein the thermal conductor defines a hole extending therethrough in the lateral direction such that at least one of the base and the IC die further extends into the hole of the thermal conductor.

23. The light emitter of any one of claims 20 to 22, wherein the IC die is mounted at the base to an upper surface of the IC heat sink.

24. The light emitter of claim 22, wherein the base extends at least into the mounting hole and into the hole of the thermal conductor.

25. The light emitter of claim 1, wherein the substrate includes a thermally conductive core layer at the mounting area.

26. The light emitter of claim 25, wherein the IC heat sink comprises a base extending along a lower surface of the substrate.

27. The light emitter of any one of claims 25 to 26, wherein the IC die is mounted to a thermally conductive center layer.

28. The light emitter of any one of claims 25 to 26, wherein an upper surface of the IC heat sink is in thermal communication with the core layer.

29. The light emitter of claim 28, wherein the IC die is in mechanical contact with the thermally conductive center layer.

30. A light emitter according to any one of claims 25 to 26, wherein the thermal conductor extends along an upper surface of the substrate.

31. The light emitter of any one of claims 1 to 3, wherein the substrate defines edges that are opposite to each other along a selected direction, and the IC heat sink defines end regions that are opposite to each other along the selected direction.

32. The light emitter of claim 31, wherein the substrate defines at least one heat transfer region, the at least one heat transfer region offset from the IC die along the selected direction, the heat transfer region configured to facilitate heat transfer.

33. The light emitter of claim 32, wherein the heat transfer region comprises a notch extending into one edge of the substrate.

34. The light emitter of claim 33, wherein the notch comprises a pair of notches extending into respective edges.

35. The light emitter of claim 34, wherein the IC heat sink defines respective end regions having raised regions extending into respective recesses.

36. The light emitter of claim 35, wherein the end region extends through the recess.

37. The light emitter of claim 36, wherein an end region of the protrusion does not extend outwardly relative to a footprint of the substrate.

38. The optical transmitter of any one of claims 35 to 37, further comprising a heat sink in mechanical contact with the raised area, the heat sink defining a recessed area aligned with the IC die, wherein the first and second electrical conductors are aligned with the recessed area.

39. The light emitter of claim 38, wherein the heat sink defines a protrusion that contacts the IC die at a location spaced apart from the first and second electrical conductors.

40. The light emitter of claim 39, wherein the heat sink includes a first portion in thermal communication with the IC die.

41. The light emitter of claim 40, wherein the heat sink includes a second portion in thermal communication with the optical element.

42. The light emitter of claim 41, wherein the heat sink defines a trench disposed between the first portion and the second portion such that the IC die and the optical element are substantially thermally isolated from each other.

43. The light emitter of claim 32, wherein the substrate further comprises at least one peripheral thermally conductive layer to define the heat transfer region.

44. The light emitter of claim 43, wherein the at least one peripheral thermally conductive layer at least partially defines a respective outer edge of the substrate.

45. The light emitter of claim 43, wherein the at least one peripheral thermally conductive layer is surrounded by the substrate along a plane.

46. ​​The light emitter of any one of claims 43 to 45, further comprising a heat sink in mechanical contact with the at least one peripheral thermally conductive layer.

47. The light emitter of claim 46, wherein the heat sink defines a recessed area aligned with the IC die.

48. The light emitter of claim 47, wherein the heat sink defines a protrusion that contacts the IC die at a location spaced apart from first and second groups of at least one IC electrical pad.

49. The light emitter of claim 48, wherein the heat sink includes a first portion in thermal communication with the IC die.

50. The light emitter of claim 49, wherein the heat sink includes a second portion in thermal communication with the optical element.

51. The light emitter of claim 50, wherein the heat sink defines a trench disposed between the first portion and the second portion such that the IC die and the optical element are substantially thermally isolated from each other.

52. The light emitter of claim 31 , wherein the end region extends outwardly in a selected direction relative to the edge.

53. The light emitter of claim 52, wherein the IC heat sink further comprises a raised region extending upwardly from the end region to a location spaced above the substrate.

54. The light emitter of claim 53, further comprising a heat sink in mechanical contact with each raised area.

55. The light emitter according to claim 54, in, The heat sink defines a recessed area aligned with the IC die.

56. The light emitter of any one of claims 54 to 55, wherein the heat sink defines a protrusion that contacts the IC die at a location spaced apart from both a first set of at least one IC electrical pads and a second set of at least one IC electrical pads.

57. The light emitter of claim 1, wherein the thermal conductor is supported by an upper surface of the substrate.

58. The light emitter of claim 57, wherein the at least one optical element electrical pad is disposed over at least one first electrical pad of the substrate relative to the lateral direction.

59. An optical transmitter according to any one of claims 57 to 58, wherein the at least one IC electrical pad of the first group and the at least one IC electrical pad of the second group are arranged between at least one proximal first electrical pad and at least one optical element electrical pad relative to the lateral direction.

60. An optical transmitter according to claim 59, wherein the at least one IC electrical pad of the first group and the at least one IC electrical pad of the second group are substantially equidistantly spaced relative to the lateral direction between at least one proximal first electrical pad and at least one optical element electrical pad.

61. An optical transmitter according to claim 60, wherein the at least one IC die of the first group is at least substantially coplanar with at least one proximal first electrical pad, and the at least one IC die of the second group is at least substantially coplanar with at least one optical element electrical pad.

62. The light emitter of claim 61, wherein the first group of at least one IC die is at least substantially coplanar with the second group of at least one IC die.

63. The light emitter of claim 62, wherein the substrate comprises separate first and second substrate bodies, the IC heat sink being supported by the first substrate body, and the thermal conductor being supported by the second substrate body.

64. The light emitter of claim 63, wherein the first substrate body and the second substrate body are offset from each other along the lateral direction.

65. An optical emitter according to claim 62, wherein the upper surface extends along a plane defined by a longitudinal direction and a lateral direction, the longitudinal direction is substantially perpendicular to the lateral direction, and the lateral direction is substantially perpendicular to each of the longitudinal direction and the lateral direction, and the IC die is tilted relative to the plane.

66. The light emitter of claim 63, wherein the IC die defines a first edge disposed adjacent the substrate and a second edge disposed adjacent the optical element, and the second edge is disposed above the first edge relative to the lateral direction.

67. An optical transmitter as claimed in any one of claims 1 to 3, wherein the IC heat sink is at least substantially thermally isolated from the thermal conductor.

68. The light emitter of claim 67, wherein the IC heat sink is separated from the thermal conductor so as to define a gap therebetween.

69. The light emitter of any one of claims 1 to 3, wherein the electrical pad is a wire bonding pad.

70. The light emitter of any one of claims 1 to 3, wherein the optical element comprises a VCSEL and the IC die comprises a VCSEL driver.

71. The light emitter of any one of claims 1 to 3, wherein the optical element comprises a photodetector and the IC die comprises a transimpedance amplifier.

72. The light emitter of any one of claims 1 to 3, wherein at least a portion of the IC heat sink extends along a bottom of the substrate and at least a portion of the thermal conductor is supported by a top of the substrate.

73. The light emitter of claim 72, wherein at least a body of the IC heat sink extends along a bottom of the substrate and at least a body of the thermal conductor extends along a top of the substrate.

74. A light emitter as claimed in any one of claims 1 to 3, wherein the optical element comprises a light source and the IC die comprises a driver for the light source.

75. The light emitter of claim 74, wherein the optical element comprises at least one VCSEL.

76. The light emitter of any one of claims 1 to 3, wherein the IC die comprises a current-to-voltage converter and the optical element comprises at least one photodiode.

77. An optical transmitter as claimed in any one of claims 1 to 3, wherein the IC die comprises a transimpedance amplifier.

78. An optical transmitter according to any one of claims 1 to 3, wherein the substrate includes at least one second electrical pad, and an electrical trace, which is electrically connected to a corresponding first electrical pad among at least one first electrical pad and a corresponding second electrical pad among at least one second electrical pad of the substrate.

79. The light emitter of claim 1, wherein the IC die is at an angle relative to an upper surface of the substrate.

80. An optical transmitter according to any one of claims 1 to 3, wherein a first group of at least one IC electrical pad arranged on the IC die and at least one first electrical pad arranged on the upper surface of the substrate are located at substantially the same position in the lateral direction.

81. An optical transmitter according to any one of claims 1 to 3, wherein a second group of at least one IC electrical pad arranged on the IC die and at least one optical element electrical pad arranged on the optical element are located at substantially the same position in the lateral direction.

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