Semiconductor device and method for manufacturing semiconductor device

Abstract

The present invention provides a semiconductor device and a method for manufacturing a semiconductor device that can reliably bond a bonding wire to an electrode pad. The semiconductor device has a circuit substrate (5) and a housing (7), the circuit substrate having an electrode pad and an insulating layer (4) having the electrode pad formed on the front, and the housing having a configuration area (7a) for configuring the circuit substrate to accommodate the circuit substrate. Furthermore, a recess (4c) for embedding a bonding material (6) is formed in a first area (4b) on the back side of the insulating layer corresponding to the area directly below the electrode pad. Therefore, the electrode pad is reliably bonded to the housing via the insulating layer and the bonding material (6) directly below. In such a semiconductor device (1a), if a bonding wire (8) is configured on the bonding area (2b) of the electrode pad and is bonded by ultrasonic bonding using a bonding tool (9), vibration of the electrode pad relative to ultrasonic vibration caused by the bonding tool (9) can be suppressed.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. Background Art

[0002] A semiconductor device consists of a housing housing semiconductor elements such as IGBTs (Insulated Gate Bipolar Transistors), power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), SBDs (Schottky Barrier Diodes), and FWDs (Free Wheeling Diodes), along with a ceramic circuit board on which the semiconductor elements are mounted. The semiconductor device also houses a printed circuit board (PCB) electrically connected to the semiconductor elements. The PCB is secured to a predetermined placement area on the bottom surface of the housing using an adhesive (see, for example, Patent Document 1).

[0003] In such a semiconductor device, electrode pads of a printed circuit board are electrically connected to the semiconductor element and external connection terminals integrally formed with the housing through bonding wires.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 2009-289831 Summary of the Invention

[0007] Technical issues

[0008] In the aforementioned semiconductor device, the adhesive applied between the printed circuit board and the predetermined placement area on the bottom surface of the housing may spread unevenly depending on the amount applied, the application location, and other factors. Consequently, if the adhesive is not sufficiently applied directly below the electrode pads on the printed circuit board, an air layer may form there. In this case, even if ultrasonic vibrations are used to bond a bonding wire to the electrode pads, the electrode pads themselves will also vibrate, making it impossible to reliably bond the bonding wire to the pads. This poor bonding between the bonding wire and the electrode pads can reduce the reliability of the semiconductor device.

[0009] The present invention has been made in view of the above-mentioned situation, and an object of the present invention is to provide a semiconductor device and a method for manufacturing the semiconductor device in which a bonding wire can be reliably bonded to an electrode pad.

[0010] Technical Solution

[0011] According to one aspect of the present invention, a semiconductor device is provided, which has a circuit substrate and a shell, wherein the circuit substrate has an electrode pad and an insulating layer with the electrode pad formed on the front surface, the shell has a configuration area for configuring the circuit substrate and accommodates the circuit substrate, and a recess for embedding a bonding material is formed in a first area on the back surface of the insulating layer corresponding to directly below the electrode pad or in a second area in the configuration area opposite to the first area of the configured circuit substrate.

[0012] Furthermore, according to one aspect of the present invention, a method for manufacturing the semiconductor device is provided.

[0013] Technical Effects

[0014] According to the disclosed technology, a bonding wire can be reliably bonded to an electrode pad, and a decrease in the reliability of a semiconductor device can be suppressed. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1A and Figure 1B This is a diagram (part 1) for explaining the semiconductor device according to the first embodiment.

[0016] Figure 2 This is a diagram (part 2) for explaining the semiconductor device according to the first embodiment.

[0017] Figure 3 This is a flowchart showing the method for manufacturing the semiconductor device according to the first embodiment.

[0018] Figure 4 This is a diagram (part 1) for explaining the method for manufacturing the semiconductor device according to the first embodiment.

[0019] Figure 5 This is a diagram (part 2) for explaining the method for manufacturing the semiconductor device according to the first embodiment.

[0020] Figure 6 It is a top view of the semiconductor device according to the second embodiment.

[0021] Figure 7 It is a cross-sectional view of a semiconductor device according to a second embodiment.

[0022] Figure 8 It is a plan view of a printed circuit board included in the semiconductor device according to the second embodiment.

[0023] Figure 9 This is a cross-sectional view of another trench formed in the printed circuit board included in the semiconductor device according to the second embodiment.

[0024] Figure 10It is a plan view of a housing included in the semiconductor device according to the third embodiment.

[0025] Figure 11 It is a cross-sectional view of a semiconductor device according to a third embodiment.

[0026] Explanation of symbols

[0027] 1a, 1b, 10, 10a: Semiconductor devices

[0028] 2: Conductive pattern

[0029] 2a: Electrode pad

[0030] 2b: Bonding area

[0031] 3: Resist

[0032] 4: Insulation layer

[0033] 4b: First Area

[0034] 4c, 7c: concave

[0035] 5: Circuit board

[0036] 6: Bonding materials

[0037] 7: Shell

[0038] 7a, 44: Configuration area

[0039] 7b: Second area

[0040] 8, 50: Bonding wire

[0041] 9: Bonding tools

[0042] 20: Ceramic circuit substrate

[0043] 21: Insulation board

[0044] 22: Metal Plate

[0045] 23a~23d: Circuit pattern

[0046] 24: Switching element

[0047] 25: Diode element

[0048] 30, 30a: Printed substrate

[0049] 31: Control IC

[0050] 32: Electronic components

[0051] 33: Electrode pad

[0052] 34, 34a, 46: Groove

[0053] 40, 40a: Box

[0054] 41: Side wall

[0055] 42: Main terminal

[0056] 43: Control terminal

[0057] 45: Opening

[0058] 51: Adhesive DETAILED DESCRIPTION

[0059] [First embodiment]

[0060] Hereinafter, referring to the accompanying drawings, FIG. Figure 2 The semiconductor device according to the first embodiment will be described. Figure 1A 、 Figure 1B and Figure 2 1 is a diagram for explaining a semiconductor device according to a first embodiment. Figure 1A 、 Figure 1B and Figure 2 They are enlarged cross-sectional views of the vicinity of the electrode pads of the semiconductor device. In particular, Figure 1B and Figure 2 (B) shows ultrasonic bonding of bonding wires to electrode pads of a semiconductor device.

[0061] Figure 1A and Figure 2 The semiconductor devices 1a and 1b shown in (A) both have a circuit substrate 5 and a housing 7. The circuit substrate 5 has an electrode pad 2a and an insulating layer 4 having the electrode pad 2a formed on the front surface. For example, a printed circuit board can be applied. It should be noted that the electrode pad 2a is an area of the conductive pattern 2 formed on the front surface of the insulating layer 4 where the resist 3 is formed, and the conductive pattern 2 corresponds to the opening of the resist 3. The housing 7 has a configuration area 7a for configuring the circuit substrate 5 and accommodates the circuit substrate 5. It should be noted that in FIG. 1 and FIG. Figure 2 In FIG. 1 , the configuration area 7 a is shown as a part of the housing 7 and is described together with the reference numerals.

[0062] and, Figure 1A The semiconductor device 1a shown has a recess 4c formed in a first region 4b on the back surface of the insulating layer 4 corresponding to the electrode pad 2a, and a bonding material 6 is buried in the recess 4c. Figure 2The semiconductor device 1b shown in FIG. 1 (A) has a recess 7c formed in a second region 7b of the configuration region 7a, which is opposite the first region 4b of the circuit substrate 5. Bonding material 6 is embedded in the recess 7c. It should be noted that the recess 4c is formed in correspondence with the bonding region 2b in the first region 4b located directly below the electrode pad 2a. For example, the width of the recess 4c is preferably 0.8 times or more and 1.2 times or less of the width of the bonding region 2b. The same applies to the recess 7c.

[0063] Next, ultrasonic bonding of the bonding wire 8 to the electrode pad 2a of the semiconductor devices 1a and 1b will be described. First, in the semiconductor devices 1a and 1b, as shown in FIG. Figure 1B and Figure 2 As shown in (B), bonding wire 8 is placed on bonding region 2b of electrode pad 2a, and ultrasonic bonding is performed using bonding tool 9. At this time, since bonding material 6 is embedded in recesses 4c and 7c of both semiconductor devices 1a and 1b, bonding material 6 is placed directly beneath electrode pad 2a, rather than an air layer. Electrode pad 2a is securely bonded to housing 7 directly beneath it via insulating layer 4 and bonding material 6. Consequently, vibration of electrode pad 2a in response to ultrasonic vibrations generated by bonding tool 9 is suppressed, and bonding wire 8 is securely bonded to electrode pad 2a.

[0064] Here, the case where the recesses 4c and 7c are not formed in the insulating layer 4 of the semiconductor devices 1a and 1b and the configuration area 7a of the housing 7, and the bonding material 6 is not arranged directly below the electrode pad 2a, is described. In this case, if an air layer is generated in the gap between the circuit substrate 5 and the configuration area 7a of the housing 7 directly below the electrode pad 2a, the ultrasonic vibration caused by the bonding tool 9 causes the electrode pad 2a to vibrate. Therefore, the bonding wire 8 is not reliably bonded to the electrode pad 2a, and there is a possibility that the bonding wire 8 and the electrode pad 2a are poorly bonded. In this regard, Figure 1A 、 Figure 1B and Figure 2 The semiconductor devices 1 a and 1 b shown suppress bonding defects of the bonding wires 8 and prevent a decrease in reliability.

[0065] Next, use Figures 3 to 5 as well as Figure 1A 、 Figure 1B and Figure 2 A method for manufacturing the semiconductor devices 1 a and 1 b will be described. Figure 3 is a flowchart showing a method for manufacturing a semiconductor device according to the first embodiment. Figure 4 and Figure 5 1 is a diagram for explaining a method for manufacturing a semiconductor device according to a first embodiment. Figure 4 express Figure 1A 、 Figure 1B The method for manufacturing the semiconductor device 1a shown in FIG. Figure 5 express Figure 2 A method for manufacturing the semiconductor device 1b is shown.

[0066] [Step S1 ] The circuit board 5 and the housing 7 are prepared.

[0067] [Step S2] A recess 4c is formed on the circuit board 5 or a recess 7c is formed on the housing 7. For example, Figure 4 As shown in FIG. 5A , a concave portion 4c is formed in a first region 4b on the back side of the insulating layer 4 corresponding to the electrode pad 2a. Figure 5 As shown in (A), in the housing 7, a recess 7c is formed in a predetermined second area 7b corresponding to the configuration area 7a of the circuit substrate 5 and directly below the electrode pad 2a. The recesses 4c and 7c can be formed by etching and / or machining. As for the circuit substrate 5, the recess 4c can be formed by laminating a resist resin or the like on the back side of the insulating layer 4 in addition to the recess 4c. In addition, in step S1, a circuit substrate 5 pre-formed with the recess 4c can be prepared. As for the housing 7, in step S1, a housing 7 pre-formed to form the recess 7c can be prepared.

[0068] [Step S3] The bonding material 6 is applied to the recessed portions 4c and 7c formed on the circuit board 5 or the housing 7. For example, Figure 4 As shown in (B), the concave portion 4c side of the circuit substrate 5 is turned upward, and the bonding material 6 is applied to the concave portion 4c. Figure 5 As shown in (B), the bonding material 6 is applied to the recessed portion 7c of the configuration area 7a of the housing 7. At this time, the position where the bonding material 6 is applied becomes easy to visually identify through the recessed portions 4c and 7c, and the bonding material 6 can be reliably applied to the recessed portions 4c and 7c without making a mistake in the application position of the bonding material 6. It should be noted that the bonding material 6 for the recessed portions 4c and 7c can be applied, for example, by copy printing or a syringe-type dispenser. At this time, the bonding material 6 can be applied in an appropriate amount by applying the volume of the recessed portions 4c and 7c as a rough target. Thus, as described later, it is possible to suppress the generation of an air layer at the bonding position directly below the electrode pad 2a. In addition, it is possible to suppress the bonding material 6 from overflowing from the gap between the circuit substrate 5 and the configuration area 7a of the housing 7.

[0069] In addition, Figure 4 In the case of (B), when the circuit board 5 is arranged in the arrangement area 7a of the housing 7, the bonding material 6 can be applied to the arrangement area 7a side of the housing 7 corresponding to the recess 4c. Figure 5In the case of (B), when the circuit board 5 is arranged in the arrangement region 7 a of the housing 7 , the bonding material 6 may be applied to the insulating layer 4 side of the circuit board 5 corresponding to the recessed portion 7 c .

[0070] [Step S4] The circuit board 5 is placed in the placement area 7a of the housing 7 and pressed toward the placement area 7a side, and heated at a predetermined temperature and for a predetermined time. This allows the bonding material 6 to be cured. As a result, for example, Figure 1A and Figure 2 As shown in (A), the circuit substrate 5 is bonded to the arrangement region 7a of the housing 7 to form the semiconductor devices 1a and 1b. It should be noted that, in this case, since the bonding material 6 is embedded in the recesses 4c and 7c, no voids are formed in the recesses 4c and 7c. The bonding material 6 does not overflow from the gap between the circuit substrate 5 and the arrangement region 7a of the housing 7, and the circuit substrate 5 and the arrangement region 7a of the housing 7 are reliably bonded.

[0071] [Step S5] For the electrode pads 2a and the like of the semiconductor devices 1a and 1b, Figure 1B and Figure 2 As shown in FIG. 1 (B), the bonding wires 8 are bonded by ultrasonic bonding using a bonding tool 9 to perform electrical wiring.

[0072] After the above steps, necessary manufacturing steps are performed, such as sealing the circuit board 5 and bonding wires 8 in the housing 7 with a sealing member, to manufacture the semiconductor devices 1 a and 1 b .

[0073] The semiconductor devices 1a and 1b described above include a circuit substrate 5 and a housing 7. The circuit substrate 5 includes an electrode pad 2a and an insulating layer 4 with the electrode pad 2a formed on its front surface. The housing 7 includes a placement region 7a for placing the circuit substrate 5 and housing the circuit substrate 5. Furthermore, recesses 4c and 7c for embedding bonding material 6 are formed in a first region 4b on the back surface of the insulating layer 4, corresponding directly below the electrode pad 2a, or in a second region 7b of the placement region 7a, opposite the first region 4b of the placed circuit substrate 5. Consequently, the electrode pad 2a is securely bonded to the housing 7 directly below via the insulating layer 4 and the bonding material 6. In such semiconductor devices 1a and 1b, if a bonding wire 8 is placed on the bonding region 2b of the electrode pad 2a and ultrasonically bonded using a bonding tool 9, vibration of the electrode pad 2a in response to ultrasonic vibrations generated by the bonding tool 9 can be suppressed. Consequently, the bonding wire 8 is securely bonded to the electrode pad 2a. Furthermore, when the circuit board 5 is bonded to the arrangement region 7a of the housing 7, the bonding material 6 is embedded within the recesses 4c and 7c. Therefore, the bonding material 6 does not overflow from the gap between the circuit board 5 and the arrangement region 7a of the housing 7, nor does it flow around to the electrode pads 2a. Consequently, the electrode pads of the circuit board 5 and the arrangement region 7a of the housing 7 are reliably bonded. Therefore, the bonding wires 8 can be reliably bonded to the electrode pads 2a, while preventing the overflow of the bonding material 6 and the occurrence of electrical failures. Consequently, a decrease in the reliability of the semiconductor devices 1a and 1b can be suppressed.

[0074] In addition, when the bonding material 6 is applied to the configuration area 7a of the circuit substrate 5 or the housing 7, the recess 4c formed on the circuit substrate 5 or the recess 7c formed on the housing 7 serves as a mark, which can easily identify the application position and reduce the manufacturing cost of the semiconductor devices 1a and 1b.

[0075] [Second embodiment]

[0076] In the second embodiment, the specific use Figures 6 to 8 A semiconductor device 1 a in which a recessed portion 4 c is formed on the back surface of a circuit substrate 5 in the first embodiment will be described. Figure 6 is a top view of a semiconductor device according to a second embodiment. Figure 7 It is a cross-sectional view of a semiconductor device according to a second embodiment. Figure 8 FIG2 is a top view of a printed circuit board included in the semiconductor device of the second embodiment. Figures 6 to 8 In the case of a plurality of existing configurations, at least one is marked with the same symbol. Figure 7 yes Figure 6 Cross-sectional view at the single-dot chain line XX in FIG. Figure 8 The formation position of the groove portion 34 formed on the back surface of the printed substrate 30 is shown by the dotted line. Figures 6 to 8In Chinese, the positive side refers to the Figure 6 and Figure 8 Indicates one side, Figure 7 The upper side of the Figure 6 and Figure 8 Indicates one side, Figure 7 The lower side of the .

[0077] The semiconductor device 10 includes a ceramic circuit substrate 20 with a switching element 24 and a diode element 25 arranged on the front surface, a printed circuit board 30 , and a case 40 that accommodates these.

[0078] The ceramic circuit board 20 includes an insulating plate 21 and a metal plate 22 formed on the back surface of the insulating plate 21. Furthermore, the ceramic circuit board 20 includes circuit patterns 23a to 23d formed on the front surface of the insulating plate 21.

[0079] The insulating plate 21 is made of highly thermally conductive ceramics such as alumina, aluminum nitride, and silicon nitride. The metal plate 22 is made of highly thermally conductive metals such as aluminum, iron, silver, copper, or alloys thereof.

[0080] Circuit patterns 23a-23d are made of a highly conductive metal such as copper or a copper alloy. Switching elements 24 and diode elements 25 are each arranged on circuit patterns 23a-23d via solder (not shown). The number and shape of circuit patterns 23a-23d are merely examples; other numbers and shapes are possible. The thickness of circuit patterns 23a-23d is, for example, 0.1 mm to 1 mm.

[0081] As the ceramic circuit board 20 having such a structure, for example, a DCB (Direct Copper Bonding) board or an AMB (Active Metal Brazed) board can be used. The ceramic circuit board 20 conducts the heat generated by the switching element 24 and the diode element 25 to the outside through the circuit patterns 23a to 23d, the insulating plate 21, and the metal plate 22. Figure 7 on the lower side of the center).

[0082] The switching element 24 and the diode element 25 are made of silicon or silicon carbide. The switching element 24 includes, for example, an IGBT, a power MOSFET, etc. Such a switching element 24, for example, has an input electrode (drain electrode or collector electrode) as a main electrode on the back surface, a control electrode (gate electrode) and an output electrode (source electrode or emitter electrode) as a main electrode on the front surface. In addition, the diode element 25 includes an SBD, FWD, etc. as needed. Such a diode element 25 has an output electrode (cathode electrode) as a main electrode on the back surface, and an input electrode (anode electrode) as a main electrode on the front surface. In addition, a semiconductor element including an RC (Reverse-conducting)-IGBT can also be used instead of the switching element 24 and the diode element 25.

[0083] Furthermore, heat dissipation can be improved by attaching a heat sink and / or a cooler (not shown) to the metal plate 22 exposed from the back of the case 40 of the ceramic circuit board 20 by screwing, soldering, or silver soldering. The heat sink or cooler in this case can be made of, for example, aluminum, iron, silver, copper, or an alloy containing at least one of these materials, which have excellent thermal conductivity. Furthermore, a heat sink, a heat sink composed of multiple heat sinks, or a water-cooled cooling device can be used as the cooler.

[0084] The printed circuit board 30 is U-shaped in a plan view and is arranged in the box 40 in a manner that surrounds the three sides of the ceramic circuit board 20. In addition, although not shown in the figure, the printed circuit board 30 has an insulating base material and a single-layer or multi-layer conductive pattern formed on the base material. The thickness of the printed circuit board 30 is preferably greater than 0.1 mm and less than 2.5 mm, and more preferably greater than 0.6 mm and less than 1.0 mm. The base material uses a material such as epoxy resin infiltrated into glass non-woven fabric or glass woven fabric, or polyimide resin infiltrated into glass fiber. In addition, the base material can also be a glass-epoxy resin with heat resistance. The conductive pattern is composed of a metal such as copper or copper alloy with excellent conductivity. An anti-etching layer (not shown in the figure) is formed on the conductive pattern formed on the front side of the base material, and a predetermined area of the anti-etching layer is opened to expose the area of the conductive pattern as an electrode pad 33. Furthermore, in the conductive pattern formed with the resist layer, a control IC (Integrated Circuit) 31 and an electronic component 32 are appropriately provided on the area of the conductive pattern exposed by opening the other areas of the resist layer. The control IC 31 inputs an input signal to the control electrode of the switching element 24 according to an external signal, for example. The electronic component is, for example, a resistor, a thermistor, a capacitor, a surge absorber, etc. In addition, on the back side of such a printed circuit board 30, as shown in FIG. Figure 8As shown, a groove portion 34 including an area corresponding to the electrode pad 33 is formed. The depth of such a groove portion 34 is less than 50% of the thickness of the printed substrate 30, preferably not less than 5 μm and not more than 500 μm, and more preferably not less than 10 μm and not more than 100 μm. It should be noted that as long as a recess is formed in the area corresponding to each electrode pad 33 on the back side of the printed substrate 30, the groove portion 34 is a portion including such a recess. In addition, the shape of the groove portion 34 is an example, and other shapes may be used as long as the area corresponding to the electrode pad 33 is included. In the case of the second embodiment, by forming the groove portion 34 in a manner including these recesses, processing becomes easier than forming the recesses separately.

[0085] Furthermore, an adhesive 51 is embedded in the area surrounded by the groove portion 34 of the printed circuit board 30 and the arrangement area 44 of the housing 40. The adhesive 51 is preferably a thermoplastic resin that softens or solidifies depending on temperature, or a thermosetting resin that solidifies through a chemical reaction when heated. Examples of thermoplastic resins include polyvinyl acetate, polyvinyl alcohol, and polyamide resins. Examples of thermosetting resins include epoxy, silicone, polyimide, polyurethane, and polyester.

[0086] The housing 40 is surrounded by sidewalls 41 on all sides, forming a box shape. Inside, a placement area 44 for the printed circuit board 30 is formed, and an opening 45, surrounded on three sides by the placement area 44 and containing the ceramic circuit board 20. Multiple control terminals 43 and multiple main terminals 42 are integrally formed along the sides of the sidewalls 41. The housing 40 is molded, for example, using a thermoplastic resin to include the multiple control terminals 43 and the multiple main terminals 42. Examples of such resin materials include polyphenylene sulfide, polybutylene terephthalate resin, polybutylene succinate resin, polyamide resin, and acrylonitrile butadiene styrene resin.

[0087] The printed circuit board 30 and the ceramic circuit board 20 are placed in the arrangement area 44 and opening 45 of the housing 40, respectively. Furthermore, the electrode pads 33 of the printed circuit board 30 are electrically connected to the control terminals 43, the electrodes of the control IC 31, the control electrodes of the switching elements 24, and the circuit patterns 23b to 23d via bonding wires 50. Furthermore, the electrodes of the control IC 31, the control electrodes of the switching elements 24, the circuit pattern 23a, and the main terminals 42 are also electrically connected via bonding wires 50. The bonding wires 50 are made of a highly conductive metal such as aluminum or copper, or an aluminum or copper alloy. Their diameter is preferably between 100 μm and 1 mm. While bonding wires 50 are described here, such wiring members are not limited to bonding wires 50; any member capable of ultrasonic bonding to the electrode pads 33 may be used. Examples of such wiring members capable of ultrasonic bonding to the electrode pads 33 include conductive tape and lead frames.

[0088] Furthermore, the ceramic circuit board 20, switching element 24, diode element 25, printed circuit board 30, bonding wires 50, and the like housed in the housing 40 are sealed by a sealing member (not shown). The sealing member is made of, for example, a thermosetting resin such as maleimide-modified epoxy resin, maleimide-modified phenolic resin, or maleimide resin. Alternatively, silicone gel may be used as the sealing member.

[0089] When manufacturing such a semiconductor device 10, adhesive 51 is first applied by transfer printing to the groove portion 34 formed on the back surface of the printed substrate 30 or to the placement area 44 of the case 40 corresponding to the groove portion 34. The printed substrate 30 is placed in the placement area 44 of the case 40 with the adhesive 51 interposed therebetween, and the ceramic circuit board 20 is placed in the opening 45 of the case 40 with the adhesive interposed therebetween (not shown).

[0090] While the printed circuit board 30 and the ceramic circuit board 20 are pressed downwardly toward the box 40 , the adhesive 51 is cured by heating at a temperature of, for example, 150° C. to 170° C. for three to five minutes.

[0091] Then, using a bonding tool (not shown), bonding wires 50 are ultrasonically bonded to electrically connect the electrode pads 33 of the printed circuit board 30 to the control terminals 43, the electrodes of the control IC 31, the control electrodes of the switching elements 24, and the circuit patterns 23b to 23d. Figure 6 ).

[0092] The semiconductor device 10 thus manufactured includes electrode pads 33, a printed circuit board 30 having the electrode pads 33 formed on its front surface, and a housing 40 having a placement area 44 for the printed circuit board 30 and housing the printed circuit board 30. Furthermore, a groove 34 in which an adhesive 51 is embedded is formed on the back surface of the printed circuit board 30, corresponding to a position directly below the electrode pads 33. Therefore, the electrode pads 33 are securely bonded to the housing 40 directly below via the adhesive 51. In such a semiconductor device 10, if bonding wires 50 are placed on the electrode pads 33 and ultrasonically bonded using a bonding tool (not shown), vibration of the electrode pads 33 in response to the ultrasonic vibrations generated by the bonding tool can be suppressed. Consequently, the bonding wires 50 are securely bonded to the electrode pads 33. Furthermore, when the printed substrate 30 is bonded to the arrangement region 44 of the case 40, the adhesive 51 is embedded in the groove 34. Therefore, the adhesive 51 does not overflow from the gap between the printed substrate 30 and the arrangement region 44 of the case 40, nor does it flow around to the electrode pads 33. Consequently, the printed substrate 30 and the arrangement region 44 of the case 40 are reliably bonded. Therefore, the bonding wires 50 can be reliably bonded to the electrode pads 33, while the adhesive 51 is prevented from overflowing and preventing electrical failures. Consequently, a decrease in the reliability of the semiconductor device 10 can be suppressed.

[0093] Furthermore, when the adhesive 51 is applied to the printed substrate 30 , the groove 34 formed in the printed substrate 30 serves as a mark, making it possible to easily identify the application position and reduce the manufacturing cost of the semiconductor device 10 .

[0094] It should be noted that the second embodiment has been described with reference to a case where the cross section of the groove portion 34 is substantially square. Figure 9 A case where the cross section of the groove portion 34 has another shape will be described. Figure 9 This is a cross-sectional view of another groove portion formed on the printed circuit board included in the semiconductor device of the second embodiment. Figure 9 3 is an enlarged cross-sectional view of the vicinity of the electrode pad 33 of the printed circuit board 30. Figure 9 In the middle, the positive side refers to Figure 9 The upper side, back side refers to Figure 9 The lower side of the .

[0095] In with Figure 9 The cross section of the groove portion 34a formed on the back side of the printed substrate 30 corresponding to the electrode pad 33 is not a roughly square shape, but a roughly semicircular shape. For example, the adhesive 51 is applied to the groove portion 34a of the printed substrate 30 with such a cross section and the printed substrate 30 is arranged in the arrangement area 44 of the box 40. In this case, the corners inside the groove portion 34a have a curvature, thereby reducing the air trapped at the corners. Therefore, compared with forming the groove portion 34a ( Figure 7). Forming the groove 34a in a substantially semicircular shape allows for more reliable ultrasonic bonding of the bonding wire 50 to the electrode pad 33. Alternatively, the groove 34 may have a substantially square cross-section with a U-shaped shape having curvature at the inner corners. In this case, air trapped at the corners can be reduced, allowing for more reliable bonding of the bonding wire 50 to the electrode pad 33.

[0096] [Third embodiment]

[0097] In a third embodiment, using Figure 10 and Figure 11 The following description will take as an example a case where the groove portion is formed in the arrangement region 44 of the housing 40, not on the back surface of the printed circuit board 30, in the semiconductor device 10 of the second embodiment. Note that in the third embodiment, the same components as those of the semiconductor device 10 of the second embodiment are denoted by the same reference numerals, and their detailed description will be omitted.

[0098] Figure 10 is a top view of a housing included in a semiconductor device according to a third embodiment. Figure 11 is a cross-sectional view of a semiconductor device according to the third embodiment. Figure 10 In the figure, the positions of the electrode pads, the control IC, the electronic components, etc. when the printed circuit board 30a is arranged in the housing 40a are indicated by dotted lines. Figure 11 Shown in Figure 6 The cross-sectional view of the semiconductor device 10a at the position corresponding to the single-dot chain line XX is shown. Figure 10 and Figure 11 In the middle, the positive side refers to Figure 10 The side shown in Figure 11 The upper side, back side refers to Figure 10 The side not shown in Figure 11 The lower side of the .

[0099] The semiconductor device 10a also includes a ceramic circuit substrate 20 with a switch element 24 and a diode element 25 arranged on the front, a printed circuit board 30a, and a case 40a for storing them. Figure 11 As shown, the printed substrate 30a is different from the printed substrate 30 in that the groove portion 34 is not formed. Figure 10As shown, the groove portion 46 is formed in a manner including the area corresponding to the electrode pad 33 when the printed circuit board 30a is configured. The depth of such a groove portion 46 is also preferably not less than 5μm and not more than 500μm, and more preferably not less than 10μm and not more than 100μm. It should be noted that as long as a recess is formed in the area corresponding to each electrode pad 33 in the configuration area 44 of the housing 40a, the groove portion 46 is a portion including such a recess. In addition, the shape of the groove portion 46 is an example, and other shapes may be used as long as the area corresponding to the electrode pad 33 is included. In the case of the third embodiment, by forming the groove portion 46 in a manner including these recesses, processing becomes easier than forming the recesses separately.

[0100] When manufacturing such a semiconductor device 10a, adhesive 51 is first applied by a dispenser to the groove 46 formed in the arrangement region 44 of the housing 40a or to the back surface of the printed circuit board 30a corresponding to the groove 46. The printed circuit board 30a is then arranged in the arrangement region 44 of the housing 40a with the adhesive 51 interposed therebetween, and the ceramic circuit board 20 is then arranged in the opening 45 of the housing 40a with the adhesive interposed therebetween (not shown).

[0101] While the printed circuit board 30a and the ceramic circuit board 20 are pressed downwardly of the box 40a, the adhesive 51 is cured by heating at a temperature of, for example, 150°C to 170°C for three minutes to five minutes.

[0102] Then, using a bonding tool (not shown), bonding wires 50 are ultrasonically bonded to electrically connect the electrode pads 33 of the printed circuit board 30a to the control terminals 43, the electrodes of the control IC 31, the control electrodes of the switching elements 24, and the circuit patterns 23b to 23d. Figure 11 ).

[0103] The semiconductor device 10a manufactured in this manner includes electrode pads 33, a printed circuit board 30a having the electrode pads 33 formed on its front surface, and a housing 40a having a placement area 44 for the printed circuit board 30a and housing the printed circuit board 30a. Furthermore, a groove 46 in which an adhesive 51 is embedded is formed on the front surface of the placement area 44 of the housing 40a, corresponding to the area directly below the electrode pads 33. Therefore, the electrode pads 33 are securely bonded to the housing 40a via the adhesive 51 directly below them. In this semiconductor device 10a, if bonding wires 50 are placed on the electrode pads 33 and ultrasonically bonded using a bonding tool (not shown), vibration of the electrode pads 33 in response to the ultrasonic vibrations generated by the bonding tool can be suppressed. Consequently, the bonding wires 50 are securely bonded to the electrode pads 33. Furthermore, when the printed circuit board 30a is bonded to the arrangement region 44 of the housing 40a, the adhesive 51 is embedded in the groove 46. Therefore, the adhesive 51 does not overflow from the gap between the printed circuit board 30a and the arrangement region 44 of the housing 40a, nor does it flow around to the electrode pads 33. As a result, the printed circuit board 30a and the arrangement region 44 of the housing 40a are reliably bonded. Therefore, the bonding wires 50 can be reliably bonded to the electrode pads 33, while the adhesive 51 is prevented from overflowing and preventing electrical failures. Consequently, a decrease in the reliability of the semiconductor device 10a can be suppressed.

[0104] Furthermore, when the adhesive 51 is applied to the arrangement region 44 of the case 40a, the groove 46 formed in the arrangement region 44 of the case 40a serves as a mark, making it easy to identify the application position and reducing the manufacturing cost of the semiconductor device 10a.

[0105] It should be noted that the groove portion 46 of the third embodiment, like the groove portion 34a of the second embodiment, can also have a substantially semicircular cross-section. This curvature of the corners within the groove portion 46 can reduce air entrapment at these corners. By forming such a groove portion 46 in the housing 40a, when ultrasonic bonding is used to bond the bonding wire 50 to the electrode pad 33, a decrease in the conductivity of ultrasonic vibrations can be suppressed, allowing for more reliable bonding of the bonding wire 50 to the electrode pad 33.

Claims

1. A semiconductor device, characterized in that: It has a circuit board and a housing, The circuit substrate includes an electrode pad including a bonding area for bonding with a bonding wire and an insulating layer having the electrode pad formed on the front surface. The housing includes a placement area for placing the circuit substrate and accommodates the circuit substrate. A recessed portion is formed on the back surface of the insulating layer in which a bonding material is embedded, in a first region corresponding to directly below the bonding region of the electrode pad, or in a second region corresponding to directly below the bonding region and opposite to the first region of the configured circuit substrate in the configuration region. The recess is formed on the back surface of the insulating layer corresponding to the bonding area of the electrode pad, or is formed in the configuration area of the housing corresponding to the bonding area of the electrode pad. The width of the recess is not less than 0.8 times and not more than 1.2 times the width of the bonding region.

2. The semiconductor device according to claim 1, wherein A groove portion including the concave portion is formed.

3. The semiconductor device according to claim 1, wherein A semiconductor chip is arranged on the circuit substrate. Another electrode pad is formed on the semiconductor chip, and the other electrode pad includes another bonding area for bonding with another bonding wire. The recess is not formed on the back surface of the insulating layer directly below the other bonding region or in the arrangement region of the housing directly below the other bonding region.

4. The semiconductor device according to claim 1, wherein There are multiple electrode pads. The circuit substrate has a predetermined area where all of the plurality of electrode pads including the bonding area for bonding with the bonding wire are arranged. In a third area corresponding to directly below the predetermined area on the back side of the insulating layer, or in a fourth area corresponding to the configuration area opposite to the third area of the configured circuit substrate, a groove portion is formed in which a bonding material is embedded and includes the third area or the fourth area, and the groove portion includes the recess.

5. The semiconductor device according to any one of claims 1 to 4, wherein The cross section of the recess is semicircular.

6. A method for manufacturing a semiconductor device, characterized in that: include: A step of preparing a circuit substrate and a housing, wherein the circuit substrate has electrode pads including bonding areas for bonding with bonding wires and an insulating layer having the electrode pads formed on a front surface, and the housing has an arrangement area for arranging the circuit substrate; forming a recess including the first region in a first region corresponding to the first region immediately below the bonding region of the electrode pad on the back surface of the insulating layer; a step of applying a bonding material to the recessed portion formed in the first region or to a region opposite to the recessed portion; as well as a step of bonding the circuit substrate to the arrangement region of the housing, The recess is formed on the back surface of the insulating layer corresponding to the bonding area directly below the electrode pad. The width of the recess is not less than 0.8 times and not more than 1.2 times the width of the bonding region.

7. A method for manufacturing a semiconductor device, characterized in that: include: A step of preparing a circuit substrate and a housing, wherein the circuit substrate has electrode pads including bonding areas for bonding with bonding wires and an insulating layer having the electrode pads formed on a front surface, and the housing has an arrangement area for arranging the circuit substrate; forming a recessed portion including the second region in the arrangement region corresponding to a second region immediately below the bonding region of the electrode pad arranged on the circuit substrate; a step of applying a bonding material to the recessed portion formed in the second region or to a region opposite to the recessed portion; as well as a step of bonding the circuit substrate to the arrangement region of the housing, The recess is formed in the arrangement area of the housing corresponding to right below the bonding area of the electrode pad. The width of the recess is not less than 0.8 times and not more than 1.2 times the width of the bonding region.

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