Hybrid and Thinned Millimeter-Wave Antenna Solution

Abstract

Apparatuses and systems for millimeter wave antennas are described. An apparatus includes a board assembly, and first and second antennas disposed within the board assembly. A third antenna may include a semiconductor antenna attached to the board assembly. A parasitic layer may be gap-coupled to the first and second antennas. The first and second antennas may include a rectangular patch antenna and an aperture loop antenna. Other aspects are described.

Description

[0001] Priority Claim

[0002] This application claims the benefit of priority of U.S. Provisional Patent Application Serial No. 62 / 567,435, filed on October 3, 2017, entitled "MILLIMETER-WAVE ANTENNA ARRAY SOLUTION FOR 5TH GENERATION OF MOBILE NETWORKS", which is hereby incorporated by reference in its entirety. TECHNICAL FIELD

[0003] Aspects described herein generally relate to methods and apparatus for wireless communication; and more particularly, to methods and apparatus for millimeter (mm) wave antenna arrays. BACKGROUND

[0004] Evolving mobile devices will support at least three different millimeter (mm) wave frequency bands (24 - 29.5 GHz, 37 - 43.5 GHz, and 57 - 70 GHz). Some products will be expected to support all three bands, while other products will be expected to support only the lower two of these bands. Designing both types of products in parallel can be expensive. In addition, the antennas for such mobile devices add thickness to the mobile device. The additional thickness may be undesirable for mobile device customers. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1 Exemplary user equipment is illustrated in accordance with some aspects.

[0006] Figure 2 Exemplary base station radio heads are illustrated in accordance with some aspects.

[0007] Figure 3 Exemplary communication circuits are illustrated in accordance with some aspects.

[0008] Figure 4 A block diagram of an example antenna structure is generally illustrated in accordance with some aspects.

[0009] Figure 5 A side view of an example antenna structure is illustrated in accordance with some aspects.

[0010] Figure 6A A perspective view of a first example planar antenna circuit for two frequency bands is generally illustrated in accordance with some aspects.

[0011] Figure 6B Generally illustrated in accordance with some aspects Figure 6A of the planar antenna circuit.

[0012] Figure 7AA perspective view of a second exemplary planar antenna circuit is schematically illustrated in accordance with some aspects.

[0013] Figure 7B Schematically illustrated is Figure 7A a side view of the planar antenna circuit of

[0014] Figure 8A A first top view of an exemplary package is illustrated in accordance with some aspects.

[0015] Figure 8B A second top view of an exemplary package is illustrated in accordance with some aspects.

[0016] Figure 9A A side view of a thinned antenna solution is illustrated in accordance with some aspects.

[0017] Figure 9B A perspective view of a thinned antenna solution is illustrated in accordance with some aspects.

[0018] Figure 10 A block diagram of an example machine on which any one or more of the techniques (e.g., methods) discussed herein may be performed is illustrated. DETAILED DESCRIPTION

[0019] The following description and drawings sufficiently illustrate specific aspects to enable those skilled in the art to implement them. Other aspects may incorporate structural, logical, electrical, process, and other changes. Portions and features of some aspects may be included in or substituted for those of other aspects. Aspects covered by the claims encompass all available equivalents of those claims.

[0020] Figure 1 An exemplary user equipment is illustrated in accordance with some aspects. User equipment 100 may include, in some aspects, antenna aspects as described hereinafter. User equipment 100 may be a mobile device in some aspects and includes an application processor 105, a baseband processor 110 (also referred to as a baseband subsystem), a radio front end module (RFEM) 115, a memory 120, a connectivity subsystem 125, a near field communication (NFC) controller 130, an audio driver 135, a camera driver 140, a touch screen 145, a display driver 150, sensors 155, a removable memory 160, a power management integrated circuit (PMIC) 165, and a smart battery 170. RFEM 115 may be coupled to an antenna as described hereinafter.

[0021] In some aspects, the application processor 105 may include, for example, one or more central processing unit (CPU) cores and one or more of the following: cache memory, a low drop-out (LDO) voltage regulator, an interrupt controller, a serial interface such as SPI, I2C, or a general-purpose programmable serial interface subsystem, a real time clock (RTC), timer-counters including interval and watchdog timers, general-purpose I / O, a memory card controller such as SD / MMC, a USB interface, a MIPI interface, and / or a Joint Test Access Group (JTAG) test access port.

[0022] In some aspects, the baseband processor 110 may be implemented, for example, as a soldered-in substrate including one or more integrated circuits, a single-package integrated circuit soldered to the main circuit board, and / or a multi-chip module including two or more integrated circuits.

[0023] Figure 2 Exemplary base station or infrastructure equipment radio heads are illustrated according to some aspects. The base station may be referred to as, for example, an evolved Node B (eNB, eNodeB), or a new radio Node B (gNB, gNodeB). In some aspects, the base station radio head 200 may include one or more of the following: an application processor 205, a baseband processor 210, one or more radio front-end modules 215, a memory 220, a power management integrated circuit (PMIC) 225, a power tee circuit 230, a network controller 235, a network interface connector 240, a satellite navigation receiver (e.g., a GPS receiver) 245, and a user interface 250.

[0024] In some aspects, the application processor 205 may include one or more CPU cores and one or more of the following: cache memory, a low drop-out (LDO) voltage regulator, an interrupt controller, a serial interface such as SPI, I2C, or a general-purpose programmable serial interface, a real time clock (RTC), timer-counters including interval and watchdog timers, general-purpose I / O, a memory card controller such as SD / MMC, a USB interface, a MIPI interface, and a Joint Test Access Group (JTAG) test access port.

[0025] In some aspects, the baseband processor 210 may be implemented, for example, as a soldered-in substrate including one or more integrated circuits, a single-package integrated circuit soldered to the main circuit board, or a multi-chip subsystem including two or more integrated circuits.

[0026] In some aspects, memory 220 may include one or more of the following: volatile memory, including dynamic random access memory (DRAM) and / or synchronous DRAM (SDRAM); and non-volatile memory (NVM), including high-speed electrically erasable memory (commonly known as flash memory), phase change random access memory (PRAM), magneto-resistive random access memory (MRAM), and / or 3D cross-point memory. Memory 220 may be implemented as one or more of the following: a soldered-in package integrated circuit, a socketed memory module, and a plug-in memory card.

[0027] In some aspects, power management integrated circuit 225 may include one or more of the following: a voltage regulator, a surge protector, a power alarm detection circuit, and one or more backup power sources such as a battery or a capacitor. The power alarm detection circuit may detect one or more of a power-down (under-voltage) and a power surge (over-voltage) condition.

[0028] In some aspects, power splitter circuit 230 may provide power drawn from a network cable. Power splitter circuit 230 may use a single cable to provide both power supply and data connectivity to base station radio head 200.

[0029] In some aspects, network controller 235 may provide connectivity to a network using a standard network interface protocol such as Ethernet. Network connectivity may be provided using a physical connection that is one of electrical (commonly known as copper interconnect), optical, or wireless.

[0030] In some aspects, satellite navigation receiver 245 may include circuitry to receive and decode signals transmitted by one or more navigation satellite constellations such as the Global Positioning System (GPS), Globalnaya Navigatsionnaya Sputnikovaya Sistema (GLONASS), Galileo, and / or Beidou. Receiver 245 may provide data to application processor 205, which may include one or more of location data or time data. The time data may be used by application processor 205 to synchronize operations with other radio base stations or infrastructure devices.

[0031] In some aspects, the user interface 250 may include one or more buttons. The buttons may include a reset button. The user interface 250 may also include one or more indicators, such as LEDs and a display screen.

[0032] Figure 3 An exemplary communication circuit is illustrated according to some aspects. Figure 3 The communication circuit 300 shown therein may be grouped according to function. Figure 3 The components shown therein are provided for illustrative purposes here and may include other components not shown in Figure 3

[0033] The communication circuit 300 may include protocol processing circuitry 305 (or a processor) or other means for processing. The protocol processing circuitry 305 may implement one or more of the following: medium access control (MAC), radio link control (RLC), packet data convergence protocol (PDCP), radio resource control (RRC), and non-access stratum (NAS) functions, etc. The protocol processing circuitry 305 may include one or more processing cores to execute instructions and one or more memory structures to store program and data information.

[0034] The communication circuit 300 may further include digital baseband circuitry 310. The digital baseband circuitry 310 may implement physical layer (PHY) functions, including one or more of the following: hybrid automatic repeat request (HARQ) functions, scrambling and / or descrambling, encoding and / or decoding, layer mapping and / or demapping, modulation symbol mapping, received symbol and / or bit metric determination, multi-antenna port precoding and / or decoding (which may include one or more of space-time, space-frequency, or space coding), reference signal generation and / or detection, preamble sequence generation and / or decoding, synchronization sequence generation and / or detection, blind decoding of control channel signals, link adaptation, and other related functions.

[0035] The communication circuit 300 may further include a transmit circuit 315, a receive circuit 320, and / or an antenna array circuit 330. The communication circuit 300 may further include an RF circuit 325. In some aspects, the RF circuit 325 may include one or more parallel RF chains for transmission and / or reception. Each RF chain may be connected to one or more antennas in the antenna array circuit 330. The antenna array circuit may include the antenna aspects described later. ​

[0036] In some aspects, the protocol processing circuitry 305 may include one or more instances of control circuitry. The control circuitry may provide control functions for one or more of the digital baseband circuitry 310, the transmit circuitry 315, the receive circuitry 320, and / or the RF circuitry 325.

[0037] Millimeter-Wave Antenna Solution

[0038] Evolving mobile devices are expected to handle three different mmWave frequency bands (24 - 29.5 GHz, 37 - 43.5 GHz, and 57 - 70 GHz). Some devices will only need to support the lower two bands. The lower two bands may include dual-polarization capabilities to support multiple-input multiple-output (MIMO). For such support, example antennas may include an annular ring patch with a rectangular patch. The high-frequency band (57 - 70 GHz) may be optional in some future devices. In certain examples, a first portion of the device may support the lower two bands, and a second portion of the device may support all three bands. Additionally, the RF signals from a silicon chip coupled to the antenna element may include the two lower frequency bands on a single trace, meaning there is only one feed trace per polarization. Having only a single feed per polarization may thus simplify the board routing density.

[0039] In certain examples, the antenna elements supporting at least the two lower frequency bands may be extracted in a board assembly (e.g., a laminated board assembly or a dielectric board assembly), while the antenna elements supporting the high-frequency band may be an on-chip antenna extracted in a die process. These examples may be referred to as hybrid solutions. In certain examples, the antenna elements for the lower frequency bands may use an inherent duplexer that is applied to an antenna element structure including coupled rectangular and annular patches. In certain examples, a single package may be provided that includes two lower frequency band antennas and an optional high-frequency band antenna. In such examples, the board and the package may be designed once, and the silicon circuitry for the high-frequency band may be added according to the required product. In certain examples, a thinning solution may include a rectangular patch antenna inside an annular patch antenna, where gap-coupled parasitics surround the annular patch antenna.

[0040] Hybrid Antenna Array Solution

[0041] Figure 4A block diagram generally illustrating an example antenna structure 400 in accordance with some aspects is shown. The antenna structure may include a shield 401, a semiconductor circuit 402, such as a silicon-based semiconductor circuit, a semiconductor antenna circuit 403, such as an antenna array, fabricated as part of the semiconductor circuit, a board 404, and a board antenna circuit, such as an antenna array 405, fabricated as part of the board. In some examples, the semiconductor antenna circuit may provide an antenna array for a high frequency band, and the board antenna circuit may provide an antenna array for one or more lower frequency bands. In some examples, the board antenna circuit may be formed in a board (e.g., a laminate or a dielectric board). In some examples, the board antenna circuit may include antennas for transmitting or receiving a first frequency band and a second frequency band. In some examples, the first frequency band may have a first polarization, and the second frequency band may have a second polarization.

[0042] Figure 5 A side view of an example antenna structure 530 is illustrated in accordance with some aspects. The structure 530 may include a silicon antenna 531 (antenna on chip, AOC) on a chip 532, and a board antenna structure 510. In some examples, the silicon antenna 531 (AOC) on the chip 532 may be placed and attached beneath board antennas 533, 534 of a board 519. The board antennas 533, 534 (e.g., a first antenna or a first patch antenna, and a second antenna or a second patch antenna) may be patch antennas 511, 512, and each patch antenna may be indirectly excited by an upper patch antenna probe 521 or a lower patch antenna probe 522, which are coupled to respective feeds 515, 516 serving as indirect feed probes. In some examples, a metal clearance 536 in a bottom GND layer in the board around the AOC may be used to enable the high frequency band antenna to radiate through the board 519. The low frequency band (24 - 29.5 GHz and 37 - 43.5 GHz) board antennas 533, 534 may be coupled rectangular - loop aperture patches as described below with reference to Figure 6A , 6B , 7A and 7B. In some examples, the feed 515 for the upper patch antenna probe 521 may include a waveguide or a coaxial structure.

[0043] Coupled Loop Hole and Rectangular Patch

[0044] Figure 6A A perspective view generally illustrating an example board antenna circuit 610 for two frequency bands, such as the lower frequency bands discussed above with reference to Figure 4 and Figure 5 is shown. Figure 6B Generally illustrated is Figure 6ASide view of the planar antenna circuit 610. The planar antenna circuit 610 may include a dielectric constructed in layers (not shown), and the planar antenna circuit 610 may further include an annular patch antenna 611, a rectangular patch antenna 612, a first parasitic patch 613, a second parasitic patch 614, and first and second feeds 615, 616. The annular patch antenna 611 may have a rectangular outer perimeter and a rectangular inner perimeter. In some examples, the planar antenna circuit 610 may support the dual-feed, dual-polarization principle. In some examples, the first parasitic patch 613 may be fabricated in a different layer from the second parasitic patch 614. In some examples, such as Figure 6A and 6B shown in, the first parasitic patch 613 may be fabricated in the same layer as the second parasitic patch 614. In some examples, either or both of the annular patch antenna 611 and the rectangular patch antenna 612 may include metal patches and parasitic patches in the same or different layers.

[0045] In some examples, the planar antenna circuit 610 may support the lower two frequency bands (24 - 29.5 GHz and 37 - 43.5 GHz) as described above and a chip-on antenna array (not shown) may optionally be attached to the board to cover the higher frequency band (57 - 70 GHz) as described above. Since the planar antenna circuit is based on the aperture-coupled patch, the antenna can be very compact. In some examples, the antenna element size may be approximately 2.4 mm x 2.4 mm, with a BT laminate material (r = 3.1, tanδ = 0.004). Such a small antenna element can be part of a phased antenna solution suitable for handheld devices or other mobile applications. In some examples, the aperture-coupled stacked patch may be configured to operate in the TM12 mode, and the conventional rectangular stacked patch may be configured to operate in the TM10 mode, or vice versa.

[0046] Figure 7A Perspective view generally illustrating an example planar antenna circuit 710 for two frequency bands, such as the lower frequency bands discussed above with reference to Figure 4 and Figure 5 discussed. Figure 7B Perspective view generally illustrating Figure 7A the side view of the planar antenna circuit 710. The planar antenna circuit 710 may include a dielectric constructed in layers (not shown), and the planar antenna circuit 710 may further include an aperture element 711, a conventional rectangular element 712, a first parasitic patch 713, a second parasitic patch 714, and first, second, third, and fourth feeds 715, 716, 717, 718. In some examples, the planar antenna circuit 710 may support the quad-feed or dual-feed, dual-polarization principle. In some examples, the first parasitic patch 713 may be fabricated in a different layer from the second parasitic patch 714. In some examples, such as Figure 7A and 7BAs shown, the first parasitic patch 713 can be fabricated in the same layer as the second parasitic patch 714.

[0047] In some examples, the board antenna circuit 710 can support the lower two frequency bands (24 - 29.5 GHz and 37 - 43.5 GHz) as described above, and the on-chip antenna array can be designed to cover the higher frequency band (57 - 70 GHz) also as described above. Since the board antenna circuit 710 is aperture-patch based, the antenna can be very compact. In some examples, the antenna element size can be approximately 2.4 mm x 2.4 mm, with a BT laminate material (r = 3.1, tanδ = 0.004). Such a small antenna element can be part of a phased antenna solution suitable for handheld devices or other mobile applications.

[0048] Figure 8A and Figure 8B FIG. illustrates a top view of an example antenna array system 800. The package can include four high-frequency band antenna elements 831 (e.g., as a composite high-frequency antenna array element) arranged in an array, and four combined lower-frequency band elements 810 (e.g., as a composite low-frequency antenna array element) arranged in an array. The vertical arrangement of the high- and low-frequency band elements 831, 810 can be as Figure 4 shown, and it is to be understood that the high-frequency band elements 831 of the semiconductor chip 801 and the low-frequency band elements 810 of the laminate 804 can be laterally offset.

[0049] In some examples, the lower-frequency band elements can include two elements, such as but not limited to a 30 GHz element 811 and a 40 GHz element 812. In some examples, the high-frequency band antenna element 831 can include but not limited to a single 60 GHz element. In some examples, the semiconductor chip 801 can be approximately 4 mm x 4 mm or 16 mm 2 . In some examples, the overall size of the laminate 804 can be approximately 7 mm x 7 mm.

[0050] In some examples, both the low-frequency array and the high-frequency array can have symmetry along the length, along the width, and diagonally. In such examples, for the lengthwise and widthwise symmetry of the high-frequency array and the diagonal symmetry of the low-frequency array, the antenna elements of each array can be halved. For the lengthwise and widthwise symmetry of the low-frequency array and the diagonal symmetry of the high-frequency array, the antenna elements of each array do not need to be halved. In some examples, the bottom GND layer of the structure can include the metal voids 850 as described above. In some examples, the on-chip or high-frequency band antenna 831 can be a loop antenna. The loop antenna can provide a very compact solution that does not require additional silicon space because, in some examples, the loop antenna can surround the high-frequency band circuit block. In some examples, the silicon technology can be 45nm SOI. This technology can enable a high-resistivity body, which can increase the on-chip antenna efficiency to as high as 80%. Full coverage below -10dB can be achieved across all frequency bands.

[0051] In some examples, each of the combined low-frequency band antenna elements can include a patch antenna for two frequency bands, as referenced Figure 4 , Figure 5 , Figure 6A , Figure 6B , Figure 7A and Figure 7B described. In some examples, the two frequency bands can include a first frequency band of approximately 24 - 29.5 GHz (30 GHz) and a second frequency band of approximately 37 - 43.5 GHz (40 GHz).

[0052] In one example, the board antenna circuit can include 5 metal layers, including a GND layer, a high-frequency band feed layer, a high-frequency band patch, a low-frequency band patch, and high-frequency and low-frequency band parasitic patches (on the same layer). In some examples, semiconductor antennas can be used for the high-frequency band. In some examples, the frequency of the high-frequency band can include 57 - 70 GHz.

[0053] Thinned 5G Antenna for Handheld Devices

[0054] Figure 9A A side view of the thinned antenna 900 device is illustrated according to some aspects. Figure 9B A perspective view of the thinned antenna 900 is illustrated according to some aspects. The thinned antenna 900 device can be fabricated in one or more layers of the board assembly 914 as described below. The thinned antenna 900 device includes an annular patch antenna fabricated in the board assembly 914 and having a rectangular outer perimeter. The thinned antenna 900 also includes a rectangular patch antenna 902 fabricated in the board assembly 914.

[0055] The thinned antenna 900 further includes a parasitic layer 906 that is capacitively coupled to the loop patch antenna 904 and the rectangular patch antenna 902 and is disposed outside the rectangular perimeter. The parasitic layer 906 can be coplanar with the loop patch antenna 904 in the first layer 916 of the board assembly. The rectangular patch antenna 902 can be disposed on a plane 918 between the ground plane 920 of the board assembly and the first layer 916 of the board assembly.

[0056] The thinned antenna 900 may further include first, second, and third feeds 908, 910, and 912. The parasitic layer 906 is shared between the loop patch antenna 904 and the rectangular patch antenna 902 by a common feed 910. The parasitic layer 906 can be used with the rectangular patch antenna 902 for high frequency band (e.g., 37 - 42.5 GHz, vertical or horizontal polarization) operation, or with the loop patch antenna 904 for low frequency band (e.g., 24 - 29.5 GHz, vertical or horizontal polarization) operation. The thinned antenna 900 can be less than 0.85 millimeters in thickness. In some examples, the thinned antenna 900 will be approximately 0.5 millimeters thick 917.

[0057] Other Devices

[0058] Figure 10 A block diagram of an example machine 1100 is illustrated on which any one or more of the techniques (e.g., methods) discussed herein can be executed. In alternative aspects, the machine 1000 can operate as a stand - alone device or can be connected (e.g., networked) to other machines. In a networked deployment, the machine 1000 can operate as a server machine, a client machine, or both in a server - client network environment. In one example, the machine 1000 can act as a peer machine in a peer - to - peer (P2P) (or other distributed) network environment. Additionally, although only a single machine is illustrated, the term "machine" should also be understood to include any collection of machines that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methods discussed herein, such as cloud computing, software as a service (SaaS), other computer cluster configurations.

[0059] Examples as described herein may include or be operated on by logic or several components or mechanisms. A circuit is a collection of circuits implemented in a tangible entity that includes hardware (e.g., simple circuits, gates, logic, etc.). Circuit membership can be flexible over time and with underlying hardware variability. A circuit includes members that can perform specified operations individually or in combination when operated. In one example, the hardware of a circuit can be permanently designed to perform a specific operation (e.g., hardwired). In one example, the hardware of a circuit can include physically components with variable connections (e.g., execution units, transistors, simple circuits, etc.), including a computer-readable medium that is physically modified (e.g., magnetically modified, electrically modified, movable placement of immobile aggregating particles, etc.) to encode instructions for a specific operation. When connecting the physical components, the underlying electrical properties of the hardware components are changed, such as from an insulator to a conductor, or vice versa. The instructions enable the embedded hardware (e.g., execution unit or loading mechanism) to perform some parts of a specific operation when operated by creating members of the circuit in hardware via variable connections. Thus, when the device is in operation, the computer-readable medium is communicatively coupled to other components of the circuit. In one example, any physical component can be used in more than one member of more than one circuit. For example, in operation, an execution unit can be used in a first circuit of a first circuit system at one point in time and reused by a second circuit in the first circuit system or a third circuit in a second circuit system at a different time.

[0060] A machine (e.g., a computer system) 1000 may include a hardware processor 1002 (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a hardware processor core, or any combination thereof), a main memory 1004, and a static memory 1006, some or all of which may communicate with each other via an interconnecting link (e.g., a bus) 1008. The machine 1000 may also include a display unit 1010, an alphanumeric input device 1012 (e.g., a keyboard), and a user interface (UI) navigation device 1014 (e.g., a mouse). In one example, the display unit 1010, the alphanumeric input device 1012, and the UI navigation device 1014 may be a touch screen display. The machine 1000 may also include a storage device (e.g., a drive unit) 1016, a signal generation device 1018 (e.g., a speaker), a network interface device 1020, and one or more sensors 1021, such as a global positioning system (GPS) sensor, a compass, an accelerometer, or other sensors. The machine 1000 may include an output controller 1028, such as a serial (e.g., universal serial bus (USB)), parallel, or other wired or wireless (e.g., infrared (IR), near field communication (NFC), etc.) connection to communicate with or control one or more peripheral devices (e.g., a printer, a card reader, etc.).

[0061] The storage device 1016 may include a machine-readable medium 1022 having stored thereon a set or sets of data structures or instructions 1024 (e.g., software) that implement any one or more of the techniques or functions described herein or are utilized by any one or more of the techniques or functions described herein. The instructions 1024 may also reside, completely or at least partially, within the main memory 1004, within the static memory 1006, or within the hardware processor 1002 during execution thereof by the machine 1000. In one example, one or more of the hardware processor 1002, the main memory 1004, the static memory 1006, or the storage device 1016, or any combination thereof, may constitute a machine-readable medium.

[0062] Although the machine-readable medium 1022 is illustrated as a single medium, the term "machine-readable medium" may include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) configured to store one or more instructions 1024.

[0063] The term "machine-readable medium" can include any medium that can store, encode, or carry instructions for execution by a machine 1000 and cause the machine 1000 to perform any one or more of the techniques of the present disclosure, or that can store, encode, or carry data structures used by or associated with such instructions. Non-limiting examples of machine-readable media can include solid-state memory, as well as optical and magnetic media. In one example, an aggregated machine-readable medium includes a machine-readable medium in which multiple particles have invariant (e.g., stationary) mass. Thus, an aggregated machine-readable medium is not a transient propagated signal. Specific examples of aggregated machine-readable media can include: non-volatile memory, such as semiconductor memory devices (e.g., Electrically Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM)), and flash memory devices; magnetic disks, such as internal hard disks and removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks.

[0064] Any one of several transmission protocols (e.g., Frame Relay, Internet Protocol (IP), Transmission Control Protocol (TCP), User Datagram Protocol (UDP), Hypertext Transfer Protocol (HTTP), etc.) can also be utilized to send or receive instructions 1020 via a network interface device 1024 over a communication network 1026 using a transmission medium. Example communication networks can include local area networks (LANs), wide area networks (WANs), packet data networks (e.g., the Internet), mobile telephone networks (e.g., cellular networks), Plain Old Telephone (POTS) networks, and wireless data networks (e.g., the Institute of Electrical and Electronics Engineers (IEEE) 802.6 standard family known as and the Institute of Electrical and Electronics Engineers (IEEE) 802.6 standard family known as the IEEE 802.16 standard family), the IEEE 802.15.4 standard family, peer-to-peer (P2P) networks, and so on. In one example, the network interface device 1020 may include one or more physical sockets (e.g., Ethernet, coaxial, or telephone sockets) or one or more antennas 1023 as described above to connect to the communication network 1026. In one example, the network interface device 1020 may include multiple antennas 1023 to wirelessly communicate using at least one of single-input multiple-output (SIMO), MIMO, or multiple-input single-output (MISO) techniques. The term "transmission medium" should be understood to include any non-transitory medium that can store, encode, or carry instructions for execution by the machine 1000, and includes digital or analog communication signals or other non-transitory media to facilitate the communication of such software.

[0065] The detailed description above includes references to the accompanying drawings, which form a part of the detailed description. The drawings illustrate specific aspects in which the invention can be implemented. These aspects are also referred to herein as "examples". Such examples can include additional elements in addition to those shown or described. However, the inventors also contemplate examples in which only the elements shown or described are provided. Additionally, the inventors also contemplate examples (or one or more aspects thereof) that use any combination or arrangement of the elements shown or described, whether for a particular example (or one or more aspects thereof) or for other examples (or one or more aspects thereof) shown or described herein.

[0066] In this document, as is common in patent documents, the term "a" is used to include one or more than one, independent of any other instances or uses of "at least one" or "one or more". In this document, the term "or" is used to refer to a non-exclusive or, such that "A or B" includes "A, but not B", "B, but not A", and "A and B", unless otherwise indicated. In this document, the terms "including" and "in which" are used as the plain English equivalents of the corresponding terms "comprising" and "wherein". Additionally, in the appended claims, the terms "including" and "comprising" are open-ended, that is, a system, device, article, composition, formulation, or process that includes other elements in addition to those listed after such terms in the claim is still considered to fall within the scope of the claim. Additionally, in the appended claims, the terms "first", "second", and "third", etc. are used only as labels and are not intended to impose numerical requirements on their objects.

[0067] Various examples of the apparatus and systems discussed herein (e.g., an antenna assembly, or other apparatus) are described next.

[0068] Example 1 is an apparatus that includes a board assembly; a first antenna disposed within the board assembly; a second antenna disposed within the board assembly; and a third antenna that includes a semiconductor antenna attached to the board assembly.

[0069] In Example 2, the subject matter as described in Example 1 may optionally include wherein the first antenna includes a first patch antenna.

[0070] In Example 3, the subject matter as described in Example 2 may optionally include wherein the first patch antenna includes a first indirect feed probe.

[0071] In Example 4, the subject matter as described in Example 3 may optionally include wherein the first indirect feed probe includes a waveguide.

[0072] In Example 5, the subject matter as described in any one of Examples 1-4 may optionally include wherein the second antenna includes a second patch antenna.

[0073] In Example 6, the subject matter as described in Example 5 may optionally include wherein the second patch antenna includes a second indirect feed probe.

[0074] In Example 7, the subject matter as described in any one of Examples 1-6 may optionally include wherein the second antenna is disposed in a layer of the board assembly, the layer being disposed between the plane of the first antenna and the plane of the third antenna.

[0075] In Example 8, the subject matter as described in Example 2 may optionally include wherein the first patch antenna includes a first metal patch in a first layer of the board assembly and a first parasitic patch in a second layer of the board assembly.

[0076] In Example 9, the subject matter as described in Example 8 may optionally include wherein the first metal patch is an annular aperture.

[0077] In Example 10, the subject matter as described in Example 9 may optionally include wherein the annular aperture includes a rectangular outer perimeter and a rectangular inner perimeter.

[0078] In Example 11, the subject matter as described in Example 8 may optionally include wherein the second antenna includes a second metal patch in a third layer of the board assembly; and a second parasitic patch in a fourth layer of the board assembly.

[0079] In Example 12, the subject matter as described in Example 11 may optionally include wherein the second metal patch is a conventional rectangular metal patch.

[0080] In Example 13, the subject matter as described in Example 12 may optionally include where the first metal patch is an annular aperture.

[0081] In Example 14, the subject matter as described in Example 13 may optionally include where the annular aperture includes a rectangular outer perimeter and a rectangular inner perimeter.

[0082] In Example 15, the subject matter as described in Example 14 may optionally include where the first parasitic patch is a second annular aperture.

[0083] In Example 16, the subject matter as described in Example 15 may optionally include where the second annular aperture includes a rectangular outer perimeter and a rectangular inner perimeter.

[0084] In Example 17, the subject matter as described in any one of Examples 11 - 16 may optionally include where the second layer and the fourth layer are the same layer.

[0085] In Example 18, an antenna array system may include a board assembly having four composite low - frequency antenna array elements; and a semiconductor coupled to the board assembly, the semiconductor having four high - frequency array elements.

[0086] In Example 19, the subject matter as described in Example 18 may optionally include where each of the four composite low - frequency antenna array elements is configured to support dual - polarization capability.

[0087] In Example 20, the subject matter as described in any one of Examples 18 - 19 may optionally include where each of the composite low - frequency antenna array elements includes a rectangular annular - aperture patch antenna and a conventional rectangular patch antenna.

[0088] In Example 21, the subject matter as described in any one of Examples 18 - 20 may optionally include a controller configured to transmit a first signal having a first polarization and a first frequency using a first antenna of each of the four composite low - frequency antenna array elements, transmit a second signal having a second polarization and a second frequency using a second antenna of each of the four composite low - frequency antenna array elements, and transmit a third signal having a third frequency using each antenna of the four high - frequency array elements; and where the first frequency is 24 - 29.5 GHz, the second frequency is 37 - 43.5 GHz (40 GHz), and the third frequency is 57 - 70 GHz.

[0089] In Example 22, a device (e.g., an antenna or antenna assembly or other device) may include a board assembly; a loop patch antenna disposed within the board assembly and having a rectangular outer perimeter; a rectangular patch antenna disposed within the board assembly; and a parasitic layer gap-coupled to the loop patch antenna and the rectangular patch antenna and outside the rectangular outer perimeter.

[0090] In Example 23, the subject matter as described in Example 22 may optionally include where the parasitic layer is coplanar with the loop patch antenna in a first layer of the board assembly.

[0091] In Example 24, the subject matter as described in any one of Examples 22-23 may optionally include where the rectangular patch antenna is disposed on a plane between a ground plane of the board assembly and a first layer of the board assembly.

[0092] In Example 25, the subject matter as described in any one of Examples 22-24 may optionally include where the parasitic layer is shared by common feeding between the loop patch antenna and the rectangular patch antenna.

[0093] The above description is intended to be illustrative and not restrictive. For example, the above examples (or one or more aspects thereof) may be used in combination with each other. Other aspects may be used, for example, by those of ordinary skill in the art after viewing the above description. The abstract is provided to comply with 37 C.F.R. § 1.72(b) to allow the reader to quickly determine the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Additionally, in the above detailed description, various features may be grouped together to simplify the disclosure. This should not be construed as wishing that unclaimed disclosed features are necessary for any claim. Rather, the inventive subject matter may lie in less than all features of a particular disclosed aspect. Thus, the following claims are hereby incorporated into the detailed description, where each claim stands on its own as a separate aspect, and it is contemplated that such aspects may be combined with each other in various combinations or permutations. The scope of the present invention should be determined with reference to the appended claims and the full scope of equivalents to which such claims are entitled.

Claims

1. An antenna device, comprising: A board assembly; A first patch antenna, which is arranged within the board assembly; A second patch antenna, which is arranged within the board assembly; And A third antenna, which includes a semiconductor antenna attached to the board assembly, Wherein, the first patch antenna includes a first metal patch in the first layer of the board assembly and a first parasitic patch in the second layer of the board assembly, The second patch antenna includes a second metal patch in the third layer of the board assembly and a second parasitic patch in the second layer, and The first parasitic patch is an annular aperture patch having a rectangular inner perimeter, the second parasitic patch is a rectangular patch, and the second parasitic patch is embedded in the first parasitic patch.

2. The antenna device according to claim 1, wherein the first patch antenna includes a first indirect feeding probe.

3. The antenna device according to claim 2, wherein the first indirect feeding probe includes a waveguide.

4. The antenna device according to claim 1, wherein the second patch antenna includes a second indirect feeding probe.

5. The antenna device according to claim 1, wherein the second patch antenna is arranged in a layer of the board assembly, and the layer is arranged between the plane of the first patch antenna and the plane of the third antenna.

6. The antenna device according to claim 1, wherein the first metal patch is an annular aperture.

7. The antenna device according to claim 6, wherein the annular aperture includes a rectangular outer perimeter and a rectangular inner perimeter.

8. The antenna device according to claim 1, wherein the second metal patch is a conventional rectangular metal patch.

9. The antenna device according to claim 8, wherein the first metal patch is an annular aperture.

10. The antenna device according to claim 9, wherein the annular aperture includes a rectangular outer perimeter and a rectangular inner perimeter.

11. The antenna device according to claim 1, wherein the first parasitic patch includes a rectangular outer perimeter.

12. An antenna array system, comprising: A board assembly having four composite low-frequency antenna array elements; A semiconductor coupled to the board assembly, the semiconductor having four high-frequency array elements; And A parasitic layer, Wherein, each of the composite low-frequency antenna array elements includes a rectangular annular aperture patch antenna and a conventional rectangular patch antenna, the parasitic layer is capacitively coupled to the rectangular annular aperture patch antenna and the conventional rectangular patch antenna, and the parasitic layer is arranged outside the outer perimeter of the rectangular annular aperture patch antenna and coplanar with the rectangular annular aperture patch antenna in the first layer of the board assembly.

13. The antenna array system according to claim 12, wherein each of the four composite low-frequency antenna array elements is configured to support dual polarization capabilities.

14. The antenna array system according to claim 12, comprising a controller configured to: transmit a first signal having a first polarization and a first frequency using a first antenna of each of the four composite low-frequency antenna array elements, transmit a second signal having a second polarization and a second frequency using a second antenna of each of the four composite low-frequency antenna array elements, and transmit a third signal having a third frequency using each antenna of the four high-frequency array elements; and wherein the first frequency ranges from 24 GHz to 29.5 GHz, the second frequency ranges from 37 GHz to 43.5 GHz, and the third frequency ranges from 57 GHz to 70 GHz.

15. An antenna device, comprising: a board assembly; a loop patch antenna disposed within the board assembly and having a rectangular outer perimeter; a rectangular patch antenna disposed within the board assembly; and a parasitic layer capacitively coupled to the loop patch antenna and the rectangular patch antenna and disposed outside the rectangular outer perimeter, wherein the parasitic layer is coplanar with the loop patch antenna in a first layer of the board assembly.

16. The antenna device according to claim 15, wherein the rectangular patch antenna is disposed on a plane between a ground plane of the board assembly and the first layer of the board assembly.

17. The antenna device according to claim 15, wherein the parasitic layer is shared between the loop patch antenna and the rectangular patch antenna by common feeding.

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