On-chip oscillator including shared inductor

Abstract

Some embodiments include apparatuses and methods of using the apparatuses. One of the apparatuses includes an inductor included in an integrated circuit device, and a first oscillator and a second oscillator included in the integrated circuit device. The first oscillator includes a first terminal coupled to a conductive path of the inductor to provide a first signal. The second oscillator includes a second terminal coupled to the conductive path to provide a second signal. The first signal and the second signal have different frequencies.

Description

[0001] CLAIM OF PRIORITY

[0002] This patent application claims priority to U.S. Application Serial No. 15 / 721,264, filed September 29, 2017, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] Embodiments described herein relate to integrated circuits. Some embodiments relate to LC (inductor-capacitor) oscillators included in integrated circuits. BACKGROUND

[0004] Many electronic devices or systems, such as computers, tablets, and cellular phones, include integrated circuit (IC) devices (or multiple IC devices (e.g., IC chips)) that perform one or more functions. The IC devices can have separate LC oscillators to generate different oscillation signals for different operations of the IC devices. Conventional IC devices with multiple LC oscillators typically use separate inductors for the separate oscillators. In some cases, the separate inductors used for such LC oscillators can impact device area for power efficiency and performance of the IC devices. BRIEF DESCRIPTION OF DRAWINGS

[0005] Figure 1 A schematic diagram of an apparatus in the form of an integrated circuit (IC) device including an oscillator circuit and a controller is shown, in accordance with some embodiments described herein.

[0006] Figure 2A With reference to Figure 2B is an example timing diagram of various signal pairs of the oscillator circuit of Figure 1

[0007] A portion of a structure (e.g., a top view) of an IC device including an inductor of an oscillator circuit of the IC device is shown, in accordance with some embodiments described herein. Figure 3A Figure 1 Side views (e.g., cross-sections) of different portions of the inductor along respective lines shown in

[0008] Figures 3B to 3F Figure 3A

[0009] Figure 4A An example operation of an IC device in which a mode is selected is shown, in accordance with some embodiments described herein. Figure 3A A circuit path (e.g., a current path) in an inductor of an IC device.

[0010] Figure 4B A portion of a structure (e.g., a top view) of an IC device including an inductor of an oscillator circuit of the IC device is shown, in accordance with some embodiments described herein. Figure 4A corresponding to a mode of the IC device of​​​ Figure 1 schematic diagram of the IC device of FIG. 1, in which some switches of the oscillators of the IC device are turned on (e.g., closed) while other switches of the other oscillators are turned off (e.g., open).

[0011] Figure 5A shows a schematic diagram of a portion of the IC device of FIG. 1 during exemplary operation of the IC device in which another mode is selected. Figure 3A a circuit path (e.g., a current path) in the inductor of the IC device of FIG. 1.

[0012] Figure 5B shows a schematic diagram of a portion of the IC device of FIG. 1 corresponding to a mode of the IC device. Figure 5A Figure 1 shows a schematic diagram of the IC device of FIG. 1, in which some switches of the oscillators of the IC device are turned off (e.g., open) while other switches of the other oscillators are turned on (e.g., closed).

[0013] Figure 6 shows a schematic diagram of an apparatus in the form of an IC device including an oscillator circuit having more than two oscillators, in accordance with some embodiments described herein.

[0014] Figure 7A , Figure 7B , Figure 7C , Figure 7D is a timing diagram of various signal pairs of the oscillator circuit of FIG. 1, in accordance with some embodiments described herein. Figure 6

[0015] Figure 8 shows a schematic diagram of a portion of the IC device of FIG. 1, in accordance with some embodiments described herein. Figure 6

[0016] Figure 9A shows a schematic diagram of a portion of the IC device of FIG. 1 during exemplary operation of the IC device in which another mode is selected. Figure 6 a circuit path (e.g., a current path) in the inductor of the IC device of FIG. 1.

[0017] Figure 9B shows a schematic diagram of a portion of the IC device of FIG. 1 corresponding to a mode of the IC device. Figure 9A Figure 6

[0018] Figure 10A shows a schematic diagram of a portion of the IC device of FIG. 1 during exemplary operation of the IC device in which another mode is selected. Figure 6 a circuit path (e.g., a current path) in the inductor of the IC device of FIG. 1.

[0019] ​​​​​ Figure 10B corresponding to a selected mode of the IC device according to some embodiments described herein. Figure 10A Figure 6

[0020] Figure 11A illustrates an exemplary operation during selection of another mode of the IC device according to some embodiments described herein, Figure 6 circuit paths (e.g., current paths) in the inductor of the IC device.

[0021] Figure 11B corresponding to a selected mode of the IC device according to some embodiments described herein. Figure 11A Figure 6

[0022] Figure 12A illustrates an exemplary operation during selection of another mode of the IC device according to some embodiments described herein, Figure 6 circuit paths (e.g., current paths) in the inductor of the IC device.

[0023] Figure 12B corresponding to a selected mode of the IC device according to some embodiments described herein. Figure 12A Figure 6

[0024] Figure 13 illustrates a schematic diagram of an apparatus in the form of an IC device according to some embodiments described herein, the apparatus comprising a transceiver and an oscillator circuit.

[0025] Figure 14 is a flowchart illustrating a method of operating an apparatus comprising an IC device according to some embodiments described herein. DETAILED DESCRIPTION

[0026] ​​​​​​The technology described herein includes IC devices having an on-chip inductor shared by multiple oscillators of the IC device. The oscillators described herein can be used by many components of the IC device. Examples of such components include transceivers, such as those used in wireless communication devices or systems. As known to those skilled in the art, many transceivers for mobile (e.g., cellular) telecommunication (e.g., 3G, 4G, and 5G networks) and connectivity (e.g., global navigation satellite system (GNSS), Bluetooth, and wireless local area network (WLAN)) applications are complex systems that typically operate in a very crowded radio environment with a relatively wide frequency range (e.g., from 0.5 GHz to 5 GHz or higher). Transceivers used in such applications typically have separate local oscillators designed to generate different signals with different frequencies to cover the operating frequency range of the transceiver and meet specific phase noise performance. LC oscillators are often used for such local oscillators. In many conventional techniques, each local oscillator in the separate oscillators of a transceiver has its own LC circuit (e.g., LC resonant tank or resonant circuit (resonator)) and each LC circuit is designed (e.g., optimized) for a unique allocated frequency band (e.g., frequency). Many conventional techniques use separate passive inductors for the LC local oscillators to extend the frequency tuning range. However, separate passive inductors for the LC local oscillators complicate the design effort and can occupy a relatively large device (e.g., chip) area for the local LC oscillators. Some other conventional techniques use series switches in the inductor to avoid using separate passive inductors. However, the series switches introduce additional loss and parasitic effects.

[0027] As discussed in more detail below, the described technology includes a shared spiral inductor that can be tapped at different taps (e.g., different locations) in the inductor to construct multiple LC circuits (e.g., LC circuits or resonant circuits (resonators)). During operation, a portion of the taps is used in one LC circuit to generate an oscillation signal (or multiple oscillation signals) with a particular frequency. The unused portion of the taps can be electrically isolated from the used portion of the taps such that the unused portion of the taps has a negligible impact on the operation of the LC circuit associated with the used portion of the taps. Moreover, unlike some conventional techniques, the described technology does not incur additional energy loss in the inductor of the oscillator because the described technology does not use series switches. As a result, improved (e.g., better) power consumption and phase noise performance can be achieved. Also, the shared inductor can save device area for the described IC device.

[0028] Figure 1 A schematic diagram of an apparatus in the form of an integrated circuit (IC) device 100 including an oscillator circuit 101 and a controller 102 is shown in accordance with some embodiments described herein. Figure 1 The illustrated apparatuses (including IC device 100) include: Figure 1 The devices of can be included in or included in electronic devices or systems such as computers (e.g., servers, desktops, laptops, or notebooks), tablets, cellular phones, or other electronic devices or systems. IC device 100 can be or can include an IC chip (e.g., a semiconductor chip). Examples of IC devices include processors (e.g., central processing units (CPUs), graphics controllers, input / output controllers, or memory controllers), memory devices, systems on a chip (SoCs), and / or other electronic devices.

[0029] As Figure 1 illustrated, oscillator circuit 101 and controller 102 can be included in the same IC device 100. For example, IC device 100 can be included in (or can be included in) a chip (IC chip), such that oscillator circuit 101 can be included in (e.g., formed on or in) the chip (on-chip oscillator circuit 101) and controller 102 can also be included in (e.g., formed on or in) the same chip (on-chip controller 102) as oscillator circuit 101.

[0030] Those skilled in the art will readily recognize that IC devices (e.g., the IC devices mentioned in the above examples) can include additional elements and circuitry. However, to avoid obscuring the subject matter described herein. Figure 1 Such additional elements and circuitry are omitted.

[0031] As Figure 1 illustrated, oscillator circuit 101 can include oscillator 1011 and oscillator 1012. Each of oscillator 1011 and oscillator 1012 can be an inductor-capacitor (LC) oscillator. Oscillator 1011 can generate signals (e.g., oscillating signals) OUT f1 and OUT* f1 on terminals (or nodes) 111a and 111b, respectively. Signals OUT f1 and OUT* f1 may form a differential signal pair. Oscillator 1012 can generate signals (e.g., oscillating signals) OUT f2 and OUT* f2 at terminals (or nodes) 112a and 112b, respectively. Signals OUT f2 and OUT* f2 may form a differential signal pair. IC device 100 can have additional elements and circuitry (not illustrated as described above), which can use the signal pair OUT f1 / OUT* f1and signal pair OUT f2 / OUT* f2 . In Figure 1 , signal OUT f1 and OUT f1 may have the same frequency f1. Signal OUT f2 and OUT f2 may have the same frequency f2. However, frequencies f1 and f2 can be different frequencies. For example, frequency f1 can be greater than frequency f2. Figure 1 An example is shown in which each of oscillator 1011 and oscillator 1012 can generate a signal pair (e.g., a differential signal pair OUT f1 / OUT* f1 or a differential signal pair OUT f2 / OUT* f2 ). However, each of oscillator 1011 and oscillator 1012 can generate a single-ended signal. For example, oscillator 1011 can generate signal OUT f1 or signal OUT f1 (or alternatively, signal OUT f1 or signal OUT f1 is not used), and oscillator 1012 can generate signal OUT f2 or signal OUT f2 (or alternatively, signal OUT f2 or signal OUT f2 is not used).

[0032] Controller 102 can operate according to which signal pair OUT f1 / OUT* f1 and OUT f2 / OUT* f2 is used by IC device 100 during a particular time interval to select between modes (e.g., operational modes) 111m and 112m during the particular time interval. Controller 102 can select one mode 111m and 112m at a time, such that oscillator 1011 or oscillator 1012 (e.g., only one of oscillator 1011 and oscillator 1012) can be activated during a particular time interval of operation of IC device 100. Thus, signal pair OUT f1 / OUT* f1 or signal pair OUT f2 / OUT* f2 (e.g., signal pair OUT f1 / OUT* f1 and signal pair OUT f2 / OUT* f2only one of the signal pairs) can be generated (by the activated oscillator) during a particular time interval of the operation of the IC device 100.

[0033] For example, if during a time interval the IC device 100 is to use the signal pair OUT f1 / OUT* f1 , the controller 102 can operate to select the mode 111m. The controller 102 provides information CTL1 (control information in the form of a signal) to activate the oscillator 1011 and cause the oscillator 1011 to generate the signal pair OUT f1 / OUT* f1 . In this example, information CTL2 from the controller 102 can cause the oscillator 1012 to be deactivated or remain deactivated.

[0034] In another example, if during another time interval the IC device 100 is to use the signal pair OUT f2 / OUT* f2 , the controller 102 can operate to select the mode 112m, and then the controller 102 provides information CTL2 (control information in the form of a signal) to activate the oscillator 1012 and cause the oscillator 1012 to generate the signal pair OUT f2 / OUT* f2 . In this example, information CTL1 from the controller 102 can cause the oscillator 1011 to be deactivated or remain deactivated.

[0035] As shown in Figure 1 , the oscillator circuit 101 can include an inductor L formed by a combination of inductor portions Lla, Llb, L2a, and L2b, which can form a conductive path (e.g., a continuous current path) of the inductor L (e.g., L = L2a + Lla + Llb + L2b). As shown and described in more detail below with reference to Figure 3A , in the physical structure of the inductor L, the inductor portions Lla, Llb, L2a, and L2b of the inductor L can be segments of the same conductive path of the inductor L, where the conductive path includes multiple turns (e.g., a continuous coil (e.g., a metal spiral coil) having multiple turns).

[0036] In Figure 1 , the oscillator 1011 and the oscillator 1012 can share the inductor L to generate the respective signal pairs OUT f1 / OUT* f1 or OUT f2 / OUT* f2 during different time intervals. For example, the oscillator 1011 can use the inductor portions Lla and Llb during a time interval to generate the signal pair OUTf1 / OUT f1 , and the oscillator 1012 can use the inductor portions L2a and L2b to generate the signal pair OUT f2 / OUT f2 .

[0037] The oscillator 1011 can include a circuit 111, which can include a circuit (e.g., an oscillator core circuit) 111c and switches Sla and Sib. The circuit 111c can include at least one capacitor, such as capacitors CI and C2. The capacitors CI and C2 can be combined (e.g., coupled) with the inductor portions Lla and Lib to form a portion of the oscillator 1011, such as to form an LC circuit (e.g., an LC resonant tank or resonant circuit) of the oscillator 1011. The capacitors CI and C2 can be variable (e.g., tunable) capacitors, such that a capacitance of the capacitors CI and C2 can be selected (e.g., tuned) so as to select a value (e.g., a predetermined value) of the frequency fl of the signal OUT f1 and OUT f1 . Figure 1 Two capacitors CI and C2 are shown as an example. The circuit 111c can include fewer than or more than two capacitors. For example, the circuit 111c can include a bank of capacitors, which can include a single capacitor or multiple capacitors.

[0038] The circuit 111c of the oscillator 1011 can also include transistors (not shown) to couple the capacitors CI and C2 to the inductor portions Lla and Lib. Those skilled in the art will readily recognize that such transistors of the circuit 111c can be coupled to the inductor portions Lla and Lib and the capacitors CI and C2 to form an LC circuit (e.g., an LC resonant tank) of the oscillator 1011. For example, the transistors of the circuit 111c can be coupled to the inductor portions Lla and Lib and the capacitors CI and C2 in a manner known to those skilled in the art to form an LC circuit of the oscillator 1011 so as to generate an oscillating signal (e.g., a single-ended signal, such as, for example, the signal OUT f1 or OUT f1 ) or an oscillating signal (e.g., a differential signal pair, such as the signal pair OUT f1 / OUT f1 .

[0039] The oscillator 1012 can include a circuit 112 that can include a circuit (e.g., an oscillator core circuit) 112c and switches S2a and S2b. The circuit 112c can include at least one capacitor, such as capacitors C3 and C4. The circuit 112c can also include at least one transistor (not shown) to couple the capacitors C3 and C4 to the inductor portions L2a and L2b. The capacitors C3 and C4 can be combined (e.g., coupled) with the inductor portions L2a and L2b to form a part of the oscillator 1012, such as to form an LC circuit (e.g., an LC tank or resonant circuit) of the oscillator 1012. The capacitors C3 and C4 can be variable (e.g., tunable) capacitors such that a capacitance of the capacitors C3 and C4 can be selected (e.g., tuned) in order to select a value (e.g., a predetermined value) of the frequency f2 of the signals OUT f2 and OUT f2 . Figure 1 Two capacitors C3 and C4 are shown as an example. The circuit 112c can include fewer than or more than two capacitors. For example, the circuit 112c can include a bank of capacitors that can include a single capacitor or multiple capacitors.

[0040] A person of skill in the art will readily recognize that such a transistor of the circuit 112c can be coupled to the inductor portions L2a and L2b and the capacitors C3 and C4 to form an LC circuit (e.g., an LC tank) of the oscillator 1012. For example, the transistor of the circuit 112c can be coupled to the inductor portions L2a and L2b and the capacitors C3 and C4 in a manner known to a person of skill in the art to form an LC circuit of the oscillator 1012 in order to generate an oscillating signal (e.g., a single-ended signal, such as the signal OUT f2 or OUT f2 ) or an oscillating signal (e.g., a differential signal pair, such as the signal pair OUT f2 / OUT f2 .

[0041] Thus, as Figure 1As shown, and as described above, each of the oscillators 1011 and 1012 has its own oscillation core (e.g., shown as circuit 111c or 112c), and each oscillation core can have its own active transistor core to generate a negative transconductance (-gm) to compensate for losses and can have a tuning capacitor (e.g., an array of tuning capacitors) included in the circuit 111c or 112c. By naturally employing a smaller inductance (e.g., a portion of inductor L) for higher target frequencies and a larger inductance (e.g., another portion of inductor L) for lower target frequencies, the oscillator circuit 101 (with shared inductor L) can provide two frequency bands associated with the two modes 111m and 112m. The unused oscillation core can be easily isolated during the mode 111m or 112m by powering down or turning off the power supply.

[0042] In Figure 1 which the switches Sla, Sib, S2a, and S2b can be implemented as transistors. The switches Sla, Sib, S2a, and S2b can be controlled (e.g., turned on or off) by the controller 102 such that when the switches S2a and S2b are turned on, the switches Sla and Sib are turned off (or remain turned off), and such that when the switches Sla and Sib are turned on, the switches S2a and S2b are turned off (or remain turned off). Controlling (e.g., turning on or off) the switches Sla, Sib, S2a, and S2b in this way allows the signal pair OUT f1 / OUT* f1 and the signal pair OUT f2 / OUT* f2 (e.g., the signal pair OUT f1 / OUT* f1 and the signal pair OUT f2 / OUT* f2 to be generated at different time intervals. Controlling (e.g., turning on or off) the switches Sla, Sib, S2a, and S2b in this way also electrically isolates the LC circuit associated with the unused portion of inductor L from the used portion of inductor L. This can prevent (or reduce) the unused portion of inductor L from affecting the operation of the LC circuit associated with the used portion of inductor L.

[0043] As an example, when the mode 111m is selected, the switches Sla and Sib can be turned on, and at least one (one or both) of the switches S2a and S2b can be turned off. The turned on switches Sla and Sib electrically couple the circuit 111 of the oscillator 1011 to the terminals 111a and 111b and allow the oscillator 1011 to generate the signals OUT f1 and OUT* f1In this example, the turned-off switches S2a and S2b electrically separate the circuit 112 of the oscillator 1012 from the terminals 112a and 112b. As a result, the oscillator 1012 does not generate the signal pair OUT f2 / OUT* f2 .

[0044] In another example, when the mode 112m is selected, the switches S2a and S2b can be turned on, and at least one (one or both) of the switches Sla and Sib can be turned off. The turned-on switches S2a and S2b electrically couple the circuit 112 of the oscillator 1012 to the terminals 112a and 112b, and allow the oscillator 1012 to generate the signal pair OUT f2 and OUT* f2 at the terminals 112a and 112b, respectively. In this example, the turned-off switches Sla and Sib electrically separate the circuit 111 of the oscillator 1011 from the terminals 111a and 111b. As a result, the oscillator 1011 does not generate the signal pair OUT f1 / OUT* f1 .

[0045] Figure 2A and Figure 2B are timing diagrams of the respective signal pairs OUT f1 / OUT* f1 and OUT f2 / OUT* f2 in accordance with some embodiments described herein. As shown in Figure 2A , the signals OUT f1 and OUT* f1 may be complementary signals (e.g., in the form of being inverses of each other), such that the signals OUT f1 and OUT* f1 may form a differential signal pair. As shown in Figure 2B , the signals OUT f2 and OUT* f2 may be complementary signals (e.g., in the form of being inverses of each other), such that the signals OUT f2 and OUT* f2 may form a differential signal pair.

[0046] The signals OUT f1 and OUT* f1 may be generated in a time interval from a time Ta to a time Tb. The signals OUT f2 and OUT* f2 may be generated in a time interval from a time Tc to a time Td. The time interval from the time Ta to the time Tb is different from (e.g., occurs before or after) the time interval from the time Tc to the time Td.

[0047] The time interval from time Ta to time Tb can be controlled by controller 102 ( Figure 1 The time interval from time Tc to time Td can occur during the time interval of mode 112m selected by controller 102.

[0048] like Figure 2A and Figure 2B As shown, OUT f1 OUT* f1 OUT f2 and OUT* f2 Each signal in the signal is an oscillating (e.g., periodic) signal. Signal OUT f1 and OUT* f1 They can have the same amplitude and the same frequency f1. Signal OUT f2 and OUT* f2 They can have the same amplitude and the same frequency f2. Signal OUT f1 OUT* f1 OUT f2 and OUT* f2 They can have the same amplitude.

[0049] Figure 3A Some embodiments according to the description herein include an inductor L and Figure 1 The structure of circuits 111 and 112 (e.g., top view) is part of the IC device 100. For example... Figure 3A As shown, the inductor L may be located on (e.g., formed on) the substrate (e.g., semiconductor substrate) 390 of the IC device 100. For example, the inductor L may be formed over an area defined by the x and y directions (e.g., from a top view). The inductor L may include a conductive path that may include a path from terminal 112b continuously through different segments 341, 374, 342, 375, and 343, and then to terminal 112a, where segments 341, 374, 342, 375, and 343 are conductive segments (comprising conductive material) formed over the substrate 390.

[0050] Sections 341, 374, 342, 375, and 343 are electrically connected to each other. Section 374 serves as a bridge connecting section 341 (through through-hole 361) to section 342 (through through-hole 362). Section 374 spans a portion of section 343. Section 375 serves as a bridge connecting section 342 (through through-hole 363) to section 343 (through through-hole 364). Section 375 spans a portion of section 342.

[0051] The electrically conductive path of the inductor L can include (e.g., can be formed from) an electrically conductive material including a metal (e.g., a single metal), an alloy (e.g., a combination of metals), or other electrically conductive material. Thus, segments 341, 374, 342, 375, and 343 are also electrically conductive segments formed from an electrically conductive material (or multiple electrically conductive materials).

[0052] The electrically conductive path of the inductor L (e.g., formed from segments 341, 374, 342, 375, and 343) can have a spiral shape (e.g., a spiral coil), such that the electrically conductive path of the inductor L can include multiple turns. Each of segments 341, 374, 342, 375, and 343 can include a single turn, less than a single turn, or more than a single turn. The turns of segments 341, 374, 342, 375, and 343 combine to form the total number of turns of the inductor L. Figure 3A One example is shown in which the inductor L includes a total of three turns (e.g., the three turns can be counted from terminal 112a through segments 341, 374, 342, 375, and 343 and then back to terminal 112b). However, the inductor L can have a different number of turns. See Figure 6 and Figure 8 A variation of the inductor L (inductor L’, having five turns) is shown and described in detail.

[0053] As shown in Figure 3A terminals 111a and 111b of circuit 111 and terminals 112a and 112b of circuit 112 can be coupled to (e.g., in electrical contact with) the electrically conductive path of the inductor L at different locations (e.g., different tap points). Each of terminals 111a, 111b, 112a, and 112b can include a piece of material (e.g., metal) that is coupled to the electrically conductive path of the inductor L at a different location (e.g., different tap point). For example, terminal 111a of circuit 111 can be coupled to the electrically conductive path of the inductor L at location (e.g., tap point) 343a of segment 343 (through via 331), and terminal 111b of circuit 111 can be coupled to the electrically conductive path of the inductor L at location (e.g., tap point) 342a of segment 342 (through via 332, hidden underneath via 362). In another example, terminal 112a of circuit 112 can be coupled to the electrically conductive path of the inductor L at location (e.g., tap point) 343b of segment 343, and terminal 112b of circuit 112 can be coupled to the electrically conductive path of the inductor L at location (e.g., tap point) 341a of segment 341.

[0054] As shown in Figure 3A circuit 111 and 112 can be located on (e.g., formed in or on) a substrate 390. For simplicity, in Figure 3ASome physical circuit elements (e.g., switches) of the circuits 111 and 112 are not shown in detail, and are shown in Figure 3A In some other elements (e.g., transistors and capacitors) of the circuits 111 and 112 are shown only symbolically (e.g., shown as transistor and capacitor symbols). Figure 3A The lines B-B, C-C, D-D, E-E, and F-F in Figures 3B to 3F are cross-sectional (e.g., side view) lines of different parts of the inductor L shown.

[0055] Figure 3B A side view (e.g., cross-section) of a portion of the inductor L along the line B-B of Figure 3A is shown. As shown in Figure 3B (and in Figures 3C to 3F ), the z-direction can be a direction perpendicular to the substrate 390 (e.g., a vertical direction with respect to the substrate 390). The z-direction and the x-direction are perpendicular to each other. As shown in Figure 3B The segments 341, 342, and 343 (e.g., the materials of the segments 341, 342, and 343) can be formed on the same horizontal plane, e.g., on a horizontal plane 381 above the substrate 390 of the IC device 100. The horizontal plane 381 is an internal horizontal plane (e.g., a conductive wiring horizontal plane (e.g., a metal horizontal plane)) of the IC device 100.

[0056] Figure 3C A side view (e.g., cross-section) of a portion of the inductor L along the line C-C of Figure 3A is shown. As shown in Figure 3C The terminal 111a (e.g., the material of the terminal 111a) can be formed in a horizontal plane 380 above the substrate 390 of the IC device 100. The material (e.g., metal) of the terminal 111a can be a piece of material (e.g., a conductive segment) that can extend horizontally in the horizontal plane 380. The horizontal plane 380 is an internal horizontal plane of the IC device 100. The horizontal plane 380 is below the horizontal plane 381, such that the horizontal plane 380 is between the horizontal plane 381 and the substrate 390. As shown in Figure 3C The segment 341 (formed on the horizontal plane 381) passes over a portion of the terminal 111a (formed on the horizontal plane 380), such that the terminal 111a is electrically separated from (e.g., does not make electrical contact with) the segment 341.

[0057] Segment 374 may be formed in horizontal plane 382, ​​which is different from horizontal planes 380 and 381. IC device 100 may include via 361 (e.g., a via extending in the z-direction between horizontal planes 381 and 382) and conductive material 361a (e.g., metal) inside via 361. Conductive material 361a is in electrical contact with segment 341 (formed in horizontal plane 381) and segment 374 (formed in horizontal plane 382). Therefore, conductive material 361a may be a vertical segment of the conductive path of inductor L, electrically coupled to two horizontal segments (e.g., segments 341 and 374) of the conductive path of inductor L.

[0058] Figure 3D It shows along Figure 3A A side view (e.g., cross-section) of a portion of the inductor L with line DD. Figure 3D As shown, the IC device 100 may include a through-hole 331 (e.g., a through-hole extending in the z-direction between horizontal planes 380 and 381) and a conductive material 331a (e.g., a metal) inside the through-hole 331. The conductive material 331a is in electrical contact with a segment 343 (formed in horizontal plane 381) and a terminal 111a (formed in horizontal plane 380). Therefore, the conductive material 331a may be a vertical segment of the conductive path of the inductor L, electrically coupled to two horizontal segments of the conductive path of the inductor L (e.g., segments of segment 343 and terminal 111a).

[0059] like Figure 3D As shown, terminal 111b (e.g., the material of terminal 111b) may be formed in horizontal plane 380. The material of terminal 111b (e.g., metal) may be a piece of material (e.g., a conductive segment) that can extend horizontally in horizontal plane 380. IC device 100 may include via 332 (e.g., a via that can extend in the z-direction between horizontal planes 380 and 381) and conductive material 332a (e.g., metal) inside via 332. Conductive material 332a is in electrical contact with segment 342 (formed in horizontal plane 381) and terminal 111b (formed in horizontal plane 380). Therefore, conductive material 332a may be a vertical segment of the conductive path of inductor L, which is electrically coupled to two horizontal segments of the conductive path of inductor L (e.g., segment 342 and segment of terminal 111b).

[0060] like Figure 3DAs shown, IC device 100 can include via 362 (e.g., a via that can extend in the z-direction between horizontal planes 381 and 382) and conductive material 362a (e.g., metal) inside of via 362. Conductive material 362a is in electrical contact with segment 342 (formed in horizontal plane 381) and segment 374 (formed in horizontal plane 382). Thus, conductive material 362a can be a vertical segment of a conductive path of inductor L that electrically couples two horizontal segments (e.g., segment 342 and segment 374) of the conductive path of inductor L.

[0061] Figure 3E A side view (e.g., cross-section) of a portion of inductor L along line E-E of Figure 3A As shown, IC device 100 can include via 363 (e.g., a via that can extend in the z-direction between horizontal planes 381 and 382) and conductive material 363a (e.g., metal) inside of via 363. Conductive material 363a is in electrical contact with segment 342 (formed in horizontal plane 381) and segment 375 (formed in horizontal plane 382). Thus, conductive material 363a can be a vertical segment of a conductive path of inductor L that electrically couples two horizontal segments (e.g., segment 342 and segment 375) of the conductive path of inductor L. Figure 3C Figure 3E A side view (e.g., cross-section) of a portion of inductor L along line F-F of

[0062] As shown, IC device 100 can include via 364 (e.g., a via that can extend in the z-direction between horizontal planes 381 and 382) and conductive material 364a (e.g., metal) inside of via 364. Conductive material 364a is in electrical contact with segment 343 (formed in horizontal plane 381) and segment 375 (formed in horizontal plane 382). Thus, conductive material 364a can be a vertical segment of a conductive path of inductor L that electrically couples two horizontal segments (e.g., segment 343 and segment 375) of the conductive path of inductor L. Figure 3F Figure 3A Figure 3F A side view (e.g., cross-section) of a portion of inductor L along line F-F of

[0063] Figure 4A A side view (e.g., cross-section) of a portion of inductor L along line F-F of Figure 3A during exemplary operation of IC device 100 in select mode 111m (e.g., mode 112m is not selected) according to some embodiments described herein. Figure 4B A side view (e.g., cross-section) of a portion of inductor L along line F-F of Figure 4A Figure 1 ​​​The schematic diagram shows that, in response to selecting mode 111m and not selecting mode 112m, switches S1a and S1b are turned on (e.g., closed), and switches S2a and S2b are turned off (e.g., open). Based on Figure 4B The schematic diagram shows that only the inductor portions L1a and L1b of inductor L (combined with circuit 111) are used to generate the signal pair OUT. f1 / OUT* f1 Parts L2a and L2b of inductor L are not used. Therefore, Figure 4A The circuit path 411 in the circuit may include a portion of the total number of turns (e.g., three turns) of the inductor L (e.g., two turns (represented by inductor portions L1a and L1b)). Therefore, as... Figure 4A As shown, it can be found in the inductor sections L1a and L1b ( Figure 4B A circuit path 411 is formed between terminals 111a and 111b of the oscillator 1011 in the segment indicated (e.g., a portion of segment 342 and segment 343). Figure 4B As shown, since switches S2a and S2b are turned off, no signal pair OUT is generated at the corresponding terminals 112a and 112b of oscillator 1012. f2 / OUT* f2 .

[0064] Figure 5A The following diagram illustrates the selection mode 112m (e.g., mode 111m) according to some embodiments described herein. Figure 1 During exemplary operation of IC device 100 (not selected) Figure 3A The circuit path (e.g., current path) 512 in the inductor L. Figure 5B It shows the corresponding Figure 5A IC device 100 mode Figure 1 The schematic diagram shows that, in response to selecting mode 112m and not selecting mode 111m, switches S2a and S2b are turned on (e.g., closed), and switches S1a and S1b are turned off (e.g., open). Based on Figure 5B The schematic diagram shows that all parts of inductor L (e.g., inductor parts L2a, L1a, L1b, and L2b) (in combination with circuit 112) are used to generate signal pair OUT. f2 / OUT* f2 .therefore, Figure 5A The circuit path 512 can include all the turns of the total number of turns of the inductor L (e.g., three turns) (e.g., three turns (represented by inductor portions L2a, L1a, L1b, and L2b)). Therefore, as... Figure 5A As shown, it can be found in the inductor sections L2a, L1a, L1b and L2b ( Figure 5BA circuit path 512 is formed between terminals 112a and 112b of the oscillator 1012 in the segments indicated (e.g., segments 341, 342, and 343). Figure 5B As shown, since switches S1a and S1b are turned off, no signal pair OUT is generated at the corresponding terminals 111a and 111b of oscillator 1011. f1 / OUT* f1 .

[0065] The above reference Figures 1 to 5B The description refers to an IC device 100 comprising multiple oscillators (e.g., oscillator 1011 and oscillator 1012) sharing a single inductor (e.g., inductor L). The multiple oscillators can generate different signals with different frequencies (e.g., signal pair OUT). f1 / OUT* f1 and signal pair OUT f2 / OUT* f2 ).

[0066] The structure and operation of IC device 100 offer improvements and benefits compared to some conventional devices. For example, as previously mentioned, some conventional devices may include different oscillators with different inductors, where each inductor has an independent coil. In such devices, the portion (e.g., area) of the device used to form this independent coil may be relatively large. Therefore, for a given device area, a conventional oscillator may limit the remaining area of ​​the device for forming other components within the device.

[0067] In IC device 100, as referenced above Figures 1 to 5B The oscillators 1011 and 1012 can have a smaller area compared to some conventional devices (e.g., devices with oscillators having inductor coils with independent inductor coils). Other improvements and benefits of the IC device 100 compared to some other conventional devices (e.g., devices with oscillators having inductor coils with series switches) include improved (e.g., better) power consumption and phase noise performance.

[0068] The above reference Figures 1 to 5B The description illustrates an example in which an inductor (e.g., inductor L) can be constructed to allow two oscillators (e.g., oscillator 1011 and oscillator 1012) to share the inductor and generate two signal pairs (e.g., signal pair OUT) at different times. f1 / OUT* f1 and signal pair OUT f2 / OUT* f2), where the signal pairs can have different frequencies. However, variations of the inductor L can also be formed to allow more than two oscillators to share the inductor and generate more than two signal pairs at different times, where the signal pairs can have different frequencies.

[0069] Figure 6 A schematic diagram of an apparatus in the form of an IC device 600 is shown, according to some embodiments described herein, the apparatus comprising a controller 602 and an oscillator circuit 601 having more than two oscillators. The oscillator circuit 601 can be included in (e.g., formed within or on) the same chip as the controller 602 (e.g., as an on-chip oscillator circuit 601).

[0070] The IC device 600 can be a variation of the IC device 100 Figure 1 ). For example, the IC device 600 can include multiple (e.g., four) oscillators 6011, 6012, 6013, and 6014 (LC oscillators) sharing an inductor L’. The inductor L’ (structure of which is shown in Figure 8 ) can have more turns than the inductor L (structure of which is shown in Figure 3A ).

[0071] As shown in Figure 6 , the oscillator 6011 can generate signals (e.g., oscillating signals) OUT f1 and OUT* f1 (e.g., a differential signal pair) at terminals (or nodes) 611a and 611b, respectively. The oscillator 6012 can generate signals (e.g., oscillating signals) OUT f2 and OUT* f2 (e.g., a differential signal pair) at terminals (or nodes) 612a and 612b, respectively. The oscillator 6013 can generate signals (e.g., oscillating signals) OUT f3 and OUT* f3 (e.g., a differential signal pair) at terminals (or nodes) 613a and 613b, respectively. The oscillator 6014 can generate signals (e.g., oscillating signals) OUT f4 and OUT* f4 (e.g., a differential signal pair) at terminals (or nodes) 614a and 614b, respectively.

[0072] The signal pair OUT f1 / OUT* f1 may have a frequency f1’. The signal pair OUT f2 / OUT* f2 may have a frequency f2’. The signal pair OUT f3 / OUT* f3'Can have a frequency f3'. Signal to OUT f4 ' / OUT* f4 'It can have a frequency f4'. Frequencies f1', f2', f3', and f4' can be different from each other. For example (also as...) Figures 7A to 7D As shown, frequency f1' can be greater than frequency f2'; frequency f2' can be greater than frequency f3'; frequency f3' can be greater than frequency f4'. Figure 6 An example is shown in which each of oscillators 6011, 6012, 6013, and 6014 can generate differential signal pairs. However, each of oscillators 6011, 6012, 6013, and 6014 can generate single-ended signals.

[0073] Controller 602 is operable to select the signal pair OUT from IC device 100 during a specific time interval. f1 ' / OUT* f1 '、OUT f2 ' / OUT* f2 '、OUT f3 ' / OUT* f3 'and OUT f4 ' / OUT* f4 Which signal pair in the controller selects one of the modes (e.g., operating modes) 611m, 612m, 613m, and 614m? The controller 602 can select one of the modes 611m, 612m, 613m, and 614m at a time, causing the signal pair OUT to... f1 ' / OUT* f1 '、OUT f2 ' / OUT* f2 '、OUT f3 ' / OUT* f3 'and OUT f4 ' / OUT* f4 One of these (e.g., only one) can be generated during a specific time interval in the operation of IC device 100. For example, if IC device 600 will use signal OUT during a time interval... f1 ' / OUT* f1 Then, controller 602 can operate to select mode 611m, and then controller 602 provides CTLA (control information in signal form) information to activate oscillator 6011 and cause oscillator 6011 to generate a signal to OUT. f1 ' / OUT* f1 In this example, the information CTLB, CTLC, and CTLD from controller 602 can deactivate or keep oscillators 6012, 6013, and 6014 deactivated.

[0074] In another example, if IC device 600 uses signal pair OUT during another time interval... f3 ' / OUT* f3 The controller 602 can operate to select mode 613m, and then the controller 602 provides information CTLC (control information in signal form) to activate the oscillator 6013 and cause the oscillator 6013 to generate a signal to OUT. f3 ' / OUT* f3 In this example, the information CTLA, CTLB, and CTLD from controller 602 can deactivate or keep oscillators 6011, 6012, and 6014 deactivated.

[0075] like Figure 6 As shown, inductor L' can be formed by a combination of inductor portions L1a', L1b', L2a', L2b', L3a', L3b', L4a', and L4b' (e.g., L = L1a' + L1b' + L2a' + L2b' + L3a' + L3b' + L4a' + L4b'). In the physical structure of inductor L' (e.g.... Figure 8 As shown, the conductive sections represented by inductor portions L1a', L1b', L2a', L2b', L3a', L3b', L4a', and L4b' ( Figure 6 It can form a conductive path (e.g., a current path) with multiple turns (e.g., a continuous coil with multiple turns (e.g., a metal spiral coil)).

[0076] exist Figure 6 In this configuration, oscillators 6011, 6012, 6013, and 6014 can share inductor L' to generate corresponding signal pairs OUT at different time intervals. f1 ' / OUT* f1 '、OUT f2 ' / OUT* f2 '、OUT f3 ' / OUT* f3 'and OUT f4 ' / OUT* f4 For example, oscillator 6011 can use inductor sections L1a' and L1b' to generate signal pairs OUT during a time interval. f1 ' / OUT* f1 Oscillator 6012 can use inductor sections L2a' and L2b' to generate signal pairs OUT during another time interval. f2 ' / OUT* f2Oscillator 6013 can use inductor sections L3a' and L3b' to generate signal pair OUT during another time interval. f3 ' / OUT* f3 The oscillator 6014 can use inductor sections L4a' and L4b' to generate signal pairs OUT during another time interval. f4 ' / OUT* f4 '.

[0077] like Figure 6 As shown, oscillators 6011, 6012, 6013, and 6014 may include corresponding circuits 611, 612, 613, and 614, each circuit including a corresponding circuit (e.g., oscillator core circuit) 611c, 612c, 613c, or 614c. Circuits 611, 612, 613, and 614 may also include corresponding switches S1a' and S1b', S2a' and S2b', S3a' and S3b', and S4a' and S4b'. Circuits 611c, 612c, 613c, and 614c may also include corresponding capacitors C5, C6, C7, C8, C9, C10, C11, and C12.

[0078] Switches S1a' and S1b', S2a' and S2b', S3a' and S3b', and S4a' and S4b' can be controlled by controller 602 (e.g., turned on or off) such that two switches of only one of the oscillators 6011, 6012, 6013, and 6014 are turned on, while the switches of the other oscillators are turned off or remain off. This only allows the signal to OUT. f1 ' / OUT* f1 '、OUT f2 ' / OUT* f2 '、OUT f3 ' / OUT* f3 'and OUT f4 ' / OUT* f4 Only one signal pair in ' is generated during a specific time interval.

[0079] As an example, when mode 613m is selected, switches S3a' and S3b' are turned on to electrically couple circuit 613 to terminals 613a and 613b, and the remaining switches (e.g., switches S1a' and S1b', S2a' and S2b', and S4a' and S4b') can be turned off (or remain off). Therefore, in this example, circuit 613 is electrically coupled to terminals 613a and 613b to allow oscillator 6013 to generate signal pairs OUT at terminals 613a and 613b, respectively. f3 ' / OUT* f3In this example, circuits 611, 612, and 614 are electrically isolated from their corresponding terminals 611a and 611b, 612a and 612b, and 614a and 614b. Therefore, in this example, no signal is generated for OUT. f1 ' / OUT* f1 '、OUT f2 ' / OUT* f2 'and OUT f4 ' / OUT* f4 '.

[0080] exist Figure 6 In this configuration, capacitors C5 and C6 can be combined with inductor portions L1a' and L1b' (e.g., coupled to the inductor portions) to form part of oscillator 6011, such as by forming an LC circuit (e.g., an LC resonant loop or resonant circuit) of oscillator 6011. Capacitors C5 and C6 can be variable (e.g., adjustable) capacitors, allowing the capacitance of capacitors C5 and C6 to be selected (e.g., tuned) to select the signal pair OUT. f1 'and OUT* f1 The value of 'frequency f1' (e.g., a predetermined value).

[0081] Capacitors C7 and C8 can be combined with inductor sections L2a' and L2b' (e.g., coupled to the inductor section) to form an LC circuit (e.g., an LC resonant loop or resonant circuit) for oscillator 6012. Capacitors C7 and C8 can be variable (e.g., adjustable) capacitors, allowing the capacitance of capacitors C7 and C8 to be selected (e.g., tuned) to select the signal pair OUT. f2 'and OUT* f2 The value of 'frequency f2' (e.g., a predetermined value).

[0082] Capacitors C9 and C10 can be combined with inductor sections L3a' and L3b' (e.g., coupled to the inductor section) to form an LC circuit (e.g., an LC resonant loop or resonant circuit) of oscillator 6013. Capacitors C9 and C10 can be variable (e.g., adjustable) capacitors, allowing the capacitance of capacitors C9 and C10 to be selected (e.g., tuned) to select the signal pair OUT. f3 'and OUT* f3 The value of 'frequency f3' (e.g., a predetermined value).

[0083] Capacitors C11 and C12 can be combined with inductor sections L4a' and L4b' (e.g., coupled to the inductor section) to form an LC circuit (e.g., an LC resonant loop or resonant circuit) of oscillator 6014. Capacitors C11 and C12 can be variable (e.g., adjustable) capacitors, allowing the capacitance of capacitors C11 and C12 to be selected (e.g., tuned) to select the signal pair OUT. f4 'and OUT* f4 The value of 'frequency f4' (e.g., a predetermined value).

[0084] Figure 6 As an example, each of circuits 611c, 612c, 613c, and 614c is shown to have two capacitors; however, each of circuits 611c, 612c, 613c, and 614c may include fewer or more than two capacitors.

[0085] Those skilled in the art will readily recognize that each of circuits 611c, 612c, 613c, and 614c may further include a transistor that can be coupled to the respective inductor portion and the respective capacitor. Figure 6 (not shown in the diagram) to form part (e.g., LC circuit) of each of the oscillators in oscillators 6011, oscillator 6012, oscillator 6013 and oscillator 6014.

[0086] Figure 7A , Figure 7B , Figure 7C and Figure 7D Based on some embodiments described herein Figure 6 Each signal to OUT f1 ' / OUT* f1 '、OUT f2 ' / OUT* f2 '、OUT f3 ' / OUT* f3 'and OUT f4 ' / OUT* f4 Timing diagram of '. Signal pair OUT f1 ' / OUT* f1 '、OUT f2 ' / OUT* f2 '、OUT f3 ' / OUT* f3 'and OUT f4 ' / OUT* f4 It can be generated during the corresponding time intervals Te-Tf (the time interval from time Te to time Tf), Tg-Th, Ti-Tj, and Tk-Tl.

[0087] The time intervals Te-Tf, Tg-Th, Ti-Tj, and Tk-Tl can occur during the time intervals of the selected modes 611m, 612m, 613m, and 614m (by the controller 602 in Figure 6 f1 f1 f2 f2 f3 f3 f4 f4 Thus, depending on which mode is selected among the modes 611m, 612m, 613m, and 614m, the time intervals Te-Tf, Tg-Th, Ti-Tj, and Tk-Tl can occur in any order.

[0088] Figure 8 A portion of an IC device 600 is shown that includes structures (e.g., top views) of circuits 611, 612, 613, and 614 including inductors L’ and Figure 6 As shown in Figure 8 , the inductor L’ can include a conductive path (e.g., formed of metal) that can include a path that continuously passes from the terminal 614b, through different segments (e.g., conductive segments) 845, 877, 844, 876, 843, 874, 842, 875, and 841, and then to the terminal 614a. The segments 841, 874, 842, 875, 843, 876, 844, 877, and 845 are in electrical contact (electrically connected) with each other. Similar to the segments 341, 374, 342, 375, and 343 of the inductor L and the terminals 111a, 111b, 112a, and 112b in Figure 3A , the segments 841, 874, 842, 875, 843, 876, 844, 877, and 845 of the inductor L’ and the terminals 611a, 611b, 612a, 612b, 613a, 613b, 614a, and 614b can be located at different horizontal planes (e.g., similar to the horizontal planes 380, 381, and 382 of Figures 3B to 3F Each of the segments 874, 875, 876, and 877 acts as a bridge electrically connecting the respective segments of the inductor L’. Each of the segments 874, 875, 876, and 877 can overpass a portion of one of the segments 841, 842, 843, 844, and 845 (as shown by the dashed lines in FIG. 6).​​​​​​​​ Figure 8 As shown.

[0089] The electrically conductive path of the inductor L’ (e.g., formed by segments 841, 874, 842, 875, 843, 876, 844, 877, and 845) can have a spiral shape (e.g., a spiral coil) such that the electrically conductive path of the inductor L’ can include multiple turns. Figure 8 An example is shown in which the inductor L’ includes five turns (e.g., the five turns can be counted from terminal 614a, through segments 841, 874, 842, 875, 843, 876, 844, 877, and 845, and then back to terminal 614b). However, the inductor L’ can have a different number of turns.

[0090] The number of turns of the inductor L’ can be proportional to the number of oscillators that share the inductor L’ (e.g., four). Thus, the inductor L’ can have more turns than the inductor L in Figure 3A The inductor L’ can have more turns than the inductor L in

[0091] Similar to terminals 111a, 111b, 112a, and 112b of the inductor L (e.g., as shown in FIG. 1), terminals 611a, 611b, 612a, 612b, 613a, 613b, 614a, and 614b of the inductor L’ can be coupled to (electrically contact) the electrically conductive path of the inductor L’ at different locations (e.g., different tap points). Figure 3A , Figure 8 The terminals 611a, 611b, 612a, 612b, 613a, 613b, 614a, and 614b in Figure 3D may be coupled to (e.g., electrically contact) the electrically conductive path of the inductor L’ at locations (e.g., tap points) by electrically conductive material (which can be similar to or the same as the electrically conductive material of the vias 331 and 332

[0092] As shown in Figure 8 , the inductor L’ and circuits 611, 612, 613, and 614 can be located above a substrate (e.g., a semiconductor substrate) 890 of the IC device 600. The circuits 611, 612, 613, and 614 can be located on (e.g., formed in or above) the substrate 890. For simplicity, some physical circuit elements (e.g., transistors and capacitors) of the circuits 611, 612, 613, and 614 are shown symbolically in Figure 8 .

[0093] Figure 9A An example is shown in which the inductor L’ includes five turns (e.g., the five turns can be counted from terminal 614a, through segments 841, 874, 842, 875, 843, 876, 844, 877, and 845, and then back to terminal 614b). However, the inductor L’ can have a different number of turns. Figure 6The circuit path (e.g., current path) 911 in the inductor L' during exemplary operation of the IC device 600. Figure 9B This illustrates that, in response to selection mode 611m, switches S1a' and S1b' are turned on (e.g., closed), while other switches (e.g., switches S2a', S2b', S3a', S3b', S4a', and S4b') are turned off (e.g., open). Figure 6 A schematic diagram. Based on Figure 9B The schematic diagram shows the use of only the inductor portions L1a' and L1b' of inductor L' (in conjunction with circuit 611) to generate the signal pair OUT. f1 / OUT* f1 The inductor portions L2a', L2b', L3a', L3b', L4a', and L4b' of inductor L' are not used. Therefore, Figure 9A The circuit path 911 in the circuit may include a portion of the total number of turns (e.g., five turns) of the inductor L' (e.g., two turns). Figure 9B The inductor portions L1a' and L1b' in the diagram are represented as follows: Figure 9A As shown, circuit path 911 can be formed between terminals 611a and 611b of oscillator 6011. Figure 9B The inductor sections L1a' and L1b' represent the segments. Figure 9B Since switches S2a', S2b', S3a', S3b', S4a', and S4b' are turned off, no signal is generated for OUT. f2 ' / OUT* f2 '、OUT f3 ' / OUT* f3 'and OUT f4 ' / OUT* f4 '.

[0094] Figure 10A Some embodiments described herein are shown, with mode 612m selected (and modes 611m, 613m, and 614m not selected). Figure 6 The circuit path (e.g., current path) 1012 in the inductor L' during exemplary operation of the IC device 600. Figure 10B This illustrates that, in response to selection mode 612m, switches S2a' and S2b' are turned on (e.g., closed), while other switches (e.g., switches S1a', S1b', S3a', S3b', S4a', and S4b') are turned off (e.g., open). Figure 6 A schematic diagram. Based on Figure 10B The schematic diagram shows the use of only the inductor portions L1a', L1b', L2a', and L2b' of inductor L' (in conjunction with circuit 612) to generate the signal pair OUT. f2' / OUT* f2 The inductor portions L3a', L3b, L4a', and L4b' of inductor L' are not used. Therefore, Figure 10A The circuit path 1012 may include a portion of the total number of turns (e.g., five turns) of the inductor L' (e.g., three turns). Figure 10B The inductor portions L1a', L1b', L2a', and L2b' in the diagram are represented as follows: Figure 10B As shown, circuit path 1012 can be formed between terminals 612a and 612b of oscillator 6012. Figure 10B In the inductor sections L1a', L1b', L2a', and L2b', signal pairs OUT are generated at the corresponding terminals 612a and 612b based on circuit path 1012. f2 ' / OUT* f2 '. Therefore, as Figure 10A As shown, no circuit path is formed between the terminals associated with oscillators 6011, 6013, and 6014. Figure 10B Since switches S1a', S1b', S3a', S3b', S4a', and S4b' are turned off, no signal is generated for OUT. f1 ' / OUT* f1 '、OUT f3 ' / OUT* f3 'and OUT f4 ' / OUT* f4 '.

[0095] Figure 11A Some embodiments described herein are shown, with mode 613m selected (and modes 611m, 612m, and 614m not selected). Figure 6 The circuit path (e.g., current path) 1113 in the inductor L' during exemplary operation of the IC device 600. Figure 11B This illustrates that, in response to selection mode 613m, switches S3a' and S3b' are turned on (e.g., closed), while other switches (e.g., switches S1a', S1b', S2a', S2b', S4a', and S4b') are turned off (e.g., open). Figure 6 A schematic diagram. Based on Figure 11B The schematic diagram shows the use of only the inductor portions L1a', L1b', L2a', L2b', L3a', and L3b' (in conjunction with circuit 613) of inductor L' to generate the signal pair OUT. f3 / OUT* f3 The inductor portions L4a' and L4b' of inductor L' are not used. Therefore, Figure 11AThe circuit path 1113 may include a portion of the total number of turns (e.g., five turns) of the inductor L' (e.g., four turns). Figure 11B The inductor portions L1a', L1b', L2a', L2b', L3a', and L3b' in the diagram are represented as follows: Figure 11A As shown, circuit path 1113 can be formed between terminals 613a and 613b of oscillator 6013. Figure 11B In the inductor sections L1a', L1b', L2a', L2b', L3a', and L3b', based on circuit path 1113, signal pairs OUT are generated at the corresponding terminals 613a and 613b. f3 ' / OUT* f3 '.exist Figure 11B Since switches S1a', S1b', S2a', S2b', S4a', and S4b' are turned off, no signal is generated for OUT. f1 ' / OUT* f1 '、OUT f2 ' / OUT* f2 'and OUT f4 ' / OUT* f4 '.

[0096] Figure 12A Some embodiments described herein are shown, with mode 614m selected (and modes 611m, 612m, and 613m not selected). Figure 6 The circuit path (e.g., current path) 1214 in the inductor L' during exemplary operation of the IC device 600. Figure 12B This illustrates that, in response to selection mode 614m, switches S4a' and S4b' are turned on (e.g., closed), while other switches (e.g., switches S1a', S1b', S2a', S2b', S3a', and S3b') are turned off (e.g., open). Figure 6 A schematic diagram. Based on Figure 12B The schematic diagram shows the use of all inductor portions L1a', L1b', L2a', L2b', L3a', L3b', L4a', and L4b' (in conjunction with circuit 614) of inductor L' to generate a signal pair OUT. f4 / OUT* f4 '.therefore, Figure 12A Circuit path 1214 in the circuit can include all the turns (by) of the total number of turns (e.g., five turns) of inductor L'. Figure 12B The inductor portions are represented by L1a', L1b', L2a', L2b', L3a', L3b', L4a', and L4b'. (For example...) Figure 12AAs shown, circuit path 1214 can be formed between terminals 614a and 614b of oscillator 6014. Figure 12B In the inductor sections L1a', L1b', L2a', L2b', L3a', L3b', L4a', and L4b', based on circuit path 1214, signal pairs OUT are generated at the corresponding terminals 614a and 614b. f4 ' / OUT* f4 '.exist Figure 12B Since switches S1a', S1b', S2a', S2b', S3a', and S3b' are turned off, no signal is generated for OUT. f1 ' / OUT* f1 '、OUT f2 ' / OUT* f2 'and OUT f3 ' / OUT* f3 '.

[0097] Including an oscillator circuit 601 in IC device 600 allows IC device 600 to have a similar function to IC device 100. Figures 1 to 5B Improvements and advantages of ).

[0098] Figure 13 A schematic diagram of an apparatus in the form of an IC device 1300 including a transceiver 1303, comprising oscillator circuit 1301a and oscillator circuit 1301b, is shown according to some embodiments described herein. Figure 13 The device (including IC device 1300) may have wireless communication capabilities. Examples of such devices include mobile devices (e.g., cellular phones, smartphones, or other portable phones), computers (e.g., laptops, notebooks, or desktops), digital televisions, Wi-Fi communication stations (STAs) such as wireless access points (APs), base stations, or other wireless communication devices or systems.

[0099] Figure 13 The device can be configured to receive and transmit orthogonal frequency division multiplexing (OFDM) or orthogonal frequency division multiple access (OFDMA) communication signals on a multi-carrier communication channel. OFDM or OFDMA signals may include multiple orthogonal subcarriers.

[0100] Figure 13 The device can be configured to send and receive signals according to specific communication standards and / or protocols, such as any of the Institute of Electrical and Electronics Engineers (IEEE) standards including 802.11n-2009, 802.11-2012, 802.11ac and / or 802.11ax standards and / or proposed WLAN specifications, as well as other technologies and standards.

[0101] Figure 13 The device can be configured for high-efficiency (HE) Wi-Fi (HEW) communication according to the IEEE 802.11ax standard. In this configuration, Figure 13 The device can be configured to communicate based on OFDMA technology.

[0102] Figure 13 The device can be configured to transmit and receive signals using one or more other modulation techniques such as spread spectrum modulation (e.g., direct sequence code division multiple access (DS-CDMA) and / or frequency hopping code division multiple access (FH-CDMA), time division multiplexing (TDM) modulation and / or frequency division multiplexing (FDM) modulation, and other modulation techniques).

[0103] Figure 13 The device can be configured to send and receive signals according to cellular communication standards such as 3GPP, Long Term Evolution (LTE), LTE Advanced, or 5G communication.

[0104] exist Figure 13 In this configuration, transceiver 1303 can operate to allow IC device 1300 to communicate with another device (e.g., Figure 13 (Another wireless communication device not shown) wireless communication. For example, such as... Figure 13 As shown, transceiver 1303 may include a receive path 1351 and a transmit path 1352. Receive path 1351 is operable to receive information (e.g., in the form of a signal (e.g., radio waves)) sent from another device to IC device 1300. Transmit path 1352 is operable to transmit information (e.g., in the form of a signal (e.g., radio waves)) from IC device 1300 to another device.

[0105] like Figure 13 As shown, the receiving path 1351 may include at least one antenna circuit 1361, a filter (e.g., a bandpass filter) 1362, an amplifier (e.g., a low-noise amplifier) ​​1363, a mixer (e.g., a down-mixer (or down-converter)) 1364, a filter (e.g., a low-pass filter) 1365, and an analog-to-digital converter (ADC) 1366. The receiving path 1351 may include an oscillator circuit 1301a that can provide a signal (input signal) to the input node of the mixer 1364.

[0106] The transmit path 1352 can include a digital to analog converter (DAC) 1371, a filter (e.g., a low pass filter) 1372, a mixer (e.g., an up-mixer (or up-converter)) 1373, an amplifier (e.g., a power amplifier) 1374, and at least one antenna circuit 1375. The transmit path 1352 can include an oscillator circuit 1301b that can provide a signal (input signal) to an input node of the mixer 1373.

[0107] The transceiver 1303 can include digital baseband processing circuitry 1380. The digital baseband processing circuitry 1380 can receive information from the receive path 1351 for further processing. The digital baseband processing circuitry 1380 can provide information to the transmit path 1352 to be sent to another device. The digital baseband processing circuitry 1380 can be configured to process WLAN baseband signaling, BT baseband signaling, or both WLAN and BT baseband signaling.

[0108] Each of the antenna circuit 1361 and the antenna circuit 1375 can include or be part of multiple antennas to use at least one of single-input multiple-output (SIMO), multiple-input multiple-output (MIMO), or multiple-input single-output (MISO) techniques for wireless communication.

[0109] In Figure 13 The antenna circuit 1361 can operate to wirelessly receive signals (e.g., receive signals) 1381, 1382, and 1383 having different frequencies (e.g., frequencies f1”, f2”, and f3”), respectively, for simplicity, Figure 13 A single antenna symbol is shown to represent the antenna circuit 1361. However, the antenna circuit 1361 can include a single antenna (a physical antenna) or multiple antennas (multiple physical antennas). The antenna circuit 1361 can include a single antenna to receive the signals 1381, 1382, and 1383, such that the signals 1381, 1382, and 1383 can be received by the same antenna. Alternatively, the antenna circuit 1361 can include multiple antennas (different antennas) to receive the signals 1381, 1382, and 1383, such that the signals 1381, 1382, and 1383 can be received by different antennas. Figure 13 An example is shown in which the antenna circuit 1361 can operate to receive three signals having three frequencies, however, the antenna circuit 1361 can be configured to receive fewer or more than three signals having different frequencies.

[0110] The antenna circuit 1375 can operate to transmit signals (e.g., transmit signals) 1391, 1392, and 1393 having different frequencies (e.g., frequencies f1”, f2”, and f3”), respectively, for simplicity, Figure 13A single antenna symbol is shown to represent the antenna circuitry 1375. However, the antenna circuitry 1375 can include a single antenna (a physical antenna) or multiple antennas (multiple physical antennas). For example, the antenna circuitry 1375 can include a single antenna to transmit the signals 1391, 1392, and 1393 such that the signals 1391, 1392, and 1393 can be transmitted by the same antenna. In another example, the antenna circuitry 1375 can include multiple antennas (different antennas) to transmit the signals 1391, 1392, and 1393 such that the signals 1391, 1392, and 1393 can be transmitted by different antennas. Figure 13 An example is shown in which the antenna circuitry 1375 can operate to transmit three signals having three frequencies, however, the antenna circuitry 1375 can be configured to transmit fewer than or more than three signals having different frequencies.

[0111] The operation of the transceiver 1303 can be similar to the operation of a wireless communication device and can be readily understood by one skilled in the art. Therefore, detailed operation of the transceiver 1303 is omitted from the description of the Figure 13 transceiver 1303.

[0112] In Figure 13 , the oscillator circuit 1301a can include any of the oscillator circuit 101 Figures 1 to 5B ) and the oscillator circuit 601 Figures 6 to 12B ). Thus, the oscillator circuit 1301a can include multiple oscillators (e.g., local oscillators) to generate different frequencies at different time intervals depending on which of the signals 1381, 1382, and 1383 the receive path 1351 receives during a particular time interval.

[0113] For example, if the receive path 1351 operates to receive the signal 1381 (having a frequency f1”) at the antenna circuit 1361 during a particular time interval, the oscillator circuit 1301a can operate to generate a signal (or pair of differential signals) having a frequency (e.g., frequency f1) that is based on the frequency f1” of the signal 1381 during that particular time interval. In another example, if the receive path 1351 operates to receive the signal 1382 (having a frequency f2”) at the antenna circuit 1361 during a particular time interval, the oscillator circuit 1301a can operate to generate a signal (or pair of differential signals) having a frequency (e.g., frequency f2) that is based on the frequency f2” of the signal 1382 during that particular time interval. In another example, if the receive path 1351 operates to receive the signal 1383 (having a frequency f3”) at the antenna circuit 1361 during a particular time interval, the oscillator circuit 1301a can operate to generate a signal (or pair of differential signals) having a frequency (e.g., frequency f3) that is based on the frequency f3” of the signal 1383 during that particular time interval.

[0114] In Figure 13 , the oscillator circuit 1301b can include any of the oscillator circuit 101( Figures 1 to 5B ) and the oscillator circuit 601( Figures 6 to 12B ). Thus, the oscillator circuit 1301b can include multiple oscillators (e.g., local oscillators) to produce different frequencies at different time intervals depending on which of the signals 1391, 1392, and 1393 is transmitted by the transmit path 1352 during a particular time interval.

[0115] For example, if the transmit path 1352 operates to transmit the signal 1391 (having a frequency f1”) at the antenna circuit 1375 during a particular time interval, the oscillator circuit 1301b can operate to generate a signal (or differential signal pair) having a frequency (e.g., frequency f1) that is based on the frequency f1” of the signal 1391 during that particular time interval. In another example, if the transmit path 1352 operates to transmit the signal 1392 (having a frequency f2”) at the antenna circuit 1375 during a particular time interval, the oscillator circuit 1301b can operate to generate a signal (or differential signal pair) having a frequency (e.g., frequency f2) that is based on the frequency f2” of the signal 1392 during that particular time interval. In another example, if the transmit path 1352 operates to transmit the signal 1393 (having a frequency f3”) at the antenna circuit 1375 during a particular time interval, the oscillator circuit 1301b can operate to generate a signal (or differential signal pair) having a frequency (e.g., frequency f3) that is based on the frequency f3” of the signal 1393 during that particular time interval.

[0116] Inclusion of the oscillator circuits 1301a and 1301b in the IC device 1300 allows the IC device 1300 to have similar improvements and benefits as the IC device 100( Figures 1 to 5B ) and the IC device 600( Figures 6 to 12B ).

[0117] Figure 14 is a flowchart illustrating a method 1400 of operating an apparatus including an IC device in accordance with some embodiments described herein. The apparatus including the IC device used in the method 1400 can include any of the apparatuses and IC devices described above with reference to Figures 1 to 13 . Some actions in the method 1400 can be performed by hardware, software, firmware, or any combination of hardware, software, and firmware. Such hardware, software, and firmware can be included in the device or a system including the device.

[0118] As Figure 14As shown, action 1410 of method 1400 may include turning on at least one first switch during a first time interval to electrically couple a first circuit of a first oscillator to a conductive path of an inductor formed in an integrated circuit device, and generating a first signal at a first terminal of the first oscillator. Action 1420 may include turning off at least one second switch during the first time interval to electrically disconnect a second circuit of a second oscillator from the conductive path of the inductor. Action 1430 may include turning off at least one first switch during a second time interval to electrically disconnect the first circuit of the first oscillator from the conductive path of the inductor. Action 1440 may include turning on at least one second switch during the second time interval to electrically couple a second circuit of a second oscillator to the conductive path of the inductor, and generating a second signal at a second terminal of the second oscillator. The first signal and the second signal may have different frequencies.

[0119] Method 1400 may include relative to Figure 14 The actions 1410, 1420, 1430, and 1440 shown are fewer or more actions. For example, method 1400 may include the actions referenced above. Figures 1 to 13 The operation and function of any device and IC equipment described.

[0120] The description of the above-described apparatus (e.g., apparatus including IC devices 100, 600, and 1300 and oscillator circuits 101, 601, 1301a, and 1301b) and methods (e.g., method 1400 and operation of apparatus including IC devices 100, 600, and 1300 and oscillator circuits 101, 601, 1301a, and 1301b) is intended to provide a general understanding of the structure of the various embodiments, and is not intended to provide a complete description of all elements and features of apparatuses that may utilize the structures described herein.

[0121] The aforementioned apparatus and methods may include or be included in high-speed computers, communication and signal processing circuits, single-processor modules or multi-processor modules, single embedded processors or multiple embedded processors, multi-core processors, message exchange systems, and dedicated modules including multi-layer or multi-chip modules. Such apparatus may further be included as sub-components in various other devices (e.g., electronic systems), such as televisions, cellular phones, personal computers (e.g., laptops, desktops, handhelds, etc.), tablet computers (e.g., tablet PCs), workstations, radios, video players, audio players (e.g., MP3 (Motion Picture Experts Compression Standard Audio Layer 3) players), vehicles, medical devices (e.g., heart monitors, blood pressure monitors, etc.), set-top boxes, etc.

[0122] Additional notes and examples

[0123] Example 1 includes subject matter (such as a device, an electronic apparatus (e.g., circuitry, an electronic system, or both), or a machine) comprising: an inductor comprising a conductive path formed in an integrated circuit device; a first oscillator of the integrated circuit device, the first oscillator comprising a first terminal coupled to the conductive path of the inductor to provide a first signal, the first signal having a first frequency; and a second oscillator included in the integrated circuit device, the second oscillator comprising a second terminal coupled to the conductive path of the inductor to provide a second signal, the second signal having a second frequency different from the first frequency.

[0124] In Example 2, the subject matter of Example 1 can optionally include, wherein the first oscillator includes at least one capacitor to combine with a first portion of the conductive path of the inductor and form part of a first inductor-capacitor (LC) oscillator; and the second oscillator includes at least one capacitor to combine with a second portion of the conductive path of the inductor and form part of a second LC oscillator.

[0125] In Example 3, the subject matter of Example 2 can optionally include, wherein the conductive path comprises a plurality of turns, and the first portion of the conductive path of the inductor comprises a first portion of the plurality of turns, and the second portion of the conductive path of the inductor comprises a second portion of the plurality of turns, and the first portion of the plurality of turns and the second portion of the plurality of turns comprise different numbers of turns.

[0126] In Example 4, the subject matter of Example 1 can optionally include, wherein the first circuit includes a first additional terminal coupled to the conductive path to provide a first additional signal, wherein the first signal and the first additional signal form a first differential signal pair; and the second circuit includes a second additional terminal coupled to the conductive path to provide a second additional signal, wherein the second signal and the second additional signal form a second differential signal pair.

[0127] In Example 5, the subject matter of any one of Example 1 can optionally include, wherein a third circuit is included in the integrated circuit device, the third circuit including a third terminal coupled to the conductive path to provide a third signal, the third signal having a third frequency, wherein the third frequency is different from each of the first frequency and the second frequency.

[0128] In Example 6, the subject matter of any one of Example 5 can optionally include, wherein the first circuit includes a first additional terminal coupled to the conductive path to provide a first additional signal, wherein the first signal and the first additional signal form a first differential signal pair, the second circuit includes a second additional terminal coupled to the conductive path to provide a second additional signal, wherein the second signal and the second additional signal form a second differential signal pair, the third circuit includes a third additional terminal coupled to the conductive path to provide a third additional signal, wherein the third signal and the third additional signal form a third differential signal pair.

[0129] Example 7 includes subject matter (such as a device, an electronic system (e.g., circuitry, an electronic system, or both), or a machine) comprising: an inductor comprising a conductive path formed in an integrated circuit device, the conductive path comprising a plurality of turns; a first section, a second section, and a third section of the conductive path formed in a first horizontal plane of the integrated circuit device; a fourth section of the conductive path formed in a second horizontal plane of the integrated circuit device, the fourth section electrically coupling the first section to the second section; and a fifth section of the conductive path formed in a horizontal plane of the integrated circuit device different from the first horizontal plane, the fifth section electrically coupling the second section to the third section.

[0130] In Example 8, the subject matter of Example 7 can optionally include wherein a first via between the first horizontal plane and the second horizontal plane, a second via between the first horizontal plane and the second horizontal plane, a first conductive material in the first via, the first conductive material in electrical contact with the first section and the fourth section, a second conductive material in the second via, the second conductive material in electrical contact with the second section and the fourth section.

[0131] In Example 9, the subject matter of Example 8 can optionally include wherein a third via between the first horizontal plane and the second horizontal plane, a fourth via between the first horizontal plane and the second horizontal plane, a third conductive material in the third via, the third conductive material in electrical contact with the second section and the fifth section, a fourth conductive material in the fourth via, the fourth conductive material in electrical contact with the third section and the fifth section.

[0132] In Example 10, the subject matter of Example 7 can optionally include wherein a first terminal in electrical contact with a first location of the conductive path, a first additional terminal in electrical contact with a first additional location of the conductive path. A second terminal in electrical contact with a second location of the conductive path, a second additional terminal in electrical contact with a second additional location of the conductive path.

[0133] In Example 11, the subject matter of Example 10 can optionally include wherein a first capacitor, and a first switch coupled between the first capacitor and the first terminal, and a second capacitor and a second switch coupled between the second capacitor and the second terminal.

[0134] In Example 12, the subject matter of Example 7 can optionally include wherein a portion of the third section is between a portion of the fourth section and a substrate of the integrated circuit device.

[0135] In Example 13, the subject matter of any one of Example 12 can optionally include wherein a portion of the second section is between a portion of the fifth section and the substrate.

[0136] Example 14, the subject matter of Example 7 can optionally include, wherein the conductive path includes a sixth segment formed in the first horizontal plane, and the conductive path includes a seventh segment formed in a different horizontal plane of the integrated circuit device than the first horizontal plane; the seventh segment electrically couples the third segment to the sixth segment.

[0137] In Example 15, the subject matter of Example 14 can optionally include, wherein the conductive path includes an eighth segment formed in the first horizontal plane, and the conductive path includes a ninth segment formed in a different horizontal plane of the integrated circuit device than the first horizontal plane, and the ninth segment electrically couples the sixth segment to the eighth segment.

[0138] Example 16 includes subject matter (such as an apparatus, an electronic device (e.g., a circuit, an electronic system, or both), or a machine) that includes: an antenna; and a circuit path included in an integrated circuit device and coupled to the antenna, the circuit path including a mixer and an oscillator circuit coupled to the mixer, the oscillator circuit including: an inductor including a conductive path; a first oscillator including a first terminal coupled to the conductive path of the inductor to provide a first signal, the first signal having a first frequency; and a second oscillator including a second terminal coupled to the conductive path of the inductor to provide a second signal, the second signal having a second frequency different from the first frequency.

[0139] In Example 17, the subject matter of Example 16 can optionally include, wherein the circuit path is a receive path of the integrated circuit device.

[0140] In Example 18, the subject matter of Example 16 can optionally include, wherein the circuit path is a transmit path of the integrated circuit device.

[0141] In Example 19, the subject matter of Example 16 can optionally include: wherein the antenna is to receive a first receive signal during a first time interval, and a first frequency of the first signal generated from the first oscillator is based on a frequency of the first receive signal.

[0142] In Example 20, the subject matter of any one of Example 19 can optionally include: wherein the antenna is to receive a second receive signal during a second time interval, and a second frequency of the second signal generated from the second oscillator is based on a frequency of the second receive signal.

[0143] In Example 21, the subject matter of any one of Example 16 can optionally include: wherein the antenna is to transmit a first transmit signal during a first time interval, and a first frequency of the first signal generated from the first oscillator is based on a frequency of the first transmit signal.

[0144] In Example 22, the subject matter of any one of Examples 21 can optionally include wherein the antenna is to transmit a second transmit signal during the second time interval, and a second frequency of the second signal generated from the second oscillator is based on a frequency of the second transmit signal.

[0145] Example 23 includes subject matter (such as a method of operating an apparatus, an electronic device (e.g., a circuit, an electronic system, or both), or a machine) comprising directing, during a first time interval, at least one first switch to electrically couple a first circuit of a first oscillator to a conductive path of an inductor formed in an integrated circuit apparatus and generating a first signal at a first terminal of the first oscillator; directing, during the first time interval, at least one second switch to electrically separate a second circuit of a second oscillator from the conductive path of the inductor; directing, during a second time interval, the at least one first switch to electrically separate the first circuit of the first oscillator from the conductive path of the inductor; and directing, during the second time interval, the at least one second switch to electrically couple the second circuit of the second oscillator to the conductive path of the inductor and generating a second signal at a second terminal of the second oscillator, wherein the first signal and the second signal have different frequencies.

[0146] In Example 24, the subject matter of Example 23 can optionally include wherein receiving a first receive signal at an antenna circuit during the first time interval, wherein a frequency of the first signal is based on a frequency of the receive signal, and receiving a second receive signal at the antenna circuit during the second time interval, wherein a frequency of the second signal is based on a frequency of the second receive signal.

[0147] In Example 25, the subject matter of Example 24 can optionally include wherein the first receive signal and the second receive signal are received at different antennas of the antenna circuit.

[0148] In Example 26, the subject matter of Example 24 can optionally include wherein the first receive signal and the second receive signal are received at a same antenna of the antenna circuit.

[0149] In Example 27, the subject matter of Example 23 can optionally include wherein transmitting a first transmit signal at an antenna circuit during the first time interval, wherein a frequency of the first signal is based on a frequency of the first transmit signal, and transmitting a second transmit signal at the antenna circuit during the second time interval, wherein a frequency of the second signal is based on a frequency of the second transmit signal.

[0150] In Example 28, the subject matter of Example 27 can optionally include wherein the first transmit signal and the second transmit signal are transmitted from different antennas of the antenna circuit.

[0151] In Example 29, the subject matter of Example 27 can optionally include wherein the first transmit signal and the second transmit signal are transmitted from a same antenna of the antenna circuitry.

[0152] Example 30 includes an electronic device comprising means for performing any of the methods of Examples 23-29.

[0153] The above description and drawings illustrate some embodiments so that a person skilled in the art can better understand the embodiments of the subject matter described herein. Other embodiments can incorporate structural, logical, electrical, process, and other changes. Examples represent only a few of the possible variations. Parts and features of some embodiments can be included in or substituted for parts and features of other embodiments or those of other embodiments. Many other embodiments will be apparent to those of ordinary skill in the art after reading and understanding the above description. Therefore, the scope of the various embodiments is determined by the claims and the full scope of equivalents to which the claims are entitled. The claims can be drafted to exclude any element or to disclaim any additional element. As such, the claims can be broader than the above described embodiments.

[0154] The Abstract is provided to allow the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims. Accordingly, the claims are incorporated in their entirety as part of the disclosure.

Claims

1. An electronic device comprising: an inductor comprising a conductive path formed in an integrated circuit device, the conductive path comprising: a first section, a second section, and a third section formed in a first horizontal plane of the integrated circuit device; a fourth section formed in a second horizontal plane of the integrated circuit device, the fourth section electrically coupling the first section to the second section; and a fifth section formed in a horizontal plane of the integrated circuit device different from the first horizontal plane, the fifth section electrically coupling the second section to the third section; a first oscillator of the integrated circuit device, the first oscillator comprising a first terminal coupled to the conductive path of the inductor to provide a first signal, the first signal having a first frequency; and a second oscillator included in the integrated circuit device, the second oscillator comprising a second terminal coupled to the conductive path of the inductor to provide a second signal, the second signal having a second frequency different from the first frequency.

2. The device of claim 1, wherein: the first oscillator comprises at least one capacitor to combine with a first portion of the conductive path of the inductor and form a portion of a first inductor-capacitor oscillator; and the second oscillator comprises at least one capacitor to combine with a second portion of the conductive path of the inductor and form a portion of a second inductor-capacitor oscillator.

3. The apparatus of claim 2, wherein, the conductive path comprises a plurality of turns, and: the first portion of the conductive path of the inductor comprises a first portion of the plurality of turns; and the second portion of the conductive path of the inductor comprises a second portion of the plurality of turns, and the first portion of the plurality of turns and the second portion of the plurality of turns comprise different numbers of turns.

4. The device of claim 1, wherein: first circuitry of the first oscillator comprises a first additional terminal coupled to the conductive path to provide a first additional signal, wherein the first signal and the first additional signal form a first differential signal pair; and second circuitry of the second oscillator comprises a second additional terminal coupled to the conductive path to provide a second additional signal, wherein the second signal and the second additional signal form a second differential signal pair.

5. The device of claim 1, further comprising: third circuitry included in the integrated circuit device, the third circuitry comprising a third terminal coupled to the conductive path to provide a third signal, the third signal having a third frequency, wherein the third frequency is different from each of the first frequency and the second frequency.

6. The device of claim 5, wherein: first circuitry of the first oscillator comprises a first additional terminal coupled to the conductive path to provide a first additional signal, wherein the first signal and the first additional signal form a first differential signal pair; second circuitry of the second oscillator comprises a second additional terminal coupled to the conductive path to provide a second additional signal, wherein the second signal and the second additional signal form a second differential signal pair; and The third circuit includes a third additional terminal coupled to the electrically conductive path to provide a third additional signal, wherein the third signal and the third additional signal form a third differential signal pair.

7. An electronic device comprising: an inductor including an electrically conductive path formed in an integrated circuit device, the electrically conductive path including a plurality of turns; a first section, a second section, and a third section of the electrically conductive path formed in a first horizontal plane of the integrated circuit device; a fourth section of the electrically conductive path formed in a second horizontal plane of the integrated circuit device, the fourth section electrically coupling the first section to the second section; and a fifth section of the electrically conductive path formed in a horizontal plane of the integrated circuit device different from the first horizontal plane, the fifth section electrically coupling the second section to the third section; a first terminal in electrical contact with a first location of the electrically conductive path; a first additional terminal in electrical contact with a first additional location of the electrically conductive path; a second terminal in electrical contact with a second location of the electrically conductive path; and a second additional terminal in electrical contact with a second additional location of the electrically conductive path; a first capacitor and a first switch coupled between the first capacitor and the first terminal; and a second capacitor and a second switch coupled between the second capacitor and the second terminal.

8. An electronic device comprising: an inductor including an electrically conductive path formed in an integrated circuit device, the electrically conductive path including a plurality of turns; a first section, a second section, and a third section of the electrically conductive path formed in a first horizontal plane of the integrated circuit device; a fourth section of the electrically conductive path formed in a second horizontal plane of the integrated circuit device, the fourth section electrically coupling the first section to the second section; and a fifth section of the electrically conductive path formed in a horizontal plane of the integrated circuit device different from the first horizontal plane, the fifth section electrically coupling the second section to the third section, wherein a portion of the third section is between a portion of the fourth section and a substrate of the integrated circuit device.

9. The device of claim 8, further comprising: a first via between the first horizontal plane and the second horizontal plane; a second via between the first horizontal plane and the second horizontal plane; a first electrically conductive material in the first via, the first electrically conductive material in electrical contact with the first section and the fourth section; and a second electrically conductive material in the second via, the second electrically conductive material in electrical contact with the second section and the fourth section.

10. The device of claim 8, further comprising: a third via between the first horizontal plane and the second horizontal plane; a fourth via between the first horizontal plane and the second horizontal plane; a third electrically conductive material in the third via, the third electrically conductive material in electrical contact with the second section and the fifth section; and a fourth electrically conductive material in the fourth via, the fourth electrically conductive material in electrical contact with the third section and the fifth section.

11. The apparatus of claim 8, wherein, A portion of the second section is between a portion of the fifth section and the substrate.

12. The apparatus of claim 8, wherein: the electrically conductive path includes a sixth segment formed in the first horizontal plane; and the electrically conductive path includes a seventh segment formed in a different horizontal plane of the integrated circuit device than the first horizontal plane, and the seventh segment electrically couples the third segment to the sixth segment.

13. The apparatus of claim 12, wherein: the electrically conductive path includes an eighth segment formed in the first horizontal plane; and the electrically conductive path includes a ninth segment formed in a different horizontal plane of the integrated circuit device than the first horizontal plane, and the ninth segment electrically couples the sixth segment to the eighth segment.

14. An electronic apparatus comprising: an antenna; and a circuit path included in an integrated circuit device and coupled to the antenna, the circuit path including a mixer and an oscillator circuit coupled to the mixer, the oscillator circuit including: an inductor including an electrically conductive path including: a first segment, a second segment, and a third segment formed in a first horizontal plane of the integrated circuit device; a fourth segment formed in a second horizontal plane of the integrated circuit device, the fourth segment electrically coupling the first segment to the second segment; and a fifth segment formed in a different horizontal plane of the integrated circuit device than the first horizontal plane, the fifth segment electrically coupling the second segment to the third segment; a first oscillator including a first terminal coupled to the electrically conductive path of the inductor to provide a first signal, the first signal having a first frequency; and a second oscillator including a second terminal coupled to the electrically conductive path of the inductor to provide a second signal, the second signal having a second frequency different from the first frequency.

15. The apparatus of claim 14, wherein, the circuit path is a receive path of the integrated circuit device.

16. The apparatus of claim 14, wherein, the circuit path is a transmit path of the integrated circuit device.

17. The apparatus of claim 14, wherein, the antenna is to receive a first receive signal during a first time interval, and the first frequency of the first signal generated from the first oscillator is based on a frequency of the first receive signal.

18. The apparatus of claim 17, wherein, the antenna is to receive a second receive signal during a second time interval, and the second frequency of the second signal generated from the second oscillator is based on a frequency of the second receive signal.

19. The apparatus of claim 14, wherein, the antenna is to transmit a first transmit signal during a first time interval, and the first frequency of the first signal generated from the first oscillator is based on a frequency of the first transmit signal.

20. The apparatus of claim 19, wherein, the antenna is to transmit a second transmit signal during a second time interval, and the second frequency of the second signal generated from the second oscillator is based on a frequency of the second transmit signal.

21. A method of operating an electronic apparatus, the method comprising: turning on at least one first switch during a first time interval to electrically couple a first circuit of a first oscillator to a conductive path of an inductor formed in an integrated circuit device, the conductive path including: a first segment, a second segment, and a third segment formed in a first horizontal plane of the integrated circuit device; a fourth segment formed in a second horizontal plane of the integrated circuit device, the fourth segment electrically coupling the first segment to the second segment; and a fifth segment formed in a horizontal plane of the integrated circuit device different from the first horizontal plane, the fifth segment electrically coupling the second segment to the third segment, and generating a first signal at a first terminal of the first oscillator during the first time interval; turning off at least one second switch during the first time interval to electrically decouple a second circuit of a second oscillator from the conductive path of the inductor; turning off the at least one first switch during a second time interval to electrically decouple the first circuit of the first oscillator from the conductive path of the inductor; and turning on the at least one second switch during the second time interval to electrically couple the second circuit of the second oscillator to the conductive path of the inductor, and generating a second signal at a second terminal of the second oscillator, wherein the first signal and the second signal have different frequencies.

22. The method of claim 21, further comprising: receiving a first receive signal on an antenna circuit during the first time interval, wherein a frequency of the first signal is based on a frequency of the first receive signal; and receiving a second receive signal on the antenna circuit during the second time interval, wherein a frequency of the second signal is based on a frequency of the second receive signal.

23. The method of claim 21, further comprising: transmitting a first transmit signal on an antenna circuit during the first time interval, wherein a frequency of the first signal is based on a frequency of the first transmit signal; and transmitting a second transmit signal on the antenna circuit during the second time interval, wherein a frequency of the second signal is based on a frequency of the second transmit signal.

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