A variable gain amplifier circuit for pressure sensitive touch control

Abstract

The invention discloses a variable gain amplifier circuit for pressure-sensitive touch control, which comprises an operational amplifier module, a gain configuration module, and a clock control module, wherein the clock control module is used to generate a control clock; the gain configuration module performs gain and output bias voltage configuration according to a control signal, so that an input signal is output after being amplified by reverse operational amplification and superimposed with a fixed bias voltage; the invention adjusts the gain of the amplifier circuit by adjusting the ratio of the capacitance value on the input end of the operational amplifier and the feedback branch, and adjusts the ratio of the capacitance value on the input end of the operational amplifier and the reference voltage branch to change the fixed bias amount of the output voltage, so that the output signal is only related to the reference voltage, the gain and the input, and accurate amplification is obtained when the input signal voltage is close to zero, thereby solving the amplification problem when the input signal is close to zero (ground) during light touch in a touch control scheme based on pressure-resistance change-voltage sensing.

Description

Technical Field

[0001] The present invention relates to a signal amplifying circuit, and in particular to a variable gain amplifying circuit based on a pressure-sensitive touch array composed of force-sensitive materials when the input signal to the ground is close to zero when the pressure is small. Background Art

[0002] The pressure sensing network composed of highly sensitive force-sensitive materials can be applied to the design of human-computer interaction. The circuit of the pressure sensing grid of force-sensitive materials is equivalent to a pressure variable resistor. This resistive touch solution has the advantages of anti-electromagnetic interference, waterproofness, anti-oil pollution, foldability, and easy expansion that capacitive touch solutions do not have.

[0003] The voltage characteristic of the output signal of this sensor network, which is equivalent to a variable resistor network, is that the greater the pressure, the higher the voltage output. When no pressure is applied or the touch is light, the output voltage is close to the ground voltage. However, for the touch control that people are accustomed to, most of the operations are light touch. At this time, this voltage needs to be amplified before being converted and processed by the subsequent analog-to-digital converter.

[0004] Many existing pressure sensor network signal amplification circuits use positive-phase amplifier circuits, whose output voltage is the input voltage multiplied by a multiple. However, in this circuit, the accuracy and speed will drop sharply when the output voltage of the operational amplifier is close to the power supply or ground rail, and it may even fail to work normally and cannot accurately amplify input signals close to zero.

[0005] Figure 1 A prior art inverting amplifier circuit is shown, which can solve the problem that the output voltage is close to the power supply or ground rail. Figure 1 The inverting amplifier circuit shown in the figure has an output voltage of zero when the input is However, this circuit has the following disadvantages:

[0006] (1) For input, the input resistance is R1. Since the touch network cannot drive resistive loads, this directly affects the input voltage.

[0007] (2) The operational amplifier needs to drive a resistive load and consumes additional current continuously;

[0008] (3) When the input is zero, the output bias voltage changes with the gain configuration, which can easily cause output saturation. This is not friendly to subsequent signals or data processing after ADC conversion, and the gain cannot be switched arbitrarily during use.

[0009] (4) The problem can be solved by using a negative power supply, but power consumption and cost will also increase.

[0010] Figure 2Another prior art inverting amplifier circuit is shown, which controls switches SW1, SW2, and SW3 by non-overlapping clocks PH1 and PH2, so that the output voltage

[0011] That is to say, when VIN=0, VOUT=VB. When different output bias voltages need to be configured at zero input, the VB voltage value needs to be changed. However, this requires that the input range of the operational amplifier is large enough. Depending on the requirements, a rail-to-rail operational amplifier may be required to cover the full bias voltage range, which increases the design complexity and difficulty of the operational amplifier.

[0012] Therefore, how to design an amplifier circuit that can accurately amplify when the signal voltage is close to zero volts, and in which the gain and voltage offset of the amplifier circuit can be flexibly adjusted according to the needs of the application scenario is a technical problem that the industry urgently needs to solve. Summary of the invention

[0013] In order to solve the above defects in the prior art, the present invention provides a variable gain amplifier circuit for pressure-sensitive touch control.

[0014] The technical solution adopted by the present invention is: a variable gain amplifier circuit for pressure-sensitive touch, which includes an operational amplifier module, a gain configuration module, and a clock control module, wherein the clock control module is used to generate a control clock; the gain configuration module configures the gain and output bias voltage according to the control signal, so that the input signal is output after reverse operational amplification and superimposed with a fixed bias voltage.

[0015] The operational amplifier module includes an operational amplifier U1 , a non-inverting input terminal of the operational amplifier U1 is connected to a bias voltage VB, and an inverting input terminal of the operational amplifier U1 is connected to the gain configuration module.

[0016] The clock control module generates two non-overlapping first clocks PH1 and second clocks PH2 , and when the first clock PH1 is at a high level, the second clock PH2 is at a low level.

[0017] The gain configuration module includes a fifth capacitor C5, a sixth capacitor C6, and a seventh capacitor C7, wherein one end of the seventh capacitor C7 is connected to one end of the third switch SW3 and the fourth switch SW4, the other end of the fourth switch SW4 is connected to the input signal IN, the other end of the seventh capacitor C7 is connected to the inverting input end of the operational amplifier U1, one end of the eighth switch SW8, the fifth capacitor C5, and one end of the sixth capacitor C6, the other end of the fifth capacitor C5 is connected to one end of the first switch SW1 and the second switch SW2, the other end of the second switch SW2 is connected to the other end of the eighth switch SW8, and the output end of the operational amplifier U1, and the other end of the sixth capacitor C6 is connected to the inverting input end of the operational amplifier U1. The first switch SW1 is connected to one end of the fifth switch SW5 and the sixth switch SW6, the other end of the sixth switch SW6 and the first switch SW1 is connected to the reference voltage source VREF, the other end of the third switch SW3 and the fifth switch SW5 is grounded, and the non-inverting input end of the operational amplifier U1 is connected to the bias voltage VB; the third switch SW3, the eighth switch SW8, the fifth switch SW5 and the first switch SW1 are turned on when the first clock PH1 is at a high level, and are turned off when the first clock PH1 is at a low level; the fourth switch SW4, the sixth switch SW6 and the second switch SW2 are turned on when the second clock PH2 is at a high level, and are turned off when the second clock PH2 is at a low level.

[0018] The sixth capacitor C6 and the seventh capacitor C7 are adjustable capacitors.

[0019] The capacitance value of the sixth capacitor C6 is controlled by the controller, and the capacitance ratio of the sixth capacitor C6 to the fifth capacitor C5 is adjusted to adjust the bias of the output voltage of the operational amplifier U1.

[0020] The capacitance value of the seventh capacitor C7 is controlled by the controller, and the capacitance ratio of the seventh capacitor C7 to the fifth capacitor C5 is adjusted to adjust the gain of the amplifier circuit.

[0021] In one pulse cycle, the high level time period of the first clock PH1 is shorter than the low level time period of the second clock PH2, and the high level time period of the first clock PH1 falls within the low level time period of the second clock PH2 in the vertical direction with time as the horizontal axis.

[0022] The beneficial effects of the technical solution provided by the present invention are:

[0023] The present invention adjusts the gain of the amplifier circuit by adjusting the ratio of the input at the input end of the operational amplifier to the capacitance value on the feedback branch, and adjusts the ratio of the input of the operational amplifier to the capacitance value on the reference voltage branch to change the fixed bias of the output voltage, so that the output signal is only related to the reference voltage, the gain and the input, and obtains accurate amplification when the input signal voltage is close to zero, solving the amplification problem when the input signal is close to zero (ground) when lightly touched in the touch control solution based on pressure-resistance change-voltage sensing. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The present invention is described in detail below with reference to the embodiments and accompanying drawings, wherein:

[0025] Figure 1 It is a schematic diagram of the signal amplification principle of the prior art;

[0026] Figure 2 It is another schematic diagram of signal amplification in the prior art;

[0027] Figure 3 is a circuit diagram of an embodiment of the present invention;

[0028] Figure 4 It is the sampling and amplification timing of the amplifier circuit and the output change diagram when the input signal changes;

[0029] Figure 5 It is the sampling and amplification timing of the amplifier circuit and the output bias change diagram when the gain changes;

[0030] Figure 6 It is a graph showing the sampling and amplification timing of the amplifier circuit and the output changes as the input and gain change. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0032] The present invention mainly solves the deficiencies of the prior art, provides a design that does not require an operational amplifier input voltage range, changes in gain do not affect an output bias point, and obtains an output signal that is only related to a reference voltage, gain, and input.

[0033] The present invention discloses a variable gain amplifier circuit for pressure-sensitive touch control, which comprises an operational amplifier module, a gain configuration module, and a clock control module, wherein the clock control module is used to generate a control clock; the gain configuration module performs gain and output bias voltage configuration according to a control signal, so that the input signal is output after reverse operational amplification and superimposition of a fixed bias voltage.

[0034] The operational amplifier module includes an operational amplifier U1, a non-inverting input terminal of the operational amplifier U1 is connected to a bias voltage VB, and an inverting input terminal of the operational amplifier U1 is connected to the gain configuration module. The clock control module generates two non-overlapping first clocks PH1 and PH2, and when the first clock PH1 is at a high level, the second clock PH2 is at a low level.

[0035] See also Figure 31 and 2. The circuit diagram of the embodiment of the present invention shown in FIG. 1 is a circuit diagram of the embodiment of the present invention, wherein the gain configuration module includes a fifth capacitor C5, a sixth capacitor C6, and a seventh capacitor C7, wherein one end of the seventh capacitor C7 is connected to one end of the third switch SW3 and the fourth switch SW4, the other end of the fourth switch SW4 is connected to the input signal IN, the other end of the seventh capacitor C7 is connected to the inverting input end of the operational amplifier U1, one end of the eighth switch SW8, the fifth capacitor C5, and one end of the sixth capacitor C6, the other end of the fifth capacitor C5 is connected to one end of the first switch SW1 and the second switch SW2, the other end of the second switch SW2 is connected to the other end of the eighth switch SW8, and the output end of the operational amplifier U1, and the sixth capacitor C7 is connected to the inverting input end of the operational amplifier U1, the eighth switch SW8, and the output end of the operational amplifier U1. The other end of the capacitor C6 is connected to one end of the fifth switch SW5 and the sixth switch SW6, the other ends of the sixth switch SW6 and the first switch SW1 are connected to the reference voltage source VREF, the other ends of the third switch SW3 and the fifth switch SW5 are grounded, and the non-inverting input end of the operational amplifier U1 is connected to the bias voltage VB; the third switch SW3, the eighth switch SW8, the fifth switch SW5 and the first switch SW1 are turned on when the first clock PH1 is at a high level, and are turned off when the first clock PH1 is at a low level; the fourth switch SW4, the sixth switch SW6 and the second switch SW2 are turned on when the second clock PH2 is at a high level, and are turned off when the second clock PH2 is at a low level.

[0036] In order to adjust the offset and gain, the sixth capacitor C6 and the seventh capacitor C7 are adjustable capacitors.

[0037] The capacitance value of the sixth capacitor C6 is controlled by the controller through a logic signal, and the capacitance ratio of the sixth capacitor C6 to the fifth capacitor C5 is adjusted to adjust the bias of the output voltage of the operational amplifier U1.

[0038] The capacitance value of the seventh capacitor C7 is controlled by the controller through a logic signal, and the capacitance ratio of the seventh capacitor C7 to the fifth capacitor C5 is adjusted to adjust the gain of the amplifier circuit.

[0039] See also Figure 4 ,or Figure 5 ,or Figure 6 In a pulse cycle, the high level time period of the first clock PH1 is shorter than the low level time period of the second clock PH2, and in the graph with time as the horizontal axis, the high level time period of the first clock PH1 falls within the low level time period of the second clock PH2 in the vertical axis direction. That is, the falling edge of the second clock PH2 pulse is earlier than the rising edge of the PH1 pulse, and the rising edge of the second clock PH2 pulse is later than the falling edge of the PH1 pulse. In this way, there is a "dead zone" between the high level of the first clock PH1 and the high level of the second clock PH2, and the two sets of switches SW controlled by PH1 and PH2 will not be turned on at the same time, avoiding amplifier failure.

[0040] Combine the following Figure 3 The working principle of the present invention is described in detail:

[0041] Assume that the initial voltage VIN=0, the bias voltage value is VB, the reference voltage value is VREF, the capacitance values ​​of the fifth capacitor C5, the sixth capacitor C6, and the seventh capacitor C7 are C1, C2, and C3 respectively, PG represents the configured gain, which is determined by the ratio of capacitors C1 and C2, PH1 and PH2 are non-overlapping clock pulses, wherein the high level segment of PH1 is the sampling phase, and the high level segment of PH2 is the amplification phase, and 0 and 1 are used below to represent that PH is a low level and a high level respectively.

[0042] According to the circuit charge conservation and the virtual-break and virtual-short principle of the operational amplifier, the voltage VOUT can be expressed as

[0043]

[0044] like Figure 4 , the circuit starts to work from PH1=1, and when PH=1, the circuit enters the sampling phase, at this time VOUT=VB, where VB is the bias voltage in the circuit diagram. When PH1=0, PH2=1, the circuit starts to amplify, and VOUT rises. Since VIN=0, the VOUT voltage value is

[0045]

[0046] The voltage in this state is called the "reference bias voltage". In the subsequent amplification phase, the VOUT voltage output value is the "reference bias voltage" minus the amplified voltage. When VIN is slightly less than 0, as long as a slightly smaller "reference bias voltage" is set, the output is still within the output range of the operational amplifier.

[0047] See also Figure 5 , the input VIN is continuously 0, and the circuit starts working from PH1=1, with an initial gain value of 2 times. At the end of the amplification phase PH2, the gain PG is switched to 4 times, and the subsequent switching to other gains does not change the output "reference bias voltage" when VIN=0. When switching the gain, the change in the output voltage is only related to the gain multiplied by the input voltage, as Figure 6 During use, the gain can be changed in real time according to the strength of the input signal, and the change in output voltage has nothing to do with other factors, which is convenient for data processing after being sent to the subsequent ADC conversion.

[0048] The above embodiments are for illustration only and are not intended to be limiting. Any equivalent modifications or changes made thereto without departing from the spirit and scope of the present application shall be included in the scope of the claims of the present application.

Claims

1. A variable gain amplifier circuit for pressure sensitive touch control, characterized in that: It includes an operational amplifier module, a gain configuration module, and a clock control module. The clock control module is used to generate a control clock; The gain configuration module performs gain and output bias voltage configuration according to the control signal, so that the input signal is amplified by reverse operation and output after being superimposed with a fixed bias voltage; The operational amplifier module comprises an operational amplifier (U1), a non-inverting input terminal of the operational amplifier (U1) is connected to a bias voltage (VB), and an inverting input terminal of the operational amplifier (U1) is connected to the gain configuration module; The clock control module generates two non-overlapping first clocks (PH1) and second clocks (PH2), wherein the second clock (PH2) is at a low level when the first clock (PH1) is at a high level; The gain configuration module comprises a fifth capacitor (C5), a sixth capacitor (C6), and a seventh capacitor (C7), wherein one end of the seventh capacitor (C7) is connected to one end of the third switch (SW3) and the fourth switch (SW4), the other end of the fourth switch (SW4) is connected to the input signal (IN), the other end of the seventh capacitor (C7) is connected to the inverting input end of the operational amplifier (U1), one end of the eighth switch (SW8), the fifth capacitor (C5), and one end of the sixth capacitor (C6), the other end of the fifth capacitor (C5) is connected to one end of the first switch (SW1) and the second switch (SW2), the other end of the second switch (SW2) is connected to the other end of the eighth switch (SW8), and the output end of the operational amplifier (U1), the other end of the sixth capacitor (C6) is connected to one end of the fifth switch (SW5) and the sixth switch (SW6), the other end of the sixth switch (SW6) and the first switch (SW1) is connected to a reference voltage source (VREF), the other ends of the third switch (SW3) and the fifth switch (SW5) are grounded, and the non-inverting input end of the operational amplifier (U1) is connected to a bias voltage (VB); The third switch (SW3), the eighth switch (SW8), the fifth switch (SW5) and the first switch (SW1) are turned on when the first clock (PH1) is at a high level, and are turned off when the first clock (PH1) is at a low level; The fourth switch (SW4), the sixth switch (SW6) and the second switch (SW2) are turned on when the second clock (PH2) is at a high level, and are turned off when the second clock (PH2) is at a low level.

2. The variable gain amplifier circuit for pressure-sensitive touch control according to claim 1, wherein: The sixth capacitor (C6) and the seventh capacitor (C7) are adjustable capacitors.

3. The variable gain amplifier circuit for pressure-sensitive touch control according to claim 2, wherein: The capacitance value of the sixth capacitor (C6) is controlled by a controller, and the capacitance ratio of the sixth capacitor (C6) to the fifth capacitor (C5) is adjusted to adjust the bias of the output voltage of the operational amplifier (U1).

4. The variable gain amplifier circuit for pressure-sensitive touch control according to claim 2, wherein: The capacitance value of the seventh capacitor (C7) is controlled by a controller, and the capacitance ratio of the seventh capacitor (C7) to the fifth capacitor (C5) is adjusted to adjust the gain of the amplifier circuit.

5. The variable gain amplifier circuit for pressure-sensitive touch control according to any one of claims 1 to 4, characterized in that: In one pulse cycle, a high level time period of the first clock (PH1) is shorter than a low level time period of the second clock (PH2), and the high level time period of the first clock (PH1) falls within the low level time period of the second clock (PH2) in the vertical direction with time as the horizontal axis.

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