Magnetic storage device

Abstract

A magnetic random access memory (MRAM) device is provided. The MRAM device may include: a magnetic tunnel junction (MTJ) including a free layer and a pinned layer stacked in sequence in a vertical direction; and a conductive layer adjacent to the free layer of the MTJ. The conductive layer may include a horizontal portion and a first protruding portion and a second protruding portion protruding away from the horizontal portion and spaced apart from each other in a horizontal direction perpendicular to the vertical direction. One side of the free layer and one side of the horizontal portion may form a straight side.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims the priority of Korean Patent Application No. 10-2018-0109083 filed in the Korean Intellectual Property Office on September 12, 2018, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates generally to the field of electronics, and more particularly to magnetic memory devices. Background Art

[0004] As the demand for electronic devices with improved speed and / or reduced power consumption increases, semiconductor memory devices with faster operating speed and / or lower operating voltage are studied. Magnetic memory devices are studied as candidates. Magnetic memory devices can provide technical advantages, such as high speed and / or non-volatility, and thus magnetic memory devices can become next-generation memory devices. Therefore, it may be beneficial to develop a manufacturing process for mass-producing magnetic memory devices and to develop magnetic memory devices with high integration density and / or low power consumption.

[0005] The magnetic memory device includes a magnetic tunnel junction (MTJ). The MTJ includes two magnetic layers and an insulating layer between the two magnetic layers. The resistance of the MTJ varies with the magnetization direction of the magnetic layers. For example, when the magnetization directions of the magnetic layers are parallel and opposite to each other, the resistance of the MTJ is higher than when they are parallel to each other. This resistance difference can be used for data storage operations of the magnetic memory device. Summary of the invention

[0006] Some embodiments of the inventive concept provide a magnetic memory device having a low defect density and a method of manufacturing the same.

[0007] Some embodiments of the inventive concept provide methods of reducing difficulty in a process of manufacturing a magnetic memory device and a magnetic memory device manufactured thereby.

[0008] According to some embodiments of the present inventive concept, a magnetic random access memory (MRAM) device may include: a magnetic tunnel junction (MTJ) including a free layer and a pinned layer stacked in sequence in a vertical direction; and a conductive layer adjacent to the free layer of the MTJ. The conductive layer may include a horizontal portion and a first protruding portion and a second protruding portion protruding away from the horizontal portion and spaced apart from each other in a horizontal direction perpendicular to the vertical direction. One side of the free layer and one side of the horizontal portion may form a straight side.

[0009] According to some embodiments of the present invention, a magnetic random access memory (MRAM) device may include: a magnetic tunnel junction (MTJ) including a free layer and a pinned layer stacked in sequence in a vertical direction; and a conductive layer adjacent to the free layer of the MTJ. The conductive layer may include: a horizontal portion including a first surface facing the MTJ and a second surface opposite to the first surface; and a first protruding portion and a second protruding portion protruding away from the second surface of the horizontal portion and spaced apart from each other in a horizontal direction perpendicular to the vertical direction. The first protruding portion may include a first side facing the second protruding portion and a second side opposite to the first side of the first protruding portion, and in a plan view, the second side of the first protruding portion may be recessed toward the second protruding portion relative to one side of the horizontal portion.

[0010] According to some embodiments of the present inventive concept, a magnetic random access memory (MRAM) device may include: a magnetic tunnel junction (MTJ) including a free layer and a pinned layer stacked in sequence in a vertical direction; and a conductive layer adjacent to the free layer of the MTJ. The conductive layer may include: a horizontal portion including a first surface facing the MTJ and a second surface opposite to the first surface; and a first protruding portion and a second protruding portion protruding away from the second surface of the horizontal portion and spaced apart from each other in a horizontal direction perpendicular to the vertical direction. The MTJ may overlap an interface between the horizontal portion and the first protruding portion. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Example embodiments will be more clearly understood from the following description taken in conjunction with the accompanying drawings.The accompanying drawings represent non-limiting example embodiments described herein.

[0012] Figure 1 is a plan view showing a magnetic memory device according to some embodiments of the inventive concept;

[0013] Figure 2A is along Figure 1 A cross-sectional view taken along line II' of Figure 2B is along Figure 1 A cross-sectional view taken along line II-II';

[0014] Figure 3 According to some embodiments of the present invention Figure 1 A perspective view of a portion of a magnetic memory device is shown;

[0015] Figure 4 is a plan view showing a magnetic memory device according to some embodiments of the inventive concept;

[0016] Figure 5A is along Figure 4 A cross-sectional view taken along line II' of Figure 5B is along Figure 4A cross-sectional view taken along line II-II';

[0017] Figure 6 is provided for describing an example of a conductive line SOL Figure 2A an enlarged cross-sectional view of a portion 'A' of;

[0018] Figure 7 is provided for describing an example of a conductive line SOL Figure 2A an enlarged cross-sectional view of a portion 'A' of;

[0019] Figure 8 is provided to describe an example of a magnetic tunnel junction pattern MTJ Figure 2A an enlarged cross-sectional view of a portion 'A' of;

[0020] Fig. 9 is provided to describe an example of a magnetic tunnel junction pattern MTJ Figure 2A an enlarged cross-sectional view of a portion 'A' of;

[0021] FIG. 10A to FIG. 14A is a plan view illustrating a method of manufacturing a magnetic memory device according to some embodiments of the inventive concept;

[0022] FIG. 10B to FIG. 14B Along FIG. 10A to FIG. 14A A cross-sectional view taken along line II';

[0023] Fig.15 FIG. 1 is a diagram showing a magnetic memory device according to some embodiments of the present inventive concept. Figure 1 A cross-sectional view taken along line II';

[0024] Fig.16 is a diagram showing some embodiments of the present invention. Fig.15 A perspective view of a portion of a magnetic memory device is shown;

[0025] FIG. 17A to FIG. 19A is a plan view illustrating a method of manufacturing a magnetic memory device according to some embodiments of the inventive concept;

[0026] FIG. 17B to FIG. 19B Along FIG. 17A to FIG. 19A A cross-sectional view taken along line II'.

[0027] It should be noted that these drawings are intended to illustrate the general characteristics of the methods, structures, and / or materials utilized in specific example embodiments and to supplement the written description provided below. However, these drawings are not necessarily to scale and may not accurately reflect the precise structure or performance characteristics of any given embodiment, and should not be interpreted as limiting or restricting the range of values ​​or characteristics included by the example embodiments. For example, the relative thickness and position of layers, regions, and / or structural elements may be reduced or exaggerated for clarity. The use of similar or identical reference numerals in the various drawings is intended to indicate the presence of similar or identical elements or features. DETAILED DESCRIPTION

[0028] Example embodiments of the inventive concepts will now be described more fully with reference to the accompanying drawings, in which example embodiments are shown.

[0029] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0030] It will be understood that “element A covers the surface of element B” (or similar expressions) means that element A is located on the surface of element B, but does not necessarily mean that element A completely covers the surface of element B. It will also be understood that “element A conformally covers the surface of element B” (or similar expressions) means that element A is located on the surface of element B and has a uniform thickness along the surface of element B.

[0031] Furthermore, it will be understood that “element A fills space B” (or similar expressions) means that element A partially or completely fills space B, but does not necessarily mean that element A completely fills space B.

[0032] Figure 1 is a plan view illustrating a magnetic memory device according to some embodiments of the inventive concept. Figure 2A is along Figure 1 A cross-sectional view taken along line II' of Figure 2B is along Figure 1 A cross-sectional view taken along line II-II'. Figure 3 According to some embodiments of the present invention Figure 1 A perspective view of a portion of a magnetic memory device is shown.

[0033] Reference Figure 1 , Figure 2A , Figure 2B and Figure 3, the lower contact plug 120 may be disposed on the substrate 100, and the lower interlayer insulating layer 110 may be disposed between the lower contact plugs 120. The substrate 100 may include a semiconductor substrate. In some embodiments, the selection element SW may be disposed on the semiconductor substrate of the substrate 100. For example, the semiconductor substrate of the substrate 100 may be formed of or include at least one of silicon (Si), silicon germanium (SiGe), germanium (Ge), and gallium arsenide (GaAs), or may include a silicon on insulator (SOI) wafer. The selection element SW may be a transistor (e.g., a field effect transistor) or a diode.

[0034] The lower contact plugs 120 may be spaced apart from each other in the horizontal direction. In some embodiments, the lower contact plugs 120 may be spaced apart from each other in a first direction D1 (i.e., a first horizontal direction) parallel to the top surface 100U of the substrate 100. In some embodiments, each of the lower contact plugs 120 may be electrically coupled to (e.g., electrically connected to) a terminal of a corresponding one of the selection elements SW. For example, the lower contact plugs 120 may be formed of or include at least one of a doped semiconductor material (e.g., doped silicon), a metal (e.g., tungsten, titanium, and / or tantalum), a conductive metal nitride (e.g., titanium nitride, tantalum nitride, and / or tungsten nitride), and a metal semiconductor compound (e.g., metal silicide).

[0035] Two adjacent lower contact plugs 120 may be isolated from each other (i.e., electrically separated or electrically insulated) by a single lower interlayer insulating layer 110 between the two adjacent lower contact plugs 120. In some embodiments, the single lower interlayer insulating layer 110 may be interposed between the two adjacent lower contact plugs 120 and may include a protruding portion located above the top surfaces 120U of the two adjacent lower contact plugs 120, such as Figure 2A In some embodiments, the protruding portion of the lower interlayer insulating layer 110 may protrude beyond the top surfaces 120U of two adjacent lower contact plugs 120 in the second direction D2 (ie, the vertical direction), as shown in FIG. Figure 2A As shown, the second direction D2 may be perpendicular to the top surface 100U of the substrate 100. For example, the lower interlayer insulating layer 110 may be formed of or include at least one of oxide, nitride, and / or oxynitride.

[0036] The magnetic tunnel junction patterns MTJ may be disposed on the lower interlayer insulating layer 110 and may be horizontally spaced apart from each other. Figure 1In some embodiments, the magnetic tunnel junction patterns MTJ may be arranged to be spaced apart from each other in the first direction D1. Each of the magnetic tunnel junction patterns MTJ may be disposed on a corresponding one of the lower interlayer insulating layers 110 between a corresponding pair of lower contact plugs 120. Each pair of lower contact plugs 120 may be disposed on both sides of each of the magnetic tunnel junction patterns MTJ.

[0037] Each of the magnetic tunnel junction patterns MTJ may include a first magnetic pattern MP1, a tunnel barrier pattern TBP, and a second magnetic pattern MP2 sequentially stacked on the lower interlayer insulating layer 110 in the second direction D2. The tunnel barrier pattern TBP may be between the first magnetic pattern MP1 and the second magnetic pattern MP2. For example, the tunnel barrier pattern TBP may include at least one of magnesium oxide, titanium oxide, aluminum oxide, magnesium zinc oxide, and magnesium boron oxide. Each of the first magnetic pattern MP1 and the second magnetic pattern MP2 may include at least one magnetic layer. In some embodiments, the first magnetic pattern MP1 may include a free layer, and the second magnetic pattern MP2 may include a pinned layer (i.e., a reference layer).

[0038] The electrode patterns 160 may be disposed on the magnetic tunnel junction patterns MTJ, respectively. The first magnetic pattern MP1 may be disposed between the lower interlayer insulating layer 110 and the tunnel barrier pattern TBP, and the second magnetic pattern MP2 may be disposed between each of the electrode patterns 160 and the tunnel barrier pattern TBP. For example, the electrode pattern 160 may include at least one of a metal (e.g., Ta, W, Ru, and Ir) and a conductive metal nitride (e.g., TiN).

[0039] Reference Figure 2A , the respective first conductive patterns 150 may be respectively disposed under the magnetic tunnel junction pattern MTJ. Each of the first conductive patterns 150 may be interposed between each of the magnetic tunnel junction patterns MTJ and the lower interlayer insulating layer 110. The respective second conductive patterns 130 may be respectively disposed on the lower contact plugs 120. The first conductive patterns 150 and the second conductive patterns 130 may be alternately arranged in the first direction D1. In some embodiments, one side of the first magnetic pattern MP1 (e.g., one side of the free layer of the first magnetic pattern MP1) and one side of the first conductive pattern 150 may be aligned, and may thus form a straight side, such as Figure 2A The one side of the first magnetic pattern MP1 and the one side of the first conductive pattern 150 may be coplanar, as shown in FIG. Figure 2A As shown. Figure 2AIt is shown that the straight side formed by the one side of the first magnetic pattern MP1 and the one side of the first conductive pattern 150 is not inclined relative to the top surface 100U of the substrate 100 (for example, forming a right angle with the top surface 100U of the substrate 100), but it will be understood that the straight side may be inclined relative to the top surface 100U of the substrate 100.

[0040] In some embodiments, two adjacent first conductive patterns 150 may be electrically connected to a single lower contact plug 120 through a single second conductive pattern 130, such as Figure 2A Therefore, two adjacent first conductive patterns 150 may be electrically connected to a single selection element SW.

[0041] In some embodiments, two adjacent second conductive patterns 130 may be respectively connected to opposite ends of respective single first conductive patterns 150. When viewed in a plan view, each of the second conductive patterns 130 may be disposed between the magnetic tunnel junction patterns MTJ, and each of the second conductive patterns 130 may connect (e.g., electrically connect) two adjacent first conductive patterns 150 to each other. The first conductive patterns 150 and the second conductive patterns 130 arranged in the first direction D1 may be connected to each other, thereby constituting a single conductive line SOL.

[0042] The respective second conductive patterns 130 may be respectively disposed on the top surface 120U of the lower contact plug 120. Each of the second conductive patterns 130 may have a ring shape when viewed in a plan view, and may be a hollow tube structure extending from the top surface 120U of each of the lower contact plugs 120 in the second direction D2. In some embodiments, each of the second conductive patterns 130 may have a tubular shape with a closed bottom. In this case, each of the second conductive patterns 130 may have a “U”-shaped cross-section when viewed in a cross-sectional view. The upper end of each of the second conductive patterns 130 may be connected to the bottom surface 150L of the first conductive pattern 150. As an example, the upper end of each of the second conductive patterns 130 may contact the bottom surface 150L of the first conductive pattern 150, as shown in FIG. Figure 2A The lower end of each of the second conductive patterns 130 may contact the top surface 120U of each of the lower contact plugs 120, as shown in FIG. Figure 2A shown.

[0043] Each of the second conductive patterns 130 may include a vertical portion VP extending in the second direction D2 from the top surface 120U of each of the lower contact plugs 120. In some embodiments, the vertical portion VP may have a ring shape when viewed in a plan view, such as Figure 1As shown. The upper end of the vertical portion VP of each of the second conductive patterns 130 may be connected to the bottom surface 150L of the first conductive pattern 150. As an example, the upper end of the vertical portion VP of each of the second conductive patterns 130 may contact the bottom surface 150L of the first conductive pattern 150. The lower end of the vertical portion VP of each of the second conductive patterns 130 may contact the top surface 120U of each of the lower contact plugs 120. The magnetic tunnel junction pattern MTJ may at least partially overlap with the vertical portions VP of a pair of second conductive patterns 130, as shown. Figure 1 and Figure 2A shown.

[0044] Reference Figure 2A In some embodiments, the vertical portion VP of the second conductive pattern 130 may contact the bottom surface 150L of the first conductive pattern 150 and may protrude away from the first conductive pattern 150 in the second direction D2 and toward the lower contact plug 120. The vertical portions VP of the second conductive pattern 130 may be spaced apart from each other in the first direction D1. It will be understood that the first conductive pattern 150 may be regarded as a horizontal portion of a single conductive line SOL, and the vertical portion VP of the second conductive pattern 130 may be regarded as a protruding portion of the single conductive line SOL.

[0045] In some embodiments, each of the second conductive patterns 130 may further include a horizontal portion HP extending from the vertical portion VP in a direction parallel to the top surface 100U of the substrate 100. The horizontal portion HP may extend along the top surface 120U of each of the lower contact plugs 120. In some embodiments, the horizontal portion HP of each of the second conductive patterns 130 may extend in the first direction D1 and a third direction D3 intersecting the first direction D1, such as Figure 1 The third direction D3 may be parallel to the top surface 100U of the substrate 100 . In some embodiments, the third direction D3 may be perpendicular to the first direction D1 . The horizontal portion HP of each of the second conductive patterns 130 may contact the top surface 120U of each of the lower contact plugs 120 .

[0046] The lower interlayer insulating layer 110 may extend into a region between the second conductive patterns 130. The lower interlayer insulating layer 110 may be interposed between two adjacent second conductive patterns 130, and may contact the bottom surface 150L of the first conductive pattern 150.

[0047] Still refer to Figure 2A, the insulating patterns 140 may be respectively disposed on the top surfaces 120U of the lower contact plugs 120. Each of the insulating patterns 140 may be configured to fill the inner space of a corresponding second conductive pattern 130. The vertical portion VP of each of the second conductive patterns 130 may be between each of the insulating patterns 140 and the lower interlayer insulating layer 110. In some embodiments, each of the second conductive patterns 130 may include a portion extending horizontally and between each of the insulating patterns 140 and the top surface 120U of each of the lower contact plugs 120. As an example, the horizontal portion HP of each of the second conductive patterns 130 may be between each of the insulating patterns 140 and the top surface 120U of each of the lower contact plugs 120. The top surface 140U of each of the insulating patterns 140 may be recessed toward the substrate 100. For example, the insulating pattern 140 may be formed of or include at least one of oxide, nitride, and / or oxynitride. For example, the insulating pattern 140 may include silicon oxide and / or silicon nitride.

[0048] Reference Figure 1 and Figure 2A , the vertical portion VP of the second conductive pattern 130 may include a first surface 130S_1 contacting the lower interlayer insulating layer 110 and a second surface 130S_2 opposite to the first surface 130S_1, and the second surface 130S_2 of the vertical portion VP of the second conductive pattern 130 may be recessed toward the lower interlayer insulating layer 110 in the first direction D1. The second surface 130S_2 of the vertical portion VP of the second conductive pattern 130 may be recessed toward the lower interlayer insulating layer 110 relative to the one side of the first conductive pattern 150.

[0049] The upper interlayer insulating layer 170 may be disposed on the lower interlayer insulating layer 110 to cover the magnetic tunnel junction pattern MTJ and the electrode pattern 160. The upper interlayer insulating layer 170 may cover the side surfaces of the magnetic tunnel junction pattern MTJ and the electrode pattern 160, and may cover the recessed top surface 140U of each of the insulating patterns 140. For example, the upper interlayer insulating layer 170 may be formed of or include at least one of oxide, nitride, and / or oxynitride.

[0050] Reference Figure 2A, the upper conductive line 200 may be disposed on the upper interlayer insulating layer 170. Each of the upper conductive lines 200 may be connected to the magnetic tunnel junction pattern MTJ, respectively. Each of the upper conductive lines 200 may be electrically connected to a corresponding magnetic tunnel junction pattern MTJ through a corresponding electrode pattern 160. In some embodiments, the upper conductive lines 200 may extend in the third direction D3 (e.g., extend longitudinally) and may be spaced apart from each other in the first direction D1. For example, the upper conductive line 200 may include at least one of a metal (e.g., copper) and a conductive metal nitride. The upper conductive line 200 may be used as a bit line of a magnetic memory device.

[0051] Reference Figure 2B and Figure 3 , one side of the vertical portion VP of the second conductive pattern 130 may be aligned with both one side of the first magnetic pattern MP1 and one side of the first conductive pattern 150, and the one side of the vertical portion VP of the second conductive pattern 130, the one side of the first magnetic pattern MP1, and the one side of the first conductive pattern 150 may form a straight side. Figure 2B It is shown that the straight side formed by the one side of the vertical portion VP of the second conductive pattern 130, the one side of the first magnetic pattern MP1 and the one side of the first conductive pattern 150 is not inclined relative to the top surface 100U of the substrate 100, but it will be understood that the straight side may be inclined relative to the top surface 100U of the substrate 100.

[0052] Figure 4 is a plan view illustrating a magnetic memory device according to some embodiments of the inventive concept. Figure 5A is along Figure 4 A cross-sectional view taken along line II' of Figure 5B is along Figure 4 A cross-sectional view taken along line II-II'. Figure 4 , Figure 5A and Figure 5B , the horizontal portions HP of the second conductive pattern 130 on a single lower contact plug 120 may be spaced apart from each other in the first direction D1 , and the top surface 120U of the lower contact plug 120 may be exposed.

[0053] The magnetic tunnel junction pattern MTJ may overlap the interface IF between the first conductive pattern 150 and the vertical portion VP of the second conductive pattern 130. In some embodiments, the magnetic tunnel junction pattern MTJ may overlap the entire interface IF between the first conductive pattern 150 and the vertical portion VP of the second conductive pattern 130, such as Figure 1 and Figure 4 shown.

[0054] Figure 6 is provided for describing an example of a conductive line SOL Figure 2AAn enlarged cross-sectional view of portion 'A'.

[0055] Reference Figure 2A and Figure 6 , each first conductive pattern 150 may be configured to apply a spin-orbit torque to the magnetic tunnel junction pattern MTJ, respectively. As an example, a current J may flow through a conductive line SOL including a first conductive pattern 150 and a second conductive pattern 130. The current J may refer to an in-plane current flowing through the first conductive pattern 150. The first conductive pattern 150 may be configured to exhibit a strong spin-orbit interaction. Due to the spin-orbit interaction in the first conductive pattern 150, the current J flowing through the first conductive pattern 150 may cause the accumulation of spin-polarized charge carriers (e.g., electrons) near the magnetic tunnel junction pattern MTJ. The accumulated charge carriers may generate a spin-orbit field. The spin-orbit field may be parallel to the top surface or the bottom surface of the first conductive pattern 150, so that it may have an in-plane direction, and may be perpendicular to the direction of the in-plane current J flowing through the first conductive pattern 150. For example, the in-plane current J in the first conductive pattern 150 may flow in a first direction D1, and the spin-orbit field may be parallel to a third direction D3. The spin-orbit field generated in the first conductive pattern 150 may be used to apply a spin-orbit torque to the magnetic tunnel junction patterns MTJ. Each of the magnetic tunnel junction patterns MTJ may be configured such that magnetization of a free layer thereof may be changed using the spin-orbit torque.

[0056] In some embodiments, for example, the first conductive pattern 150 may be formed of a heavy metal or a material including (e.g., doped with) a heavy metal or include a heavy metal. As an example, the first conductive pattern 150 may include at least one of an "A" element and an "M" element doped with a "B" element. Here, the "A" element may include yttrium (Y), zirconium (Zr), niobium (Nb), molybdenum (Mo), technetium (Tc), ruthenium (Ru), rhodium (Rh), palladium (Pd), cadmium (Cd), indium (In), antimony (Sb), tellurium (Te), hafnium (Hf), tantalum (Ta) (including high-resistance amorphous β-Ta), tungsten (W), rhenium (Re), osmium (Os), iridium (Ir), platinum (Pt), gold (Au), mercury (Hg), thallium (Tl), lead (Pb), bismuth (Bi), polonium (Po), astatine (At), and / or combinations thereof.

[0057] The “B” elements may include vanadium (V), chromium (Cr), manganese (Mn), iron (Fe), cobalt (Co), nickel (Ni), phosphorus (P), sulfur (S), zinc (Zn), gallium (Ga), germanium (Ge), arsenic (As), selenium (Se), yttrium (Y), zirconium (Zr), niobium (Nb), molybdenum (Mo), technetium (Tc), ruthenium (Ru), rhodium (Rh), palladium (Pd), silver (Ag), cadmium (Cd), indium (In), antimony (Sb), tellurium (Te), iodine (I), lutetium (Lu), hafnium (Hf) At least one of tantalum (Hf), tantalum (Ta), tungsten (W), rhenium (Re), osmium (Os), iridium (Ir), platinum (Pt), gold (Au), mercury (Hg), thallium (Tl), lead (Pb), bismuth (Bi), polonium (Po), astatine (At), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm) and ytterbium (Yb).

[0058] The "M" element may include at least one of aluminum (Al), titanium (Ti), vanadium (V), chromium (Cr), manganese (Mn), copper (Cu), zinc (Zn), silver (Ag), hafnium (Hf), tantalum (Ta), tungsten (W), rhenium (Re), platinum (Pt), gold (Au), mercury (Hg), lead (Pb), silicon (Si), gallium (Ga), gallium manganese (GaMn), and gallium arsenide (GaAs). As an example, the first conductive pattern 150 may include iridium-doped copper and / or bismuth-doped copper.

[0059] In some embodiments, the second conductive patterns 130 may include substantially the same material as the first conductive patterns 150. In some embodiments, the second conductive patterns 130 may include a different conductive material than the first conductive patterns 150. In some embodiments, each of the second conductive patterns 130 may be a non-magnetic layer.

[0060] Figure 7 is provided for describing an example of a conductive line SOL Figure 2A An enlarged cross-sectional view of portion 'A'.

[0061] Reference Figure 2A and Figure 7 , each of the first conductive patterns 150 according to some embodiments of the inventive concept may have a multi-layer structure. Each of the first conductive patterns 150 may include a lower pattern 150a between each of the magnetic tunnel junction patterns MTJ and the lower interlayer insulating layer 110 and an upper pattern 150b between each of the magnetic tunnel junction patterns MTJ and the lower pattern 150a. As an example, the lower pattern 150a may be a magnetic layer, and the upper pattern 150b may be a non-magnetic layer.

[0062] The first conductive pattern 150 may be configured to apply a spin-orbit torque to the magnetic tunnel junction pattern MTJ. The current J may flow through the conductive line SOL including the first conductive pattern 150 and the second conductive pattern 130. The current J may be an in-plane current flowing through the first conductive pattern 150. In some embodiments, the lower pattern 150a may include a magnetic layer and may have a magnetic moment polarized in a specific direction. The direction of the magnetic moment may be parallel to the top surface of the lower pattern 150a (i.e., it may be in the plane of the lower pattern 150a), may be perpendicular to the top surface of the lower pattern 150a (i.e., it may be perpendicular to the plane of the lower pattern 150a), or may be tilted relative to the normal of the top surface of the lower pattern 150a (i.e., it may be tilted relative to the direction perpendicular to the plane of the lower pattern 150a). The direction of the magnetic moment of the lower pattern 150a may be selected according to the direction of the easy (magnetization) axis of the free layer in each of the magnetic tunnel junction patterns MTJ.

[0063] A portion of the in-plane current J flowing through the first conductive pattern 150 may be spin polarized by the lower pattern 150a. As an example, the charge carriers (e.g., electrons) in the lower pattern 150a may be spin polarized according to the direction of the magnetic moment of the lower pattern 150a. The charge carriers (e.g., electrons) in the lower pattern 150a may be spin polarized along the direction of the magnetic moment of the lower pattern 150a. The spin-polarized charge carriers may flow from the lower pattern 150a to the upper pattern 150b, and may accumulate in the upper pattern 150b (e.g., a non-magnetic layer) near the magnetic tunnel junction pattern MTJ. Due to the accumulation of spin-polarized charge carriers, a spin-orbit torque may be applied to the magnetic tunnel junction pattern MTJ. Each of the magnetic tunnel junction patterns MTJ may be configured so that the magnetization of its free layer may be changed using the spin-orbit torque.

[0064] For example, the lower pattern 150a may include at least one of iron (Fe), cobalt (Co), and nickel (Ni), and may further include at least one of platinum (Pt), palladium (Pd), manganese (Mn), yttrium (Y), chromium (Cr), ruthenium (Ru), rhodium (Rh), tungsten (W), tantalum (Ta), boron (B), bismuth (Bi), iridium (Ir), lead (Pb), nitrogen (N), and oxygen (O). For example, the upper pattern 150b may include at least one of copper (Cu), silver (Ag), gold (Au), tantalum (Ta), tungsten (W), and nitrogen (N). The inventive concept is not limited to the above-listed materials for the lower pattern 150a and the upper pattern 150b, but may include various materials.

[0065] In some embodiments, the second conductive pattern 130 may include a different conductive material than the first conductive pattern 150. In some embodiments, the second conductive pattern 130 may have the same multi-layer structure as the first conductive pattern 150 and may include the same material as the first conductive pattern 150.

[0066] Figure 8 is provided to describe an example of a magnetic tunnel junction pattern MTJ Figure 2A an enlarged cross-sectional view of portion 'A', and Fig. 9 is provided to describe an example of a magnetic tunnel junction pattern MTJ Figure 2A An enlarged cross-sectional view of portion 'A'.

[0067] Reference Figure 8 and Fig. 9 , the first magnetic pattern MP1 may be disposed between each of the first conductive patterns 150 and the tunnel barrier pattern TBP, and the second magnetic pattern MP2 may be disposed between each of the electrode patterns 160 and the tunnel barrier pattern TBP. The second magnetic pattern MP2 may include a reference layer (i.e., a pinned layer) whose magnetization direction M2 is fixed to a specific direction, and the first magnetic pattern MP1 may include a free layer whose magnetization direction M1 may be changed to be parallel to or anti-parallel to the magnetization direction M2 of the reference layer. Figure 8 and Fig. 9 An example is shown in which the first magnetic pattern MP1 includes a free layer and the second magnetic pattern MP2 includes a reference layer, but the inventive concept is not limited thereto. Figure 8 and Fig. 9 Unlike shown, the first magnetic pattern MP1 may include a reference layer, and the second magnetic pattern MP2 may include a free layer.

[0068] As an example, Figure 8 As shown, the magnetization directions M1 and M2 may be substantially perpendicular to the interface between the tunnel barrier pattern TBP and the first magnetic pattern MP1. In this case, for example, each of the reference layer and the free layer may include a perpendicular magnetic material (eg, CoFeTb, CoFeGd, and CoFeDy), a magnetization layer having L1 0 At least one of a perpendicular magnetic material having a structure, a CoPt-based material having a hexagonal close-packed structure, and a perpendicular magnetic structure. For example, a material having L1 0 The vertical magnetic material of the structure may include L1 0 FePt, L1 0 FePd, L1 0 CoPd and L1 0 At least one of CoPt. The perpendicular magnetic structure may include magnetic layers and non-magnetic layers stacked alternately and repeatedly. For example, the perpendicular magnetic structure may include at least one of (Co / Pt)n, (CoFe / Pt)n, (CoFe / Pd)n, (Co / Pd)n, (Co / Ni)n, (CoNi / Pt)n, (CoCr / Pt)n, and (CoCr / Pd)n, and n represents the number of stacks. In some embodiments, the reference layer may be thicker than the free layer, or may be configured to have a greater anti-magnetic force than the free layer.

[0069] The magnetization directions M1 and M2 may be substantially parallel to the interface between the tunnel barrier pattern TBP and the first magnetic pattern MP1. Fig. 9 In this case, each of the reference layer and the free layer may include a ferromagnetic material. In some embodiments, the reference layer may also include an antiferromagnetic material, which may be used to fix the magnetization direction of the ferromagnetic material.

[0070] As reference Figure 2A , Figure 6 and Figure 7 As described above, the first conductive pattern 150 may be configured to apply a spin-orbit torque to the magnetic tunnel junction pattern MTJ. The magnetization of the free layer of each of the magnetic tunnel junction patterns MTJ may be changed using the spin-orbit torque. In some embodiments, a change operation (i.e., a write operation) on the magnetic tunnel junction pattern MTJ may be performed based on the spin-orbit torque. A read operation on the magnetic tunnel junction pattern MTJ may be performed by a method similar to that in a spin transfer torque memory (e.g., a spin transfer torque MRAM). As an example, a read current Jr may flow through each of the magnetic tunnel junction patterns MTJ and the second direction D2 in the vertical direction or the second direction D2. Figure 2A Each of the upper conductive lines 200. The resistance state of the magnetic tunnel junction pattern MTJ can be determined by sensing the read current Jr. For example, the read current Jr can be sensed to determine whether the magnetic tunnel junction pattern MTJ is in a high resistance state or a low resistance state.

[0071] FIG. 10A to FIG. 14A is a plan view illustrating a method of manufacturing a magnetic memory device according to some embodiments of the inventive concept. FIG. 10B to FIG. 14B Along FIG. 10A to FIG. 14A In the following description, reference is made to Figures 1 to 9 The elements described will be referred to by the same reference numerals, and for the sake of brevity, their description will not be repeated. For ease of illustration, the selection element SW is not shown in FIG. FIG. 10B to FIG. 14B Shown in.

[0072] Reference Fig. 10A and Fig. 10B , a lower interlayer insulating layer 110 may be formed on the substrate 100. The substrate 100 may include a semiconductor substrate, and in some embodiments, the substrate 100 may further include a selection element (eg, Figure 2ASW). The lower contact plug 120 may be formed in the lower interlayer insulating layer 110. In some embodiments, the formation of the lower contact plug 120 may include: forming a lower contact hole passing through the lower interlayer insulating layer 110 and forming the lower contact plugs 120 in the lower contact holes, respectively. In some embodiments, each of the lower contact plugs 120 may be connected to a terminal of a corresponding one of the selection elements SW. In some embodiments, a recessed region RR may be formed in the lower interlayer insulating layer 110 by recessing an upper portion of the lower contact plug 120. Each of the recessed regions RR may be formed to expose an inner surface (e.g., a side surface) of the lower interlayer insulating layer 110 and a top surface 120U of each of the lower contact plugs 120. In some embodiments, the formation of the recessed region RR may include: forming an interlayer insulating layer (not shown) on the lower interlayer insulating layer 110 to cover the lower contact plug 120; and patterning the interlayer insulating layer to form a recessed region RR in the interlayer insulating layer. In this case, each of the recessed regions RR may be formed to penetrate the interlayer insulating layer and expose the top surface 120U of each of the lower contact plugs 120 .

[0073] Reference Fig.11A and Fig. 11B , a second conductive layer 132 may be formed on the lower interlayer insulating layer 110 to partially fill each of the recessed regions RR. For example, the second conductive layer 132 may be formed to conformally cover the inner surface of the recessed region RR, such as Fig. 11B As shown. The second conductive layer 132 may cover the inner surface of the lower interlayer insulating layer 110 and the top surface 120U of each of the lower contact plugs 120 exposed through each of the recessed regions RR with a uniform thickness, and may extend to cover the top surface of the lower interlayer insulating layer 110. The insulating layer 142 may be formed on the second conductive layer 132 to fill the remaining empty space of each of the recessed regions RR. For example, the second conductive layer 132 and the insulating layer 142 may be formed by a sputtering process, a chemical vapor deposition process, or an atomic layer deposition process.

[0074] Reference Fig. 12A and Fig. 12B , a planarization process may be performed on the second conductive layer 132 and the insulating layer 142. In some embodiments, the planarization process may be performed to expose the top surface of the lower interlayer insulating layer 110. As a result of the planarization process, the second conductive layer 132 may be divided into respective second conductive patterns 130, and the insulating layer 142 may be divided into respective insulating patterns 140. Each of the second conductive patterns 130 and each of the insulating patterns 140 may be formed in each of the recessed regions RR, and may be sequentially stacked on the top surface 120U of each of the lower contact plugs 120.

[0075] As reference Figures 1 to 3, each of the second conductive patterns 130 may have a ring shape when viewed in a plan view, and in some embodiments, each of the second conductive patterns 130 may have a hollow tube structure extending from the top surface 120U of each of the lower contact plugs 120 in the second direction D2. In some embodiments, each of the second conductive patterns 130 may be formed into a tubular shape with a closed bottom. Each of the second conductive patterns 130 may have a "U"-shaped cross-section when viewed in a cross-sectional view. Each of the insulating patterns 140 may be formed to fill the inner space of a corresponding one of the second conductive patterns 130. In some embodiments, each of the insulating patterns 140 may be formed to fill the space defined by a corresponding one of the second conductive patterns 130. In some embodiments, Fig. 12B Unlike shown, after the planarization process, a portion of the second conductive layer 132 may remain on the top surface of the lower interlayer insulating layer 110 .

[0076] Reference Fig.13A and Fig. 13B , a first conductive layer 152 and a magnetic tunnel junction layer MTJL may be sequentially formed on the lower interlayer insulating layer 110. The first conductive layer 152 may be formed to cover the lower interlayer insulating layer 110, the second conductive pattern 130, and the insulating pattern 140. For example, the first conductive layer 152 may be formed by a sputtering process, a chemical vapor deposition process, or an atomic layer deposition process. The magnetic tunnel junction layer MTJL may include a first magnetic layer ML1, a tunnel barrier layer TBL, and a second magnetic layer ML2 stacked in sequence on the first conductive layer 152. Each of the first magnetic layer ML1 and the second magnetic layer ML2 may include at least one magnetic layer. For example, the tunnel barrier layer TBL may include at least one of magnesium oxide, titanium oxide, aluminum oxide, magnesium zinc oxide, and magnesium boron oxide. For example, each of the first magnetic layer ML1, the tunnel barrier layer TBL, and the second magnetic layer ML2 may be formed by a sputtering process or a chemical vapor deposition process.

[0077] A conductive mask pattern 165 may be formed on the magnetic tunnel junction layer MTJL. The conductive mask pattern 165 may be used to define the position and shape of the magnetic tunnel junction pattern MTJ to be described below. For example, the conductive mask pattern 165 may include at least one of a metal (e.g., Ta, W, Ru, and Ir) and a conductive metal nitride (e.g., TiN).

[0078] Reference Fig.14A and Fig. 14B, the magnetic tunnel junction layer MTJL and the first conductive layer 152 may be sequentially etched to form a magnetic tunnel junction pattern MTJ and a first conductive pattern 150. Each of the first conductive patterns 150 may be arranged on a corresponding adjacent pair of second conductive patterns 130 and connected to the corresponding adjacent pair of second conductive patterns 130. Each of the second conductive patterns 130 may be arranged under a corresponding adjacent pair of first conductive patterns 150 and connected to the corresponding adjacent pair of first conductive patterns 150. An upper end of each of the second conductive patterns 130 may contact a bottom surface 150L of the first conductive pattern 150. The first conductive patterns 150 and the second conductive patterns 130 arranged in the first direction D1 may be connected to each other, thereby constituting a conductive line SOL.

[0079] Each of the magnetic tunnel junction patterns MTJ may include a first magnetic pattern MP1, a tunnel barrier pattern TBP, and a second magnetic pattern MP2 sequentially stacked on each of the first conductive patterns 150. The first magnetic pattern MP1 and the second magnetic pattern MP2 may be spaced apart from each other with the tunnel barrier pattern TBP interposed therebetween.

[0080] For example, the magnetic tunnel junction layer MTJL and the first conductive layer 152 may be etched by an ion beam etching process. The ion beam etching process may include irradiating an ion beam IB onto the substrate 100. The ion beam IB may be irradiated onto the substrate 100 in a direction inclined relative to the top surface 100U. The ion beam IB may include ions of an inert gas (e.g., positive ion argon atoms (Ar+)). During the ion beam etching process, the substrate 100 may rotate around a rotation axis in the normal direction of the top surface 100U of the substrate 100. The conductive mask pattern 165 may be used as an etching mask during the ion beam etching process, and after the ion beam etching process, some portions of the conductive mask pattern 165 may be retained on the magnetic tunnel junction pattern MTJ, respectively. The retained portions of the conductive mask pattern 165 may be used as the electrode pattern 160.

[0081] In some embodiments, since the magnetic tunnel junction pattern MTJ and the first conductive pattern 150 may be formed by performing an ion beam etching process, one side of the magnetic tunnel junction pattern MTJ (e.g., one side of the first magnetic pattern MP1) and one side of the first conductive pattern 150 may be aligned and may form a straight side, such as Fig. 14B In some embodiments, the side of the first magnetic pattern MP1 (eg, the side of the free layer of the first magnetic pattern MP1) and the side of the first conductive pattern 150 may be coplanar. Fig. 14B The straight side formed by the one side of the magnetic tunnel junction pattern MTJ and the one side of the first conductive pattern 150 is shown not tilted relative to the top surface 100U of the substrate 100 , but it will be understood that the straight side may be tilted relative to the top surface 100U of the substrate 100 .

[0082] The upper portion of each of the insulating patterns 140 may be recessed by an ion beam etching process. In some embodiments, the top surface 140U of each of the insulating patterns 140 may be recessed toward the substrate 100, such as Fig. 14B shown.

[0083] It will be appreciated that if the entire conductive line provided to apply a spin-orbit torque to the adjacent magnetic tunnel junction pattern MTJ is formed to have a line shape extending parallel to the top surface 100U of the substrate 100, a portion of the conductive line located between the magnetic tunnel junction patterns MTJ may be etched during the ion beam etching process of forming the magnetic tunnel junction pattern MTJ. It will also be appreciated that the ion beam etching process may over-etch the conductive line so that the conductive line may be separated into multiple segments and thus may not be electrically connected to the underlying conductive element (e.g., Figure 2A The lower contact plug 120 in FIG.

[0084] According to some embodiments of the present inventive concept, the conductive line SOL may include a first conductive pattern 150 and a second conductive pattern 130. The respective first conductive patterns 150 may be respectively disposed below the magnetic tunnel junction pattern MTJ, and the second conductive patterns 130 may be disposed on both sides of each of the magnetic tunnel junction patterns MTJ. Each of the second conductive patterns 130 may be formed to have a hollow tube shape extending in the second direction D2, and the respective insulating patterns 140 may be formed to fill the inner spaces of the second conductive patterns 130, respectively. In this case, the upper portion of each of the insulating patterns 140 may be recessed during an ion beam etching process for forming the magnetic tunnel junction pattern MTJ. However, the vertical portion of the second conductive pattern 130 may not be etched by the ion beam etching process, and the second conductive pattern 130 may be connected to the conductive element below (e.g., Figure 2A Thus, during the process of manufacturing the magnetic memory device, the number or density of defects that may be formed in the conductive line SOL may be reduced.

[0085] Return to reference Figure 1 2, an upper interlayer insulating layer 170 may be formed on the lower interlayer insulating layer 110 to cover the magnetic tunnel junction pattern MTJ and the electrode pattern 160. The upper interlayer insulating layer 170 may cover the side surfaces of the magnetic tunnel junction pattern MTJ and the electrode pattern 160, and may cover the recessed top surface 140U of each of the insulating patterns 140. The upper conductive line 200 may be formed on the upper interlayer insulating layer 170. Each of the upper conductive lines 200 may be electrically connected to a corresponding one of the magnetic tunnel junction patterns MTJ through a corresponding one of the electrode patterns 160.

[0086] In some embodiments, Fig. 14BThe ion beam etching process shown may etch the horizontal portion HP of the second conductive pattern 130 between adjacent magnetic tunnel junction patterns MTJ until the lower contact plug 120 is exposed, thereby forming Figure 4 , Figure 5A and Figure 5B The structure shown.

[0087] Fig.15 is a diagram showing some embodiments of the present invention. Figure 1 A cross-sectional view of the magnetic memory device taken along line II'. Fig.16 is a diagram showing some embodiments of the present invention. Fig.15 A perspective view of a portion of a magnetic memory device is shown. In the following description, the previous reference Figures 1 to 9 The described elements will be referred to by the same reference numerals, and the description will not be repeated for the sake of brevity.

[0088] Reference Figure 1 , Fig.15 and Fig.16 , the first conductive patterns 150 and the second conductive patterns 130 may be alternately arranged in the first direction D1 and may be connected to each other, thereby constituting a conductive line SOL. The respective second conductive patterns 130 may be respectively disposed on the top surface 120U of the lower contact plug 120. Each of the second conductive patterns 130 may have a ring shape when viewed in a plan view, and may be a hollow tube structure extending from the top surface 120U of each of the lower contact plugs 120 in the second direction D2. In some embodiments, each of the second conductive patterns 130 may be provided in a tubular shape having an open bottom, such as Fig.16 As shown. The upper end of each of the second conductive patterns 130 may be connected to the bottom surface 150L of the first conductive pattern 150. As an example, the upper end of each of the second conductive patterns 130 may contact the bottom surface 150L of the first conductive pattern 150. The lower end of each of the second conductive patterns 130 may contact the top surface 120U of each of the lower contact plugs 120.

[0089] Each of the second conductive patterns 130 may include a vertical portion VP extending from the top surface 120U of each of the lower contact plugs 120 in the second direction D2. The vertical portion VP of the second conductive pattern 130 may have a ring shape when viewed in a plan view. The upper end of the vertical portion VP of each of the second conductive patterns 130 may be connected to the bottom surface 150L of the first conductive pattern 150. As an example, the upper end of the vertical portion VP of each of the second conductive patterns 130 may contact the bottom surface 150L of the first conductive pattern 150. The lower end of the vertical portion VP of each of the second conductive patterns 130 may contact the top surface 120U of each of the lower contact plugs 120.

[0090] The respective insulating patterns 140 may be respectively disposed on the top surface 120U of the lower contact plug 120. Each of the insulating patterns 140 may be configured to fill the inner space of a corresponding one of the second conductive patterns 130. In some embodiments, each of the insulating patterns 140 may contact the top surface 120U of each of the lower contact plugs 120, such as Fig.15 The vertical portion VP of each of the second conductive patterns 130 may be interposed between each of the insulating patterns 140 and the lower interlayer insulating layer 110 . A top surface 140U of each of the insulating patterns 140 may be recessed toward the substrate 100 .

[0091] In addition to the above differences, Fig.15 and Fig.16 The magnetic memory device shown can be used in conjunction with the previously described Figures 1 to 9 The described magnetic memory devices have substantially the same features.

[0092] FIG. 17A to FIG. 19A is a plan view illustrating a method of manufacturing a magnetic memory device according to some embodiments of the inventive concept. FIG. 17B to FIG. 19B Along FIG. 17A to FIG. 19A In the following description, the previous reference FIG. 10A to FIG. 14A and FIG. 10B to FIG. 14B The described elements will be referred to by the same reference numerals, and the description will not be repeated for the sake of brevity.

[0093] As reference Fig. 10A and Fig. 10B As described above, the lower interlayer insulating layer 110 may be formed on the substrate 100, and the lower contact plugs 120 may be formed in the lower interlayer insulating layer 110. A recessed region RR may be formed in the lower interlayer insulating layer 110 to expose the top surface 120U of each of the lower contact plugs 120. Fig.11A and Fig. 11B As described above, the second conductive layer 132 may be formed on the lower interlayer insulating layer 110 to partially fill each of the recessed regions RR. For example, the second conductive layer 132 may be formed to conformally cover the inner surface of the recessed region RR.

[0094] Reference Fig.17A and Fig. 17B , an etching process (e.g., an anisotropic etching process) may be performed on the second conductive layer 132 to form the second conductive pattern 130. The etching process may be performed to expose the top surface 120U of each of the lower contact plugs 120 and the top surface of the lower interlayer insulating layer 110. The respective second conductive patterns 130 may be formed in the recessed regions RR, respectively. In some embodiments, each of the second conductive patterns 130 may be partially (e.g., selectively) formed on the inner side surface of each of the recessed regions RR, such as Fig. 17B As shown. Figure 1 , Fig.15 and Fig.16 , each of the second conductive patterns 130 may have a ring shape when viewed in a plan view, and may be a hollow tube structure extending from the top surface 120U of each of the lower contact plugs 120 in the second direction D2. Each of the second conductive patterns 130 may be formed in a tube shape with an open bottom. After forming the second conductive patterns 130, an insulating layer 142 may be formed on the lower interlayer insulating layer 110. The insulating layer 142 may be formed to fill the remaining empty space of each of the recessed regions RR and contact the top surface 120U of the lower contact plug 120.

[0095] Reference Fig.18A and Fig.18B , a planarization process may be performed on the insulating layer 142. The planarization process may be performed to expose the top surface of the lower interlayer insulating layer 110. As a result of the planarization process, the insulating layer 142 may be divided into respective insulating patterns 140. Each of the insulating patterns 140 may be partially (e.g., selectively) formed in each of the recessed regions RR and may contact the top surface 120U of each of the lower contact plugs 120. Each of the insulating patterns 140 may be formed to fill the inner space of a corresponding one of the second conductive patterns 130.

[0096] A first conductive layer 152 and a magnetic tunnel junction layer MTJL may be sequentially formed on the lower interlayer insulating layer 110. The first conductive layer 152 may be formed to cover the lower interlayer insulating layer 110, the second conductive pattern 130, and the insulating pattern 140. A conductive mask pattern 165 may be formed on the magnetic tunnel junction layer MTJL.

[0097] Reference Fig.19A and Fig.19B , the magnetic tunnel junction layer MTJL and the first conductive layer 152 may be sequentially etched to form a magnetic tunnel junction pattern MTJ and a first conductive pattern 150. Each of the first conductive patterns 150 may be arranged on a corresponding adjacent pair of second conductive patterns 130 and may be connected to the corresponding adjacent pair of second conductive patterns 130. Each of the second conductive patterns 130 may be arranged below a corresponding adjacent pair of first conductive patterns 150 and may be connected to the corresponding adjacent pair of first conductive patterns 150. An upper end of each of the second conductive patterns 130 may contact a bottom surface 150L of the first conductive pattern 150. The first conductive patterns 150 and the second conductive patterns 130 arranged in the first direction D1 may be connected to each other, thereby constituting a conductive line SOL.

[0098] For example, the magnetic tunnel junction layer MTJL and the first conductive layer 152 may be etched by an ion beam etching process, and the ion beam etching process may be performed to irradiate the ion beam IB onto the substrate 100. The conductive mask pattern 165 may be used as an etching mask during the ion beam etching process, and some portions of the conductive mask pattern 165 may remain on the magnetic tunnel junction pattern MTJ after the ion beam etching process, respectively. The remaining portions of the conductive mask pattern 165 may be used as the electrode pattern 160.

[0099] An upper portion of each of the insulating patterns 140 may be recessed by an ion beam etching process. For example, a top surface 140U of each of the insulating patterns 140 may be recessed toward the substrate 100 .

[0100] Can follow and refer to FIG. 10A to FIG. 14A and FIG. 10B to FIG. 14B Subsequent processes are performed in substantially the same manner as in the described method.

[0101] According to some embodiments of the present inventive concept, the conductive line SOL may be disposed under the magnetic tunnel junction pattern MTJ and may be configured to apply a spin-orbit torque to the magnetic tunnel junction pattern MTJ (e.g., the free layer of the magnetic tunnel junction pattern MTJ). The conductive line SOL may include a first conductive pattern 150 disposed under each magnetic tunnel junction pattern MTJ and a second conductive pattern 130 disposed on both sides of each of the magnetic tunnel junction patterns MTJ. Each of the second conductive patterns 130 may have a hollow tube shape extending in the normal direction of the top surface 100U of the substrate 100, and the insulating pattern 140 may be provided to fill the inner space of the second conductive pattern 130, respectively. In this case, the vertical portion VP of the conductive pattern 130 may not be completely etched during the ion beam etching process for forming the magnetic tunnel junction pattern MTJ. Therefore, the number or density of defects that may be formed in the conductive line SOL during the process of manufacturing the magnetic memory device may be reduced.

[0102] According to some embodiments of the present invention, defects in a conductive line disposed under a magnetic tunnel junction pattern to apply a spin-orbit torque to the magnetic tunnel junction pattern can be reduced. In addition, difficulties in forming the conductive line can be reduced. That is, a magnetic memory device with reduced defect density can be easily manufactured by a method according to some embodiments of the present invention.

[0103] Although some exemplary embodiments of the inventive concept have been shown and described, one of ordinary skill in the art will appreciate that various modifications in form and detail may be made thereto without departing from the spirit and scope defined by the appended claims. Therefore, the subject matter disclosed above should be understood to be illustrative rather than restrictive, and the appended claims are intended to cover all such modifications, improvements, and other embodiments that fall within the substantial spirit and scope of the inventive concept. Therefore, to the maximum extent permitted by law, the scope of the inventive concept is determined by the broadest interpretation permitted by the appended claims and their equivalents, and the scope should not be limited or restricted by the above specific embodiments.

Claims

1. A magnetic random access memory device, comprising: A magnetic tunnel junction including a free layer and a pinned layer stacked in sequence in a vertical direction; as well as A conductive layer adjacent to the free layer of the magnetic tunnel junction, wherein the conductive layer comprises: horizontal part; and a first protruding portion and a second protruding portion which protrude away from the horizontal portion and are spaced apart from each other in a horizontal direction perpendicular to the vertical direction, wherein one side of the free layer and one side of the horizontal portion form a straight side, wherein the first protruding portion includes a first side facing the second protruding portion and a second side opposite to the first side of the first protruding portion, and Wherein, in a plan view, the second side of the first protruding portion is recessed toward the second protruding portion relative to the one side of the horizontal portion.

2. The magnetic random access memory device according to claim 1, wherein: The horizontal portion is configured to apply a spin-orbit torque to the free layer when a current flows from the first protruding portion to the second protruding portion in the horizontal direction.

3. The magnetic random access memory device according to claim 1, wherein: The horizontal portion includes a different material from the first and second protruding portions.

4. The magnetic random access memory device according to claim 1, wherein: The magnetic tunnel junction overlaps the first protruding portion and the second protruding portion.

5. The magnetic random access memory device according to claim 1 , further comprising a first conductive contact and a second conductive contact spaced apart from each other in the horizontal direction and connected to the first protruding portion and the second protruding portion, respectively, in, The conductive layer is located between the magnetic tunnel junction and the first and second conductive contacts.

6. A magnetic random access memory device comprising: A magnetic tunnel junction including a free layer and a pinned layer stacked in sequence in a vertical direction; as well as A conductive layer adjacent to the free layer of the magnetic tunnel junction, wherein the conductive layer comprises: a horizontal portion including a first surface facing the magnetic tunnel junction and a second surface opposite to the first surface; and a first protruding portion and a second protruding portion which protrude away from the second surface of the horizontal portion and are spaced apart from each other in a horizontal direction perpendicular to the vertical direction, wherein the first protruding portion includes a first side facing the second protruding portion and a second side opposite to the first side of the first protruding portion, and Wherein, in a plan view, a second side of the first protruding portion is recessed toward the second protruding portion relative to one side of the horizontal portion.

7. The magnetic random access memory device according to claim 6, wherein: One side of the free layer of the magnetic tunnel junction is aligned with the one side of the horizontal portion of the conductive layer.

8. The magnetic random access memory device according to claim 7, wherein: A portion of the second side of the first protruding portion is aligned with the one side of the free layer of the magnetic tunnel junction and the one side of the horizontal portion of the conductive layer.

9. The magnetic random access memory device according to claim 6, wherein: The free layer is between the horizontal portion of the conductive layer and the pinned layer.

10. The magnetic random access memory device according to claim 6, wherein: The second protruding portion includes a first side facing the first protruding portion and a second side opposite to the first side of the second protruding portion, wherein the one side of the horizontal portion includes a first side, and the horizontal portion further includes a second side opposite to the first side of the horizontal portion, and Wherein, in a plan view, the second side of the second protruding portion is recessed toward the first protruding portion relative to the second side of the horizontal portion.

11. The magnetic random access memory device according to claim 6, wherein: The magnetic tunnel junction overlaps an entire interface between the horizontal portion and the first protruding portion.

12. The magnetic random access memory device of claim 6, further comprising a first conductive contact and a second conductive contact spaced apart from each other in the horizontal direction and spaced apart from the horizontal portion of the conductive layer in the vertical direction, in, The first protruding portion electrically connects the first conductive contact to the horizontal portion, and the second protruding portion electrically connects the second conductive contact to the horizontal portion.

13. The magnetic random access memory device according to claim 12, wherein: The magnetic tunnel junction includes a first magnetic tunnel junction, and the conductive layer includes a first conductive layer, and Wherein, the magnetic random access memory device further comprises: a second magnetic tunnel junction spaced apart from the first magnetic tunnel junction in the horizontal direction; and a second conductive layer adjacent to the second magnetic tunnel junction, Wherein, the first conductive contact is electrically connected to the first conductive layer and the second conductive layer.

14. A magnetic random access memory device comprising: A magnetic tunnel junction including a free layer and a pinned layer stacked in sequence in a vertical direction; as well as A conductive layer adjacent to the free layer of the magnetic tunnel junction, wherein the conductive layer comprises: a horizontal portion including a first surface facing the magnetic tunnel junction and a second surface opposite to the first surface; and a first protruding portion and a second protruding portion which protrude away from the second surface of the horizontal portion and are spaced apart from each other in a horizontal direction perpendicular to the vertical direction, The magnetic tunnel junction overlaps an interface between the horizontal portion and the first protruding portion.

15. The magnetic random access memory device according to claim 14, wherein: The magnetic tunnel junction overlaps an entire interface between the horizontal portion and the first protruding portion.

16. The magnetic random access memory device according to claim 14, wherein: One side of the free layer and one side of the horizontal portion are coplanar.

17. The magnetic random access memory device according to claim 16, wherein: The first protruding portion includes a first side facing the second protruding portion and a second side opposite to the first side of the first protruding portion, and Wherein, in a plan view, the second side of the first protruding portion is recessed toward the second protruding portion relative to the one side of the horizontal portion.

18. The magnetic random access memory device according to claim 14, wherein: The horizontal portion is configured to apply a spin-orbit torque to the free layer when a current flows from the first protruding portion to the second protruding portion in the horizontal direction.

19. The magnetic random access memory device according to claim 14, wherein: The magnetic tunnel junction overlaps an interface between the horizontal portion of the conductive layer and the second protruding portion.

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