Operational Amplifier Testing System and Method

Abstract

The present invention relates to an operational amplifier test system and method. The operational amplifier test system includes an operational amplifier under test, an auxiliary test loop, a first capacitor sampling unit, a second capacitor sampling unit, and a calculation unit. The auxiliary test loop is used to sample and record the time coordinates of sampling points and the output voltage of the operational amplifier under test during the test phase; the first capacitor sampling unit is used to receive a low-level voltage signal and a common-mode voltage signal and provide them to the inverting input terminal of the operational amplifier under test; the first input terminal of the second capacitor sampling unit of the second capacitor sampling unit is grounded, and the second capacitor sampling unit is used to receive a low-level voltage signal and a common-mode voltage signal and provide them to the non-inverting input terminal of the operational amplifier under test; the calculation unit is used to receive the output voltage of the operational amplifier under test and calculate the bias current of the operational amplifier under test based on the time coordinates of multiple sampling points and the output voltage of the operational amplifier under test.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor integrated circuit testing, and particularly to an operational amplifier testing system and method. Background Art

[0002] With the continuous development of semiconductor technology, as an electronic component with very wide applications, the performance of operational amplifiers is also gradually improving. Nowadays, the application of high-precision operational amplifiers with an offset voltage as low as a few μV level or a bias current as low as a few pA level is becoming more and more common. Therefore, higher requirements are also placed on the accuracy and precision of operational amplifier testing.

[0003] Currently, the testing of the bias current of operational amplifiers is generally completed based on the common method of resistor sampling. By measuring the change in the output voltage of the auxiliary operational amplifier, the voltage drop across the sampling resistor is calculated, and then the magnitude of the current flowing through the sampling resistor is calculated. This method can obtain good test results when testing the bias current of most operational amplifier products. For the testing of pA-level bias current operational amplifier devices, in order to make the voltage drop across the sampling resistor easier to measure, a relatively large sampling resistor (about several megohms) is often required. However, introducing an overly large sampling resistor at the input end of the operational amplifier under test will make the entire test loop more susceptible to noise, thereby resulting in inaccurate final test results. Summary of the Invention

[0004] Based on this, in view of the problem that the current operational amplifier testing system cannot accurately measure pA-level bias current, it is necessary to provide an operational amplifier testing system and method.

[0005] The present invention provides an operational amplifier testing system, including:

[0006] An operational amplifier to be tested;

[0007] A first capacitor sampling unit, the first input end of the first capacitor sampling unit is grounded, the second input end of the first capacitor sampling unit is electrically connected to the inverting input end of the operational amplifier to be tested, and the output end of the first capacitor sampling unit is electrically connected to the inverting input end of the operational amplifier to be tested, and is used to receive a low-level voltage signal and a common-mode voltage signal and provide them to the inverting input end of the operational amplifier to be tested;

[0008] A second capacitor sampling unit, the first input end of the second capacitor sampling unit is grounded, the second input end of the second capacitor sampling unit is electrically connected to the non-inverting input end of the operational amplifier to be tested, and the output end of the second capacitor sampling unit is electrically connected to the non-inverting input end of the operational amplifier to be tested, and is used to receive the low-level voltage signal and the common-mode voltage signal and provide them to the non-inverting input end of the operational amplifier to be tested;

[0009] An auxiliary test loop, electrically connected to the operational amplifier under test, is configured to sample and record the time coordinates of the sampling points and the output voltage of the operational amplifier under test during the test phase when the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or when the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test, and after a preset delay time; and

[0010] A calculation unit, electrically connected to the auxiliary test loop, is configured to receive the output voltage of the operational amplifier under test and calculate the bias current of the operational amplifier under test based on the time coordinates of multiple sampling points and the output voltage of the operational amplifier under test.

[0011] In one embodiment, the auxiliary test loop is further configured to periodically detect the output voltage of the operational amplifier under test and continue for a preset duration after the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or after the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test before the test;

[0012] The calculation unit is further configured to determine the preset delay time based on the output voltages of the operational amplifier under test detected within the preset time.

[0013] In one embodiment, the calculation unit configured to determine the preset delay time based on the output voltages of the operational amplifier under test detected within the preset time is specifically configured to:

[0014] Calculate the termination time t e and the start time t s respectively corresponding to the output voltages of the operational amplifier under test, and calculate the slope G0 of the output voltage between the time of t e and the time of t s , where t s =t e -Δt, and Δt is the period of detecting the output voltage of the operational amplifier under test;

[0015] Let t e =t e -Δt, t s =t s -Δt, and calculate the slope G e of the output voltage between the time of t s -Δt and the time of t e -Δt according to the output voltages of the operational amplifier under test corresponding to the time of t s -Δt and the time of t t ;

[0016] Determine G t Whether the absolute value of the difference from G0 is greater than the maximum allowable error E of the slope;

[0017] If so, calculate the termination time t according to the slope e Determine the preset delay time t delay = t e + 2Δt + t offset , where t offset Is the set additional delay;

[0018] Otherwise, let E = G0 - G t , G0 = G t , t e = t e -Δt, t s = t s -Δt, according to the output voltages of the operational amplifier under test corresponding to the t e -Δt moment and the t s -Δt moment respectively, calculate the slope G of the output voltage between the t e -Δt moment and the t s -Δt moment, and return to the step of determining whether the absolute value of the difference between G t and G0 is greater than the maximum allowable error E of the slope. t

[0019] In one embodiment, the first capacitor sampling unit includes:

[0020] A first resistor, with its first end grounded and its second end electrically connected to the output end of the auxiliary test loop;

[0021] A first sampling capacitor, with its first end electrically connected to the second end of the first resistor and the output end of the auxiliary test loop, and its second end electrically connected to the inverting input end of the operational amplifier under test; and

[0022] A first switch, connected in parallel across the two ends of the first sampling capacitor.

[0023] In one embodiment, the second capacitor sampling unit includes:

[0024] A second resistor, with its first end electrically connected to the first end of the first resistor and its second end grounded through a feedback resistor;

[0025] A second sampling capacitor, with its first end electrically connected to the second end of the second resistor and its second end electrically connected to the non-inverting input end of the operational amplifier under test; and

[0026] A second switch, connected in parallel across the two ends of the second sampling capacitor.

[0027] ​In one embodiment, the auxiliary test loop includes:

[0028] An auxiliary operational amplifier, with a third resistor and a third switch connected in series in sequence between the non-inverting input terminal of the auxiliary operational amplifier and the output terminal of the operational amplifier under test. The inverting input terminal of the auxiliary operational amplifier is grounded, and the output terminal of the auxiliary operational amplifier is electrically connected to the second terminal of the first resistor and the first terminal of the first sampling capacitor through another feedback resistor;

[0029] A VI source, whose input terminal is electrically connected to the output terminal of the auxiliary operational amplifier, and whose output terminal is electrically connected to the input terminal of the calculation unit, for periodically sampling and recording the sampling time and the output voltage at the sampling point, and providing them to the calculation unit.

[0030] In one embodiment, the VI source for periodically sampling and recording the time coordinate of the sampling point and the output voltage of the operational amplifier under test is specifically configured to:

[0031] Determine the sampling points according to the sampling frequency;

[0032] Sample the voltages of four power frequency cycles on both sides of the sampling point and use their average value as the output voltage of the operational amplifier under test corresponding to the sampling point;

[0033] Record the time coordinate of the sampling point and the output voltage of the operational amplifier under test.

[0034] Based on the same inventive concept, the present invention also provides an operational amplifier test, including:

[0035] Power on the operational amplifier test system;

[0036] In the test stage, when the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or when the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test, and after a preset delay time, sample and record the time coordinate of the sampling point and the output voltage of the operational amplifier under test;

[0037] Calculate the bias current of the operational amplifier under test according to the time coordinates of multiple sampling points and the output voltage of the operational amplifier under test.

[0038] In one embodiment, the operational amplifier test method further includes:

[0039] Before testing, after the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or after the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test, the output voltage of the operational amplifier under test is periodically detected and lasts for a preset duration;

[0040] Determine the preset delay time according to the output voltages of multiple operational amplifiers under test detected within the preset time.

[0041] In one embodiment, the determining the preset delay time according to the output voltages of multiple operational amplifiers under test detected within the preset time includes:

[0042] Calculate the termination time t e and the start time t s corresponding to the output voltages of the operational amplifier under test respectively, and calculate the slope G0 of the output voltage between the time t e and the time t s , where t s =t e -Δt, and Δt is the period of detecting the output voltage of the operational amplifier under test;

[0043] Let t e =t e -Δt, t s =t s -Δt, and calculate the slope G e of the output voltage between the time t s -Δt and the time t e -Δt according to the output voltages of the operational amplifier under test corresponding to the time t s -Δt and the time t t ;

[0044] Judge whether the absolute value of the difference between t t and G0 is greater than the maximum allowable slope error E;

[0045] If so, calculate the termination time t e to determine the preset delay time t delay =t e +2Δt+t offset , where t offset is the set additional delay;

[0046] Otherwise, let E = G0 - G t , G0 = G t , t e =t e -Δt, t s =t s-Δt, according to t e -The time of -Δt and t s -Calculate t based on the output voltages of the operational amplifier under test corresponding to the time of -Δt and t respectively e -The time of -Δt and t s -The slope G of the output voltage between the time of -Δt and t t , and return to the step of judging whether the absolute value of the difference between G and G0 is greater than the maximum allowable slope error E t

[0047] In one embodiment, the operational amplifier testing method further includes:

[0048] Detect the output voltages of multiple operational amplifiers under test within the preset time. Before determining the preset delay time, set the initial preset delay time t delay = 0;

[0049] Judge whether the preset delay time t delay is 0;

[0050] If so, let t delay = T max , and after the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or after the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test, periodically detect the output voltage of the operational amplifier under test, where T max is the maximum allowable preset delay time;

[0051] Otherwise, enter the test stage.

[0052] ​In summary, an embodiment of the present invention provides an operational amplifier testing system and method. Among them, the operational amplifier testing system includes an operational amplifier to be tested, an auxiliary test loop, a first capacitance sampling unit, a second capacitance sampling unit and a calculation unit. First capacitance sampling unit: The first input end of the first capacitance sampling unit is grounded, the second input end of the first capacitance sampling unit is electrically connected to the inverting input end of the operational amplifier to be tested, and the output end of the first capacitance sampling unit is electrically connected to the inverting input end of the operational amplifier to be tested, for receiving low-level voltage signals and common-mode voltage signals, and providing them to the inverting input end of the operational amplifier to be tested; Second capacitance sampling unit: The first input end of the second capacitance sampling unit is grounded, the second input end of the second capacitance sampling unit is electrically connected to the non-inverting input end of the operational amplifier to be tested, and the output end of the second capacitance sampling unit is electrically connected to the non-inverting input end of the operational amplifier to be tested, for receiving the low-level voltage signal and the common-mode voltage signal, and provided to the in-phase input terminal of the operational amplifier to be tested; an auxiliary test loop, electrically connected to the operational amplifier to be tested, used in the test phase, when the sampling capacitor in the first capacitor sampling unit is connected to the in-phase input terminal of the operational amplifier to be tested, or when the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier to be tested, and after a preset delay time, to sample and record the time coordinates of the sampling point and the output voltage of the operational amplifier to be tested; a calculation unit is electrically connected to the auxiliary test loop, used to receive the output voltage of the operational amplifier to be tested, and calculate the bias current of the operational amplifier to be tested based on the time coordinates of the multiple sampling points and the output voltage of the operational amplifier to be tested. It can be understood that after the sampling capacitor is connected to the input terminal of the operational amplifier to be tested, the bias current of the operational amplifier to be tested will continuously charge the sampling capacitor, according to the formula The magnitude of the bias current can be obtained by calculating the slope of the sampling capacitor voltage change. The change in voltage across the capacitor can be measured at the output voltage Vm of the auxiliary test loop. The change in Vm divided by the gain of the auxiliary op amp loop is the change in voltage across the sampling capacitor, thus avoiding the problem of noise in the op amp circuit caused by the introduction of an excessively large sampling resistor, and improving the test accuracy of the bias current. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 A schematic diagram of the structure of an operational amplifier test system provided by an embodiment of the present invention;

[0054] Figure 2 is a schematic diagram of an exemplary operational amplifier test circuit for testing bias current using a sampling resistor;

[0055] Figure 3 A schematic diagram of a programming interface provided by the present invention;

[0056] Figure 4 The waveform of the output voltage of the amplifier under test measured after adding a certain time delay provided by the present invention;

[0057] Figure 5 The test waveform of the bias current of LMC6001 provided by the present invention;

[0058] Figure 6 The test waveform of the bias current of OP37G provided by the present invention;

[0059] Figure 7 A schematic diagram of an output voltage sampling method provided by an embodiment of the present invention;

[0060] Figure 8 A schematic flowchart of an operational amplifier test method provided by an embodiment of the present invention;

[0061] Figure 9 A schematic flowchart of another operational amplifier test method provided by an embodiment of the present invention. Detailed implementation manners

[0062] To make the above objects, features and advantages of the present invention more obvious and understandable, the following describes the detailed implementation manners of the present invention with reference to the accompanying drawings. Many specific details are set forth in the following description in order to fully understand the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present invention. Therefore, the present invention is not limited by the specific implementations disclosed below.

[0063] Please refer to Figure 1 , an embodiment of the present invention provides an operational amplifier test system, including an operational amplifier under test DUT, an auxiliary test loop 100, a first capacitor sampling unit 200, a second capacitor sampling unit 300, and a calculation unit 400.

[0064] The auxiliary test loop 100 is electrically connected to the operational amplifier under test DUT, and is used to sample and record the time coordinates of the sampling points and the output voltage of the operational amplifier under test DUT when, in the test stage, the sampling capacitor in the first capacitor sampling unit 200 is connected to the non-inverting input terminal of the operational amplifier under test DUT, or when the sampling capacitor in the second capacitor sampling unit 300 is connected to the inverting input terminal of the operational amplifier under test DUT, and after a preset delay time.

[0065] The first input terminal of the first capacitance sampling unit 200 is grounded. The second input terminal of the first capacitance sampling unit 200 is electrically connected to the inverting input terminal of the device under test (DUT) operational amplifier. The output terminal of the first capacitance sampling unit 200 is electrically connected to the inverting input terminal of the DUT operational amplifier, and is used to receive a low-level voltage signal and a common-mode voltage signal, and provide them to the inverting input terminal of the DUT operational amplifier.

[0066] The first input terminal of the second capacitance sampling unit 300 is grounded. The second input terminal of the second capacitance sampling unit 300 is electrically connected to the non-inverting input terminal of the DUT operational amplifier. The output terminal of the second capacitance sampling unit 300 is electrically connected to the non-inverting input terminal of the DUT operational amplifier, and is used to receive the low-level voltage signal and the common-mode voltage signal, and provide them to the non-inverting input terminal of the DUT operational amplifier.

[0067] The calculation unit 400 is electrically connected to the auxiliary test loop 100, and is used to receive the output voltage of the DUT operational amplifier, and calculate the bias current of the DUT operational amplifier according to the time coordinates of multiple sampling points and the output voltage of the DUT operational amplifier.

[0068] It can be understood that the bias current of an operational amplifier includes a positive input bias current (Ib+) and a negative input bias current (Ib-). Among them, the positive input bias current (Ib+) is the current flowing into (or out of) the non-inverting terminal of the device when the output voltage of the device under test is zero (or a specified value) under a specified supply voltage. The negative input bias current (Ib-) is the current flowing into (or out of) the inverting terminal of the device when the output voltage of the device under test is zero (or a specified value) under a specified supply voltage. The bias current (Ib): the average current flowing into (or out of) the two input terminals of the device when the output voltage of the device under test is zero (or a specified value) under a specified supply voltage. The input offset current (Ios): the difference between the currents flowing into (or out of) the two input terminals of the device when the output voltage of the device under test is zero (or a specified value) under a specified supply voltage.

[0069] Testing the bias current parameter of an operational amplifier requires the aid of an auxiliary operational amplifier loop. Currently, the bias current of an operational amplifier is generally tested based on a common resistor sampling method. Please refer to Figure 2. The test steps include: (1) Applying specified power supply voltages V+ and V- to the power supply terminals of the device through FPVI1 and FPVI0. (2) Setting the output voltage VO of the device under test to a specified value by setting the reference voltage VREF. (3) Closing switches K1 and K2 and measuring the output voltage Vm0 at the output terminal of the auxiliary operational amplifier. (4) Opening switch K1 and measuring the output voltage Vm1 at the output terminal of the auxiliary operational amplifier. (5) The in-phase input bias current Ib+ = (Vm1 - Vm0) × RI / (RF × R). (6) Closing switch K1 and opening switch K2 and measuring the output voltage Vm2 at the output terminal of the auxiliary operational amplifier. (7) The anti-phase input bias current Ib- = (Vm2 - Vm0) × RI / (RF × R). (8) The input bias current Ib = (Ib+ + Ib-) / 2. (9) The input offset current Ios = Ib+ - Ib-. It can be seen that by measuring the change in the output voltage of the auxiliary operational amplifier, calculating the voltage drop across the IB sampling resistor, and further calculating the magnitude of the IB current flowing through the IB sampling resistor. This method can obtain good test results when testing the bias currents of most operational amplifier devices. However, for the testing of pA-level bias current operational amplifier devices, in order to make the voltage drop across the IB sampling resistor easier to measure, a relatively large IB sampling resistor (several M ohms) often needs to be selected. Introducing an excessive IB sampling resistor at the input terminal of the operational amplifier under test makes the entire test loop more susceptible to noise, resulting in unstable final test results.

[0070] In this embodiment, replacing the sampling resistor with a sampling capacitor can solve the problem of noise interference. And after the sampling capacitor is connected to the input terminal of the device under test (DUT) operational amplifier, the bias current of the DUT operational amplifier will continuously charge the sampling capacitor. According to the formula Calculating the slope of the change in the voltage of the sampling capacitor can obtain the magnitude of the bias current. The change in the voltage across the capacitor can be measured at the Vm at the output terminal of the auxiliary operational amplifier. The change in Vm divided by the gain of the auxiliary operational amplifier loop is the change in the voltage across the IB sampling capacitor.

[0071] After replacing the sampling resistor with a sampling capacitor, a good clock is required to enable the relay to be opened at the sampling point and measure the output voltage of the device under test (DUT) operational amplifier as needed. Therefore, the operational amplifier test system provided by the present invention supports two methods: form-based menu programming and open C language programming. The hardware system adopts a modular design and can be selected and expanded according to requirements. The system has high test accuracy, rich parameters, stable performance, good adaptability, and a built-in software oscilloscope function. Device programming, development, and use are convenient. The above test process can be completed through menu-based programming. For the programming interface, please refer to Figure 3 . Figure 4The voltage waveform at Vm measured after adding a certain delay in the software oscilloscope display of the STS8200 system. The bias current of the operational amplifier under test can be calculated through the slope of this voltage waveform.

[0072] In one embodiment, the auxiliary test loop 100 is further configured to, before the test, when the sampling capacitor in the first capacitor sampling unit 200 is connected to the non-inverting input terminal of the operational amplifier under test, or when the sampling capacitor in the second capacitor sampling unit 300 is connected to the inverting input terminal of the operational amplifier under test, periodically detect the output voltage of the operational amplifier under test (DUT) and continue for a preset duration.

[0073] The calculation unit 400 is further configured to determine the preset delay time according to the output voltages of multiple operational amplifiers under test (DUT) detected within the preset time.

[0074] It can be understood that when the loop is powered on and the loop state is switched, the loop state may not reach stability, or the charge discharge caused by the switching moment of some relays may affect the measurement of the pA-level bias current. If the voltage slope is calculated without adding a measurement delay, a very large error will occur in the measured pA-level bias current. Therefore, it is necessary to increase sufficient measurement delay during the test. Therefore, determining the preset delay time before the test in the present invention is beneficial to improving the test accuracy of the pA-level bias current.

[0075] Please refer to Figure 5 , Figure 5 for the waveforms of the entire process of testing LMC6001 (bias current less than 25 fA) using the operational amplifier test system provided by the present invention. Figure 5 Two waveforms are shown in [reference]. The upper waveform is the positive power supply voltage of the device under test, and the lower waveform is the output voltage (Vm) of the auxiliary operational amplifier. It can be seen that the lower waveform is clearly divided into two parts, which respectively represent the test processes of the positive input bias current and the negative input bias current. It can be seen that when the test is just powered on and when switching from testing the positive input to the negative input, the slope of the Vm waveform is very large. However, after a certain period of time, the slope of the waveform becomes very gentle, and at this time, the slope of the waveform reflects the magnitude of the bias current of the device under test. Because when the loop is powered on and the loop state is switched, the loop state may not reach stability, or the charge discharge caused by the switching moment of some relays may affect the measurement of the pA-level bias current. If the voltage slope is calculated without adding a measurement delay, a very large error will occur in the measured pA-level bias current. Therefore, it is necessary to increase sufficient measurement delay during the test.

[0076] Please refer to Figure 6 , Figure 6The test waveform of the bias current of OP37G (the typical value of its bias current is 12 nA). The bias current of OP37G is at the level of more than a dozen nA. Compared with the operational amplifier with pA level, the bias current is very large. A good test result can be obtained by using the ordinary sampling resistor method. Here, the waveform is measured by the method of sampling capacitor. It can be seen that the slope of the waveform is very good. There are large inconsistencies in the slope at the moment of power-on and switching. The reason is that the bias current of OP37G is relatively large, and the influence of the charge change brought by power-on and switching is much smaller than the bias current of OP37G and can be almost ignored. While for LMC6001, since the bias current is only within 25 fA, these influences cannot be ignored. This is also the reason why a longer test delay is required for the IB test of high-precision operational amplifiers.

[0077] In one embodiment, the calculation unit 400 for determining the preset delay time according to the output voltages of a plurality of the operational amplifiers under test DUT detected within the preset time is specifically configured to:

[0078] Calculate the termination time t according to the slope e and the start time t s respectively corresponding to the output voltages of the operational amplifier under test DUT, and calculate the slope G0 of the output voltage between the time t e and the time t s , where t s =t e -Δt, and Δt is the period for detecting the output voltage of the operational amplifier under test DUT;

[0079] Let t e =t e -Δt, t s =t s -Δt. According to the output voltages of the operational amplifier under test DUT corresponding to the time t e -Δt and the time t s -Δt respectively, calculate the slope G e of the output voltage between the time t s -Δt and the time t t -Δt;

[0080] Judge whether the absolute value of the difference between G t and G0 is greater than the maximum allowable slope error E;

[0081] If so, determine the preset delay time t e according to the slope calculation termination time t delay =t e +2Δt+t offset , where t offset is the set additional delay;

[0082] Otherwise, let E = G0 - G t , G0 = G t , t e = t e -Δt, t s = t s -Δt, according to t e -Δt moment and t s -Δt moment respectively corresponding output voltages of the device under test (DUT) operational amplifier, calculate t e -Δt moment and t s -Δt moment between the slopes G of the output voltages t , and return to the step of judging whether the absolute value of the difference between G t and G0 is greater than the maximum allowable slope error E.

[0083] Since the test of pA-level bias current requires a relatively long measurement delay, and different models of the DUT operational amplifier require different measurement delays. If the delay time is determined by observing the waveform of the oscilloscope each time, it is not conducive to the application in the automated test of the operational amplifier bias current parameter. The method for automatically determining the measurement delay is as follows. Apply a sufficiently long measurement delay during the first test, and record all the voltage values measured at the output end of the auxiliary operational amplifier and the corresponding time coordinates during the delay process. Among the measured data, starting from the last measured data, gradually decrease, and calculate the slope of the measured waveform every small period of time (Δt). Then compare it with the slope of the adjacent waveform segment. If the difference exceeds the set maximum allowable slope error E, it is considered that this moment is the delay time.

[0084] In addition, in order to increase a certain test margin and ensure that the loop is in a stable state when entering the test process, a small amount of additional delay t offset can be added according to needs on the basis of this delay time. Generally, the additional delay t offset takes a value of the order of 10 ms. In one embodiment, the set additional delay t offset is 10 -2 ~10 -3 s.

[0085] When conducting batch testing of operational amplifier products, during the test of the first DUT, the test delay is a preset relatively large measurement delay. Then, according to the test results, by scanning and comparing the slopes segment by segment, determine the stable time of the DUT. Then use this stable time as the delay time for subsequent DUTs in the same batch for testing. In this way, only the test time of the first DUT is increased, and the automatic determination of the delay time can be completed. For the test of an entire batch of devices, only an almost negligible test time is increased, and the trouble of manual judgment of the measurement delay can be saved, making it better applied in automated testing.

[0086] In one embodiment, the first capacitance sampling unit 200 includes a first resistor R1, a first sampling capacitor C1, and a first switch K1.

[0087] The first end of the first resistor R1 is grounded, and the second end of the first resistor R1 is electrically connected to the output end of the auxiliary test loop 100.

[0088] The first end of the first sampling capacitor C1 is electrically connected to the second end of the first resistor R1 and the output end of the auxiliary test loop 100, and the second end of the first sampling capacitor C1 is electrically connected to the inverting input end of the operational amplifier under test DUT.

[0089] The first switch K1 is connected in parallel across the two ends of the first sampling capacitor C1.

[0090] In one embodiment, the second capacitance sampling unit 200 includes a second resistor R2, a second sampling capacitor C2, and a second switch K2:

[0091] The first end of the second resistor R2 is electrically connected to the first end of the first resistor R1, and the second end of the second resistor R2 is grounded through a feedback resistor R F grounded.

[0092] The first end of the second sampling capacitor C2 is electrically connected to the second end of the second resistor R2, and the second end of the second sampling capacitor C2 is electrically connected to the non-inverting input end of the operational amplifier under test DUT.

[0093] The second switch K2 is connected in parallel across the two ends of the second sampling capacitor C2.

[0094] In one embodiment, the auxiliary test loop 100 includes an auxiliary operational amplifier AMP and a VI source.

[0095] A third resistor R3 and a third switch K3 are sequentially connected in series between the non-inverting input end of the auxiliary operational amplifier AMP and the output end of the operational amplifier under test DUT. The inverting input end of the auxiliary operational amplifier AMP is grounded, and the output end of the auxiliary operational amplifier AMP is electrically connected to the second end of the first resistor R1 and the first end of the first sampling capacitor C1 through another feedback resistor R F electrically connected.

[0096] The input end of the VI source is electrically connected to the output end of the auxiliary operational amplifier AMP, and the output end of the VI source is electrically connected to the input end of the calculation unit 400, and is used for periodically sampling and recording the sampling time and the output voltage of the sampling point, and providing them to the calculation unit 400.

[0097] In this embodiment, the test steps include: (1) Applying a specified power supply voltage V+ and V- to the device power supply terminal through FPVI1 and FPVI0 to provide a common-mode voltage signal for the operational amplifier to be tested. (2) Closing the first switch K1 and opening the second switch K2, periodically sampling and recording the sampling time and the output voltage at the sampling point at the output terminal of the auxiliary operational amplifier, and providing it to the computing unit 400 to calculate the positive input bias current. (3) Opening the first switch K1 and closing the second switch K2, periodically sampling and recording the sampling time and the output voltage at the sampling point at the output terminal of the auxiliary operational amplifier, and providing it to the computing unit 400 to calculate the negative input bias current.

[0098] From Figure 4 it can also be seen that a sine wave with a very small amplitude is superimposed on the voltage ramp, which is the power frequency interference of 50 Hz. Since the final test result is only related to the slope, the power frequency interference will not have too much impact on the test result. In order to further improve the test accuracy, in one of the embodiments, the VI source for periodically sampling and recording the time coordinate of the sampling point and the output voltage of the operational amplifier DUT to be tested is specifically used for:

[0099] Determining the sampling point according to the sampling frequency;

[0100] Sampling the voltages of four power frequency cycles on both sides of the sampling point and taking their average value as the output voltage of the operational amplifier DUT corresponding to the sampling point;

[0101] Recording the time coordinate of the sampling point and the output voltage of the operational amplifier DUT to be tested.

[0102] Please refer to Figure 7 , sampling the voltages of 4 power frequency cycles near the point to be measured and taking the average value. This average value is the voltage value at the midpoint of the 4 selected power frequency cycles. Since the mean processing is done, the influence of the power frequency interference on the measurement result can be eliminated. By obtaining the voltages of 2 sampling points in this way and then dividing by the time difference, the slope of the voltage waveform between these 2 sampling points can be calculated.

[0103] Please refer to Figure 8 , based on the operational amplifier test system in any of the above embodiments, the embodiment of the present invention further provides an operational amplifier test method, including:

[0104] Step S810, powering on the operational amplifier test system;

[0105] Step S820, in the test stage, when the sampling capacitor in the first capacitor sampling unit 200 is connected to the non-inverting input terminal of the operational amplifier under test DUT, or when the sampling capacitor in the second capacitor sampling unit 300 is connected to the inverting input terminal of the operational amplifier under test DUT, and after a preset delay time, sample and record the time coordinate of the sampling point and the output voltage of the operational amplifier under test DUT;

[0106] Step S830, calculate the bias current of the operational amplifier under test DUT according to the time coordinates of multiple said sampling points and the output voltage of the operational amplifier under test DUT.

[0107] In one embodiment, the operational amplifier testing method further includes:

[0108] Before the test, when the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or when the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test, periodically detect the output voltage of the operational amplifier under test DUT and continue for a preset duration;

[0109] Determine the preset delay time according to the output voltages of multiple said operational amplifiers under test DUT detected within the preset time.

[0110] In one embodiment, the determining the preset delay time according to the output voltages of multiple said operational amplifiers under test DUT detected within the preset time includes:

[0111] Calculate the termination time t e and the start time t s corresponding to the output voltages of the operational amplifier under test DUT respectively, and calculate the slope G0 of the output voltage between the time t e and the time t s , where t s =t e -Δt, and Δt is the period of detecting the output voltage of the operational amplifier under test DUT;

[0112] Let t e =t e -Δt, t s =t s -Δt, and according to the output voltages of the operational amplifier under test DUT corresponding to the time t e -Δt and the time t s -Δt respectively, calculate the slope G e of the output voltage between the time t s -Δt and the time t t ;

[0113] Determine G t Whether the absolute value of the difference between G and G0 is greater than the maximum allowable error E of the slope;

[0114] If so, calculate the termination time t according to the slope e Determine the preset delay time t delay =t e +2Δt + t offset , where t offset Is the set additional delay;

[0115] Otherwise, let E = G0 - G t , G0 = G t , t e =t e -Δt, t s =t s -Δt, according to the output voltages of the device under test (DUT) operational amplifier corresponding to the t e -Δt moment and the t s -Δt moment respectively, calculate the slope G of the output voltage between the t e -Δt moment and the t s -Δt moment t , and return to the step of determining whether the absolute value of the difference between G t and G0 is greater than the maximum allowable error E of the slope.

[0116] In one embodiment, the operational amplifier test method further includes:

[0117] Detect the output voltages of multiple devices under test (DUT) operational amplifiers within the preset time. Before determining the preset delay time, set the initial preset delay time t delay =0;

[0118] Determine whether the preset delay time t delay is 0;

[0119] If so, let t delay =T max , and after the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the device under test (DUT) operational amplifier, or after the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the device under test (DUT) operational amplifier, periodically detect the output voltage of the device under test (DUT) operational amplifier, where T max Is the allowable maximum preset delay time;

[0120] Otherwise, enter the test phase.

[0121] Please refer to Figure 9 , Figure 9 which shows the entire test process. The specific test process includes:

[0122] Power on the operational amplifier test system and start the test;

[0123] Set the initial value of the preset delay time to 0, and the maximum allowable preset delay time is T max ;

[0124] Determine whether the currently set preset delay time is 0;

[0125] If it is not 0, enter the test phase. After the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or after the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test, sample and record the time coordinate of the sampling point and the output voltage of the operational amplifier under test (DUT).

[0126] If the currently set preset delay time is 0, then let t delay = T max , and after the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or after the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test, periodically detect the output voltage of the operational amplifier under test (DUT);

[0127] Let t e = T max , t s = T max -Δt, calculate the output voltages of the operational amplifier under test (DUT) corresponding to the termination time t e and the start time t s respectively, and calculate the slope G0 of the output voltage between the time of t e and the time of t s ;

[0128] Let t e = t e -Δt, t s = t s -Δt, according to the output voltages of the operational amplifier under test (DUT) corresponding to the time of t e -Δt and the time of t s -Δt respectively, calculate the slope G e of the output voltage between the time of t s -Δt and the time of t t ;

[0129] Determine whether the absolute value of the difference between G t and G0 is greater than the maximum allowable slope error E;

[0130] If so, calculate the termination time t e to determine the preset delay time tdelay = t e + 2Δt + t offset , and return the step of judging whether the preset delay time set currently is 0, where t offset is the set additional delay;

[0131] Otherwise, let E = G0 - G t , G0 = G t , t e = t e - Δt, t s = t s - Δt, according to the output voltages of the device under test (DUT) operational amplifier corresponding to the t e - Δt moment and the t s - Δt moment respectively, calculate the slope G e of the output voltage between the t s - Δt moment and the t t - Δt moment, and return to the step of judging whether the absolute value of the difference between G t and G0 is greater than the maximum allowable error E of the slope.

[0132] When conducting batch testing of operational amplifiers, when testing the first device under test, the test delay is a preset relatively large measurement delay. Then, according to the test results, by scanning and comparing the slopes section by section, determine the settling time of the device under test. Then use this settling time as the delay time for subsequent devices under test in the same batch for testing. In this way, only the test time of the first device under test is increased, and the automatic determination of the delay time can be completed. For the testing of an entire batch of devices, only an almost negligible test time is increased, and the trouble of manually judging the measurement delay can be saved, making it better applied in automated testing.

[0133] To verify the accuracy of the test, when the bias current of the device under test operational amplifier is in the order of a dozen nA, using the method of sampling resistors can obtain relatively accurate test results. The data measured by the sampling capacitor method at this time can be compared with the test data of the sampling resistor method to roughly verify the accuracy of the test results. Further, make a 1 nA constant current source circuit and apply it to the input end of an operational amplifier with a bias current in the order of dozens of fA. It is equivalent to an operational amplifier with a bias current of 1 nA. Use the method of sampling capacitors to test this equivalent operational amplifier and compare the test results with 1 nA to further verify the test accuracy. Since it is relatively difficult to make a pA-level constant current source circuit, it is very difficult to verify whether the IB sampling capacitor method is accurate for testing pA-level bias currents through the aforementioned methods. The typical values in the parameter manual of the device under test can be combined with the test results for comparison, and at the same time, observe whether the output voltage waveform of the auxiliary operational amplifier is a straight line with very good linearity to infer the reliability of the test results of pA-level bias currents.

[0134] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as falling within the scope described in this specification.

[0135] The above-described embodiments only represent several implementation manners of the present invention, and the description thereof is relatively specific and detailed. However, it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention patent shall be subject to the appended claims.

Claims

1. An operational amplifier test system, characterized in that, Comprising: The operational amplifier to be tested; A first capacitor sampling unit, the first input terminal of the first capacitor sampling unit is grounded, the second input terminal of the first capacitor sampling unit is electrically connected to the inverting input terminal of the operational amplifier to be tested, and the output terminal of the first capacitor sampling unit is electrically connected to the inverting input terminal of the operational amplifier to be tested, for receiving a low-level voltage signal and a common-mode voltage signal and providing them to the inverting input terminal of the operational amplifier to be tested; A second capacitor sampling unit, the first input terminal of the second capacitor sampling unit is grounded, the second input terminal of the second capacitor sampling unit is electrically connected to the non-inverting input terminal of the operational amplifier to be tested, and the output terminal of the second capacitor sampling unit is electrically connected to the non-inverting input terminal of the operational amplifier to be tested, for receiving the low-level voltage signal and the common-mode voltage signal and providing them to the non-inverting input terminal of the operational amplifier to be tested; An auxiliary test loop, electrically connected to the operational amplifier to be tested, for sampling and recording the time coordinate of the sampling point and the output voltage of the operational amplifier to be tested at the test stage when the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier to be tested, or when the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier to be tested and after a preset delay time; And A calculation unit, electrically connected to the auxiliary test loop, for receiving the output voltage of the operational amplifier to be tested and calculating the bias current of the operational amplifier to be tested according to the time coordinates of multiple sampling points and the output voltage of the operational amplifier to be tested; The calculation unit is further configured to determine the preset delay time according to the output voltages of multiple operational amplifiers to be tested detected within a preset time; The calculation unit is specifically configured to calculate the termination time according to the slope and the start time corresponding to the output voltages of the operational amplifier under test respectively, and calculate the slope of the output voltage between the time and the time , where , is the period for detecting the output voltage of the operational amplifier under test; let , , and according to the output voltages of the operational amplifier under test corresponding to the time and the time respectively, calculate the slope of the output voltage between the time and the time ; determine whether the absolute value of the difference between and is greater than the maximum allowable slope error E; If so, calculate the termination time according to the slope Determine the preset delay time + , where is the set additional delay; otherwise, let E = , , , , according to the output voltage of the operational amplifier under test corresponding to the time and the time respectively, calculate the slope of the output voltage between the time and and return to the step of judging whether the absolute value of the difference between 2. The operational amplifier test system according to claim 1, wherein The range of the additional delay is 10 -2 to 10 -3 seconds.

3. The operational amplifier test system according to claim 1, wherein The auxiliary test loop is further configured to periodically detect the output voltage of the operational amplifier to be tested and continue for a preset time before the test when the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier to be tested, or when the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier to be tested.

4. The operational amplifier testing system according to claim 1, wherein The first capacitor sampling unit includes: A first resistor, the first end of which is grounded and the second end of which is electrically connected to the output terminal of the auxiliary test loop; A first sampling capacitor, the first end of which is electrically connected to the second end of the first resistor and the output terminal of the auxiliary test loop, and the second end of which is electrically connected to the inverting input terminal of the operational amplifier to be tested; and A first switch, connected in parallel across the two ends of the first sampling capacitor.

5. The operational amplifier testing system according to claim 4, wherein, The second capacitor sampling unit includes: A second resistor, the first end of which is electrically connected to the first end of the first resistor and the second end of which is grounded through a feedback resistor; A second sampling capacitor, the first end of which is electrically connected to the second end of the second resistor and the second end of which is electrically connected to the non-inverting input terminal of the operational amplifier to be tested; and A second switch, connected in parallel across the two ends of the second sampling capacitor.

6. The operational amplifier testing system according to claim 4, wherein, The auxiliary test loop includes: An auxiliary operational amplifier, a third resistor and a third switch are sequentially connected in series between the non-inverting input terminal of the auxiliary operational amplifier and the output terminal of the operational amplifier under test. The inverting input terminal of the auxiliary operational amplifier is grounded, and the output terminal of the auxiliary operational amplifier is electrically connected to the second terminal of the first resistor and the first terminal of the first sampling capacitor through another feedback resistor; A VI source, whose input terminal is electrically connected to the output terminal of the auxiliary operational amplifier, and whose output terminal is electrically connected to the input terminal of the calculation unit, is used for periodically sampling and recording the sampling time and the output voltage of the sampling point, and providing them to the calculation unit.

7. The operational amplifier testing system according to claim 6, wherein The VI source for periodically sampling and recording the time coordinate of the sampling point and the output voltage of the operational amplifier under test is specifically used for: Determining the sampling point according to the sampling frequency; Sampling the voltages of four power frequency cycles on both sides of the sampling point and taking their average value as the output voltage of the operational amplifier under test corresponding to the sampling point; Recording the time coordinate of the sampling point and the output voltage of the operational amplifier under test.

8. An operational amplifier testing method, characterized in that, Including: Powering on the operational amplifier test system; In the test stage, when the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or when the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test, and after a preset delay time, sampling and recording the time coordinate of the sampling point and the output voltage of the operational amplifier under test; Calculating the bias current of the operational amplifier under test according to the time coordinates of multiple sampling points and the output voltage of the operational amplifier under test; The operational amplifier test system includes The operational amplifier under test; A first capacitor sampling unit, the first input terminal of the first capacitor sampling unit is grounded, the second input terminal of the first capacitor sampling unit is electrically connected to the inverting input terminal of the operational amplifier under test, and the output terminal of the first capacitor sampling unit is electrically connected to the inverting input terminal of the operational amplifier under test, and is used for receiving a low-level voltage signal and a common-mode voltage signal and providing them to the inverting input terminal of the operational amplifier under test; A second capacitor sampling unit, the first input terminal of the second capacitor sampling unit is grounded, the second input terminal of the second capacitor sampling unit is electrically connected to the non-inverting input terminal of the operational amplifier under test, and the output terminal of the second capacitor sampling unit is electrically connected to the non-inverting input terminal of the operational amplifier under test, and is used for receiving the low-level voltage signal and the common-mode voltage signal and providing them to the non-inverting input terminal of the operational amplifier under test; An auxiliary test loop, which is electrically connected to the operational amplifier under test, and is used for sampling and recording the time coordinate of the sampling point and the output voltage of the operational amplifier under test in the test stage when the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or when the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test, and after a preset delay time; And A calculation unit, electrically connected to the auxiliary test loop, for receiving the output voltage of the operational amplifier under test and calculating the bias current of the operational amplifier under test according to the time coordinates of multiple said sampling points and the output voltage of the operational amplifier under test; The calculation unit is further configured to determine the preset delay time according to the output voltages of multiple said operational amplifiers under test detected within a preset time; The calculation unit is specifically configured to calculate the termination time according to the slope and the start time corresponding to the output voltages of the operational amplifier under test respectively, and calculate the slope of the output voltage between the time and the time , where , is the period for detecting the output voltage of the operational amplifier under test; let , , and according to the output voltages of the operational amplifier under test corresponding to the time and the time respectively, calculate the slope of the output voltage between the time ; determine whether the absolute value of the difference between and the maximum allowable slope error E is greater than zero; If so, calculate the termination time according to the slope Determine the preset delay time + where is the set additional delay; otherwise, let E = , , , , according to the time and the output voltages of the operational amplifier under test corresponding to the time respectively, calculate the slope of the output voltage between the time and the time , and return to the step of judging the absolute value of the difference between and whether it is greater than the maximum allowable error E of the slope 9. The operational amplifier testing method according to claim 8, wherein It further includes: Before the test, after the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or after the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test, the output voltage of the operational amplifier under test is periodically detected and continued for a preset time.

10. The operational amplifier testing method according to claim 8, characterized in that, It further includes: Detect the output voltages of multiple said operational amplifiers to be measured within the said preset time, and set the initial said preset delay time before determining the said preset delay time = 0; Determine the preset delay time Is it 0; If so, then let , and after the sampling capacitor in the first capacitor sampling unit is connected to the non-inverting input terminal of the operational amplifier under test, or after the sampling capacitor in the second capacitor sampling unit is connected to the inverting input terminal of the operational amplifier under test, the step of periodically detecting the output voltage of the operational amplifier under test, where is the longest allowable preset delay time; Otherwise, enter the test phase.

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