Device for rendering an object including a path, computing apparatus and rendering method thereof

Abstract

A device configured to render an object including a path, comprising: a storage circuit; an algorithm circuit configured to determine directions of a plurality of primitives included in the path based on path data, generate primitive direction information, store the primitive direction information in the storage circuit, and generate a surround number for each of a plurality of pixels using the stored primitive direction information; and a determination circuit configured to determine whether a shading operation is to be performed based on the generated surround number.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2018-0162150 filed on December 14, 2018 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The inventive concept relates to an apparatus configured to perform graphic processing, and more particularly, to an apparatus configured to render an object including a path, a computing device including the apparatus, and a rendering method of the apparatus. Background Art

[0004] In recent years, a method of improving the acceleration performance of a device (or a graphics processing device) configured to perform a graphics processing operation, such as a vector graphics operation or a path rendering operation, has been studied. Specifically, when a winding number per pixel is generated in a path rendering operation, it is necessary to develop a method of minimizing arithmetic operations during the arithmetic operations and efficiently using a storage space of the device. Summary of the invention

[0005] The present inventive concept provides an apparatus capable of reducing the number of arithmetic operations to generate a wraparound number and effectively using a storage space of the apparatus during an arithmetic operation, a computing device including the apparatus, and a rendering method of the apparatus.

[0006] According to aspects of the present invention, there is provided a device configured to render an object including a path, the device comprising: a storage circuit; an algorithm circuit configured to: determine directions of a plurality of primitives in the path based on path data, generate primitive direction information, control to store the primitive direction information in the storage circuit, and generate a surround number for each of a plurality of pixels using the stored primitive direction information; and a determination circuit configured to determine whether a shading operation will be performed based on the generated surround number.

[0007] According to aspects of the inventive concept, there is provided a method for rendering an object including a path using a graphics processing device, the method comprising: obtaining path data including information about vertices in the path and commands corresponding to the path; generating primitive direction information indicating directions of a plurality of primitives in the path based on the path data; generating a surround number for each of a plurality of pixels using the primitive direction information; and determining whether a shading operation will be performed based on the surround number.

[0008] According to another aspect of the inventive concept, a computing device is provided, including: a central processing unit (CPU) configured to generate path data corresponding to a predetermined path in a frame; a graphics processing unit (GPU) configured to receive the path data and perform a rendering operation based on the path data; and a GPU local storage configured to store a rendering program, wherein the rendering operation is performed by the GPU based on the rendering program, wherein the GPU includes a register file including a plurality of registers, and wherein the GPU is further configured to: determine directions of a plurality of primitives in the path based on the path data, generate primitive direction information, control to store the primitive direction information in the register file, and generate a surround number for each of a plurality of pixels using the stored primitive direction information.

[0009] According to aspects of the inventive concept, there is provided a device configured to render an object including a path. The device includes: a storage circuit; an algorithm circuit configured to check directions of a plurality of primitives included in the path based on path data, generate primitive direction information, store the primitive direction information in the storage circuit, and generate a surround number for each of a plurality of pixels using the stored primitive direction information; and a determination circuit configured to determine whether a shading operation is to be performed based on the generated surround number.

[0010] According to another aspect of the inventive concept, a method for rendering an object including a path using a graphics processing device is provided. The method includes: obtaining path data including information about vertices included in the path and commands corresponding to the path; generating primitive direction information indicating directions of a plurality of primitives included in the path based on the path data; generating a winding number for each of a plurality of pixels using the primitive direction information; and determining whether a shading operation is to be performed based on the winding number.

[0011] According to another aspect of the inventive concept, a computing device is provided, comprising: a central processing unit (CPU) configured to generate path data corresponding to a predetermined path in a frame; a graphics processing unit (GPU) configured to receive the path data and perform a rendering operation based on the path data; and a GPU local storage configured to store a rendering program, wherein the rendering operation is performed by the GPU based on the rendering program. The GPU includes a register file including a plurality of registers. The GPU checks the directions of a plurality of primitives included in the path based on the path data, generates primitive direction information, stores the primitive direction information in a storage circuit, and generates a surround number for each of a plurality of pixels using the stored primitive direction information. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Exemplary embodiments of the present inventive concept will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0013] Figure 1is a block diagram of a rendering device according to an exemplary embodiment;

[0014] Figure 2 is a flow chart of a path rendering method according to an exemplary embodiment;

[0015] Figure 3 is a diagram of a wraparound number described in an exemplary embodiment;

[0016] Figure 4 A block diagram of an algorithm circuit according to an exemplary embodiment;

[0017] FIG. 5A to FIG. 5D is a diagram for explaining a method of generating a winding number according to an exemplary embodiment;

[0018] Figure 6 is a block diagram of a method of storing primitive direction information of a primitive direction check circuit according to an exemplary embodiment;

[0019] Figure 7 is a block diagram of a pre-processing operation of an algorithm circuit according to an exemplary embodiment;

[0020] Figure 8 is a flow chart of a pre-processing operation for path data according to an exemplary embodiment;

[0021] Fig. 9A and Fig. 9B is a diagram of a pre-processing operation according to an exemplary embodiment;

[0022] FIG. 10A to FIG. 10D is a diagram of an example in which a rendering apparatus according to an exemplary embodiment selects different sides and calculates a surround number of a pixel;

[0023] Fig.11 is a flow chart of a rendering operation according to an exemplary embodiment;

[0024] Fig.12 is a diagram for explaining an example in which a determination circuit according to an exemplary embodiment determines whether to set a color on each pixel; and

[0025] Fig.13 is a block diagram of a computing device according to an exemplary embodiment. DETAILED DESCRIPTION

[0026] Example embodiments will now be described more fully with reference to the accompanying drawings, in which some example embodiments are shown.

[0027] Figure 1 is a block diagram of a rendering apparatus 100 according to an exemplary embodiment.

[0028] refer to Figure 1, the rendering device 100 may include an algorithm circuit 120, a determination circuit 140, and a primitive direction information storage circuit 160. The rendering device 100 may be referred to as a graphics processing device. The algorithm circuit 120 and the determination circuit 140 may correspond to one processor or multiple processors. The processor may be implemented as an array of multiple logic gates or as a combination of a general-purpose microprocessor (MP) and a storage in which a program executable by the general-purpose MP is stored. Moreover, it will be understood by those of ordinary skill in the art that the process may be implemented as another type of hardware.

[0029] The algorithm circuit 120 may receive the path data P_Data. Hereinafter, the path may refer to a component of a target (e.g., an object) on which the rendering device 100 performs a rendering operation. The rendering operation may refer to the process of converting two-dimensional (2D) or three-dimensional (3D) data described by numerical values ​​and formulas into a human-recognizable image. In the rendering operation, the path may be, for example, a straight line or curve extending from one point to another. The object may include a closed polygon or a closed path formed by connecting at least one path. The rendering device 100 divides the frame corresponding to the object in units of a bounding box and performs a rendering operation on a plurality of pixels. In addition, the rendering device 100 may divide the frame in units of tiles and perform a rendering operation on a plurality of pixels of each tile. The path data P_Data may include information about the coordinates of each of the plurality of vertices included in the path and a command for combining vertices and constructing a path. For example, assuming that a straight line from a first pixel to a second pixel among the pixels included in the frame is a path, the vertices may refer to points corresponding to the first pixel and the second pixel, respectively. Therefore, the path data may refer to the coordinates of the first vertex corresponding to the first pixel and the point corresponding to the second pixel. Therefore, the path data may include the coordinates of a first vertex corresponding to a first pixel, the coordinates of a second vertex corresponding to a second pixel, and a command for constructing a straight line from the first vertex to the second vertex. Regarding the path data, not only information about the coordinates of each vertex included in the path, but also the position and direction of travel of the path and information about the primitives may be included. In addition, the path data may also include information about the color value to be set for each pixel.

[0030] According to an exemplary embodiment, the algorithm circuit 120 may include a primitive direction check circuit 121, which is configured to minimize the amount of algorithm operations when generating a winding number WN for each of a plurality of pixels for a rendering operation. The primitive direction check circuit 121 may determine the directions of a plurality of primitives contained in a path corresponding to the path data P_Data based on the path data P_Data, and generate primitive direction information. The primitive direction check circuit 121 may store the generated primitive direction information in the primitive direction information storage circuit 160, so that the primitive direction information may be used at any time when the algorithm circuit 120 generates the winding number WN. In an exemplary embodiment, the primitive direction check circuit 121 may generate primitive direction information suitable for the configuration of the primitive direction information storage circuit 160. Specifically, the primitive direction check circuit 121 may generate the primitive direction information with reference to the configuration of the primitive direction information storage circuit 160. That is, the primitive direction information may have a number of bits based on the number of storable bits of the storage area of ​​the primitive direction information storage circuit 160. The algorithm circuit 120 may perform pre-processing on the path data P_Data so that the primitive direction check circuit 121 may generate primitive direction information suitable for the configuration of the primitive direction information storage circuit 160 , as will be described in detail below with reference to specific embodiments.

[0031] The primitive direction information storage circuit 160 may store not only primitive direction data or algorithm result data, but also data or algorithm result data for executing the algorithm operation included in the rendering operation. The primitive direction information storage circuit 160 may be referred to as a storage circuit. The primitive direction information storage circuit 160 may include multiple storage areas. For example, each of the storage areas may be implemented as a volatile memory, such as a static random access memory (SRAM), a dynamic random access memory (DRAM), a latch, a trigger, a register, and a special register with multiple ports, or a non-volatile memory, such as a NAND flash memory, a vertical NAND (VNAND) flash memory, a NOR flash memory, a resistive RAM (RRAM), a phase change RAM (PRAM), a magnetoresistive RAM (MRAM), a ferromagnetic RAM (FRAM), and a spin transfer torque RAM (STT-RAM).

[0032] According to an exemplary embodiment, the algorithm circuit 120 may use the primitive direction information to generate the surrounding number WN of each of the plurality of pixels. The algorithm circuit 120 may read (or obtain) the primitive direction information from the primitive direction information storage circuit 160. However, in some exemplary embodiments, the algorithm circuit 120 may directly use the primitive direction information generated by the primitive direction check circuit 121. Figure 3 Give a detailed description of the winding number WN.

[0033] The algorithm circuit 120 may provide the winding number WN generated in the above manner to the determination circuit 140. The algorithm circuit 120 may manage at least one storage area of ​​the primitive direction information storage circuit 160 in which the primitive direction information is stored by using the address information. Specifically, the algorithm circuit 120 may control to store the primitive direction information in at least one storage area of ​​the primitive direction information storage circuit 160. In addition, in order to ensure a space for generating a winding number of the next path data, the algorithm circuit 120 may control to delete the primitive direction information corresponding to the winding number WN that has been provided to the determination circuit 140 from the primitive direction information storage circuit 160.

[0034] The determination circuit 140 may determine whether to assign a color to a pixel based on the surrounding number WN. The determination circuit 140 according to an exemplary embodiment may perform a shading operation based on information about a color assignment rule and the surrounding number WN. The shading operation may be a process of setting the color of each pixel. However, the above-mentioned shading operation may be only an example, and the inventive concept is not limited thereto. The shading operation may be a process of setting the brightness of each pixel or a process of giving each pixel a desired texture.

[0035] In order to generate the winding number WN for the rendering operation, the rendering device 100 according to the exemplary embodiment may determine the direction of the primitive contained in the path and the primitive direction information, and then generate the winding number of each of the plurality of pixels using the primitive direction information, thereby minimizing the amount of arithmetic operations. In addition, the primitive direction information may have a number of bits taking into account the configuration of the primitive direction information storage circuit 160 of the rendering device 100, for example, the number of storable bits based on the storage area of ​​the primitive direction information storage circuit 160. Therefore, the configuration of the primitive direction information storage circuit 160 may not need to be changed, and at the same time, the memory may be effectively utilized.

[0036] Figure 2 is a flow chart of a path rendering method according to an exemplary embodiment. Figure 1 describe Figure 2 Flowchart of the process.

[0037] refer to Figure 2 , the rendering device 100 may receive path data P_Data from the outside (S100). The primitive direction check circuit 121 may determine the primitive direction based on the path data P_Data, generate a determination result as primitive direction information, and store the primitive direction information in the primitive direction information storage circuit 160 (S110). The algorithm circuit 120 may generate a wrapping number WN using the primitive direction information stored in the primitive direction information storage circuit 160 (S120). The determination circuit 140 may perform a rendering operation on a plurality of pixels using the wrapping number WN (S130).

[0038] Figure 3 is a diagram of winding numbers described in the exemplary embodiment.

[0039] Figure 3 An example for explaining the number of surrounds corresponding to one pixel P included in the frame 10 is shown. Figure 3 In FIG. 1 , for convenience of explanation, the pixel P is shown in the shape of a person looking in a certain direction.

[0040] refer to Figure 3 , the path may be shown as a closed path along the periphery of the pixel P. When the virtual line 20 is shown in the right horizontal direction from the pixel P, the virtual ray 20 may intersect the path 30 at four points, i.e., the first to fourth points 31, 32, 33, and 34. Therefore, the winding number of the pixel P may be determined based on the direction in which the path is described from each of the first to fourth points 31, 32, 33, and 34. Hereinafter, an exemplary embodiment in which a method of generating a winding number different from the present embodiment is applied will be described.

[0041] Specifically, the direction of the path 30 described from the first point 31 may correspond to the counterclockwise direction (described from the bottom to the top). Therefore, the winding number of the pixel P may be initially -1. In addition, the direction of the path 30 described from the second point 32 may correspond to the clockwise direction (described from the top to the bottom). Therefore, the winding number of the pixel P may be calculated at the second level as shown by "-1+1=0". In addition, the direction of the path 30 described from the third point 33 may correspond to the counterclockwise direction. Therefore, the winding number of the pixel P may be calculated at the third level as shown by "-1+1-1=-1". In addition, the direction of the path 30 described from the fourth point 34 may correspond to the counterclockwise direction. Therefore, the winding number of the pixel P may be finally calculated as shown by "-1+1-1-1=-2". Although the above reference Figure 3 It is described that the surrounding number of the pixel P can be generated based on the path located on the right side of the pixel P, but the inventive concept is not limited thereto. In other words, the surrounding number of the pixel P can be generated based on the path located on any one of the left side, right side, upper side and lower side of the pixel P.

[0042] To export in Figure 3 The same surrounding number "-1" of the pixel P described in FIG. 1 is shown in FIG. 1 . According to the algorithm circuit 120 ( Figure 1 ) can generate primitive direction information and use the primitive direction information to generate the surrounding number of pixel P, thereby minimizing the amount of algorithm operations.

[0043] Figure 4 is a block diagram of an algorithm circuit 200 according to an exemplary embodiment.

[0044] refer to Figure 4, the algorithm circuit 220 may include a primitive direction check circuit 221, a data buffer 222, and a wrap-around number generation circuit 223. The data buffer 222 may receive path data P_Data from the outside, and buffer the path data P_Data before the path data P_Data is sent to the primitive direction check circuit 221 and the wrap-around number generation circuit 223. The primitive direction check circuit 221 may determine the directions of a plurality of primitives included in the path based on the path data P_Data, and generate primitive direction information. In an exemplary embodiment, the primitive direction information may include a plurality of bits, each of which may indicate the direction of each primitive.

[0045] Specifically, the primitive direction check circuit 221 can determine whether the primitive contained in the path has a first direction, generate first data information based on the result of determining whether the primitive contained in the path has the first direction, determine whether the primitive has a second direction, and generate second data information based on the result of determining whether the primitive has the second direction. The first direction may be a direction opposite to the second direction. The primitive direction information may include first data information and second data information. In an exemplary embodiment, the primitive direction check circuit 221 can determine whether the primitive has an upward direction, generate first data information, determine whether the primitive has a downward direction, and generate second data information.

[0046] The primitive direction check circuit 221 may store the generated primitive direction information in the primitive direction information storage circuit 260. The primitive direction information storage circuit 260 may include at least one storage area, and the primitive direction check circuit 221 may store the primitive direction information in a bit area included in the storage area corresponding to each primitive, and a specific exemplary embodiment thereof will be described in detail below.

[0047] The wrapping number generation circuit 223 may read the primitive direction information from the primitive direction information storage circuit 260, and use the primitive direction information to generate the wrapping number WN for each of the plurality of pixels. Specifically, the wrapping number generation circuit 223 may generate a primitive mask for each pixel depending on whether a virtual line extending from each of the plurality of pixels along a third direction intersects with the primitive. In an exemplary embodiment, the third direction may be perpendicular to each of the first direction and the second direction. For example, when the first direction is an upward direction and the second direction is a downward direction, the third direction may be a rightward direction or a leftward direction.

[0048] The wrapping number generation circuit 223 may generate the wrapping number WN using the first data information and the second data information contained in the primitive direction information and the primitive mask. In an example, the wrapping number generation circuit 223 may perform a first comparison operation between bits corresponding to the primitive mask and the first data information, respectively, and perform a second comparison operation between bits corresponding to the primitive mask and the second data information, respectively. Thereafter, the wrapping number generation circuit 223 may generate the wrapping number WN using the result of the first comparison operation and the result of the second comparison operation, as will be described in detail below.

[0049] FIG. 5A to FIG. 5D is a schematic diagram for explaining a method for generating a winding number according to an exemplary embodiment. Figure 4 Detailed Description FIG. 5A to FIG. 5D A method of generating a winding number to which the inventive concept is applied will be described in an easily understood manner, and exemplary embodiments of the inventive concept will not be construed as being limited thereto.

[0050] refer to Figure 5A , the primitive direction check circuit 221 can determine the directions of the first to sixth primitives Pr_1 to Pr_6 included in the path included in the bounding box BB. The bounding box BB can be set on the frame using the coordinate components of each vertex. For example, Figure 1 The rendering device 100 can set a bounding box BB on the frame by using the maximum and minimum values ​​of the horizontal coordinate components among the coordinate components corresponding to the vertices of the path data P_Data, and the maximum and minimum values ​​of the vertical coordinate components of the coordinate components. In an exemplary embodiment, the primitive direction check circuit 221 can use the reference line Ref_L to determine whether the traveling direction of each of the first to sixth primitives Pr_1 to Pr_6 is the downward direction DW or the upward direction UP. Based on the path data P_Data, the primitive direction check circuit 221 can determine that the traveling direction of each of the fourth primitive Pr_4 and the fifth primitive Pr_5 is the downward direction DW, and determine that the traveling direction of each of the first primitive Pr_1, the second primitive Pr_2, and the sixth primitive Pr_6 is the upward direction UP. In addition, the primitive direction check circuit 221 can also determine that the traveling direction of the third primitive Pr_3 is neither the downward direction DW nor the upward direction UP.

[0051] Further references Figure 5B, the primitive direction check circuit 221 may generate: first data information D_DATA_1, used to indicate whether the traveling direction of each of the first to sixth primitives Pr_1 to Pr_6 matches the downward direction DW; and second data information D_DATA_2, used to indicate whether the traveling direction of each of the first to sixth primitives Pr_1 to Pr_6 matches the upward direction UP. The primitive direction check circuit 221 may store the first data information D_DATA_1 and the second data information D_DATA_2 in the first storage area Area_1 and the second storage area Area_2 of the primitive direction information storage circuit 222, respectively. In an exemplary embodiment, the primitive direction check circuit 221 may respectively set the first data information D_DATA_1 and the second data information D_DATA_2 to be stored in the first storage area Area_1 and the second storage area Area_2. Specifically, the primitive direction check circuit 221 may store the first data information D_DATA_1 in the bit regions of the first to sixth primitives Pr_1 to Pr_6 corresponding to the first storage area Area_1, respectively, and store the second data information D_DATA_2 in the bit regions of the first to sixth primitives Pr_1 to Pr_6 corresponding to the second storage area Area_2, respectively. In an exemplary embodiment, the first storage area Area_1 and the second storage area Area_2 may be implemented as different registers or as one register separately. However, the inventive concept is not limited to the embodiments, and the first storage area Area_1 and the second storage area Area_2 may be implemented as various memories.

[0052] The first data information D_DATA_1 may have a value of "011000", which may indicate that the traveling direction of each of the fourth primitive Pr_4 and the fifth primitive Pr_5 matches the downward direction DW. The second data information D_DATA_2 may have a value of "100011", which may indicate that the traveling direction of each of the first primitive Pr_1, the second primitive Pr_2, and the sixth primitive Pr_6 matches the upward direction UP.

[0053] refer to Figure 5C , the wrapping number generation circuit 223 may generate a first primitive mask PM_1 for the first pixel PX_1 and a second primitive mask PM_2 for the second pixel PX_2 in parallel or sequentially with the primitive direction information generation operation of the primitive direction check circuit 221. Although an example using two pixels (i.e., first and second pixels PX_1 and PX_2) is listed below for simplicity, the inventive concept is not limited thereto. A primitive mask for three or more pixels may be generated, and wrapping numbers for three or more pixels may be generated.

[0054] In an exemplary embodiment, the surround number generation circuit 223 may set a bit corresponding to a primitive viewed by a specific pixel (e.g., the first and second pixels PX_1 and PX_2) in one direction (e.g., the right direction) to "1", set a bit corresponding to a primitive not viewed by the first and second pixels PX_1 and PX_2 in the one direction to "0", and generate the first and second primitive masks PM_1 and PM2. The one direction may be perpendicular to Figure 5A Each of the downward direction DW and the upward direction UP. However, the above embodiments are merely examples, and the inventive concept is not limited thereto. In another embodiment, the surround number generation circuit 223 may set the bit corresponding to the primitive viewed in one direction by the first and second pixels PX_1 and PX_2 to "0", set the bit corresponding to the primitive not viewed in the one direction by the first and second pixels PX_1 and PX_2 to "1", and generate the first and second primitive masks PM_1 and PM2.

[0055] Therefore, the wrapping number generation circuit 223 may generate a first primitive mask PM_1 having a value of “001000” for the first pixel PX_1, and generate a second primitive mask PM_2 having a value of “010001” for the second pixel PX_2. The wrapping number generation circuit 223 may perform the operations of generating the first primitive mask PM_1 and generating the second primitive mask PM_2 in parallel.

[0056] refer to Figure 5D The surround number generation circuit 223 can read the first data information D_DATA_1 and the second data information D_DATA_2 from the primitive direction information storage circuit 260, and generate corresponding surround numbers WN_1 and WN_2 of the first pixel PX_1 and the second pixel PX_2 by using the first data information D_DATA_1, the second data information D_DATA_2, and the first and second primitive masks PM_1 and PM_2.

[0057] In an exemplary embodiment, in order to generate a first surround number WN_1 of a first pixel PX_1, the surround number generation circuit 223 may perform a first comparison operation between bits corresponding to the first primitive mask PM_1 and the first data information D_DATA_1, respectively, and perform a second comparison operation between bits corresponding to the first primitive mask PM_1 and the second data information D_DATA_2, respectively. Thereafter, the surround number generation circuit 223 may generate the first surround number WN_1 using the results of the first comparison operation and the second comparison operation. In order to generate a second surround number WN_2 of a second pixel PX_2, the surround number generation circuit 223 may perform a first comparison operation between bits corresponding to the second primitive mask PM_2 and the first data information D_DATA_1, respectively, and perform a second comparison operation between bits corresponding to the second primitive mask PM_2 and the second data information D_DATA_2, respectively. Subsequently, the surround number generation circuit 223 may generate the second surround number WN_2 using the results of the first comparison operation and the second comparison operation. The surround number generation circuit 223 may perform the operation of generating the first surround number WN_1 and the operation of generating the second surround number WN_2 in parallel.

[0058] In an example, the first and second comparison operations performed by the wraparound number generation circuit 223 may be an AND operation, and the difference between the results of the first and second comparison operations may be used to generate the first and second wraparound numbers WN_1 and WN_2. Therefore, the wraparound number generation circuit 223 may generate a first wraparound number WN_1 having a value of "1" and a second wraparound number WN_2 having a value of "0".

[0059] Figure 6 is a block diagram of a method of storing primitive direction information of the primitive direction check circuit 221 according to an exemplary embodiment.

[0060] refer to Figure 6, the primitive direction check circuit 221 may include a storage area setting circuit 221a and an address table 221b, and the primitive direction information storage circuit 260 may include a plurality of storage areas Area_1 to Area_N. The primitive direction check circuit 221 may set a storage area for the primitive direction information Pr_D_Info based on the configuration of the primitive direction information storage circuit 260. In an exemplary embodiment, the storage area is set in advance. In one example, the storage area setting circuit 221a may set a storage area among the storage areas Area_1 to Area_N that can store at least the number of bits of the primitive direction information Pr_D_Info corresponding to the number of primitives included in the predetermined path as an area for storing the primitive direction information Pr_D_Info. In one example, when each of the first data information and the second data information included in the primitive direction information Pr_D_Info includes "6" bits or less, the storage area setting circuit 221a may set the first storage area Area_1 and the second storage area Area_2 as an area for storing the primitive direction information Pr_D_Info. In another example, when each of the first data information and the second data information contained in the primitive direction information Pr_D_Info is more than "6" bits and equal to or less than "12" bits, the storage area setting circuit 221a can set the N-1th storage area Area_N-1 and the Nth storage area Area_N as areas for storing the primitive direction information Pr_D_Info. However, the inventive concept is not limited to the example. Even when each of the first data information and the second data information contained in the primitive direction information Pr_D_Info includes "6" bits or less, the storage area setting circuit 221a can set the Nth storage area Area_N as an area for storing the primitive direction information Pr_D_Info, and can set an area for storing both the first data information and the second data information in the Nth storage area Area_N by dividing the Nth storage area Area_N.

[0061] The storage area setting circuit 221a may arrange the storage area setting information by using the address table 221b. In addition, the address table 221b may include address information indicating the storage area of ​​the primitive direction information storage circuit 260 in which the primitive direction information Pr_D_Info is stored. The surround number generation circuit 223 ( Figure 4 ) can refer to the address table 221b to read the primitive direction information Pr_D_Info used to generate the surround number from the primitive direction information storage circuit 260.

[0062] although Figure 6An example is shown in which the primitive direction information storage circuit 260 includes storage areas Area_1 to Area_N having different storable bits, but the inventive concept is not limited thereto. In various other exemplary embodiments, the primitive direction information storage circuit 260 may include storage areas that all have the same storable bit number or include only one storage area with a predetermined storable bit number.

[0063] Figure 7 is a block diagram of a pre-processing operation of algorithm circuit 320 according to an exemplary embodiment.

[0064] refer to Figure 7 , the algorithm circuit 320 may include a primitive direction checking circuit 321 and a pre-processing circuit 322. Since a detailed description of the primitive direction checking circuit 321 is presented above, the pre-processing circuit 322 will be mainly described below.

[0065] When the storage area of ​​the primitive direction information storage circuit configured to store primitive direction information is capable of storing N bits, the preprocessing circuit 322 according to an exemplary embodiment may determine, based on the path data, whether the number of primitives included in the path exceeds N. The preprocessing circuit 322 may perform a preprocessing operation on the path data to adjust the number of primitives to N or less based on the determination result.

[0066] Figure 8 is a flowchart of a preprocessing operation of path data according to an exemplary embodiment. Figure 7 describe Figure 8 Flowchart of the process.

[0067] refer to Figure 8 , in operation S100( Figure 2 ), the preprocessing circuit 322 may determine the number of primitives included in the predetermined path based on the path data (S200). The preprocessing circuit 322 may determine whether the number of primitives exceeds a reference value (S210). The reference value may be set according to the configuration of the storage circuit in which the primitive direction information is stored. That is, the reference value may be determined based on the number of storable bits of the storage area of ​​the storage circuit. For example, when the number of storable bits of the storage area is N, the reference value may be set to N.

[0068] When the result of operation S210 is yes, the preprocessing circuit 322 may perform a preprocessing operation of segmenting the path so that the number of primitives may be adjusted to a reference value or less (S220). When the result of operation S210 is no, operation S110 may be performed ( Figure 1 ).

[0069] Fig. 9A and Fig. 9Bis a schematic diagram of a preprocessing operation according to an exemplary embodiment. Figure 7 describe Fig. 9A and Fig. 9B In the following, it is assumed that the number of primitives (or Figure 8 The reference value) is 6, and the path in the bounding box BB includes the first to twelfth primitives Pr_1 to Pr_12.

[0070] refer to Fig. 9A , since the number of primitives in the bounding box BB is currently 12, the pre-processing circuit 322 may perform a pre-processing operation on the path data and divide the bounding box BB into a first sub-bounding box BB_1 and a second sub-bounding box BB_2. The sub-path included in the first sub-bounding box BB_1 may include the first to sixth primitives Pr_1 to Pr_6, and the sub-path included in the second sub-bounding box BB_2 may include the seventh to twelfth primitives Pr_7 to Pr_12.

[0071] The rendering device (or graphics processing device) may perform rendering operations in units of sub-bounding boxes (e.g., BB_1 and BB_2). That is, the primitive direction check circuit 321 may generate primitive direction information in units of sub-bounding boxes (e.g., BB_1 and BB_2), and the generated primitive direction information may be appropriately stored in the storage circuit.

[0072] Assume that Fig. 9B The rendering device (or graphics processing device) performs a tile-based path rendering operation. That is, the rendering device (or graphics processing device) may divide the entire frame or a portion of the frame into continuous small-sized tiles and perform a rendering operation. For example, a tile may include 32×32 pixels.

[0073] refer to Fig. 9B , when the number of primitives in a tile exceeds the reference value ( Figure 8 ), the pre-processing circuit 322 may perform an adaptive tiling operation on the tile and divide the tile into a plurality of sub-tiles Tile_1 to Tile_4. In addition, when the number of primitives in the sub-tiles Tile_1 to Tile_4 still exceeds the reference value ( Figure 8 ), the pre-processing circuit 322 may perform an adaptive blocking operation on the corresponding sub-tile Tile_1 and divide the sub-tile Tile_1 into other sub-tiles Tile_11 to Tile_14.

[0074] As described above, the rendering device (or graphics processing device) may use a method including calculating a value equal to or less than a reference value ( Figure 8) to perform tile-based rendering operations on the divided sub-tiles Tile_1 to Tile_4 of the primitive provided by the number.

[0075] FIG. 10A to FIG. 10D is a diagram of an example in which a rendering apparatus according to an exemplary embodiment selects different sides and calculates the surrounding number of a pixel.

[0076] FIG. 10A to FIG. 10D An object including vertices 1 to 5 is shown. Figures 10A to 10D The same object is shown in FIG. 1 with a star-shaped closed polygonal shape. Fig. 10A , the rendering device according to the embodiment may determine the direction of the primitive including vertices 1 to 5 and generate primitive direction information. In addition, the rendering device may determine whether the path is located on the right side of the pixel P (for example, the position on the virtual ray from the pixel P along the right horizontal direction) and generate a primitive mask. The rendering device may obtain a value of "+2" as the surrounding number of the pixel P.

[0077] refer to Fig. 10B , the rendering device according to the embodiment may determine the direction of the primitive including vertices 1 to 5 and generate primitive direction information. In addition, the rendering device may determine whether the path is located on the left side of the pixel P (for example, the position on the virtual ray along the left horizontal direction from the pixel P) and generate a primitive mask. The rendering device may obtain a value of "+2" as the surrounding number of the pixel P.

[0078] refer to Fig. 10C , the rendering device according to the embodiment may determine the direction of the primitive including vertices 1 to 5 and generate primitive direction information. In addition, the rendering device may determine whether the path is located on the upper side of the pixel P (for example, the position on the virtual ray along the upper horizontal direction from the pixel P) and generate a primitive mask. The rendering device may obtain a value of "+2" as the surrounding number of the pixel P.

[0079] refer to Fig. 10D , the rendering device according to the embodiment may determine the direction of the primitive including vertices 1 to 5 and generate primitive direction information. The rendering device may determine whether the path is located on the lower side of the pixel P (e.g., the position on the virtual ray along the lower horizontal direction from the pixel P) and generate a primitive mask. The rendering device may obtain a value of "+2" as the surrounding number of the pixel P.

[0080] As described above, even if the rendering device selects any side of the pixel P to calculate the surrounding number of the pixel P, the same result can be obtained. FIG. 10A to FIG. 10D As shown in , among the regions divided by the paths, all pixels P in the same region may have the same surrounding number.

[0081] Fig.11is a flowchart of a rendering operation according to an exemplary embodiment. Specifically, Fig.11 is the operation determination circuit 140 ( Figure 1 ) method.

[0082] refer to Fig.11 , the determination circuit 140 may receive the surrounding number WN and the color allocation rule FR of the pixel (S300). The determination circuit 140 may determine whether the color allocation rule FR is the non-zero surrounding rule Non-Zero (S310). When the color allocation rule FR is the non-zero surrounding rule Non-Zero, the surrounding number WN of the pixel is checked to confirm whether it is "0" (S330). When the surrounding number WN of the pixel is not "0" (S330, yes), the determination circuit 140 may perform a rendering operation using the color determined for the pixel (S350). In one example, the determination circuit 140 may also receive information about a color determined by an external device (e.g., a central processing unit (CPU)) and perform a rendering operation using the determined color. When the surrounding number WN of the pixel is "0" (S330, no), the determination circuit 140 may skip the rendering operation using the color determined for the pixel (S350), and may perform a rendering operation on the next pixel by determining whether the rendering operation has been performed for all received pixels (S360).

[0083] When the color assignment rule FR is not the non-zero wrapping rule Non-Zero, the determination circuit 140 may determine whether the color assignment rule FR is the parity rule Even-Odd (S320). When the color assignment rule FR is the parity rule Even-Odd, the wrapping number WN of the pixel is checked to confirm whether it is an odd number (S340). In one example, the determination circuit 140 may determine whether the wrapping number WN of the pixel is an odd number by checking whether the remainder of the wrapping number WN divided by 2 is 1. When the wrapping number WN of the pixel is an odd number (S340, yes), the determination circuit 140 may perform a rendering operation using the color determined for the pixel (S350). When the wrapping number WN of the pixel is not an odd number (S340, no), that is, when the wrapping number WN of the pixel is an even number, the determination circuit 140 may skip the rendering operation using the color determined for the pixel (S350), and may perform a rendering operation on the next pixel by determining whether the rendering operation has been performed for all received pixels (S360).

[0084] The determination circuit 140 may determine whether the rendering operation has been performed on all received pixels corresponding to the surround number (S360). When the rendering operation has not been performed on all received pixels, the determination circuit 140 may perform the rendering operation by repeating operations S310 to S350. When the rendering operation has been performed on all received pixels, the determination circuit 140 may end the rendering operation.

[0085] Fig.12 is a diagram for explaining the determination circuit 140 ( Figure 1 ) is a schematic diagram of an example of determining whether to set a color for each pixel.

[0086] exist Fig.12 , (a) shows the use of an algorithm circuit 120 ( Figure 1 ) shows the result obtained by calculating the wrapping number WN of each pixel included in the frame 410. (b) shows the result obtained by assigning color values ​​to each pixel according to the non-zero wrapping rule. In addition, (c) shows the result obtained by assigning color values ​​to each pixel according to the even-odd rule.

[0087] like Fig.12 As shown in (a) of FIG. 4 , the surround number WN of each pixel included in the frame 410 may be calculated. Specifically, the surround number WN of each pixel included in the first area 411 may be calculated as 0, the surround number WN of each pixel included in the second area 412 may be calculated as +1, and the surround number WN of each pixel included in the third area 413 may be calculated as +2.

[0088] As an example, the determination circuit 140 may determine whether to set a color for each pixel based on a non-zero surround rule. Here, the non-zero surround rule may refer to assigning a color value to a pixel whose surround number WN has a non-zero value. Fig.12 (b), according to the non-zero winding rule, the circuit 140 can determine the circuit 140 included in Fig.12 Colors are set for pixels in the second region 412 and the third region 413 shown in (a), and colors may not be set for pixels included in the first region 411.

[0089] As another example, the determination circuit 140 may determine whether to set a color for each pixel based on an even-odd rule. Here, the even-odd rule may refer to assigning a color value to a pixel whose surrounding number WN has an odd value. Here, an odd value of the surrounding number WN of a pixel may refer to an odd absolute value of the surrounding number WN of the pixel. For example, in both cases where the surrounding number WN of a pixel is +3 and -3, the surrounding number WN of the pixel may be determined to have an odd value. Fig.12 (c), according to the odd-even rule, the determination circuit 140 can include Fig.12 Colors are set for pixels in the second region 412 shown in (a), and colors may not be set for pixels included in the first region 411 and the third region 413.

[0090] Fig.13 is a block diagram of a computing device 1000 according to an exemplary embodiment.

[0091] refer to Fig.13 , the computing device 1000 may include a system memory 1010 , a central processing unit (CPU) 1020 , a system interface 1030 , a graphics processing unit (GPU) 1040 , a GPU local memory 1050 , and a display 1060 .

[0092] The CPU 1020 may execute programming commands stored in the system memory 1010, operate based on data stored in the system memory 1010, and communicate with the GPU 1040 via the system interface 1030, wherein the system interface 1030 is configured to bridge communication between the CPU 1020 and the GPU 1040. The CPU 1020, the GPU 1040, and the system interface 1030 may be integrated into a single processing unit. In addition, some functions of the GPU 1040 may be included in a chip of another type of dedicated processing unit or coprocessor. The system memory 1010 may include a DRAM, which may be directly connected to the CPU 1020 or indirectly connected to the CPU 1020 through the system interface 1030. To render graphics data and images stored in the GPU local memory 1050, the GPU 1040 may receive path data sent by the CPU 1020 and process the path data. The GPU local memory 1050 may be implemented as any one of a memory of the GPU 1040, an on-chip memory, and a peer memory. The GPU 1040 may display a specific graphic image stored in the GPU local memory 1050 on the display 1060 .

[0093] System memory 1010 may include application 1012, application data 1014, GPU driver 1016, and GPU driver data 1018. Application 1012 may send at least one shader program to a graphics application programming interface (API) to process the at least one shader program in GPU driver 1016. A high-level shader program may generally be a source code text of a general high-level programming command designed to operate on at least one shader, and the functionality of the graphics API may be implemented in GPU driver 1016.

[0094] The GPU local memory 1050 may include a rendering program 1052 and a frame buffer 1055. The frame buffer 1055 may include at least one two-dimensional (2D) surface for driving the display 1060. Since the frame buffer 1055 includes at least one 2D surface, the GPU 1040 may perform a rendering operation using one 2D surface, and the rendering result may be used to drive the display 1060. According to an exemplary embodiment, the rendering program 1052 may include a primitive direction check module 1053 and a pre-processing module 1054. The term "module" used herein may refer to a software or hardware component, such as a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC), and the "module" may perform a specific function. When the "module" refers to a hardware component, the primitive direction check module 1053 and the pre-processing module 1054 may be included in the GPU 1040. However, the "module" is not limited to software or hardware. The "module" may be included in an addressable memory medium or configured to replicate at least one processor. Accordingly, in examples, "modules" may include components (e.g., software components, object-oriented software components, class components, and task components), processes, functions, properties, procedures, subroutines, program code segments, drivers, firmware, microcodes, circuits, data, databases, data structures, tables, arrays, and variables. The functionality provided in components and "modules" may be combined by performing a reduced number of components and "modules," or further divided into additional components and "modules."

[0095] The GPU 1040 may include a plurality of cores 1041 and a register file 1044. The register file 1044 may include a plurality of registers having a predetermined memory capacity. The core 1041 may run a rendering program 1052 based on the path data received from the CPU 1020 and perform a rendering operation. The core 1041 according to an exemplary embodiment may generate primitive direction information contained in the path of the path data based on the primitive direction check module 1053 and store the primitive direction information in the register file 1044. The core 1041 may generate a plurality of pixel surround numbers using the primitive direction information stored in the register file 1044 and perform a rendering operation using the surround numbers. The core 1041 may perform the operation of generating the surround numbers of each pixel in parallel by using a plurality of threads.

[0096] In addition, the core 1041 may perform a preprocessing operation on the path data based on the preprocessing module 1054, and generate primitive direction information suitable for the configuration of the register file 1044 (e.g., the memory size of the register). However, the inventive concept is not limited to the above example, and the preprocessing operation may be performed by the CPU 1020. In an exemplary embodiment, the CPU 1020 may preprocess the path data so that a predetermined path includes a number of primitives that is equal to or less than the maximum number of primitives of the path. The maximum number of primitives of the path may be set in advance based on the number of storable bits of the register of the register file 1044. Thereafter, the CPU 1020 may provide the processed path data to the GPU 1040. The method of preprocessing the path data by using the CPU 1020 may be similar to the method of referring to FIG. Fig. 9A and Fig. 9B The same or similar description.

[0097] Typical examples of exemplary embodiments of the inventive concept are disclosed in the above description and accompanying drawings. Although specific terms are used, they are used in a general and descriptive sense only and not for the purpose of limitation. It will be understood by those skilled in the art that various changes in form and details may be performed on the disclosed exemplary embodiments without departing from the spirit and scope of the inventive concept as defined by the appended claims.

Claims

1. A device configured to render an object including a path, the device comprising: Storage circuit; The algorithm circuit is configured as follows: determining directions of a plurality of primitives in the path based on the path data, Generate primitive direction information, Control to store primitive direction information in a storage circuit, and generating a wrapping number for each of a plurality of pixels using the stored primitive direction information; and a determination circuit configured to determine whether a shading operation will be performed based on the generated winding number, wherein when the number of multiple graphic elements in the path exceeds the number of storable bits of the storage area, the algorithm circuit is further configured to perform a preprocessing operation on the path data to adjust the number of multiple graphic elements to the number of storable bits of the storage area or to a number less than the number of storable bits of the storage area.

2. The device according to claim 1, wherein: The algorithm circuit is further configured to: generating a primitive mask for each of the plurality of pixels based on whether a virtual line extending from each of the plurality of pixels along a first direction intersects at least one of the plurality of primitives; performing an arithmetic operation using the generated primitive mask and the stored primitive direction information; and A surround number is generated for each of the plurality of pixels.

3. The device of claim 2, wherein: The algorithm circuit is further configured to determine whether the plurality of primitives have a second orientation or a third orientation, and Wherein, the first direction is perpendicular to each of the second direction and the third direction.

4. The device of claim 1, wherein: The arithmetic circuit is further configured to perform operations of generating a surround number for each of the plurality of pixels in parallel.

5. The device of claim 1, wherein: The storage circuit includes at least one storage area configured to store N bits of information, where N is an integer equal to or greater than 1, and The algorithm circuit is further configured to store the primitive direction information in a bit region of a storage region corresponding to each of the plurality of primitives.

6. The device of claim 1, wherein: The pre-processing operation includes: Splitting the path into at least two sub-paths; and Generating primitive direction information for each of the at least two sub-paths.

7. The device of claim 1, wherein: The pre-processing operation includes: When the device renders the object including the path using a tile-based rendering method, the path data is segmented in units of tiles.

8. The device of claim 1, wherein: The storage circuit includes at least one of: a plurality of registers, a plurality of flip-flops, and a plurality of special registers with multiple ports, which respectively correspond to a plurality of storage areas for generating the wraparound numbers.

9. The device of claim 1, wherein: The path data includes information about a color allocation rule based on the winding number, and The determining circuit is further configured to perform a coloring operation based on the winding number and the color allocation rule.

10. The device of claim 1, wherein: When the generation of the winding number based on the path data is completed, the algorithm circuit is further configured to control to delete the primitive direction information stored in the storage circuit to generate the winding number of the next path data.

11. A method for rendering an object including a path using a graphics processing device, the method comprising: obtaining path data including information about vertices in the path and commands corresponding to the path; generating, based on the path data, primitive direction information indicating directions of a plurality of primitives in the path; Based on the number of the plurality of graphic elements in the path exceeding the number of storable bits of the storage area, performing a preprocessing operation on the path data to adjust the number of the plurality of graphic elements to the number of storable bits of the storage area or to a number less than the number of storable bits of the storage area; generating a surround number for each of a plurality of pixels using the primitive direction information; as well as A determination is made based on the winding number whether a shading operation is to be performed.

12. The method of claim 11, wherein: The generating of the graphic element direction information comprises: performing a first determination operation, the first determination operation comprising determining whether the plurality of primitives have a first direction; generating first data information based on a result of the first determining operation; performing a second determination operation, the second determination operation comprising determining whether the plurality of primitives have a second direction opposite to the first direction; and Second data information is generated based on a result of the second determining operation.

13. The method of claim 12, wherein: The generated winding number includes: generating a primitive mask for each of the plurality of pixels depending on whether a virtual line extending from each of the plurality of pixels along a third direction intersects at least one of the plurality of primitives; and An arithmetic operation is performed using the primitive mask, the first data information, and the second data information to generate the wrapping number.

14. The method of claim 13, wherein: The third direction is perpendicular to each of the first direction and the second direction.

15. The method of claim 13, wherein: The primitive mask, the first data information, and the second data information have a number of bits corresponding to the number of the plurality of primitives, The performing of an algorithm operation using the primitive mask, the first data information, and the second data information includes: performing a first comparison operation between bits corresponding to the primitive mask and bits corresponding to the first data information; performing a second comparison operation between bits corresponding to the primitive mask and bits corresponding to the second data information; and The wraparound number is generated using a result of the first comparison operation and a result of the second comparison operation.

16. The method of claim 11, wherein: The graphics processing device includes a memory circuit for performing an arithmetic operation to generate said wraparound number, and The generating of the graphic element direction information comprises storing the graphic element direction information in a predetermined storage area of ​​the storage circuit.

17. The method of claim 11, wherein: The graphics processing device includes a storage circuit, the storage circuit includes an N-bit storage area, the N-bit storage area is configured to store the primitive direction information, wherein N is an integer equal to or greater than 1, and The path data is preprocessed so that the number of the plurality of graphic elements in the path corresponding to the path data is N or less.

18. The method of claim 11, wherein: The graphics processing device comprises a storage circuit, the storage circuit comprises the storage area, the storage area is configured to store the primitive direction information, Wherein, the storage area is an N-bit storage area, and Wherein, the method further comprises: determining whether the number of the plurality of primitives in the path exceeds N; and The pre-processing operation is performed on the path data to adjust the number of the plurality of primitives to N or less based on a result of determining whether the number of the plurality of primitives in the path exceeds N.

19. A computing device comprising: a central processing unit CPU configured to generate path data corresponding to the path in the frame; A graphics processing unit GPU, configured to receive the path data and perform a rendering operation based on the path data; as well as The GPU local memory is configured to store a rendering program, wherein the rendering operation is performed by the GPU based on the rendering program, The GPU comprises a register file including a plurality of registers, and Wherein, the GPU is further configured as: determining directions of a plurality of primitives in the path based on the path data, Generate primitive direction information, controlling to store the primitive direction information in the register file, and generating a wrapping number for each of a plurality of pixels using the stored primitive direction information, and Wherein, when the number of multiple graphics primitives in the path exceeds the number of storable bits of the register file, the GPU is further configured to perform a preprocessing operation on the path data to adjust the number of multiple graphics primitives to the number of storable bits of the register file or to a number less than the number of storable bits of the register file.

Images