An upper electrode device and a plasma processing apparatus

Abstract

An embodiment of the present application provides an upper electrode device, which is applied to a plasma processing apparatus. The upper electrode device is used to pressurize a reaction gas to excite the reaction gas into a plasma state and act on a wafer to be processed. The upper electrode device includes: a first part, which is the central part of the upper electrode device. Among them, the first part includes a first surface area protruding towards the wafer to be processed, and the width of the first surface area in a first direction is greater than the width in a second direction. The first direction and the second direction are two mutually perpendicular directions extending along the plane direction of the upper electrode device.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing, and particularly to an upper electrode device and a plasma processing apparatus. Background Art

[0002] With the improvement of the integration degree of semiconductor devices, the line width of semiconductor devices is getting smaller and smaller, the control of critical dimensions is becoming more and more important, and the requirements for the etching process are also getting higher and higher. The etching process is a process of selectively removing the material formed on the surface of the silicon wafer or selectively removing the silicon wafer material. The etching process includes wet etching and dry etching. Dry etching has become one of the most commonly used etching processes today due to its high selectivity and strong controllability. As a commonly used dry etching process, plasma etching usually introduces an etching gas into a plasma processing apparatus, ionizes the etching gas into plasma, and uses the plasma to etch the wafer to be etched.

[0003] In many plasma etching processes, the plasma concentration at the center of the electrode is usually greater than the plasma concentration at the periphery. This non-uniformity of the plasma concentration distribution will directly lead to non-uniformity of wafer etching. Therefore, controlling the plasma concentration distribution in the plasma processing apparatus has become an urgent problem to be solved by those skilled in the art. Summary of the Invention

[0004] Embodiments of the present application provide an upper electrode device and a plasma processing apparatus to solve at least one problem existing in the prior art.

[0005] To achieve the above object, the technical solution of the embodiments of the present application is implemented as follows:

[0006] In a first aspect, an upper electrode device provided by an embodiment of the present application is applied to a plasma processing apparatus. The upper electrode device is used to pressurize a reaction gas to excite the reaction gas into a plasma state and act on a wafer to be processed. The upper electrode device includes: a first part, which is the central part of the upper electrode device. Wherein,

[0007] The first part includes a first surface area protruding towards the wafer to be processed. The width of the first surface area in a first direction is greater than the width in a second direction. The first direction and the second direction are two mutually perpendicular directions extending along the plane direction of the upper electrode device.

[0008] In an optional embodiment, the first surface area has a center and an outer periphery, and the thickness of the central part decreases along the direction from the center to the outer periphery.

[0009] In an alternative embodiment, the upper electrode device further includes: a second portion surrounding the first portion; wherein,

[0010] The second portion includes a second surface region that is concave towards the wafer to be processed.

[0011] In an alternative embodiment, the outer perimeter of the first surface region is connected to the inner perimeter of the second surface region, so as to transition from the protruding first surface region to the concave second surface region along the outer perimeter of the first surface region.

[0012] In an alternative embodiment, the center of the first portion is the center of the upper electrode device.

[0013] In an alternative embodiment, the first surface region is symmetric along the first direction; and / or,

[0014] The first surface region is symmetric along the second direction.

[0015] In an alternative embodiment, the top of the outer perimeter of the first surface region is tapered along the first direction.

[0016] In an alternative embodiment, the top of the outer perimeter of the first surface region is arc-shaped along the second direction.

[0017] In an alternative embodiment, the first surface region and / or the second surface region includes a plurality of spray holes, and reaction gas is input into the reaction chamber of the plasma processing device through the plurality of spray holes and acts on the wafer to be processed.

[0018] In an alternative embodiment, the wafer to be processed is a substrate of a 3D memory, and a formation region of a slit in a gate line layer is included on the 3D memory, and the extending direction of the slit in the gate line layer corresponds to the second direction.

[0019] In a second aspect, an embodiment of the present application provides a plasma processing device, the device includes: a reaction chamber, a wafer support, a lower electrode device, and the upper electrode device described in the first aspect.

[0020] An embodiment of the present application provides an upper electrode device, which is applied to a plasma processing apparatus. The upper electrode device is used to pressurize a reaction gas to excite the reaction gas into a plasma state and act on a wafer to be processed. The upper electrode device includes: a first part, which is the central part of the upper electrode device. Wherein, the first part includes a first surface area protruding towards the wafer to be processed, and the width of the first surface area in a first direction is greater than the width in a second direction, and the first direction and the second direction are two mutually perpendicular directions extending along the plane direction of the upper electrode device. In the embodiment of the present application, the central part of the upper electrode device provided includes a first surface area protruding towards the wafer to be processed, and the width of the central part in the first direction is greater than the width in the second direction. Thus, the regulation of the plasma concentration in the first direction of the central part of the upper electrode device is realized, and the non-uniformity of plasma processing in the first direction of the central part of the upper electrode device is improved. Description of the Drawings

[0021] Figure 1 A plasma processing apparatus provided by an embodiment of the present application;

[0022] Figure 2 A top view of the upper electrode device provided by an embodiment of the present application;

[0023] Figure 3 A cross-sectional view of the upper electrode device provided by an embodiment of the present application along the first direction;

[0024] Figure 4 A cross-sectional view of the upper electrode device provided by an embodiment of the present application along the second direction;

[0025] Figures 5a-5b An electron microscope image of a gate line layer slit formed by etching. Detailed Embodiments

[0026] Hereinafter, the exemplary embodiments disclosed in the present application will be described in more detail with reference to the drawings. Although the exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the specific embodiments set forth herein. On the contrary, these embodiments are provided so that the present application can be more thoroughly understood and the scope of the present application can be fully communicated to those skilled in the art.

[0027] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present application. However, it will be apparent to one of ordinary skill in the art that the present application may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the present application; that is, not all features of actual embodiments are described here, and well-known functions and structures are not described in detail.

[0028] In the drawings, for the sake of clarity, the dimensions of layers, regions, elements and their relative dimensions may be exaggerated. Throughout the drawings, like reference numerals indicate like elements.

[0029] It should be understood that when an element or layer is referred to as being "on", "adjacent to", "connected to" or "coupled to" another element or layer, it can be directly on, adjacent to, connected or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on", "directly adjacent to", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or portions, these elements, components, regions, layers and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or portion from another element, component, region, layer or portion. Thus, a first element, component, region, layer or portion discussed below may be denoted as a second element, component, region, layer or portion without departing from the teachings of the present application. And when discussing a second element, component, region, layer or portion, it does not necessarily imply that a first element, component, region, layer or portion exists in the present application.

[0030] Spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc. are used herein for convenience in describing the relationship of one element or feature shown in the figures to another element or feature. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figures is flipped, then an element or feature described as "under" or "beneath" or "underneath" another element or feature will be oriented "over" the other element or feature. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.

[0031] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present application. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.

[0032] In order to be able to understand the features and technical content of the embodiments of the present application in more detail, the implementation of the embodiments of the present application will be described in detail below with reference to the accompanying drawings. The accompanying drawings are for reference and illustration only and are not used to limit the embodiments of the present application.

[0033] Figure 1 A plasma processing apparatus provided for an embodiment of the present application, as Figure 1 shown, exemplarily shows a plasma processing apparatus 100. By way of example only, the plasma processing apparatus 100 can be used to perform etching, deposition, and / or other suitable plasma processing using a radio frequency electric field plasma. The embodiments of the present application will be described by taking a capacitively coupled plasma (CCP) processing apparatus as an example. The plasma processing apparatus 100 includes: a reaction chamber 110, an upper electrode device 120, a wafer support 130, and a lower electrode device 140. The wafer support 130 is, for example, an electrostatic chuck (ESC).

[0034] By way of example only, the upper electrode device 120 may include a gas distribution device for introducing and distributing reaction gases, such as a gas showerhead. In some embodiments, the lower electrode device 140 may be located within the wafer support 130. As Figure 1 shown, in the embodiments of the present application, the lower electrode device 140 may be connected to a radio frequency (RF) power supply 141, and the upper electrode device 120 is grounded to generate a radio frequency electric field between the two electrode devices. The wafer to be etched is placed between the upper electrode device 120 and the lower electrode device 140, and the reaction gas enters the reaction chamber 110 from the upper electrode device 120. The reaction gas is excited into a plasma state under the action of the radio frequency electric field between the upper electrode device 120 and the lower electrode device 140.

[0035] It should be noted that Figure 1 the arrows in Figure 1The dashed-line area in the reaction chamber 110 described in [reference] can be regarded as the formation area of the plasma sheath layer.

[0036] An embodiment of the present application provides an upper electrode device. Figure 2 As shown in the top view of the upper electrode device provided by the embodiment of the present application, Figure 2 the upper electrode device is applied to a plasma processing apparatus, and is used to pressurize a reaction gas to excite the reaction gas into a plasma state and act on a wafer to be processed; the upper electrode device includes: a first part 210, and the first part 210 is the central part of the upper electrode device; wherein,

[0037] the first part 210 includes a first surface area 211 protruding towards the wafer to be processed, the width of the first surface area 211 in a first direction is greater than the width in a second direction, and the first direction and the second direction are two mutually perpendicular directions extending along the plane direction of the upper electrode device 210. In actual application, the ratio range of the width of the first surface area 211 in the first direction to the width in the second direction can be 1.5 - 3.

[0038] The concentration distribution of the plasma will not only affect the etching effect, but also affect the thickness and shape of the plasma sheath layer formed between the upper electrode device and the lower electrode device. When the thickness of the plasma sheath layer is different, the boundary of the plasma sheath layer (the interface between the plasma sheath layer and the plasma) will become uneven, and at the junction of the concave and convex parts, there will be an inclined part in the boundary of the plasma sheath layer. At the inclined part of the boundary of the plasma sheath layer, the incident angle of the ions becomes inclined, resulting in tilting during etching and the so-called tilting issue. In the actual etching process, the uneven concentration distribution of the plasma will directly lead to uneven etching between the center and the peripheral area of the wafer.

[0039] In the embodiment of the present application, by providing a first surface area protruding towards the wafer to be processed on the upper electrode device, and the width of the first surface area in the first direction is greater than the width in the second direction, the plasma concentration along the first direction of the first surface area is reduced, and the slope of the central part in the first direction is gentler (the thickness of the central part in the first direction decreases at a lower rate or angle), then the gap between the first surface area and the wafer to be processed increases gently along the first direction, thereby improving the unevenness of the plasma concentration along the first direction of the first surface area and reducing the etching unevenness caused by the unevenness of the plasma concentration.

[0040] It should be noted that a certain site (notch) can be set on the wafer to be processed, and this positioning point corresponds to the 6 o'clock direction of the wafer to be processed. In practical applications, the first direction can correspond to the direction from 6 o'clock to 12 o'clock (Y-axis direction) of the wafer to be processed, and the second direction can correspond to the direction from 3 o'clock to 9 o'clock (X-axis direction) of the wafer to be processed.

[0041] Figure 3 The cross-sectional view of the upper electrode device provided by the embodiment of the present application along the first direction Figure 4 The cross-sectional view of the upper electrode device provided by the embodiment of the present application along the second direction, as Figures 2 to 4 shown, in the embodiment of the present application, the first surface area 211 has a center and an outer periphery, and the thickness of the first part 210 decreases along the direction from the center to the outer periphery. As Figure 3 and Figure 4 shown, the thickness of the first part 210 gradually decreases along the direction from the center to the outer periphery, and the degree of change of the thickness of the first part 210 along the second direction is greater than that along the first direction (that is, the slope of the protruding first surface area 211 is gentler along the first direction and steeper along the second direction). As Figure 2 shown, the outer periphery of the first surface area 211 is in a "spindle shape".

[0042] It should be noted that the thickness of the center of the first surface area 211 can be adjusted according to actual etching requirements. The thickness of the center of the first surface area 211 determines the degree of change of the thickness of the first part 210 along the direction from the center to the outer periphery (the reduction rate of the thickness), and also determines the degree of change of the gap between the first surface area 211 and the wafer to be processed (the increase rate of the gap), thereby affecting the plasma concentration between the first surface area 211 and the wafer to be processed.

[0043] In the embodiment of the present application, the upper electrode device further includes: a second part 220 surrounding the first part 210; wherein, the second part 220 includes a second surface area 221 that is concave towards the wafer to be processed. As Figure 2As shown, the inner perimeter of the second surface area 221 is "spindle-shaped", and the outer perimeter of the second surface area 221 is circular. In many plasma etching processes, the plasma concentration at the center of the upper electrode device is greater than the plasma concentration at the perimeter of the upper electrode device, resulting in uneven etching between the center and the perimeter regions of the wafer. Based on this, in the embodiments of the present application, a second surface area 221 that is concave towards the wafer to be processed is provided on the upper electrode device. The gap between the second surface area 221 and the wafer to be processed is greater than the gap between the first surface area 211 and the wafer to be processed. Thus, when the plasma diffuses in the reaction chamber, the plasma will diffuse from the region with a smaller gap (the first surface area 211) to the region with a larger gap (the second surface area 221). Therefore, the plasma concentration at the perimeter (the second surface area) of the upper electrode device is increased, and to a certain extent, the plasma concentration at the center (the first surface area) of the upper electrode device is also reduced, thereby improving the uneven etching between the center and the perimeter regions of the wafer.

[0044] As Figure 3 and Figure 4 shown, the width of the second surface area 221 from the inner perimeter to the outer perimeter along the first direction is less than the width of the second surface area 221 from the inner perimeter to the outer perimeter along the second direction.

[0045] In the embodiments of the present application, the outer perimeter of the first surface area 211 is connected to the inner perimeter of the second surface area 221, so as to transition from the protruding first surface area 211 to the concave second surface area 221 along the outer perimeter of the first surface area 211. In practical applications, the thickness of the outer perimeter of the first surface area 211 may be equal to the thickness of the inner perimeter of the second surface area 221. It should be noted that the thickness of the inner perimeter of the second surface area 221 is equal to the thickness of the outer perimeter of the second surface area 221.

[0046] In the embodiments of the present application, the distances between the outer perimeter of the first surface area 211 and the lower electrode device are equal, that is to say, the thicknesses of the first part 210 at the outer perimeter of the first surface area 211 are the same. The distances between the outer perimeter of the second surface area 221 and the lower electrode device are also equal.

[0047] In some embodiments, the second part 220 further includes a third surface area 222 facing the wafer to be processed and having a first thickness. The third surface area 222 surrounds the second surface area 221. The third surface area 222 is an annular area. The outer perimeter of the second surface area 221 is connected to the inner perimeter of the third surface area 222. In practical applications, the thickness of the outer perimeter of the first surface area 211, the thickness of the inner perimeter of the second surface area 221, and the thickness of the outer perimeter of the second surface area 221 can all be equal. Preferably, the thickness of the outer perimeter of the first surface area 211, the thickness of the inner perimeter of the second surface area 221, and the thickness of the outer perimeter of the second surface area 221 can all be equal to the first thickness. It should be noted that the ring width of the third surface area 222 is less than the width of the second surface area 221 from the inner perimeter to the outer perimeter along the first direction; the ring width of the third surface area 222 is less than the width of the first surface area 211 in the second direction.

[0048] In practical applications, the outer perimeter of the third surface area 222 can be the outer perimeter of the upper electrode device. The distance between any position of the third surface area 222 and the lower electrode device is equal.

[0049] In the embodiments of the present application, the center of the first part 210 is the center of the upper electrode device. The protruding vertex of the first surface area 211 is aligned with the center of the upper electrode device.

[0050] In the embodiments of the present application, the distance between the first surface area 211 and the lower electrode device is less than the distance between the other parts of the upper electrode device except the first surface area 211 and the lower electrode device; the distance between the second surface area 221 and the lower electrode device is greater than the distance between the other parts of the upper electrode device except the second surface area 221 and the lower electrode device. The distance between the first surface area 211 and the wafer to be processed is less than the distance between the other parts of the upper electrode device and the wafer to be processed; the distance between the second surface area 221 and the wafer to be processed is greater than the distance between the other parts of the upper electrode device and the wafer to be processed.

[0051] In the embodiments of the present application, the first surface area 211 is symmetric along the first direction; and / or, the first surface area 211 is symmetric along the second direction. Preferably, the first surface area 211 is symmetric along the first direction and the first surface area 211 is symmetric along the second direction.

[0052] Since the first surface region 211 is symmetric along the first direction (Y-axis direction) and along the second direction (X-axis direction), the gap between the first surface region 211 and the wafer to be processed gradually increases along both sides of the Y-axis and gradually increases along both sides of the X-axis. Thus, when the plasma diffuses in the reaction chamber, the plasma will diffuse from the region with a smaller gap (the central region of the first surface region 211) to the region with a larger gap (the outer periphery of the first surface region 211), thereby reducing the plasma concentration in the central region of the upper electrode device. Further, since the degree of increase in the gap between the first surface region 211 and the wafer to be processed along both sides of the Y-axis is less than the degree of increase along both sides of the X-axis, the degree of change in the plasma concentration in the Y-axis direction is less than the degree of change in the plasma concentration in the X-axis direction, thereby improving (reducing) the non-uniformity of the plasma concentration in the Y-axis direction and reducing the etching non-uniformity caused by the non-uniformity of the plasma concentration. It should be noted that the direction of the upper electrode device can be adjusted according to actual etching requirements. For example, when it is necessary to reduce the non-uniformity of the plasma concentration in the X-axis direction, the upper electrode device can be rotated so that the first direction corresponds to the X-axis direction.

[0053] In the embodiment of the present application, as Figure 2 shown, the top of the outer periphery of the first surface region 211 along the first direction is conical. The top of the outer periphery of the first surface region 211 along the second direction is arc-shaped. It should be noted that in actual applications, the shape of the outer periphery of the first surface region 211 can be adjusted according to actual etching requirements (such as adjusting the thickness of the corresponding region of the upper electrode device according to the region where the plasma concentration needs to be improved). For example, in a certain etching process, there is an offset problem in the etching within the rectangular region at the center of the wafer. In this case, the shape of the outer periphery of the first surface region can be set to a rectangle to improve the plasma concentration distribution in this region.

[0054] In the embodiment of the present application, the first surface region 211 and / or the second surface region 221 include a plurality of spray holes, and the reaction gas is input into the reaction chamber of the plasma processing device through the plurality of spray holes and acts on the wafer to be processed. In some embodiments, the second part 220 further includes a third surface region 222, and the third surface region 222 may also include a plurality of spray holes. In actual applications, the plurality of spray holes can be distributed in a circular ring shape to enable the reaction gas output from the upper electrode device to be evenly input into the reaction chamber.

[0055] In an embodiment of the present application, the wafer to be processed is a substrate of a 3D memory. The 3D memory has a formation region of a gate line layer slit, and the extending direction of the gate line layer slit corresponds to the second direction. Since the gate line layer slit extends along the X-axis direction of the wafer, during the actual etching process, the non-uniformity of the plasma concentration in the X-axis direction will not affect the gate line layer slit, but the non-uniformity of the plasma concentration in the Y-axis direction will affect the gate line layer slit, causing the gate line layer slit to shift in the Y-axis direction. The shift situation is as shown in Figure 5a and Figure 5b shown, Figure 5a which illustrates the situation where the gate line layer slit shifts towards the 12 o'clock direction of the wafer, Figure 5b and which illustrates the situation where the gate line layer slit shifts towards the 6 o'clock direction of the wafer. In the embodiment of the present application, by providing a first surface area protruding towards the wafer to be processed on the upper electrode device, and the width of the first surface area in the first direction is greater than the width in the second direction, that is, the slope of the central part in the first direction is gentler (the thickness of the central part in the first direction decreases at a lower rate or angle), then the gap between the first surface area and the wafer to be processed increases gently along the first direction, thereby improving the non-uniformity of the plasma concentration along the first direction of the first surface area and reducing the etching non-uniformity caused by the non-uniformity of the plasma concentration.

[0056] An embodiment of the present application provides an upper electrode device. The upper electrode device is applied in a plasma processing apparatus. The upper electrode device is used to pressurize a reaction gas to excite the reaction gas into a plasma state and act on the wafer to be processed; the upper electrode device includes: a first part, and the first part is the central part of the upper electrode device; wherein, the first part includes a first surface area protruding towards the wafer to be processed, the width of the first surface area in the first direction is greater than the width in the second direction, and the first direction and the second direction are two mutually perpendicular directions extending along the plane direction of the upper electrode device. The central part of the upper electrode device provided in the embodiment of the present application includes a first surface area protruding towards the wafer to be processed, and the width of the central part in the first direction is greater than the width in the second direction, that is, the slope of the central part in the first direction is gentler (the thickness of the central part in the first direction decreases at a lower rate or angle), thereby improving (reducing) the non-uniformity of the plasma concentration in the first direction and reducing the etching non-uniformity caused by the non-uniformity of the plasma concentration.

[0057] It should be understood that the "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, the "in one embodiment" or "in an embodiment" that appears throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the serial numbers of the above processes does not mean the sequence of execution. The execution sequence of each process should be determined by its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present application. The serial numbers of the embodiments of the present application above are only for description and do not represent the advantages or disadvantages of the embodiments.

[0058] In the embodiments provided in the present application, it should be understood that the disclosed device can be implemented in other ways. The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed in the present application can easily think of changes or substitutions, which should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An upper electrode device, characterized in that, the upper electrode device is applied to a plasma processing apparatus, and the upper electrode device is used to pressurize a reaction gas to excite the reaction gas into a plasma state and act on a wafer to be processed; the upper electrode device includes: a first part, and the first part is the central part of the upper electrode device; wherein, the first part includes a first surface area protruding toward the wafer to be processed, and the ratio of the width of the first surface area in a first direction to the width in a second direction is 1.5 to 3, and the degree of change of the thickness of the first part along the second direction is greater than the degree of change along the first direction, and the first direction and the second direction are two mutually perpendicular directions extending along the plane direction of the upper electrode device; the top of the outer periphery of the first surface area along the first direction is conical, and the top of the outer periphery of the first surface area along the second direction is arc-shaped; the wafer to be processed is a substrate of a 3D memory, and a formation area of a gate line layer slit is included on the 3D memory, and the extending direction of the gate line layer slit corresponds to the second direction.

2. The upper electrode device according to claim 1, characterized in that, the first surface area has a center and an outer periphery, and the thickness of the central part decreases along the direction from the center to the outer periphery.

3. The upper electrode device according to claim 1, characterized in that, the upper electrode device further includes: a second part surrounding the first part; wherein, the second part includes a second surface area recessed toward the wafer to be processed.

4. The upper electrode device according to claim 3, characterized in that, the outer periphery of the first surface area is connected to the inner periphery of the second surface area, so that along the outer periphery of the first surface area, it transitions from the protruding first surface area to the recessed second surface area.

5. The upper electrode device according to claim 1, characterized in that, the center of the first part is the center of the upper electrode device.

6. The upper electrode device according to claim 1, characterized in that, the first surface area is symmetric along the first direction; and / or, the first surface area is symmetric along the second direction.

7. The upper electrode device according to claim 3, characterized in that, the first surface area and / or the second surface area includes a plurality of spray holes, and the reaction gas is input into the reaction chamber of the plasma processing apparatus through the plurality of spray holes and acts on the wafer to be processed.

8. A plasma processing apparatus, characterized in that, the apparatus includes: a reaction chamber, a wafer support, a lower electrode device, and the upper electrode device according to any one of claims 1 to 7.

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