Thin film transistor array substrate and touch display panel

Abstract

The present application provides a thin film transistor array substrate and a touch display panel, wherein the thin film transistor array substrate includes a plurality of touch electrodes, each of which is electrically connected to a first common power line and a driver chip through a touch line; the touch electrodes include a first touch electrode, a second touch electrode and a third touch electrode arranged along a first direction; the number of touch lines electrically connected between the second touch electrode and the driver chip is greater than or equal to the number of touch lines electrically connected between the first touch electrode and the driver chip, and less than the number of touch lines electrically connected between the third touch electrode and the driver chip. The present application can eliminate or weaken voltage mutations on different touch electrodes, which is beneficial to improving the uniformity of the display screen.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a thin film transistor array substrate and a touch display panel. Background Art

[0002] With the development of touch display technology, in-cell touch display panels are increasingly used in electronic display devices such as mobile phones. Because in-cell touch display panels integrate touch function and display function, that is, both touch circuit and display circuit are made on a thin film transistor array substrate (TFT Array Substrate), it is conducive to improving the penetration and can make electronic display devices such as mobile phones thinner.

[0003] The touch function of the embedded touch display panel is achieved through the touch electrodes integrated in the thin film transistor array substrate and the touch wiring and driver chip electrically connected to the touch electrodes. Among them, the touch electrodes are electrically connected to the common electrodes in the thin film transistor array substrate. Therefore, the voltage change of the touch electrodes will directly affect the voltage state of the common electrodes, and then affect the display function of the display panel. The common power line and the driver chip are electrically connected to the touch electrodes through the touch wiring respectively, so as to realize the voltage transmission and signal acquisition of the touch electrodes. However, considering the limited number of channels used to connect the touch wiring in the driver chip, and the influence of the number of touch wiring on the panel resolution, it is usually impossible to ensure that each touch electrode is connected to the same number of touch wiring in actual production. The number of touch wirings connecting the touch electrodes has a direct influence on the voltage state on the touch electrode, and then affects the uniformity of the voltage distribution on the common electrode, causing the display panel to have problems of upper and lower split screens and uneven display. Summary of the invention

[0004] Based on the above-mentioned deficiencies in the prior art, the present application provides a thin film transistor array substrate and a touch display panel, which eliminates or weakens the voltage mutations on different touch electrodes by reasonably configuring the number of touch lines electrically connecting the touch electrodes and the driving chip, so that the voltage distribution on the touch electrodes and the common electrodes tends to be consistent, thereby improving the display uniformity of the display panel.

[0005] The present application provides a thin film transistor array substrate, comprising:

[0006] A base substrate having a non-display area;

[0007] A thin film transistor array layer is disposed on the base substrate; and

[0008] A touch function layer, disposed in the thin film transistor array layer, comprising a plurality of touch electrodes, each of which is electrically connected to the first common power line and the driving chip through a touch wiring;

[0009] The plurality of touch electrodes include a first touch electrode, a second touch electrode, and a third touch electrode arranged along a first direction, the number of touch lines electrically connected between the second touch electrode and the driver chip is greater than or equal to the number of touch lines electrically connected between the first touch electrode and the driver chip, and the number of touch lines electrically connected between the second touch electrode and the driver chip is less than the number of touch lines electrically connected between the third touch electrode and the driver chip;

[0010] Alternatively, the number of touch lines electrically connected between the second touch electrode and the driver chip is less than the number of touch lines electrically connected between the first touch electrode and the driver chip, and the number of touch lines electrically connected between the second touch electrode and the driver chip is greater than or equal to the number of touch lines electrically connected between the third touch electrode and the driver chip.

[0011] According to an embodiment of the present application, the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the first touch electrode and the first common power line, and the number of touch lines electrically connected between the second touch electrode and the first common power line is less than or equal to the number of touch lines electrically connected between the third touch electrode and the first common power line;

[0012] Alternatively, the number of touch lines electrically connected between the second touch electrode and the first common power line is less than or equal to the number of touch lines electrically connected between the first touch electrode and the first common power line, and the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the third touch electrode and the first common power line.

[0013] According to an embodiment of the present application, the number of the touch lines electrically connected between the second touch electrodes and the driver chip is greater than or equal to the number of the touch lines electrically connected between the first touch electrodes and the driver chip, and the number of the touch lines electrically connected between the second touch electrodes and the driver chip is less than the number of the touch lines electrically connected between the third touch electrodes and the driver chip; and

[0014] The number of touch lines electrically connected between the second touch electrode and the first common power line is less than or equal to the number of touch lines electrically connected between the third touch electrode and the first common power line, and the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the first touch electrode and the first common power line.

[0015] According to an embodiment of the present application, the first touch electrode and the second touch electrode are arranged adjacent to each other along the first direction, the number of touch lines electrically connected between the second touch electrode and the driving chip is equal to the number of touch lines electrically connected between the first touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the first touch electrode and the first common power line; or

[0016] The second touch electrode and the third touch electrode are arranged adjacent to each other along the first direction, the number of touch lines electrically connected between the second touch electrode and the driving chip is less than the number of touch lines electrically connected between the third touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is equal to the number of touch lines electrically connected between the third touch electrode and the first common power line.

[0017] According to an embodiment of the present application, the first touch electrode, the second touch electrode and the third touch electrode are sequentially arranged adjacent to each other along the first direction;

[0018] The number of the touch lines electrically connected between the second touch electrodes and the driving chip is equal to the number of the touch lines electrically connected between the first touch electrodes and the driving chip, and the number of the touch lines electrically connected between the second touch electrodes and the first common power line is greater than the number of the touch lines electrically connected between the first touch electrodes and the first common power line; and

[0019] The number of the touch lines electrically connected between the second touch electrode and the driving chip is less than the number of the touch lines electrically connected between the third touch electrode and the driving chip, and the number of the touch lines electrically connected between the second touch electrode and the first common power line is equal to the number of the touch lines electrically connected between the third touch electrode and the first common power line.

[0020] According to an embodiment of the present application, the number of the touch lines electrically connected between the second touch electrodes and the driver chip is greater than or equal to the number of the touch lines electrically connected between the third touch electrodes and the driver chip, and the number of the touch lines electrically connected between the second touch electrodes and the driver chip is less than the number of the touch lines electrically connected between the first touch electrodes and the driver chip; and

[0021] The number of touch lines electrically connected between the second touch electrode and the first common power line is less than or equal to the number of touch lines electrically connected between the first touch electrode and the first common power line, and the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the third touch electrode and the first common power line.

[0022] According to an embodiment of the present application, the first touch electrode and the second touch electrode are arranged adjacent to each other along the first direction, the number of touch lines electrically connected between the second touch electrode and the driving chip is less than the number of touch lines electrically connected between the first touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is equal to the number of touch lines electrically connected between the first touch electrode and the first common power line; or

[0023] The second touch electrode and the third touch electrode are arranged adjacent to each other along the first direction, the number of touch lines electrically connected between the second touch electrode and the driving chip is equal to the number of touch lines electrically connected between the third touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the third touch electrode and the first common power line.

[0024] According to an embodiment of the present application, the first touch electrode, the second touch electrode and the third touch electrode are sequentially arranged adjacent to each other along the first direction;

[0025] The number of the touch lines electrically connected between the second touch electrodes and the driving chip is less than the number of the touch lines electrically connected between the first touch electrodes and the driving chip, and the number of the touch lines electrically connected between the second touch electrodes and the first common power line is equal to the number of the touch lines electrically connected between the first touch electrodes and the first common power line; and

[0026] The number of touch lines electrically connected between the second touch electrode and the driving chip is equal to the number of touch lines electrically connected between the third touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the third touch electrode and the first common power line.

[0027] According to an embodiment of the present application, the touch electrode further includes a fourth touch electrode disposed between the second touch electrode and the driving chip along the first direction, and a virtual wiring is disposed on the fourth touch electrode, and the virtual wiring is electrically connected to the fourth touch electrode.

[0028] According to an embodiment of the present application, the sum of the number of the virtual wirings arranged on the fourth touch electrode and the number of the touch wirings electrically connected to the driver chip by the second touch electrode is greater than the number of the touch wirings electrically connected to the driver chip by the first touch electrode, and is less than or equal to the number of the touch wirings electrically connected to the driver chip by the third touch electrode; or

[0029] The sum of the number of the virtual routing lines arranged on the fourth touch electrode and the number of the touch routing lines electrically connected to the driving chip by the second touch electrode is less than or equal to the number of the touch routing lines electrically connected to the driving chip by the first touch electrode, and is greater than the number of the touch routing lines electrically connected to the driving chip by the third touch electrode.

[0030] According to an embodiment of the present application, a virtual wiring is provided between the second touch electrode and the driving chip, and one end of the virtual wiring is electrically connected to the second touch electrode;

[0031] The sum of the number of the virtual lines and the number of the touch lines electrically connected to the driver chip by the second touch electrodes is greater than the number of the touch lines electrically connected to the driver chip by the first touch electrodes, and is less than or equal to the number of the touch lines electrically connected to the driver chip by the third touch electrodes; or

[0032] The sum of the number of the virtual lines and the number of the touch lines electrically connecting the second touch electrodes to the driver chip is less than or equal to the number of the touch lines electrically connecting the first touch electrodes to the driver chip, and is greater than the number of the touch lines electrically connecting the third touch electrodes to the driver chip.

[0033] According to an embodiment of the present application, the thin film transistor array layer includes an active layer disposed on the base substrate, a gate insulating layer disposed on the active layer, a gate disposed on the gate insulating layer, an interlayer insulating layer disposed on the gate, and a source and drain disposed on the interlayer insulating layer;

[0034] A first insulating layer is disposed on the source and drain electrodes, a common electrode is disposed on the first insulating layer, a second insulating layer is disposed on the common electrode, and a pixel electrode is disposed on the second insulating layer;

[0035] The common electrode is electrically connected to the touch electrode through a via hole on the first insulating layer, and the pixel electrode is electrically connected to the source and drain through via holes on the first insulating layer and the second insulating layer.

[0036] According to an embodiment of the present application, the first common power line and the driving chip are both disposed in the non-display area and at opposite ends of the touch function layer along the first direction.

[0037] According to an embodiment of the present application, a second common power line is further disposed on the same side of the driver chip, electrically connecting the touch electrodes and the touch traces of the driver chip and electrically connecting the second common power line.

[0038] According to an embodiment of the present application, a first switch transistor is disposed on a touch line connecting the touch electrode and the first common power line, and a second switch transistor is disposed on a touch line connecting the touch electrode and the second common power line.

[0039] The present application also provides a touch display panel, comprising the thin film transistor array substrate as described above.

[0040] According to an embodiment of the present application, the touch display panel further includes a color filter substrate disposed opposite to the thin film transistor array substrate, and liquid crystal disposed between the thin film transistor array substrate and the color filter substrate.

[0041] The beneficial effect of the present application is as follows: the present application eliminates or weakens the voltage mutation on different touch electrodes caused by the difference in the number of touch lines connecting the first common power line and the driving chip by reasonably configuring the number of touch lines electrically connecting the touch electrodes to the first common power line and the driving chip, so that the voltage distribution on the touch electrodes and the common electrodes in the thin film transistor array substrate tends to be consistent, thereby improving the display quality of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0043] Figure 1 is a partial cross-sectional schematic diagram of a thin film transistor array substrate provided in an embodiment of the present application;

[0044] Figure 2 is a top view of a thin film transistor array substrate provided in an embodiment of the present application;

[0045] Figure 3 This is a schematic diagram of a first wiring method of a touch line electrically connecting a touch electrode to a first common power line and a driving chip provided in an embodiment of the present application;

[0046] Figure 4 This is a schematic diagram of a second wiring method of a touch line electrically connecting a touch electrode to a first common power line and a driving chip provided in an embodiment of the present application;

[0047] Figure 5a is a schematic diagram of a first wiring method of a first implementation mode of a touch control line electrically connecting the second touch control electrode to the first common power line and the driving chip;

[0048] Figure 5b is a schematic diagram of a second wiring method of a first implementation mode of a touch control line electrically connecting a second touch control electrode to a first common power line and a driving chip;

[0049] Figure 5c is a schematic diagram of a third wiring method of a first implementation mode of a touch control line electrically connecting the second touch control electrode to the first common power line and the driving chip;

[0050] Figure 5d is a schematic diagram of a fourth wiring method of a first implementation mode of a touch control wiring electrically connecting the second touch control electrode to the first common power line and the driving chip;

[0051] Figure 5e is a schematic diagram of a fifth wiring method of the first implementation mode of the touch wiring electrically connecting the second touch electrode to the first common power line and the driving chip;

[0052] Figure 5f is a schematic diagram of a sixth wiring method of the first implementation mode of the touch wiring electrically connecting the second touch electrode to the first common power line and the driving chip;

[0053] Figure 6a is a schematic diagram of a first wiring method of a second implementation mode of a touch control line electrically connecting the second touch control electrode to the first common power line and the driving chip;

[0054] Figure 6b is a schematic diagram of a second wiring method of a second implementation mode of a touch control line electrically connecting the second touch control electrode to the first common power line and the driving chip;

[0055] Figure 6c is a schematic diagram of a third wiring method of a second implementation mode of a touch control line electrically connected between a second touch control electrode and a first common power line and a driving chip;

[0056] Figure 6d is a schematic diagram of a fourth wiring method of the second implementation mode of the touch wiring electrically connecting the second touch electrode to the first common power line and the driving chip;

[0057] Figure 6e is a schematic diagram of a fifth wiring method of the second implementation mode of the touch wiring electrically connecting the second touch electrode to the first common power line and the driving chip;

[0058] Figure 6f is a schematic diagram of a sixth wiring method of the second implementation mode of the touch wiring electrically connecting the second touch electrode to the first common power line and the driving chip;

[0059] Figure 7a is a schematic diagram of a first wiring method of a third implementation mode of a touch line electrically connecting the second touch electrode to the first common power line and the driving chip;

[0060] Figure 7b is a schematic diagram of a second wiring method of a third implementation mode of a touch wiring line electrically connecting the second touch electrode to the first common power line and the driving chip;

[0061] Figure 7c is a schematic diagram of a third wiring method of a third implementation mode of a touch line electrically connected between the second touch electrode and the first common power line and the driving chip;

[0062] Figure 7d is a schematic diagram of a fourth wiring method of a third implementation mode of a touch wiring electrically connecting the second touch electrode to the first common power line and the driving chip;

[0063] Figure 7e is a schematic diagram of a fifth wiring method of the third implementation mode of the touch wiring electrically connecting the second touch electrode to the first common power line and the driving chip;

[0064] Figure 7fis a schematic diagram of a sixth wiring method of the third implementation mode of the touch wiring electrically connecting the second touch electrode to the first common power line and the driving chip;

[0065] Figure 8 This is a schematic diagram of a third wiring method of a touch line electrically connecting a touch electrode to a first common power line and a driving chip provided in an embodiment of the present application;

[0066] Fig. 9 This is a schematic diagram of a fourth wiring method of a touch line electrically connecting a touch electrode to a first common power line and a driving chip provided in an embodiment of the present application;

[0067] Fig.10 It is a schematic diagram of the wiring method of the touch lines electrically connecting the touch electrodes to the first common power line, the second common power line and the driving chip provided in the embodiment of the present application. DETAILED DESCRIPTION

[0068] The following descriptions of the embodiments are made with reference to the attached drawings to illustrate specific embodiments that the present application may be implemented in. The directional terms mentioned in the present application, such as [up], [down], [front], [back], [left], [right], [inside], [outside], [side], etc., are only with reference to the directions of the attached drawings. Therefore, the directional terms used are used to illustrate and understand the present application, rather than to limit the present application. In the drawings, units with similar structures are represented by the same reference numerals.

[0069] An embodiment of the present application provides a thin film transistor array substrate, comprising a plurality of touch electrodes, each of the touch electrodes being electrically connected to a first common power line and a driver chip through a touch line. The embodiment of the present application reasonably configures the number of touch lines electrically connected between the touch electrodes and the driver chip, thereby eliminating or weakening voltage mutations on different touch electrodes caused by differences in the number of touch lines connecting the first common power line and the driver chip, so that the voltages on the touch electrodes and the common electrodes in the thin film transistor array substrate tend to be consistent, thereby improving the quality of the displayed image.

[0070] like Figure 1 and Figure 2 As shown, Figure 1 is a partial cross-sectional schematic diagram of a thin film transistor array substrate provided in an embodiment of the present application, Figure 2: is a top view of a thin film transistor array substrate provided in an embodiment of the present application. The thin film transistor array substrate comprises a base substrate 01, a thin film transistor array layer 02 disposed on the base substrate 01, and a common electrode 04 and a pixel electrode 05 disposed on the thin film transistor array layer 02; the thin film transistor array substrate further comprises a touch function layer 03 disposed in the thin film transistor array layer 02, and the touch function layer 03 is used to realize the touch function of the thin film transistor array substrate.

[0071] Optionally, the thin film transistor array layer 02 includes an active layer 021 disposed on the base substrate 01, a gate insulating layer 022 disposed on the active layer, a gate 023 disposed on the gate insulating layer 022, an interlayer insulating layer 024 disposed on the gate 023, and a source and drain electrode 025 disposed on the interlayer insulating layer 024, and the touch electrode 10 is disposed on the same layer as the source and drain electrode 025. A first insulating layer 06 is disposed between the thin film transistor array layer 02 and the common electrode 04, and a second insulating layer 07 is disposed between the common electrode 04 and the pixel electrode 05; the pixel electrode 05 is electrically connected to the source and drain electrode 025 through via holes on the first insulating layer 06 and the second insulating layer 07, thereby realizing signal transmission from the thin film transistor layer 02 to the pixel electrode 05; the common electrode 04 is electrically connected to the touch electrode 10 through the via holes on the first insulating layer 06.

[0072] Furthermore, the touch function layer 03 includes a plurality of touch electrodes 10. The base substrate 01 has a display area AA and a non-display area NA, and a first common power line COM1 and a driver chip IC are arranged at a position corresponding to the non-display area NA; each of the touch electrodes 10 is electrically connected to the first common power line COM1 and the driver chip IC through a touch line 20, wherein the first common power line COM1 is used to provide a common voltage signal to the touch electrode 10, and the driver chip IC is used to provide a voltage signal to the touch electrode 10 and perform signal acquisition and analysis. Optionally, the first common power line COM1 and the driver chip IC are respectively arranged at opposite ends of the touch function layer 03, so as to provide a voltage signal to the touch electrode 10 from both ends at the same time.

[0073] like Figure 3 , Figure 4 , Figure 5a to Figure 5f , Figures 6a to 6f , Figures 7a to 7f As shown, Figure 3 is a schematic diagram of a first wiring method of a touch line electrically connecting a touch electrode to a first common power line and a driving chip provided in an embodiment of the present application, Figure 4is a schematic diagram of a second wiring method of a touch line electrically connecting a touch electrode to a first common power line and a driving chip provided in an embodiment of the present application, Figure 5a to Figure 5f is a schematic diagram of six optional wiring modes of a first implementation mode of a touch wiring electrically connecting the second touch electrode to the first common power line and the driving chip, Figures 6a to 6f is a schematic diagram of six optional wiring modes of a second implementation mode of a touch wiring electrically connecting the second touch electrode to the first common power line and the driving chip, Figures 7a to 7f It is a schematic diagram of six optional wiring modes of a third implementation mode of a touch wiring line electrically connecting the second touch electrode to the first common power line and the driving chip.

[0074] Optionally, the touch control trace 20 is electrically connected to the first common power line COM1 and the touch control electrode 10 via a first switch transistor SW1 , and the first switch transistor SW1 is used to control the electrical conduction state between the first common power line COM1 and the touch control electrode 10 .

[0075] The plurality of touch electrodes 10 include first touch electrodes 11 , second touch electrodes 12 , and third touch electrodes 13 arranged along a first direction Y. As shown in FIG.

[0076] According to an embodiment of the present application, reference Figure 3 , Figure 5a to Figure 5f , Figures 6a to 6f , Figures 7a to 7fAs shown, the number of touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is greater than or equal to the number of touch lines 20 electrically connected between the first touch electrode 11 and the driver chip IC, and the number of touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is less than the number of touch lines 20 electrically connected between the third touch electrode 13 and the driver chip IC. It should be noted that the driver chip IC transmits voltage signals to the touch electrodes 10 and performs signal acquisition and analysis through the touch lines 20. The number of touch lines 20 electrically connected between the touch electrodes 10 and the driver chip IC directly affects the voltage state on the touch electrodes 10. In actual production, considering the number of channels of the driver chip IC and the resolution of the display panel, the number of touch lines connecting different touch electrodes may be different. In this embodiment, by reasonably configuring the number of touch lines connecting the touch electrodes and the driver chip as described above, a step-by-step change in the number of touch lines 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 is achieved, thereby avoiding a sudden change in the number of touch lines connecting different touch electrodes, which would seriously damage the uniformity of the voltage distribution on the touch electrodes and the common electrodes. In this embodiment, the voltage distribution on the touch electrodes and the common electrodes in the thin film transistor array substrate is facilitated to be consistent.

[0077] Furthermore, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is greater than the number of the touch lines 20 electrically connected between the first touch electrode 11 and the first common power line COM1, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is less than or equal to the number of the touch lines 20 electrically connected between the third touch electrode 13 and the first common power line COM1. It should be noted that the number of touch lines 20 electrically connected between the touch electrode 10 and the first common power line COM1 directly affects the voltage state on the touch electrode 10. This embodiment realizes a step-by-step change in the number of touch lines 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 by performing the above-mentioned reasonable configuration of the number of touch lines connecting the touch electrode and the first common power line, thereby avoiding a sudden change in the number of touch lines connecting different touch electrodes and making the voltage distribution on the touch electrodes and the common electrodes in the thin film transistor array substrate tend to be consistent.

[0078] It should be noted that, regarding the wiring method of the touch wiring 20 electrically connecting the second touch electrode 12 and the first common power line COM1, and the second touch electrode 12 and the driver chip IC, this embodiment provides the following: Figure 5a to Figure 5f The six different wiring modes of the first embodiment shown in FIG. Figures 6a to 6f The six different wiring modes of the second embodiment shown in FIG. Figures 7a to 7f The six different wiring methods of the third embodiment shown can be flexibly applied by selecting one or more of the eighteen different wiring methods in the three embodiments when applied.

[0079] For Figure 5a to Figure 5f The six different wiring modes of the first embodiment shown in FIG. Figure 5a In the first wiring mode TP11 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 2, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 1; Figure 5b In the second wiring mode TP12 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 3, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 1; Figure 5c In the third wiring mode TP13 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 3, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 2; Figure 5d In the fourth wiring mode TP14 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 1; Figure 5e In the fifth wiring mode TP15 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 2; Figure 5fIn the sixth wiring mode TP16 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 3. In addition, it should be noted that the wiring modes of the first embodiment of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1, and between the second touch electrode 12 and the driver chip IC are not limited to the above six modes, and can be adaptively expanded based on the same technical concept in practical applications.

[0080] For Figures 6a to 6f In the six different wiring methods of the second embodiment shown, a virtual wiring 201 is provided between the second touch electrode 12 and the driver chip IC, and one end of the virtual wiring 201 is electrically connected to the second touch electrode 12. Specifically, the sum of the number of the virtual wirings 201 and the number of the touch wirings 20 electrically connected to the driver chip IC by the second touch electrode 12 is greater than the number of the touch wirings 20 electrically connected to the driver chip IC by the first touch electrode 11, and is less than or equal to the number of the touch wirings 20 electrically connected to the driver chip IC by the third touch electrode 13. It should be noted that the virtual wiring 201 is formed by disconnecting the touch wiring provided between the second touch electrode 12 and the driver chip IC near the IC side; with respect to Figure 5a to Figure 5f The first implementation manner shown is beneficial to simplifying the manufacturing process of the touch wiring.

[0081] exist Figure 6a In the first wiring mode TP21 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 2, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 1, and the number of the virtual lines 201 is 1; Figure 6b In the second wiring mode TP22 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 3, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 1, and the number of the virtual lines 201 is 2; Figure 6c In the third wiring mode TP23 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 3, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 2, and the number of the virtual lines 201 is 1; Figure 6dIn the fourth wiring mode TP24 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 1, and the number of the virtual lines 201 is 3; Figure 6e In the fifth wiring mode TP25 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 2, and the number of the virtual lines 201 is 2; Figure 6f In the sixth wiring mode TP26 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 3, and the number of the virtual lines 201 is 1. In addition, it should be noted that the wiring modes of the second embodiment of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1, and between the second touch electrode 12 and the driver chip IC are not limited to the above six modes, and can be adaptively expanded based on the same technical concept in practical applications.

[0082] For Figures 7a to 7f In the six different wiring modes of the third embodiment shown, the touch electrode 20 further includes a fourth touch electrode 14 disposed between the second touch electrode 12 and the driver chip IC along the first direction Y, and a virtual line 202 is disposed on the fourth touch electrode 14, and the virtual line 202 is electrically connected to the fourth touch electrode 14. Specifically, the sum of the number of the virtual lines 202 and the number of the touch lines 20 electrically connected to the driver chip IC by the second touch electrode 12 is greater than the number of the touch lines 20 electrically connected to the driver chip IC by the first touch electrode 11, and is less than or equal to the number of the touch lines 20 electrically connected to the driver chip IC by the third touch electrode 13. Further, the virtual line 202 is disposed in a line segment shape on the fourth touch electrode 14, and does not connect the adjacent touch electrodes 20. It should be noted that the virtual line 202 is made by disconnecting and welding the touch lines disposed between the second touch electrode 12 and the driver chip IC.

[0083] exist Figure 7aIn the first wiring mode TP31 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 2, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 1, and the number of the virtual lines 202 is 1; Figure 7b In the second wiring mode TP32 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 3, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 1, and the number of the virtual lines 202 is 2; Figure 7c In the third wiring mode TP33 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 3, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 2, and the number of the virtual lines 202 is 1; Figure 7d In the fourth wiring mode TP34 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 1, and the number of the virtual lines 202 is 3; Figure 7e In the fifth wiring mode TP55 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 2, and the number of the virtual lines 202 is 2; Figure 7f In the sixth wiring mode TP66 shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is 3, and the number of the virtual lines 202 is 1. In addition, it should be noted that the wiring modes of the third embodiment of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1, and between the second touch electrode 12 and the driver chip IC are not limited to the above six modes, and can be adaptively expanded based on the same technical concept in practical applications.

[0084] Optionally, refer to Figure 3 , Figure 5a to Figure 5f , Figures 6a to 6f , Figures 7a to 7fAs shown, the first touch electrode 11 and the second touch electrode 12 are arranged adjacent to each other along the first direction Y. The number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is equal to the number of the touch lines 20 electrically connected between the first touch electrode 11 and the driver chip IC, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is greater than the number of the touch lines 20 electrically connected between the first touch electrode 11 and the first common power line COM1. The above arrangement can realize a step-wise change in the number of touch lines 20 connected to the adjacent first touch electrode 11 and the second touch electrode 12, which is conducive to the voltage distribution on the first touch electrode 11 and the second touch electrode 12 being consistent, and effectively avoiding a large voltage mutation.

[0085] Optionally, the second touch electrode 12 and the third touch electrode 13 are arranged adjacent to each other along the first direction Y. The number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is less than the number of the touch lines 20 electrically connected between the third touch electrode 13 and the driver chip IC, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is equal to the number of the touch lines 20 electrically connected between the third touch electrode 13 and the first common power line COM1. The above arrangement can realize a step-wise change in the number of touch lines 20 connected to the adjacent second touch electrode 12 and the third touch electrode 13, which is conducive to the consistency of the voltage distribution on the second touch electrode 12 and the third touch electrode 13, and effectively avoids a large voltage mutation.

[0086] Optionally, the first touch electrode 11, the second touch electrode 12 and the third touch electrode 13 are arranged adjacent to each other in sequence along the first direction Y. The number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is equal to the number of the touch lines 20 electrically connected between the first touch electrode 11 and the driver chip IC, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is greater than the number of the touch lines 20 electrically connected between the first touch electrode 11 and the first common power line COM1; and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is less than the number of the touch lines 20 electrically connected between the third touch electrode 13 and the driver chip IC, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is equal to the number of the touch lines 20 electrically connected between the third touch electrode 13 and the first common power line COM1. The above arrangement can realize a step-wise change in the number of touch lines 20 connected to the adjacent first touch electrode 11, the second touch electrode 12 and the third touch electrode 13, which is beneficial for the voltage distribution on the first touch electrode 11, the second touch electrode 12 and the third touch electrode 13 to be consistent, and effectively avoids a large voltage mutation.

[0087] Further optionally, the number of touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 2, and the number of touch lines 20 electrically connected to the driver chip IC is 1; and the number of touch lines 20 electrically connected between the first touch electrode 11 and the first common power line COM1, and the number of touch lines 20 electrically connected to the driver chip IC are both 1; and the number of touch lines 20 electrically connected between the third touch electrode 13 and the first common power line COM1, and the number of touch lines 20 electrically connected to the driver chip IC are both 2. It should be understood that the wiring setting features of the touch lines 20 of the present embodiment realize the sequential increase in the number of touch lines 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13, so that the voltage on the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 gradually increases, effectively avoiding large-scale sudden changes in voltage and making the voltage distribution tend to be consistent.

[0088] Further optionally, the number of touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, and the number of touch lines 20 electrically connected to the driver chip IC is 2; and the number of touch lines 20 electrically connected between the first touch electrode 11 and the first common power line COM1, and the number of touch lines 20 electrically connected to the driver chip IC are both 2; and the number of touch lines 20 electrically connected between the third touch electrode 13 and the first common power line COM1, and the number of touch lines 20 electrically connected to the driver chip IC are both 4. It should be understood that the wiring setting features of the touch lines 20 of the present embodiment realize the sequential increase in the number of touch lines 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13, so that the voltage on the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 gradually increases, effectively avoiding large-scale sudden changes in voltage and making the voltage distribution tend to be consistent.

[0089] According to an embodiment of the present application, reference Figure 4 , Figure 5a to Figure 5f , Figures 6a to 6f , Figures 7a to 7f As shown, the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is less than the number of the touch lines 20 electrically connected between the first touch electrode 11 and the driver chip IC, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is greater than or equal to the number of the touch lines 20 electrically connected between the third touch electrode 13 and the driver chip IC. It should be noted that the driver chip IC transmits voltage signals to the touch electrodes 10 and performs signal acquisition and analysis through the touch lines 20. The number of touch lines 20 electrically connected between the touch electrodes 10 and the driver chip IC directly affects the voltage state on the touch electrodes 10. In actual production, considering the number of channels of the driver chip IC and the resolution of the display panel, the number of touch lines connecting different touch electrodes may be different. In this embodiment, by reasonably configuring the number of touch lines connecting the touch electrodes and the driver chip as described above, a step-by-step change in the number of touch lines 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 is achieved, thereby avoiding a sudden change in the number of touch lines connecting different touch electrodes, which would seriously damage the uniformity of the voltage distribution on the touch electrodes and the common electrodes. In this embodiment, the voltage distribution on the touch electrodes and the common electrodes in the thin film transistor array substrate is facilitated to be consistent.

[0090] Furthermore, the number of touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is less than or equal to the number of touch lines 20 electrically connected between the first touch electrode 11 and the first common power line COM1, and the number of touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is greater than the number of touch lines 20 electrically connected between the third touch electrode 13 and the first common power line COM1. It should be noted that the number of touch lines 20 electrically connected between the touch electrode 10 and the first common power line COM1 directly affects the voltage state on the touch electrode 10. This embodiment realizes a step-by-step change in the number of touch lines 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 by performing the above-mentioned reasonable configuration of the number of touch lines connecting the touch electrode and the first common power line, thereby avoiding a sudden change in the number of touch lines connecting different touch electrodes and making the voltage distribution on the touch electrodes and the common electrodes in the thin film transistor array substrate tend to be consistent.

[0091] It should be noted that, regarding the wiring method of the touch wiring 20 electrically connecting the second touch electrode 12 and the first common power line COM1, and the second touch electrode 12 and the driver chip IC, this embodiment provides the following: Figure 5a to Figure 5f The six different wiring modes of the first embodiment shown in FIG. Figures 6a to 6f The six different wiring modes of the second embodiment shown in FIG. Figures 7a to 7f The six different wiring methods of the third embodiment shown in the figure can be flexibly applied by selecting one or more of the eighteen different wiring methods in the three embodiments. The features of the touch wiring wiring methods of each embodiment have been introduced in the above embodiments, and the repeated parts will not be repeated here. Only the differences are described as follows:

[0092] For Figures 6a to 6f In the six different wiring modes of the second embodiment shown in FIG. 1 , the sum of the number of the virtual wires 201 and the number of the touch wires 20 electrically connected to the driver chip IC by the second touch electrodes 12 is less than or equal to the number of the touch wires 20 electrically connected to the driver chip IC by the first touch electrodes 11, and is greater than the number of the touch wires 20 electrically connected to the driver chip IC by the third touch electrodes 13. Figures 7a to 7fIn the six different wiring methods of the third embodiment shown, the sum of the number of the virtual routing lines 202 and the number of the touch routing lines 20 of the driver chip IC electrically connected to the second touch electrode 12 is less than or equal to the number of the touch routing lines 20 of the driver chip IC electrically connected to the first touch electrode 11, and is greater than the number of the touch routing lines 20 of the driver chip IC electrically connected to the third touch electrode 13.

[0093] It should be noted that, in this embodiment, the wiring methods of the touch trace 20 electrically connecting the second touch electrode 12 and the first common power line COM1, and the second touch electrode 12 and the driver chip IC are not limited to the above eighteen methods, and can be adaptively expanded based on the same technical concept in practical applications.

[0094] Optionally, refer to Figure 4 , Figure 5a to Figure 5f , Figures 6a to 6f , Figures 7a to 7f As shown, the first touch electrode 11 and the second touch electrode 12 are arranged adjacent to each other along the first direction Y. The number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is less than the number of the touch lines 20 electrically connected between the first touch electrode 11 and the driver chip IC, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is equal to the number of the touch lines 20 electrically connected between the first touch electrode 11 and the first common power line COM1. The above arrangement can realize a step-wise change in the number of touch lines 20 connected to the adjacent first touch electrode 11 and the second touch electrode 12, which is conducive to the consistency of the voltage distribution on the first touch electrode 11 and the second touch electrode 12, and effectively avoids a large voltage mutation.

[0095] Optionally, the second touch electrode 12 and the third touch electrode 13 are arranged adjacent to each other along the first direction Y. The number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is equal to the number of the touch lines 20 electrically connected between the third touch electrode 13 and the driver chip IC, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is greater than the number of the touch lines 20 electrically connected between the third touch electrode 13 and the first common power line COM1. The above arrangement can realize a step-wise change in the number of touch lines 20 connected to the adjacent second touch electrode 12 and the third touch electrode 13, which is conducive to the consistency of the voltage distribution on the second touch electrode 12 and the third touch electrode 13, and effectively avoids a large voltage mutation.

[0096] Optionally, the first touch electrode 11, the second touch electrode 12 and the third touch electrode 13 are arranged adjacent to each other in sequence along the first direction Y. The number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is less than the number of the touch lines 20 electrically connected between the first touch electrode 11 and the driver chip IC, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is equal to the number of the touch lines 20 electrically connected between the first touch electrode 11 and the first common power line COM1; and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the driver chip IC is equal to the number of the touch lines 20 electrically connected between the third touch electrode 13 and the driver chip IC, and the number of the touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is greater than the number of the touch lines 20 electrically connected between the third touch electrode 13 and the first common power line COM1. The above arrangement can realize a step-wise change in the number of touch lines 20 connected to the adjacent first touch electrode 11, the second touch electrode 12 and the third touch electrode 13, which is beneficial for the voltage distribution on the first touch electrode 11, the second touch electrode 12 and the third touch electrode 13 to be consistent, and effectively avoids a large voltage mutation.

[0097] Further optionally, the number of touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 2, and the number of touch lines 20 electrically connected to the driver chip IC is 1; and the number of touch lines 20 electrically connected between the first touch electrode 11 and the first common power line COM1, and the number of touch lines 20 electrically connected to the driver chip IC are both 2; and the number of touch lines 20 electrically connected between the third touch electrode 13 and the first common power line COM1, and the number of touch lines 20 electrically connected to the driver chip IC are both 1. It should be understood that the wiring setting features of the touch lines 20 of the present embodiment realize the sequential decrease in the number of touch lines 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13, so that the voltage on the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 gradually decreases, effectively avoiding large-scale sudden changes in voltage and making the voltage distribution tend to be consistent.

[0098] Further, refer to Figure 4 and Figure 8As shown, it is defined that: in the second direction X, the touch electrodes arranged side by side with the first touch electrodes 11 constitute a first matrix 101, the touch electrodes arranged side by side with the second touch electrodes 12 constitute a second matrix 102, and the touch electrodes arranged side by side with the third touch electrodes 13 constitute a third matrix 103; wherein, at least some of the touch electrodes in the first matrix 101 have the same touch wiring characteristics as the first touch electrodes 11; at least some of the touch electrodes in the second matrix 102 have the same touch wiring characteristics as the second touch electrodes 12; at least some of the touch electrodes in the third matrix 103 have the same touch wiring characteristics as the third touch electrodes 13. The touch wiring characteristics of the touch electrodes in each matrix can be referred to the above embodiments, and will not be repeated here.

[0099] Optionally, refer to Figure 4 , Figure 5a to Figure 5f , Figures 6a to 6f , Figures 7a to 7f As shown, the number of touch lines 20 electrically connected between the second touch electrode 12 and the first common power line COM1 is 4, and the number of touch lines 20 electrically connected to the driver chip IC is 2; and the number of touch lines 20 electrically connected between the first touch electrode 11 and the first common power line COM1, and the number of touch lines 20 electrically connected to the driver chip IC are both 4; and the number of touch lines 20 electrically connected between the third touch electrode 13 and the first common power line COM1, and the number of touch lines 20 electrically connected to the driver chip IC are both 2. It should be understood that the wiring setting features of the touch lines 20 of the present embodiment realize the sequential decrease in the number of touch lines 20 connected to the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13, so that the voltage on the first touch electrode 11, the second touch electrode 12, and the third touch electrode 13 gradually decreases, effectively avoiding large-scale sudden changes in voltage and making the voltage distribution tend to be consistent.

[0100] Further, refer to Figure 4 and Fig. 9As shown, it is defined that: in the second direction X, the touch electrodes arranged side by side with the first touch electrodes 11 constitute a first matrix 101, the touch electrodes arranged side by side with the second touch electrodes 12 constitute a second matrix 102, and the touch electrodes arranged side by side with the third touch electrodes 13 constitute a third matrix 103; wherein, at least some of the touch electrodes in the first matrix 101 have the same touch wiring characteristics as the first touch electrodes 11; at least some of the touch electrodes in the second matrix 102 have the same touch wiring characteristics as the second touch electrodes 12; at least some of the touch electrodes in the third matrix 103 have the same touch wiring characteristics as the third touch electrodes 13. The touch wiring characteristics of the touch electrodes in each matrix can be referred to the above embodiments, and will not be repeated here.

[0101] Alternatively, if Figure 2 and Fig.10 As shown, the first common power line COM1 and the driver chip IC are respectively arranged corresponding to the non-display area NA, and are arranged at opposite ends of the touch function layer 03 along the first direction Y. Furthermore, a second common power line COM2 is also arranged on the same side of the driver chip IC, and the second common power line COM2 is electrically connected to the touch electrode 10 through the touch line 20, and the second common power line COM2 and the driver chip IC are connected to the same touch line 20. Optionally, the touch line 20 is electrically connected to the second common power line COM2 and the touch electrode 10 through a second switch transistor SW2, and the second switch transistor SW2 is used to control the electrical conduction state between the second common power line COM2 and the touch electrode 10. It should be noted that the first common power line COM1 and the second common power line COM2 respectively provide voltage to the touch electrode 10 from both ends of the touch function layer 03, which can promote voltage balance on different touch electrodes 10.

[0102] To summarize, the thin film transistor array substrate provided in the embodiment of the present application includes a plurality of touch electrodes, each of the touch electrodes being electrically connected to a first common power line and a driving chip through a touch line, and by reasonably configuring the number of touch lines electrically connecting the touch electrodes and the driving chip, the voltage mutation on different touch electrodes caused by the difference in the number of touch lines connecting the first common power line and the driving chip is eliminated or weakened, so that the voltages on the touch electrodes and the common electrodes in the thin film transistor array substrate tend to be consistent, thereby improving the quality of the display image.

[0103] The embodiment of the present application also provides a touch display panel, which includes the thin film transistor array substrate provided in the above embodiment. The touch display panel can be a liquid crystal display panel, and further includes a color film substrate arranged opposite to the thin film transistor array substrate, and a liquid crystal arranged between the thin film transistor array substrate and the color film substrate. The touch display panel solves the problem of poor voltage uniformity of the common electrode caused by a sudden change in the number of touch lines connecting different touch electrodes, and can achieve high-quality and balanced display.

[0104] It should be noted that although the present application is disclosed as above with specific embodiments, the above embodiments are not intended to limit the present application. Ordinary technicians in this field can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined in the claims.

Claims

1. A thin film transistor array substrate, characterized in that: include: A base substrate having a non-display area; A thin film transistor array layer is disposed on the base substrate; as well as A touch function layer is arranged in the thin film transistor array layer, and includes a plurality of touch electrodes, each of which is electrically connected to the first common power line and the driving chip through a touch wiring; The plurality of touch electrodes include a first touch electrode, a second touch electrode, and a third touch electrode arranged along a first direction, and a fourth touch electrode arranged between the second touch electrode and the driving chip, a virtual wiring is arranged on the fourth touch electrode, and the virtual wiring is electrically connected to the fourth touch electrode, and the first common power line and the driving chip are arranged at opposite ends of the touch function layer along the first direction; the number of the touch wirings electrically connected between the second touch electrode and the driving chip is greater than or equal to the number of the touch wirings electrically connected between the first touch electrode and the driving chip , the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the first touch electrode and the first common power line, and the number of touch lines electrically connected between the second touch electrode and the driving chip is less than the number of touch lines electrically connected between the third touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is less than or equal to the number of touch lines electrically connected between the third touch electrode and the first common power line; Alternatively, the number of touch lines electrically connected between the second touch electrode and the driving chip is less than the number of touch lines electrically connected between the first touch electrode and the driving chip, the number of touch lines electrically connected between the second touch electrode and the first common power line is less than or equal to the number of touch lines electrically connected between the first touch electrode and the first common power line, and the number of touch lines electrically connected between the second touch electrode and the driving chip is greater than or equal to the number of touch lines electrically connected between the third touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the third touch electrode and the first common power line.

2. The thin film transistor array substrate according to claim 1, characterized in that: The first touch electrode and the second touch electrode are arranged adjacent to each other along the first direction, the number of touch lines electrically connected between the second touch electrode and the driving chip is equal to the number of touch lines electrically connected between the first touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the first touch electrode and the first common power line; or The second touch electrode and the third touch electrode are arranged adjacent to each other along the first direction, the number of touch lines electrically connected between the second touch electrode and the driving chip is less than the number of touch lines electrically connected between the third touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is equal to the number of touch lines electrically connected between the third touch electrode and the first common power line.

3. The thin film transistor array substrate according to claim 1, characterized in that: The first touch electrode, the second touch electrode and the third touch electrode are arranged adjacent to each other in sequence along the first direction; The number of the touch lines electrically connected between the second touch electrodes and the driving chip is equal to the number of the touch lines electrically connected between the first touch electrodes and the driving chip, and the number of the touch lines electrically connected between the second touch electrodes and the first common power line is greater than the number of the touch lines electrically connected between the first touch electrodes and the first common power line; and The number of the touch lines electrically connected between the second touch electrode and the driving chip is less than the number of the touch lines electrically connected between the third touch electrode and the driving chip, and the number of the touch lines electrically connected between the second touch electrode and the first common power line is equal to the number of the touch lines electrically connected between the third touch electrode and the first common power line.

4. The thin film transistor array substrate according to claim 1, characterized in that: The first touch electrode and the second touch electrode are arranged adjacent to each other along the first direction, the number of touch lines electrically connected between the second touch electrode and the driving chip is less than the number of touch lines electrically connected between the first touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is equal to the number of touch lines electrically connected between the first touch electrode and the first common power line; or The second touch electrode and the third touch electrode are arranged adjacent to each other along the first direction, the number of touch lines electrically connected between the second touch electrode and the driving chip is equal to the number of touch lines electrically connected between the third touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the third touch electrode and the first common power line.

5. The thin film transistor array substrate according to claim 1, characterized in that: The first touch electrode, the second touch electrode and the third touch electrode are arranged adjacent to each other in sequence along the first direction; The number of the touch lines electrically connected between the second touch electrodes and the driving chip is less than the number of the touch lines electrically connected between the first touch electrodes and the driving chip, and the number of the touch lines electrically connected between the second touch electrodes and the first common power line is equal to the number of the touch lines electrically connected between the first touch electrodes and the first common power line; and The number of touch lines electrically connected between the second touch electrode and the driving chip is equal to the number of touch lines electrically connected between the third touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the third touch electrode and the first common power line.

6. The thin film transistor array substrate according to claim 1, characterized in that: The sum of the number of the virtual wirings arranged on the fourth touch electrode and the number of the touch wirings electrically connected to the driver chip by the second touch electrode is greater than the number of the touch wirings electrically connected to the driver chip by the first touch electrode, and is less than or equal to the number of the touch wirings electrically connected to the driver chip by the third touch electrode; or The sum of the number of the virtual routing lines arranged on the fourth touch electrode and the number of the touch routing lines electrically connected to the driving chip by the second touch electrode is less than or equal to the number of the touch routing lines electrically connected to the driving chip by the first touch electrode, and is greater than the number of the touch routing lines electrically connected to the driving chip by the third touch electrode.

7. The thin film transistor array substrate according to claim 1, characterized in that: The thin film transistor array layer includes an active layer disposed on the base substrate, a gate insulating layer disposed on the active layer, a gate disposed on the gate insulating layer, an interlayer insulating layer disposed on the gate, and a source and drain electrode disposed on the interlayer insulating layer; A first insulating layer is disposed on the source and drain electrodes, a common electrode is disposed on the first insulating layer, a second insulating layer is disposed on the common electrode, and a pixel electrode is disposed on the second insulating layer; The common electrode is electrically connected to the touch electrode through a via hole on the first insulating layer, and the pixel electrode is electrically connected to the source and drain through via holes on the first insulating layer and the second insulating layer.

8. The thin film transistor array substrate according to claim 1, characterized in that: The first common power line and the driving chip are both arranged in the non-display area.

9. The thin film transistor array substrate according to claim 8, characterized in that: A second common power line is also disposed on the same side of the driving chip, electrically connecting the touch electrodes and the touch wiring of the driving chip and electrically connecting the second common power line.

10. The thin film transistor array substrate according to claim 9, characterized in that: A first switch transistor is disposed on a touch line connecting the touch electrode and the first common power line, and a second switch transistor is disposed on a touch line connecting the touch electrode and the second common power line.

11. A thin film transistor array substrate, characterized in that: include: A base substrate having a non-display area; A thin film transistor array layer is disposed on the base substrate; as well as A touch function layer is arranged in the thin film transistor array layer, and includes a plurality of touch electrodes, each of which is electrically connected to the first common power line and the driving chip through a touch wiring; The multiple touch electrodes include a first touch electrode, a second touch electrode, and a third touch electrode arranged along a first direction, and the first common power line and the driving chip are arranged at opposite ends of the touch function layer along the first direction; the number of the touch lines electrically connected between the second touch electrode and the driving chip is greater than or equal to the number of the touch lines electrically connected between the first touch electrode and the driving chip, the number of the touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of the touch lines electrically connected between the first touch electrode and the first common power line, and the number of the touch lines electrically connected between the second touch electrode and the driving chip is less than the number of the touch lines electrically connected between the third touch electrode and the driving chip, and the number of the touch lines electrically connected between the second touch electrode and the first common power line is less than or equal to the number of the touch lines electrically connected between the third touch electrode and the first common power line; Alternatively, the number of touch lines electrically connected between the second touch electrode and the driving chip is less than the number of touch lines electrically connected between the first touch electrode and the driving chip, the number of touch lines electrically connected between the second touch electrode and the first common power line is less than or equal to the number of touch lines electrically connected between the first touch electrode and the first common power line, and the number of touch lines electrically connected between the second touch electrode and the driving chip is greater than or equal to the number of touch lines electrically connected between the third touch electrode and the driving chip, and the number of touch lines electrically connected between the second touch electrode and the first common power line is greater than the number of touch lines electrically connected between the third touch electrode and the first common power line; A virtual wiring is provided between the second touch electrode and the driving chip, and one end of the virtual wiring is electrically connected to the second touch electrode; The sum of the number of the virtual routings and the number of the touch routings electrically connected to the driver chip by the second touch electrode is greater than the number of the touch routings electrically connected to the driver chip by the first touch electrode, and is less than or equal to the number of the touch routings electrically connected to the driver chip by the third touch electrode; or the sum of the number of the virtual routings and the number of the touch routings electrically connected to the driver chip by the second touch electrode is less than or equal to the number of the touch routings electrically connected to the driver chip by the first touch electrode, and is greater than the number of the touch routings electrically connected to the driver chip by the third touch electrode.

12. A touch display panel, characterized in that: The invention comprises a thin film transistor array substrate as described in any one of claims 1 to 11.

13. The touch display panel according to claim 12, characterized in that: It also includes a color filter substrate arranged opposite to the thin film transistor array substrate, and liquid crystal arranged between the thin film transistor array substrate and the color filter substrate.

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