PMOS driving circuit and driving device

Abstract

The present invention relates to the technical field of integrated circuits, and provides a PMOS driving circuit and a driving device. The PMOS driving circuit comprises: a level shifting module, a buffer module, an intermediate voltage generating module and a boosting module; the boosting module has an input end connected to an external power supply end, and an output end connected to the power supply end of the level shifting module, the power supply end of the buffer module and the input end of the intermediate voltage generating module respectively; the voltage of the output end of the boosting module is greater than the voltage of the external power supply end, and the difference between the voltage of the output end of the boosting module and the voltage of the external power supply end is a preset voltage, so that the gate-source voltage Vgs of the PMOS tube when it is turned off is increased from 0V to a preset voltage value, so that the gate-source voltage Vgs of the PMOS tube when it is turned off is far away from the threshold voltage of the PMOS tube, and the turn-off speed of the PMOS tube is effectively improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and in particular relates to a PMOS drive circuit and a drive device. Background Art

[0002] The high-voltage PMOS (positive channel Metal Oxide Semiconductor) driver chip is mainly used in the power modulation system of the power amplifier 16. The high-voltage PMOS power tube driver chip drives the high-voltage PMOS power tube to output the modulation voltage. The turn-off speed of the high-voltage PMOS power tube directly affects the stability of the power modulation system.

[0003] In the prior art, the high-voltage PMOS power tube driver chip does not drive the PMOS power tube to turn off fast enough, which affects the reliability of the power modulation system and causes the modulation voltage to be widened. Summary of the invention

[0004] In view of this, an embodiment of the present invention provides a PMOS driving circuit and a driving device to solve the problem in the prior art that the turn-off speed of the PMOS power tube is not fast enough and the modulation voltage is widened.

[0005] A first aspect of an embodiment of the present invention provides a PMOS driving circuit, comprising: a level shifting module, a buffer module, an intermediate voltage generating module and a boosting module;

[0006] A boost module, the input end of which is connected to the external power supply end, and the output end of which is respectively connected to the power supply end of the level shift module, the power supply end of the buffer module and the input end of the intermediate voltage generating module;

[0007] The output end of the intermediate voltage generating module is connected to the ground end of the buffer module; the output end of the buffer module is connected to the gate of the PMOS tube;

[0008] A level shift module, wherein the input end receives an external driving signal, the output end is connected to the input end of the buffer module, and the ground end is grounded;

[0009] The voltage at the output end of the boost module is greater than the voltage at the external power supply end, and the difference between the voltage at the output end of the boost module and the voltage at the external power supply end is a preset voltage.

[0010] Optionally, the preset voltage is +5V.

[0011] Optionally, the boost module includes: a charge pump boost unit;

[0012] The charge pump boost unit has an input end connected to the input end of the boost module and an output end connected to the output end of the boost module.

[0013] Optionally, the charge pump boost unit includes: an oscillator, a first inverter, a first follower, a second follower, a third follower, a fourth follower, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a first capacitor, a second capacitor and a third capacitor;

[0014] The output end of the oscillator is connected to the input end of the first inverter, and the output end of the first inverter is respectively connected to the input end of the first follower, the input end of the second follower, the input end of the third follower and the input end of the fourth follower;

[0015] The output end of the first follower is connected to the control end of the second switch tube, the output end of the second follower is connected to the control end of the first switch tube, the output end of the third follower is connected to the control end of the third switch tube, and the output end of the fourth follower is connected to the control end of the fourth switch tube;

[0016] A first switch tube, a first end of which is connected to the input end of the charge pump boost unit, and a second end of which is respectively connected to the first end of the third switch tube and the first end of the first capacitor;

[0017] A second switch tube, a first end of which is connected to the output end of the charge pump boost unit, and a second end of which is respectively connected to the first end of the fourth switch tube and the second end of the first capacitor;

[0018] The second end of the third switch tube is grounded, and the second end of the fourth switch tube is connected to the internal power supply end;

[0019] A second capacitor, a first end of which is connected to the internal power supply terminal and a second end of which is grounded;

[0020] The third capacitor has a first end connected to the output end of the charge pump boost unit and a second end connected to the ground.

[0021] Optionally, the first switch tube and the second switch tube are both PMOS tubes, and the third switch tube and the fourth switch tube are both NMOS tubes.

[0022] Optionally, the PMOS driving circuit further includes: a buck module;

[0023] The step-down module has an input end connected to the external power supply end and an output end connected to the internal power supply end.

[0024] Optionally, the PMOS driving circuit further includes: a logic control module, a negative-control-positive module and a fifth switch tube;

[0025] The negative-control-positive module has an input terminal receiving an external enable signal and an output terminal connected to the enable terminal of the logic control module;

[0026] A logic control module, wherein the input end receives an external driving signal, the first output end is connected to the input end of the level shift module, and the second output end is connected to the control end of the fifth switch tube;

[0027] A fifth switch tube has a first end connected to the drain of the PMOS tube and a second end connected to the ground.

[0028] Optionally, a difference between an output terminal voltage of the intermediate voltage generating module and an input terminal voltage of the intermediate voltage generating module is constant.

[0029] Optionally, the voltage range of the external power supply terminal is +20V to +80V.

[0030] A second aspect of an embodiment of the present invention provides a driving device, comprising the PMOS driving circuit provided by the first aspect of an embodiment of the present invention.

[0031] The embodiment of the present invention provides a PMOS driving circuit, including: a level shift module, a buffer module, an intermediate voltage generating module and a boost module; the boost module, the input end is connected to the external power supply end, and the output end is respectively connected to the power supply end of the level shift module, the power supply end of the buffer module and the input end of the intermediate voltage generating module; the voltage of the output end of the boost module is greater than the voltage of the external power supply end, and the difference between the voltage of the output end of the boost module and the voltage of the external power supply end is a preset voltage, and the gate-source voltage Vgs of the PMOS tube is increased by the preset voltage value as a whole, so that the gate-source voltage Vgs when the PMOS tube is turned off is increased from 0V to the preset voltage value. The threshold voltage Vth of the PMOS tube is -0.8V to -1V. According to the conduction characteristics of the PMOS tube, when the gate-source voltage Vgs when the PMOS tube is turned off is 0V, the turn-off speed of the PMOS tube is slow near the threshold voltage. In the embodiment of the present invention, the gate-source voltage Vgs when the PMOS tube is turned off is increased by the preset voltage value, away from the threshold voltage of the PMOS tube, and the turn-off speed of the PMOS tube is significantly improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0033] Figure 1 Schematic diagram of a circuit structure of a PMOS driving circuit provided by an embodiment of the present invention;

[0034] Figure 2 is a circuit structure diagram of another PMOS driving circuit provided by an embodiment of the present invention;

[0035] Figure 3 is a circuit schematic diagram of a charge pump boost unit provided by an embodiment of the present invention;

[0036] Figure 4 It is a comparison diagram of the effects of the PMOS driving circuit provided by the embodiment of the present invention and the PMOS driving circuit provided in the prior art. DETAILED DESCRIPTION

[0037] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present invention. However, it should be clear to those skilled in the art that the present invention may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present invention.

[0038] In order to illustrate the technical solution of the present invention, specific embodiments are provided below for illustration.

[0039] refer to Figure 1 , an embodiment of the present invention provides a PMOS driving circuit, including: a level shift module 11 (LevelShifter), a buffer module 12 (BUF_H), an intermediate voltage generating module 13 (VS GEN) and a boost module 14 (chargepump);

[0040] The boost module 14 has an input end connected to the external power supply end, and an output end connected to the power supply end of the level shift module 11, the power supply end of the buffer module 12, and the input end of the intermediate voltage generating module 13;

[0041] The output end of the intermediate voltage generating module 13 is connected to the ground end of the buffer module 12; the output end of the buffer module 12 is connected to the gate of the PMOS tube 15;

[0042] The level shift module 11 has an input terminal receiving an external driving signal, an output terminal connected to the input terminal of the buffer module 12, and a ground terminal connected to ground;

[0043] The voltage at the output end of the boost module 14 is greater than the voltage at the external power supply end, and the difference between the voltage at the output end of the boost module 14 and the voltage at the external power supply end is a preset voltage.

[0044] In the prior art, the gate-source voltage Vgs is designed to be within a voltage value of -15 to -5V when the PMOS tube 15 is turned on, and the gate-source voltage Vgs is designed to be around 0V when the PMOS tube 15 is turned off. The threshold voltage Vth of the PMOS tube 15 is generally -0.8V to -1V, and the gate-source voltage Vgs is 0V when the PMOS tube 15 is turned off. Near the threshold voltage Vth of the PMOS tube 15, according to the conduction characteristics of the PMOS power tube, affected by the process, when the gate-source voltage Vgs of the PMOS tube 15 is close to the threshold voltage Vth, the turn-off time of the PMOS tube 15 is prolonged, thereby widening the modulation signal.

[0045] In an embodiment of the present invention, a PMOS driving circuit is provided, including a boost module 14, wherein a voltage VNB at an output end of the boost module 14 is greater than a voltage VB at an external power supply end, and a voltage difference between the voltage VNB at the output end of the boost module 14 and the voltage VB at the external power supply end is a preset voltage VN. A gate-source voltage Vgs of a PMOS tube 15 is Vbuf-VB, Vbuf∈(VNB, VS) (Vbuf is the output voltage of the buffer module 12), and Vgs∈(VNB-VB, VS-VB)=(VN, VS-VB). Among them, VS-VB should be greater than a gate-source breakdown voltage of the PMOS tube 15. Compared with the prior art, the gate-source voltage Vgs of the PMOS tube 15 is overall increased by a preset voltage VN, and the gate-source voltage of the PMOS tube 15 when it is turned off is VN, which is not near the threshold voltage Vth of the PMOS tube 15, and the turn-off speed is significantly improved.

[0046] In some embodiments, the preset voltage is +5 V. When the gate-source voltage Vgs of the PMOS transistor 15 is +5 V, the PMOS transistor 15 can be effectively and quickly turned off.

[0047] In some embodiments, the boost module 14 includes: a charge pump boost unit;

[0048] The charge pump boost unit has an input end connected to the input end of the boost module 14 , and an output end connected to the output end of the boost module 14 .

[0049] The charge pump boost unit has a stable output voltage, a simple structure, is easy to integrate, and reduces the chip size.

[0050] In some embodiments, reference Figure 3 The charge pump boost unit includes: an oscillator, a first inverter INV1, a first follower LS1, a second follower LS2, a third follower LS3, a fourth follower LS4, a first switch tube SW1, a second switch tube SW2, a third switch tube SW3, a fourth switch tube SW4, a first capacitor C1, a second capacitor C2 and a third capacitor C3;

[0051] The output end of the oscillator is connected to the input end of the first inverter INV1, and the output end of the first inverter INV1 is respectively connected to the input end of the first follower LS1, the input end of the second follower LS2, the input end of the third follower LS3 and the input end of the fourth follower LS4;

[0052] The output end of the first follower LS1 is connected to the control end of the second switch tube SW2, the output end of the second follower LS2 is connected to the control end of the first switch tube SW1, the output end of the third follower LS3 is connected to the control end of the third switch tube SW3, and the output end of the fourth follower LS4 is connected to the control end of the fourth switch tube SW4;

[0053] A first switch tube SW1, a first end of which is connected to the input end of the charge pump boost unit, and a second end of which is respectively connected to the first end of the third switch tube SW3 and the first end of the first capacitor C1;

[0054] The second switch tube SW2 has a first end connected to the output end of the charge pump boost unit, and a second end connected to the first end of the fourth switch tube SW4 and the second end of the first capacitor C1 respectively;

[0055] A second end of the third switch tube SW3 is grounded, and a second end of the fourth switch tube SW4 is connected to the internal power supply end;

[0056] A second capacitor C2, a first end of which is connected to the internal power supply terminal and a second end of which is grounded;

[0057] The third capacitor C3 has a first end connected to the output end of the charge pump boost unit and a second end connected to the ground.

[0058] In some embodiments, the first switch transistor SW1 and the second switch transistor SW2 are both PMOS, and the third switch transistor SW3 and the fourth switch transistor SW4 are both NMOS.

[0059] In some embodiments, the internal power supply terminal voltage VDD2 may be 5.5V.

[0060] In some embodiments, the oscillator can output a square wave signal with a frequency of 500 kHz, for example, 0-+5V. When the oscillator outputs a low level, the control terminals of the four switch tubes are all high, the first switch tube SW1 and the second switch tube SW2 are disconnected, the third switch tube SW3 and the fourth switch tube SW4 are both turned on, and the internal power supply terminal VDD2 charges the first capacitor C1, and the charging voltage reaches VDD2; when the oscillator outputs a high level, the first switch tube SW1 and the second switch tube SW2 are both turned on, the third switch tube SW3 and the fourth switch tube SW4 are both disconnected, the voltage at the first end of the first capacitor C1 is VB, and the voltage at the second end of the first capacitor C1 is VB+VDD2. At this time, the first capacitor C1 charges the third capacitor C3, so that the output voltage of the charge pump boost unit is stabilized at VB+VDD2, thereby achieving boost.

[0061] The charge pump boost unit circuit has a simple structure, stable output and is easy to integrate.

[0062] In some embodiments, reference Figure 2 , the PMOS driving circuit further includes: a buck module 19 (VDD2_GE);

[0063] The step-down module 19 has an input end connected to the external power supply end, and an output end connected to the internal power supply end.

[0064] The step-down module 19 is used to generate low voltage, so that the circuit can use low-voltage devices, reduce the design difficulty, and be applicable to more processes. The size of the circuit is greatly reduced, which is conducive to integration and miniaturization. At the same time, some devices use low-voltage modules, which will be more stable and improve the overall performance of the circuit.

[0065] In some embodiments, reference Figure 2 , the PMOS driving circuit also includes: a logic control module 17 (LOGIC), a negative control positive module 18 (NCP) and a fifth switch tube SW5;

[0066] The negative-control-positive module 18 has an input terminal receiving an external enable signal EN and an output terminal connected to an enable terminal of the logic control module 17;

[0067] The logic control module 17 has an input end receiving an external driving signal INPUT, a first output end connected to the input end of the level shift module 11, and a second output end connected to the control end of the fifth switch tube SW5;

[0068] The fifth switch tube SW5 has a first end connected to the drain of the PMOS tube 15 and a second end grounded.

[0069] In some embodiments, the fifth switch SW5 is an NMOS.

[0070] The negative control positive module 18 is used for enabling control, and the fifth switch tube SW5 is a discharge tube. The first end of the power amplifier 16 is connected to the drain of the PMOS tube 15, and the second end is grounded.

[0071] In some embodiments, the difference between the output terminal voltage of the intermediate voltage generating module 13 and the input terminal voltage of the intermediate voltage generating module 13 is constant.

[0072] The intermediate voltage generating module 13 is used to control the output voltage range of the buffer module 12. The difference between the output voltage and the input voltage of the intermediate voltage generating module 13 is constant. When the voltage of the external power supply terminal changes, the output voltage of the PMOS tube 15 also changes accordingly, so that the gate-source voltage of the PMOS tube 15 is relatively fixed, and the PMOS tube 15 can be guaranteed to work stably when the voltage of the external power supply terminal changes.

[0073] In some embodiments, the voltage range of the external power supply terminal is +20V to +80V.

[0074] Depend on Figure 4 It can be seen that, compared with the prior art, the falling delay time Δtr2 of the modulation signal in this solution is significantly shorter than the falling delay time Δtr1 of the prior art solution. At the same time, the falling delay time Δtr2 of the modulation signal in this solution is basically consistent with the rising delay time Δtf2, which eliminates the broadening phenomenon of the modulation signal while ensuring the signal transmission speed.

[0075] Corresponding to any of the above-mentioned PMOS driving circuits, an embodiment of the present invention further provides a driving device, which includes any of the above-mentioned PMOS driving circuits and has the advantages of the above-mentioned PMOS driving circuits, which will not be described in detail here.

[0076] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A PMOS driving circuit, characterized in that: include: Level shift module, buffer module, intermediate voltage generation module and boost module; The boost module has an input end connected to an external power supply end, and an output end connected to the power supply end of the level shift module, the power supply end of the buffer module and the input end of the intermediate voltage generating module respectively; The output end of the intermediate voltage generating module is connected to the ground end of the buffer module; the output end of the buffer module is connected to the gate of the PMOS tube; The level shift module has an input end receiving an external driving signal, an output end connected to the input end of the buffer module, and a ground end connected to ground; The voltage at the output end of the boost module is greater than the voltage at the external power supply end, and the difference between the voltage at the output end of the boost module and the voltage at the external power supply end is a preset voltage.

2. The PMOS driving circuit according to claim 1, characterized in that: The preset voltage is +5V.

3. The PMOS driving circuit according to claim 1, characterized in that: The boost module comprises: a charge pump boost unit; The charge pump boost unit has an input end connected to the input end of the boost module, and an output end connected to the output end of the boost module.

4. The PMOS driving circuit according to claim 3, characterized in that: The charge pump boost unit comprises: an oscillator, a first inverter, a first follower, a second follower, a third follower, a fourth follower, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a first capacitor, a second capacitor and a third capacitor; The output end of the oscillator is connected to the input end of the first inverter, and the output end of the first inverter is respectively connected to the input end of the first follower, the input end of the second follower, the input end of the third follower, and the input end of the fourth follower; The output end of the first follower is connected to the control end of the second switch tube, the output end of the second follower is connected to the control end of the first switch tube, the output end of the third follower is connected to the control end of the third switch tube, and the output end of the fourth follower is connected to the control end of the fourth switch tube; The first switch tube has a first end connected to the input end of the charge pump boost unit, and a second end connected to the first end of the third switch tube and the first end of the first capacitor respectively; The second switch tube has a first end connected to the output end of the charge pump boost unit, and a second end connected to the first end of the fourth switch tube and the second end of the first capacitor respectively; The second end of the third switch tube is grounded, and the second end of the fourth switch tube is connected to the internal power supply end; The second capacitor has a first end connected to the internal power supply terminal and a second end connected to the ground; The third capacitor has a first end connected to the output end of the charge pump boost unit and a second end connected to the ground.

5. The PMOS driving circuit according to claim 4, characterized in that: The first switch tube and the second switch tube are both PMOS tubes, and the third switch tube and the fourth switch tube are both NMOS tubes.

6. The PMOS driving circuit according to claim 4, characterized in that: The PMOS driving circuit further includes: a buck module; The step-down module has an input end connected to the external power supply end, and an output end connected to the internal power supply end.

7. The PMOS driving circuit according to any one of claims 1 to 6, characterized in that: The PMOS driving circuit further includes: a logic control module, a negative-control-positive module and a fifth switch tube; The negative-control-positive module has an input terminal receiving an external enable signal and an output terminal connected to the enable terminal of the logic control module; The logic control module has an input end receiving the external driving signal, a first output end connected to the input end of the level shift module, and a second output end connected to the control end of the fifth switch tube; The fifth switch tube has a first end connected to the drain of the PMOS tube and a second end connected to the ground.

8. The PMOS driving circuit according to any one of claims 1 to 6, characterized in that: The difference between the output terminal voltage of the intermediate voltage generating module and the input terminal voltage of the intermediate voltage generating module is constant.

9. The PMOS driving circuit according to any one of claims 1 to 6, characterized in that: The voltage range of the external power supply terminal is +20V to +80V.

10. A driving device, characterized in that: A PMOS driving circuit comprising any one of claims 1 to 9.

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