Integrated circuit and embedded system with such an integrated circuit

Abstract

An integrated circuit (10), characterized by the following features: - the circuit (10) comprises an electronic security device (11) for supporting a secure boot process (23), wherein the security device (11) is queried; - the circuit (10) has a protection against electromagnetic fault injection and - the circuit (10) is configured such that the protection extends to the boot process (23).

Description

Technical Field

[0001] This invention relates to an integrated circuit. Furthermore, this invention relates to an embedded system having such an integrated circuit. Background Technology

[0002] In the context of data processing, the terms "eFuse," "E-Fuse," or simply "Fuse" refer to an electronic fuse device developed by IBM in its prototype form, which enables dynamic, real-time programming of computer chips. US4962294A discloses an implementation of this approach as a one-time programmable non-volatile memory element.

[0003] US 2006 / 0136858 A1 discloses a method for in-situ alteration of system parameters of an integrated circuit. The integrated circuit has an E-Fuse constructed as a semiconductor element, which can be configured using on-chip metal interconnects in silicon-based chip fabrication, wherein the access possibilities or operating modes of the circuit are encoded based on information stored in the E-Fuse. The encoded E-Fuse can be selectively destroyed via an integrated interface or via an integrated E-Fuse control module.

[0004] Within the scope of the following discussion, the term "electronic safety device" should always be interpreted broadly, explicitly including all types of non-volatile memory, such as flash memory or PCM. Summary of the Invention

[0005] The present invention provides, according to independent claims, an integrated circuit, particularly an FPGA or microcontroller, and an embedded system having such circuitry, such as a system on a chip (SoC).

[0006] The solution according to the invention is based on the understanding that protecting IT systems from reverse engineering or manipulation of their firmware is crucial. In the case of embedded systems, attackers may gain access to integrated circuits within the system, thus necessitating security within those circuits. The secure bootstrap (secure boot) ensured by verifying the authenticity of the firmware before execution, firmware encryption, or securing the debug interface represents an example of security measures implemented within integrated circuits. These security mechanisms must be protected against physical attacks, such as laser attacks, electromagnetic fault injection (EM-FI) attacks, and side-channel attacks.

[0007] The proposed solution is also based on the understanding that security information, such as activation for secure system startup, must obviously be stored in non-volatile memory. For this purpose, the previously mentioned electronic security device is typically used. In this case, the electronic security device can typically be set (to 1) but cannot be reset (to 0). Information that is often security-related is stored in such a security device, relating to ensuring boot, deactivating debug interfaces, or root keys for firmware encryption. However, reading the security device can sometimes be complex and slow, thus loading the security device into volatile memory used as a hardware cache, such as processor registers, at the start of the boot process. Because the security device contains important information for the boot process itself, it is loaded using a hardware-implemented finite automaton at the start of the process. Figure 1 At this point in time, the software is not executed. Note that flash memory or battery-buffered random access memory (BBRAM) can also be used to store this security information.

[0008] The circuit according to the invention also considers known countermeasures against fault injection, particularly electromagnetic fault injection. Examples include: the implementation of spatial or temporal redundancy in critical operations, for example by means of triple modular redundancy (TMR), or the random variation in runtime behavior (jitter) of critical operations, making it impossible for an attacker to determine the correct timing for a fault attack.

[0009] Furthermore, it is significant to implement a magnetic field detector that targets a relatively strong magnetic field used in an attack and can be detected with high reliability. If an attack is detected, the corresponding equipment is switched to a secure lockout mode (Sperrmodus). Such a detector is described, for example, in the following publication: J. Breier, S. Bhasin, and W. He. Anelectromagnetic fault injection sensor using hogge phase-detector. 18th International Symposium on Quality Electronic Design (ISQED), pp. 307-312, March 2017.

[0010] The scheme described below recognizes that this measure is implemented in multiple integrated circuits, but typically does not detect the cache memory (Zwischenspeicher) of the security device (technical term: "Cachen"). This vulnerability allows attackers to bypass the measures.

[0011] The advantage of the solution according to the present invention is therefore that it provides improved resistance to (Abwehr) EM-FI attacks.

[0012] By means of the measures enumerated in the dependent claims, advantageous extensions and improvements to the basic idea described in the independent claims are possible. Therefore, it can be specified that the embodiments of the invention are configured such that the query (Abfragen) of the electronic security device has randomly varying operational behavior. This variation can additionally make potential attacks more difficult. Attached Figure Description

[0013] Embodiments of the invention are shown in the accompanying drawings and further described below. Wherein:

[0014] Figure 1 This shows the device's boot process.

[0015] Figure 2 A redundant implementation of the reading process for a safety device is illustrated by way of example. Detailed Implementation

[0016] According to the present invention, a magnetic field detector or EM-FI detector can be implemented in an integrated circuit and in a safety device (reference numeral 22, ...). Figure 1 The cache storage was activated beforehand. For example... Figure 2As illustrated, redundant implementation of this safety device buffering process (22) is also conceivable. Since magnetic field injection may fail due to common cause (e.g., considering sampling interference) (common cause failure, CCF), redundant implementation in terms of time and space is recommended.

Claims

1. An integrated circuit (10), characterized in that the following features: - the circuit (10) comprises an electronic security device (11) for supporting a boot process (23) that is secured, wherein the security device (11) is queried (22); - the circuit (10) has a protection against electromagnetic fault injection that is activated before a cache storage of the security device (11) and - the circuit (10) is configured in such a way that the protection extends to the boot process (23).

2. The integrated circuit (10) according to claim 1, characterized by the following features: - the circuit (10) comprises a hardware cache (12, 13, 14) and - the circuit (10) is set up for storing a query result in the hardware cache (12, 13, 14) when the security device (11) is queried (22).

3. The integrated circuit (10) according to claim 2, characterized by the following features: - the hardware cache (12, 13, 14) is a processor register or a RAM cache.

4. The integrated circuit (10) according to claim 3, characterized by the following features: - the hardware cache (12, 13, 14) is redundantly designed and - the circuit (10) is set up for reading the query result into the hardware cache (12, 13, 14) several times in succession.

5. The integrated circuit (10) according to claim 4, characterized in that the following features: - the circuit (10) comprises a comparator (15) for performing a comparison between the processor registers and - the circuit (10) is set up for signaling an alarm (16) if the comparison fails.

6. The integrated circuit (10) according to claim 4 or 5, characterized by the following features: - the processor registers are redundantly designed threefold and - the processor registers are spatially offset from one another.

7. The integrated circuit (10) according to any one of claims 1 to 6, characterized by the following features: - the circuit (10) comprises a magnetic field detector or an electromagnetic fault injection detector and - the circuit (10) is set up for activating the magnetic field detector before the boot process (23).

8. The integrated circuit (10) according to any one of claims 1 to 7, characterized by the following features: - the circuit (10) is set up in such a way that the security device (11) is first queried (22) after the circuit (10) is switched on (21), then the boot process (23) is continued and finally a firmware (24) is implemented.

9. The integrated circuit (10) according to any one of claims 1 to 8, characterized by the following features: - the circuit (10) is set up in such a way that the query (22) of the security device (11) has a randomly varying runtime behavior.

10. An embedded system having a circuit (10) according to any one of claims 1 to 9.

Images