Memristor Narrowband Interference Processing System and Method Based on Blind Separation and Kalman Filter

Through the memristor narrowband interference processing system based on blind separation and Kalman filter, the problems of poor interference performance and insufficient accuracy of the memristor NPU are solved, and the positioning of damaged nodes and the optimization of neural network are realized, and the stability and accuracy of the system are improved.

CN111737932BActive Publication Date: 2025-07-25ANHUI UNIV
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Patent Information

Application Number
CN202010516098.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-06-09
Publication Date
2025-07-25
Estimated Expiration
2040-06-09

AI Technical Summary

Technical Problem

In the prior art, the memristor NPU has poor interference performance, insufficient accuracy and robustness, and cannot optimize the neural network per layer and cannot locate damaged nodes.

Method used

A memristor narrowband interference processing system based on blind separation and Kalman filter is adopted. By designing hardware noise simulation, blind source separation technology and sparse reconstruction algorithm, combining the BLGN noise model and ICA narrowband interference blind separation method, hardware noise is eliminated and defective nodes are confirmed.

Benefits of technology

It improves the accuracy and robustness of the memristor NPU, can locate damaged nodes, optimize the processing capabilities of each layer of neural network, and improves the stability and accuracy of the system.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a memristor narrowband interference processing system and method based on blind separation and Kalman filter, including a blind separation method and an interference processing method. The present invention relates to the field of electronic technology. Step 1: Identify the problem and conduct research work; Step 2: Design of narrowband interference noise signals; Narrowband interference suppression methods and research status, Design of the BLGN configuration of the narrowband interference model; Step 3: RRAM memristor network array; Research status of memristor neural networks, RRAM shared weight technology, Memristor simulation model, Model improvement scheme; Step 4: Processing of blind separation programming voltage noise signals; Research status of blind separation technology, ICA narrowband interference blind separation, Elimination of narrowband signals based on Kalman filter and confirmation of defective nodes; Step 5: Conclusion, interference processing can be carried out to improve the accuracy and robustness of the memristor NPU, optimize each layer of the neural network, and be able to locate damaged nodes.
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Description

Technical Field

[0001] The present invention relates to the field of electronic technologies, and particularly to a memristor narrowband interference processing system and method based on blind separation and a Kalman filter. Background Art

[0002] With the increase in manufacturing costs and basic physical limitations, it is impossible to bridge the expected performance gap between the latest CMOS-based chips and the requirements of future neural networks solely by device scaling. The RRAM devices composed of memristor neural processing units (NPUs) are gradually entering the actual scenario. A memristor is a special device whose resistance value changes with current. The characteristic of switching between high and low resistance values makes it an ideal hardware element for neural networks. As a new type of memory, RRAM is proposed and is expected to become a breakthrough for Moore's Law. The biggest problems at the current stage are reflected in temperature fluctuations, difficult automatic testing, and reading speed, etc. Different from general neural network processing, the hardware implementation method can achieve an energy efficiency more than two orders of magnitude higher than the current processing method. However, during the process of hardware construction, the hardware noise of the memristor itself and the interference between materials are caused. Since the resistance of the memristor changes due to temperature and voltage, the memristor itself becomes one of the experimental error factors. Based on the characteristics of neural networks, this kind of error will gradually accumulate and deteriorate or fail to obtain better efficiency at a certain stage. Moreover, the defects of the pseudo-device and cross-point array itself make the actual application more complex.

[0003] Finding a method to resist interference is an important topic in the research of communication systems. When useful signals are mixed with noise, it is very important to separate the effective signals. In the RRAM device, it is to process systematic noise and automatic testing and other technical processes. As one of the current satellite signal processing technologies, PCMA has received extensive attention. Since VIASAT company proposed this technology, it has been receiving attention and has become a technology that the Chinese military focuses on. Higher-order PCMA is a very promising processing technology. Among them, blind source separation has become one of the main application methods. Underdetermined and ill-conditioned states are sensor scenarios in actual scenarios. The blind separation technology and array signal processing are novel technologies worthy of attention. Considering the ideality of the current memristor simulation, a method of using blind separation technology to process the noise of the memristor array is proposed. At present, the existing technologies have poor interference performance, the accuracy and robustness of the memristor NPU are poor, they cannot optimize each layer of the neural network, and they cannot locate damaged nodes. Summary of the Invention

[0004] (1) Technical Problems to be Solved

[0005] In view of the deficiencies of the prior art, the present invention provides a memristor narrowband interference processing system and method based on blind separation and Kalman filter, which solves the problems of poor interference performance, poor accuracy and robustness of the memristor NPU, inability to optimize each layer of neural network, and inability to locate damaged nodes.

[0006] (II) Technical solutions

[0007] To achieve the above objectives, the present invention is realized through the following technical solutions: A memristor narrowband interference processing system based on blind separation and Kalman filter, including a blind separation system and an interference processing system. The blind separation system includes an external data source module. The output end of the external data source module is electrically connected to a signal whitening module. The output end of the signal whitening module is sequentially electrically connected to a first memristor network module and a blind signal processing module. The output end of the first memristor network module is electrically connected to a second memristor network module. The output end of the blind signal processing module is electrically connected to a sparse signal processing module. The output end of the sparse signal processing module is electrically connected to an automatic detection algorithm module. There is an electrical connection between the automatic detection algorithm module and the first memristor network module. There is an electrical connection between the output end of the second memristor network module and the automatic detection algorithm module. There is an electrical connection between the automatic detection algorithm module and the automatic detection algorithm module.

[0008] Preferably, the method for interference processing includes the following steps:

[0009] Step 1: Identify the problem and conduct research work;

[0010] Step 2: Design narrowband interference noise signals;

[0011] (I) Narrowband interference suppression methods and research status;

[0012] (II) Design of narrowband interference model BLGN configuration;

[0013] Step 3: RRAM memristor network array;

[0014] (I) Research status of memristor neural networks;

[0015] (II) RRAM shared weight technology;

[0016] (III) Memristor simulation model;

[0017] The update formula of the memristor is:

[0018] i(t) = G(y, v)v(t)

[0019]

[0020] where G(y, v) is the conductance for a given memristor state y, and F(y, v) describes the dynamic evolution of that state, given the time-dependent measurement v.

[0021] The result of the conductance formula is:

[0022]

[0023] where Gm, a, and b are constants for a particular device across all states and histories and depend on the material properties within the conduction channel.

[0024] The on-switching equation of the model is:

[0025]

[0026]

[0027] When the voltage is higher or lower than a certain determined value, scale the relevant weights to the relevant pins and use this method for updating.

[0028] (IV) Model improvement scheme;

[0029] (1) Add noise to BLGN

[0030] Use BLGN to add noise to the hierarchical structure.

[0031] v(t) = v1(t) + N(t)

[0032] N(t n ) = x1cos(2πf l t n ) - x2sin(2πf l t n )

[0033] tn is the sampling point of t.

[0034] (2) Model diagram

[0035] Step 4: Blind separation programming voltage noise signal processing;

[0036] (I) Research status of blind separation technology;

[0037] (II) ICA narrowband interference blind separation;

[0038] (III) Narrowband signal cancellation and defective node confirmation based on Kalman filtering;

[0039] (1) Voltage signal estimation and noise cancellation;

[0040] Prediction formula:

[0041] Xkp = A Xk -1 + B uk + w k

[0042] P kp = A Pk -1A T + Q k

[0043] A: State transition matrix, B: Control matrix, Wk: Prediction noise, Qk: State transition noise

[0044] (2), Model evaluation;

[0045] (3), Avoidance of defective nodes,

[0046] Step 5: Conclusion.

[0047] Preferably, the content of the research work is:

[0048] (1), Design the simulation of hardware noise on the existing simulator and NPU CNN architecture, simulate the real environment, and increase the reliability of the model;

[0049] (2), Adopt the algorithm of blind source separation technology to process noise. Specifically, use the blind separation method to extract systematic interference, and based on the greedy algorithm SPA - SAMP, compress and sense to reconstruct narrow - band interference and impulse noise, and eliminate hardware noise while ensuring accuracy.

[0050] Preferably, the content of the BLGN configuration design of the narrow - band interference model is:

[0051] (1), Principle of noise model configuration;

[0052] (2), Feasibility study on the improvement of memristor neural network.

[0053] Preferably, the content of the ICA narrow - band interference blind separation is:

[0054] (1), ICA programming voltage blind separation;

[0055] (2), Obtain the filtering support set.

[0056] (III) Beneficial effects

[0057] The present invention provides a memristor narrow - band interference processing system and method based on blind separation and Kalman filter. It has the following beneficial effects:

[0058] (1) The memristor narrowband interference processing system and method based on blind separation and Kalman filter can perform interference processing through the following steps: Step 1: Identify the problem and conduct research work; Step 2: Design narrowband interference noise signals; Step 3: RRAM memristor network array; Step 4: Blind separation programming voltage noise signal processing, which can improve the accuracy and robustness of the memristor NPU, optimize each layer of the neural network, and locate damaged nodes. Description of the Drawings

[0059] Figure 1 It is a flow chart of the blind separation method. Detailed Embodiment

[0060] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0061] Please refer to Figure 1 , the present invention provides a technical solution: a memristor narrowband interference processing system and method based on blind separation and Kalman filter, including a blind separation system and an interference processing system. The blind separation method includes an external data source module. The output end of the external data source module is electrically connected to a signal whitening module. The output end of the signal whitening module is sequentially electrically connected to a first memristor network module and a blind signal processing module. The output end of the first memristor network module is electrically connected to a second memristor network module. The output end of the blind signal processing module is electrically connected to a sparse signal processing module. The output end of the sparse signal processing module is electrically connected to an automatic detection algorithm module. There is an electrical connection between the automatic detection algorithm module and the first memristor network module. There is an electrical connection between the output end of the second memristor network module and the automatic detection algorithm module. There is an electrical connection between the automatic detection algorithm module and the automatic detection algorithm module;

[0062] The interference processing method includes the following steps:

[0063] Step 1: Identify the problem and conduct research work; the content of the research work is:

[0064] (1) On the existing simulator and NPU CNN architecture, design the simulation of hardware noise to simulate the real environment and increase the reliability of the model. Specifically, use the frequency-domain sparse multi-bandlimited Gaussian interference source superposition model (BLGN), and randomly add it to each network layer and memristor unit through the sparse reconstruction method, trying to be as close as possible to the semiconductor memristor components in the actual situation, simulate the temperature drift characteristics of the memristor, and then improve a more practical RRAM simulation model;

[0065] (2) The algorithm for processing noise using blind source separation technology, specifically, using the blind separation method to extract systematic interference, and based on the greedy algorithm SPA-SAMP for compressive sensing reconstruction of narrowband interference and impulse noise, eliminating hardware noise while ensuring accuracy. At present, the method for providing the accuracy of memristor components is to provide a better learning library. In actual use, the service life and error superposition deterioration are inevitable. Effective testing and elimination algorithms can improve the network stability and accuracy as much as possible, and at the same time have the ability to locate damaged nodes.

[0066] Step 2: Design of narrowband interference noise signal;

[0067] (1) Narrowband interference suppression methods and research status; The interference signals mainly come from the useless signals caused by external signal sources of the system, enter the communication system through a certain medium, and overlap with the useful signals. Some interference signals may also come from the inside of the system. Among them, common electromagnetic radiation electromagnetic interference (EMI), cross-modulation interference, etc. in electronic components. Narrowband interference and impulse noise are important interference factors in components. In the NPU, it is reflected in the interference received by each memristor unit, resulting in changes in its own resistance and overall output offset. Most importantly, neither narrowband interference nor impulse noise interference can be simply analyzed using the traditional AWGN model and theory. Narrowband interference does not have the characteristic of white, and the statistical distribution of impulse noise is non-Gaussian. Their joint distribution also does not conform to the joint Gaussian distribution. The current noise models, such as the band-limited Gaussian noise model (BLGN) of narrowband interference, only the amplitude of a single signal source conforms to the univariate Gaussian distribution, and the appearance of non-zero elements of the Gaussian mixture model of impulse noise conforms to the Poisson distribution, which does not belong to the traditional AWGN model. Generally, the power spectrum of narrowband interference and impulse noise will generally exceed 15 - 16 dB, or even 50 dB. At present, the memristor network design has not effectively simulated this actual scenario. Therefore, an improvement in noise simulation is proposed based on actual application scenarios such as OFDM and MIMO.

[0068] (2) Design of the BLGN configuration of the narrowband interference model; The content of the design of the BLGN configuration of the narrowband interference model is:

[0069] (1) Noise model configuration principle; there are various narrowband interference models in practical applications, such as narrowband band-limited random power spectral density model, spatially randomly distributed narrowband interference source attenuation model, frequency-domain sparse multi-band-limited Gaussian interference source superposition model, etc. According to the actual application, this paper selects the frequency-domain sparse multi-band limited Gaussian interference source superposition model (BLGN). This model belongs to a statistical model, which is defined as the superposition of BLGN interference sources at any position. Each interference source is generated by a Gaussian white noise source through a band-pass filter with a bandwidth limited within the wideband interference bandwidth and frequency-converted to a certain center frequency position. Under effective design, the bandwidth of the model can be made small enough to make the interference model sparse. Since memristor network signal processing is closer to digital signal processing, narrowband density statistical models are not suitable for noise cancellation and estimation. An appropriate BLGN configuration can more accurately characterize the frequency-domain sparse characteristics of narrowband interference, which is more in line with the statistical characteristics in practice. Especially in systems such as OFDM, it has strong adaptability, so this model is used for characterization.

[0070] For general OFDM, it can be divided into CP-OFDM, TDS-OFDM, etc. according to different compositions. The difference basically depends on the coding form adopted for the guard interval of OFDM.

[0071] (2) Feasibility study on the improvement of memristor neural network. Taking the memristor configuration of the CNN neural network as an example, there has been a realization of a memristor network composed of pure hardware [1]. Since the number of layers of the neural network is related to the learning accuracy, an appropriate number of layers makes the processed data more reliable.

[0072] Step 3: RRAM memristor network array;

[0073] (I) Research status of memristor neural network;

[0074] The memristor switch consists of two vertical nanowire layers, which act as the top selection saddle and the bottom electrode respectively. The mold-separating material is located between the two nanowire layers; thus, a memristor is formed at each intersection.

[0075] The memristor switch is suitable for large-scale neural network implementation. First, it is high-density because the crossbars can be vertical stacks and each intersection is a memristor. In addition, the memristor is non-volatile, nanoscale, and multi-state. Second, it is low-power. The array switch allows memory and computing integration, and the memristor is a non-volatile device with a low operating voltage. These advantages of the memristor array make this architecture applicable to a wide range of neural networks.

[0076] The neuromorphic computing system using memristors provides a fast and energy-efficient method. The convolutional neural network is one of the most important models for image recognition. For the RRAM device composed of memristor devices, the intersection is an intersection array, and each intersection has a memristor unit.

[0077] From the perspective of CNN, optimize the model and related methods according to the existing improvement results. Convolutional neural networks, which greatly reduce the number of free parameters. The state-of-the-art microarchitectures usually rely on weight sharing techniques but are still affected by the von Neumann bottleneck based on transistor platforms. On this basis, later researchers constructed neural networks composed of memristor networks, greatly improving the related efficiency. According to the existing results, compared with traditional devices, it can achieve an efficiency more than two orders of magnitude higher.

[0078] However, there are still problems that have to be solved surrounding RRAM, such as the conductance drift, temperature drift, non-linearity and other characteristics of the memristor itself. For RRAM itself, partial memristor damage often occurs due to preparation reasons, and these are all problems that should be solved currently.

[0079] The typical calculation process of CNN involves a large number of sliding convolution operations. In this regard, a computing unit that supports parallel product calculations is highly needed. This need has led to the redesign of traditional systems to run CNNs with higher performance and lower power consumption. However, the further improvement of computing efficiency will ultimately be restricted by the von Neumann architecture of these systems, where the physical separation of memory and processing units results in a large amount of energy consumption and a large delay in data between units. In contrast, RRAM provides a promising non-von Neumann computing mode, where data is stored, thus eliminating the cost of data transmission. By directly using Ohm's law for multiplication and Kirchhoff's law for accumulation, the memristor array can achieve parallel in-memory multiply-accumulate operations, thus realizing in-memory analog computing and greatly improving speed and energy efficiency.

[0080] (2). RRAM weight sharing technology;

[0081] The development of RRAM inevitably applies the idea of neural networks. Weight sharing is a common feature of state-of-the-art neural networks. Compared with densely connected networks, it can greatly reduce the number of available parameters required to perform feature extraction. Inspired by the way the human eye observes images physiologically, this approach not only minimizes the preprocessing of translating and locally distorting the input, but also extracts and classifies local spatial correlations. CNN is now the main architecture for analyzing visual images, and weight sharing can also utilize the spatial and temporal translation invariance of patterns. It has broad application prospects.

[0082] Most implementations of shared-weight architectures rely on graphics processing units. However, when implemented in traditional digital hardware, these weight-sharing networks suffer from large inference latency and high power consumption. These problems become less affordable if the computation is performed at the edge in the Internet of Things era. Application-specific integrated circuits with optimized multiplier units have the potential to improve energy efficiency. However, the von Neumann bottleneck and transistor scaling limitations of such architectures ultimately limit efficiency. Therefore, fundamental changes in the computing platform and its building blocks are crucial to meet the growing demand for computing power.

[0083] Memristors are emerging two-terminal electronic devices with analog conductance, fast switching, excellent scalability, long retention, and long endurance. Memristor arrays naturally parallelize the multiply-accumulate operation. This analog in-memory computing directly uses intrinsic physical laws to avoid the large energy and time overheads incurred by frequent data interactions in von Neumann systems. This enables memristor arrays to physically embody the fully connected layer of a network and enhance energy efficiency. However, practical computing systems always have bounds in terms of computing power and memory. Additionally, typical datasets have spatial or temporal correlations. Given the number of memory grains, or the number of trainable parameters of the system, multi-layer perceptrons are generally less powerful than weight-sharing networks, thus limiting their practical applications.

[0084] Since memristors are most effectively assembled in a crossbar switch matrix, which is different from the microstructure of weight-sharing artificial neural networks, it is necessary to effectively map the high-dimensional trainable parameters of weight-sharing networks to a 2D memristor array. Additionally, this mapping should meet more stringent requirements for the accuracy of weight representation, as weight-sharing architectures are more vulnerable to hardware non-idealities compared to fully connected networks. Due to the stochastic behavior of memristors, memristors may inappropriately reflect synaptic weights, which is related to ion migration, but is improved through iterative correction at the cost of time and efficiency. This makes the training of weight-sharing architectures a daunting task. Therefore, memristors have only been used in fully connected networks, while temporal weight-sharing has recently been demonstrated in recurrent structures. Theoretical studies have been conducted on how convolutional layers map to memristor crossbars with binary weights and memristor CNNs, with the former experimentally verified on memristors. Recently, multiply-accumulate operation for 2-bit input and 3-bit weight convolution has been demonstrated on megabit binary state resistive switch matrices with 65nm and 55nm CMOS logic processing. However, in-situ training of the spatial weight-sharing architecture for memristors is lacking, such as simultaneous spatio-temporal weight-sharing on a memristor array.

[0085] In-situ training directly stores and updates the weights in the memristor array and performs computations at the original location where the neural network parameters are stored; this avoids the need to implement duplicate systems in a computer, thereby improving the area / energy efficiency of the system. More importantly, in-situ training backpropagation can self-adaptively adjust the network parameters to minimize the inevitable non-ideality of the hardware, such as the effects of wire resistance, analog peripheral asymmetry, unresponsive memristors, conductance drift, and conductance programming variations, improving the shared-weight network.

[0086] The research group at the University of Massachusetts demonstrated in-situ training for the operation of a shared-weight neural network. By using a simple convolutional kernel mapped to a memristor crossbar matrix, it is possible to improve the hardware non-ideality of a single-transistor single-memristor (1T1R) array. When classifying MNIST handwritten digits using only 1000 weights, the accuracy reached 92.13%, which is one-fourth of the number of memristor multi-layer bootstrap networks with similar performance. In addition, we demonstrated that the advantages of weight sharing can be extended by cascading the convolutional kernels in the network with an intrinsic 3D input, thereby determining the spatial and temporal correlations in the input-to-state and state-to-state transitions. Through sectional-temporal memristor weight sharing, experiments proved that the number of trainable parameters was reduced to 850, which is an effective method for implementing advanced network topologies for edge computing using memristor-based hardware.

[0087] An optical micrograph of a 1T1R memristor array is shown, including analog programming capabilities, long data reuse, and high durability. These neurons are non-chip burst by traditional transistor circuits. Different from using different types of arrays of 1T1R for different neural network layers, the partitioning of a single large array essentially shares presynaptic euros between different layers of the same network, thus maximizing the utility of the peripheral circuit and benefiting edge applications.

[0088] Implementing particulate-based convolutional operations requires the use of various kernels for each forming sliding operation. It is highly efficient for the memristor array to implement parallel multiply-accumulate operations under the shared input of different kernels. A typical convolution example for a specific sliding step is shown, and associated d-events are shown in the lTlR memristor array. The input values are encoded by the number of pulses according to their quantization bits. The signed kernel weights are mapped to the differential conductances of a pair of memristors. In this way, all the weights of the kernel are mapped to two conductance rows: one row for positive pulse inputs with positive weights, and the other row for negative weights with equivalent negative pulse inputs. After encoding the pulsed input to the bit lines, the output currents through the two differential source lines are detected and accumulated. The differential current is the weighted sum of a pair of input patches and the selected kernel. Different kernels with different weights are mapped to different pairs of differential rows, and the entire memristor array operates in parallel to perform product-column addition operations under the same input. All the required weighted sum results are obtained simultaneously.

[0089] In typical CNN training, it is necessary to respect the "reciprocal" derived from the target and the final output to determine all weight updates. This task requires highly complex operations to apply the encoded read pulses to the source lines from back to front and layer by layer. Due to non-ideal device characteristics such as non-linearity and asymmetric conductance tuning, training a complex memristor network is challenging. Different from pure in-situ training solutions, in-situ training methods are shortcuts that utilize existing high-performance parameters. However, inevitable hardware defects such as defective devices, parasitic line resistance, and capacitance will obscure the weights and degrade the system performance.

[0090] (III). Memristor simulation model;

[0091] When the series resistance of the circuit containing the memristor is negligible relative to the on-state of the device. However, this may not be the case when measuring on the device. When the memristor and the series resistance are comparable, the voltage division will have a significant impact on the dynamic measurement results and must be carefully considered in data analysis. Such sneak currents are all important sources of error.

[0092] The update formula for the memristor is:

[0093] i(t) = G(y, v)v(t)

[0094]

[0095] where G(y, v) is the conductance of the given memristor state y, and F(y, v) describes the dynamic evolution of this state with time-dependent measurement v.

[0096] The result of the conductance formula is:

[0097]

[0098] where Gm, a, and b are constants for a specific device in all states and histories and depend on the material properties within the conduction channel. When the metal phase fills the entire channel, y = 1. At the same time, it describes the Frenkel-Poole migration that occurs when a higher degree of oxidation phase fills the entire channel, so y = 0. According to the actual structure, the formation of the memristor can be roughly divided into a dynamic structure model and a static structure model.

[0099] According to the journal conclusion, this static equation ignores the temperature fluctuations.

[0100] According to the journal observation data results, there is an obvious starting behavior - the initial stage of slow conductance change, followed by rapid switching that saturates uncertainly.

[0101] A saturation term is needed because of the maximum resistance of the channel when the end is oxidized. Finally, in order to match the time correlation of any individual switching curve, power p is needed to reduce the switching speed. The on-switching equation of this model is:

[0102]

[0103]

[0104] When the voltage is higher or lower than a certain determined value, the relevant weights are scaled to the relevant pins and updated in this way. This is also a relatively simple scheme for memristor simulation at present. Further, the actual values can be further simulated according to different materials.

[0105] However, this scheme is obviously rather crude. According to this idea, the memristor designed can only ensure that the values are stable when the usage environment is stable. In this characteristic-based simulation method, the dynamic temperature effect and the changes in the external environment are ignored. According to the actual situation, it is necessary to reasonably set the noise. In the cited figures in the relevant literature, the influence of the noise causes the final result to deteriorate severely, and in some cases, the system operation even crashes.

[0106] (4) Model improvement scheme; The content of the model improvement scheme is as follows:

[0107] (1) Adding noise to BLGN

[0108] Based on the models of research groups such as those in Massachusetts and Tsinghua University, an interference model with BLGN as the main noise source is added to simulate the actual situation. As an effective noise simulation scheme in the OFDM model, BLGN can effectively simulate the relevant noise in the OFDM system. Given that the OFDM block is similar to the block structure of the neural network, and the distributed noise in the memristor belongs to more narrowband interference, and the distributed noise in the memristor has a greater impact on the neural network error accumulation. In order to fully fit this narrowband noise, the BLGN model with the same sparsity processing is selected, and this model has been widely used in actual production, such as in radar, etc.

[0109] Adding noise to the hierarchical structure using BLGN.

[0110] v(t) = v1(t) + N(t)

[0111] N(t n ) = x1cos(2πf l t n ) - x2sin(2πf l t n )

[0112] tn is the sampling point of t.

[0113] According to the research results of the University of Massachusetts, the following algorithm is improved based on the relevant results. Since the random function is only quantitatively simulated in the memristor part and no relevant operations are performed between the neural networks, it is proposed to add relevant noise between the neural network layers.

[0114] Here we propose a random noise based on the BLGN model, which has the characteristics of sparsity and good randomness. Since the OFDM model and the neural network have similar structures in actual scenarios, the relevant concepts can be directly referenced. The BLGN model is a sparse model that meets the characteristics that useful signals account for the majority in actual scenarios.

[0115] According to the hierarchical relationship, a BLGN noise source is added to the corresponding level.

[0116] Using MATLAB as the main tool, relevant data will be added between levels for simulation according to the experimental requirements.

[0117] (2) Model diagram,

[0118] According to the experimental results and after comparing with relevant data sets, the simulation results are as follows.

[0119] First, we get the values of the current flowing through different intersections in the ideal state and the actual state:

[0120] Furthermore, the ideal data is denoised:

[0121] The result of subtracting the ideal matrix from the actual matrix:

[0122] The result of subtracting the ideal matrix from the actual matrix after adding noise:

[0123] Compute the mean square error and print the result:

[0124] The results show that the noise adding effect is more consistent with the actual model.

[0125] According to the comparison of general experimental data, the noise law is Gaussian and can better reflect the actual device operation.

[0126] Step 4: Blind separation of programming voltage noise signal processing;

[0127] (I) Research status of blind separation technology;

[0128] Blind source separation technology is a relatively mature technology and is widely used in various production environments. Among them, independent component analysis is an effective algorithm. Since the independent component analysis algorithm can effectively extract potential information, preprocessing noise and other signals can effectively extract signals such as narrowband signals and impulse noise. In an orthogonal frequency division multiplexing system, due to the great interference of impulse noise on the spectrum, truncation is usually performed, and narrowband signals are relatively easy to extract. However, independent component analysis can correctly detect narrowband signals in actual verification. A support set that can be extracted and preprocessed can be obtained. Independent component analysis is a new technology that has gradually developed to solve the blind source separation problem. The "sound source" in blind source separation refers to an independent component, that is, the speech signal of the speaker at a "cocktail party". Independent component analysis uses preconditions that are easy to meet to reproduce the unobservable source signal components from the mixed signal. In many literatures, the source signals are independent of each other, and independent component analysis and blind source separation have the same or similar models, or two parallel methods, which are solved by the same or similar algorithms. There is no deliberate distinction between BSS and ICA. For local use, under normal circumstances, this mixed use has little effect.

[0129] (2). ICA blind separation of narrowband interference; The content of ICA blind separation of narrowband interference is as follows:

[0130] (1). ICA blind separation of programming voltage;

[0131] From a theoretical or mathematical perspective, independent component analysis is a signal analysis technique. Its purpose is to determine a specific transformation to ensure that each component of the output signal is independent of each other after transformation. In many cases, independent component analysis uses higher-order statistics, so the implementation of blind source separation will not completely overlap with independent component analysis. If the source signal has some other features, these features can also be used to isolate the source signal, such as the time-correlated characteristics and non-stationary characteristics of the signal.

[0132] (2). Obtain the filtering support set.

[0133] According to the actual situation, except for the relatively difficult separation result of impulse noise, narrowband noise can be effectively separated.

[0134] (3). Narrowband signal cancellation and defective node confirmation based on Kalman filter; The content of narrowband signal cancellation and defective node confirmation based on Kalman filter is as follows:

[0135] (1). Voltage signal estimation and noise cancellation;

[0136] Prediction formula:

[0137] X kp = A Xk -1 + B uk + w k

[0138] P kp = A Pk -1A T + Q k

[0139] A: State transition matrix, B: Control matrix, Wk: Prediction noise, Qk: State transition noise

[0140] (2), Model evaluation;

[0141] (3), Avoidance of defective nodes,

[0142] Furthermore, in the actual scenario, since the memristor detection is generally carried out through instruments, after avoiding the defective nodes, unnecessary energy consumption can be reduced and the equipment efficiency can be improved.

[0143] Step 5: Conclusion

[0144] According to the simulation results, the established model can basically conform to the actual working model and optimize the efficiency of product design. A scheme is proposed to extract the noise support set of the memristor by using the ICA algorithm, filter it by using the Kalman filter and confirm and avoid the defective nodes, which can reduce costs and speed up the development progress in actual production.

[0145] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation. The element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.

[0146] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principles and spirit of the present invention, and the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A memristor narrowband interference processing system based on blind separation and Kalman filter, comprising a blind separation system and an interference processing system, characterized in that: The blind separation system includes an external data source module. The output end of the external data source module is electrically connected to a signal whitening module. The output end of the signal whitening module is sequentially electrically connected to a first memristor network module and a blind signal processing module. The output end of the first memristor network module is electrically connected to a second memristor network module. The output end of the blind signal processing module is electrically connected to a sparse signal processing module. The output end of the sparse signal processing module is electrically connected to an automatic detection algorithm module. There is an electrical connection between the automatic detection algorithm module and the first memristor network module, an electrical connection between the output end of the second memristor network module and the automatic detection algorithm module, and an electrical connection between the automatic detection algorithm module and the automatic detection algorithm module; The memristor narrowband interference processing system based on blind separation and Kalman filter includes an interference processing method, and the interference processing method includes the following steps: Step 1: Identify the problem and conduct research work; Step 2: Design narrowband interference noise signals; (1). Narrowband interference suppression methods and research status; (2). Design of the BLGN configuration of the narrowband interference model; Step 3: RRAM memristor network array; (1). Research status of memristor neural networks; (2). RRAM shared weight technology; (3). Memristor simulation model; The update formula of the memristor is: i(t) = G(y, v)v(t) where G(y, v) is the conductance of the given memristor state y, and F(y, v) describes the dynamic evolution of this state, and v is the time-related measurement; The result of the conductance formula is: where Gm, a, and b are constants for a specific device in all states and histories and depend on the material properties within the conduction channel; The open switching equation of the model is: When the voltage is higher or lower than a certain determined value, scale the relevant weights to the relevant pins and use this method for updating; (4). Model improvement scheme; (1). Add noise to BLGN, Use BLGN to add noise to the hierarchical structure; v(t) = v1(t) + N(t) N(t n ) = x1cos(2πf l t n ) - x2sin(2πf l t n ) tn is the sampling point of t; (2). Model illustration, Step 4: Process the blind separation programming voltage noise signal; (1). Research status of blind separation technology; (2). ICA narrowband interference blind separation; (3). Narrowband signal elimination and defective node confirmation based on Kalman filter; (1). Voltage signal estimation and noise elimination; Prediction formula: X kp = A Xk -1 + B uk + w k P kp = A Pk - 1A T + Q k A: State transition matrix, B: Control matrix, Wk: Prediction noise, Qk: State transition noise (2). Model evaluation; (3). Avoid defective nodes, Step 5: Conclusion.

2. The memristor narrowband interference processing system based on blind separation and Kalman filter according to claim 1, characterized in that: The content of the research work is: (1). Design the simulation of hardware noise on the existing simulator and NPU CNN architecture, simulate the real environment, and increase the reliability of the model; (2). Adopt an algorithm for processing noise using blind source separation technology, specifically use the blind separation method to extract systematic interference, and based on the greedy algorithm SPA-SAMP, compressively sense and reconstruct narrowband interference and impulse noise to eliminate hardware noise while ensuring accuracy.

3. The memristor narrowband interference processing system based on blind separation and Kalman filter according to claim 1, characterized in that: The content of the design of the BLGN configuration of the narrowband interference model is: (1). Principle of the noise model configuration; (2) Feasibility study on the improvement of memristor neural network.

4. The memristor narrowband interference processing system based on blind separation and Kalman filter according to claim 1, characterized in that: The content of the ICA narrowband interference blind separation is as follows: (1) ICA programming voltage blind separation; (2) Obtaining the filtering support set.

Citation Information

Patent Citations

  • Memristor narrowband interference processing system based on blind separation and Kalman filter

    CN212391795U