A low-cost MOSFET module

Abstract

The present invention discloses a low-cost MOSFET module, comprising a MOSFET chip, a MOSFET substrate and a binding wire; the MOSFET chip is fixedly connected to the MOSFET substrate via the binding wire, and the MOSFET chip and the MOSFET substrate are communicatively connected. The wafer of the present invention has good consistency, the packaged module has good electrical characteristics, and has the advantages of a short product development cycle, low development cost and flexible development. It has a small size, low stray inductance, and low cost, saving most of the packaging costs, such as molds, MOSFET frames and plastic packaging materials. It has low thermal resistance, and the chip is directly attached to the substrate, reducing intermediate layers such as the frame. It has multiple scenarios and flexible application scenarios, and different layouts can be made according to needs. No mold opening is required, and the development cycle is short.

Description

Technical Field

[0001] The invention belongs to the technical field of power electronics, and in particular relates to a low-cost MOSFET module. Background Art

[0002] In motor controller applications, MOSFETs are often connected in parallel, either as multiple single-transistor MOSFETs or as MOSFET modules, to achieve higher power output. Parallel MOSFETs are designed to improve the current handling capability of a product. Different MOSFETs, likely from different batches, have varying electrical characteristics. Using them in parallel increases MOSFET device failure rates, increases product development complexity, costs, and production cycles. While cost-effective, paralleling single-transistor MOSFETs can also lead to higher thermal resistance, poor electrical characteristics due to inconsistent individual transistor characteristics, and a complex assembly process. These limitations are often addressed using MOSFET modules, but these are relatively expensive. MOSFET modularization involves packaging multiple MOSFET wafers in parallel and routing pins with similar electrical characteristics to improve the product's current handling capability and reduce application development complexity. MOSFET module development requires mold development, which can lead to long development cycles and high costs during initial development. Once finalized, MOSFET modules cannot be modified, limiting flexibility; new requirements require redevelopment. In this context, a new low-cost MOSFET module solution is proposed, which can not only solve the problems of high thermal resistance of single-tube parallel connection, multiple processes and poor electrical characteristics, but also has the advantages of MOSFET modules. Summary of the Invention

[0003] The purpose of the present invention is to solve the problem of MOSFET application in high current scenarios and propose a low-cost MOSFET module.

[0004] The technical solution of the present invention is: a low-cost MOSFET module includes a MOSFET wafer, a MOSFET substrate and bonding wires;

[0005] The MOSFET chip is fixedly connected to the MOSFET substrate through a bonding wire, and the MOSFET chip and the MOSFET substrate are communicatively connected.

[0006] Furthermore, the MOSFET wafer includes a first upper bridge wafer, a second upper bridge wafer, a first lower bridge wafer, and a second lower bridge wafer;

[0007] The first upper bridge chip, the second upper bridge chip, the first lower bridge chip and the second lower bridge chip have the same structure, and all include a MOSFET drain, a MOSFET source and a MOSFET gate; the first upper bridge chip and the second upper bridge chip form the upper bridge arm of the MOSFET module; the first lower bridge chip and the second lower bridge chip form the lower bridge arm of the MOSFET module.

[0008] Furthermore, the MOSFET substrate includes a conductive material layer, an insulating material layer, and a heat dissipation material layer fixedly connected in sequence from top to bottom;

[0009] The conductive material layer and the insulating and heat-insulating material layer, as well as the insulating and heat-insulating material layer and the heat-dissipating material layer, are fixedly connected by bonding.

[0010] Furthermore, the conductive material layer includes a bus positive terminal, an upper bridge gate control signal terminal, a phase line signal output terminal, a lower bridge source control signal output terminal, a lower bridge gate control signal terminal, a phase line power output terminal and a bus negative terminal arranged in sequence.

[0011] Furthermore, the MOSFET drain of the first upper bridge chip and the MOSFET drain of the second upper bridge chip are fixedly connected to the positive end of the busbar by welding, and the first upper bridge chip and the second upper bridge chip are both communicatively connected to the positive end of the busbar; the MOSFET drain of the first lower bridge chip and the MOSFET drain of the second lower bridge chip are fixedly connected to the phase line power output end by welding, and the first lower bridge chip and the second lower bridge chip are both communicatively connected to the phase line power output end.

[0012] Furthermore, the MOSFET source of the first upper bridge chip and the MOSFET source of the second upper bridge chip are both communicatively connected to the phase line signal output end and the phase line power output end through binding wires; the MOSFET source of the first lower bridge chip and the MOSFET source of the second lower bridge chip are both communicatively connected to the negative end of the busbar through binding wires.

[0013] Furthermore, the MOSFET gate of the first upper bridge chip and the MOSFET gate of the second upper bridge chip are both communicatively connected to the upper bridge gate control signal end through a binding line; the MOSFET gate of the first lower bridge chip and the MOSFET gate of the second lower bridge chip are both communicatively connected to the lower bridge gate control signal end through a binding line.

[0014] Furthermore, the low-cost MOSFET module further includes packaging material; the MOSFET chip and the bonding wires are both packaged by the packaging material.

[0015] The beneficial effects of the present invention are:

[0016] (1) The wafer has good consistency, the packaged module has good electrical characteristics, and has the advantages of short product development cycle, low development cost and flexible development.

[0017] (2) Small size, low stray inductance, low cost, saving most of the packaging costs, such as mold, MOSFET frame and plastic packaging materials.

[0018] (3) Low thermal resistance, the chip is directly attached to the substrate, reducing the intermediate layers such as the frame.

[0019] (4) Multiple scenarios and flexible application occasions, different layouts can be made according to needs. No mold is required, and the development cycle is short. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is the internal structure diagram of the MOSFET module;

[0021] Figure 2 (a) is the front structural diagram of the MOSFET module;

[0022] Figure 2 (b) is the back structure diagram of the MOSFET module;

[0023] Figure 3 This is a structural diagram of the MOSFET substrate;

[0024] Figure 4 This is the package structure diagram of the MOSFET module;

[0025] Figure 5 This is a diagram showing the arrangement of conductor materials in the MOSFET module;

[0026] In the figure, 1. MOSFET chip; 1-1. First upper bridge chip; 1-2. Second upper bridge chip; 1-3. First lower bridge chip; 1-4. Second lower bridge chip; 2. MOSFET drain; 3. MOSFET source; 4. MOSFET gate; 5. Packaging material; 6. Conductive material layer; 6-1. Busbar positive terminal; 6-2. Upper bridge gate control signal terminal; 6-3. Phase line signal output terminal; 6-4. Lower bridge source control signal output terminal; 6-5. Lower bridge gate control signal terminal; 6-6. Phase line power output terminal; 6-7. Busbar negative terminal; 7. Insulation material layer; 8. Heat dissipation material layer; 9. Binding wire; 11. MOSFET substrate. DETAILED DESCRIPTION

[0027] The embodiments of the present invention will be further described below with reference to the accompanying drawings.

[0028] like Figure 1As shown, the present invention provides a low-cost MOSFET module, including a MOSFET wafer 1, a MOSFET substrate 11 and bonding wires 9;

[0029] The MOSFET chip 1 is fixedly connected to the MOSFET substrate 11 via the bonding wires 9 , and the MOSFET chip 1 and the MOSFET substrate 11 are in communication connection.

[0030] In the embodiment of the present invention, Figure 1 As shown, the MOSFET wafer 1 includes a first upper bridge wafer 1-1, a second upper bridge wafer 1-2, a first lower bridge wafer 1-3 and a second lower bridge wafer 1-4;

[0031] The first upper bridge wafer 1-1, the second upper bridge wafer 1-2, the first lower bridge wafer 1-3 and the second lower bridge wafer 1-4 have the same structure. Figure 2 As shown, they all include a MOSFET drain 2, a MOSFET source 3 and a MOSFET gate 4; the first upper bridge chip 1-1 and the second upper bridge chip 1-2 form the upper bridge arm of the MOSFET module; the first lower bridge chip 1-3 and the second lower bridge chip 1-4 form the lower bridge arm of the MOSFET module.

[0032] In the embodiment of the present invention, the number of upper bridge chips and lower bridge chips can be determined according to actual conditions.

[0033] In the embodiment of the present invention, Figure 3 As shown, the MOSFET substrate 11 includes a conductive material layer 6, an insulating and heat-insulating material layer 7 and a heat dissipation material layer 8 which are fixedly connected in sequence from top to bottom;

[0034] The conductive material layer 6 and the insulating and heat-insulating material layer 7 as well as the insulating and heat-insulating material layer 7 and the heat-dissipating material layer 8 are fixedly connected by bonding.

[0035] In the embodiment of the present invention, Figure 1 As shown, the conductive material layer 6 includes a bus positive terminal 6-1, an upper bridge gate control signal terminal 6-2, a phase line signal output terminal 6-3, a lower bridge source control signal output terminal 6-4, a lower bridge gate control signal terminal 6-5, a phase line power output terminal 6-6 and a bus negative terminal 6-7.

[0036] In the embodiment of the present invention, Figure 1As shown, the MOSFET drain 2 of the first upper bridge chip 1-1 and the MOSFET drain 2 of the second upper bridge chip 1-2 are fixedly connected to the bus positive terminal 6-1 by welding, and the first upper bridge chip 1-1 and the second upper bridge chip 1-2 are both communicatively connected to the bus positive terminal 6-1; the MOSFET drain 2 of the first lower bridge chip 1-3 and the MOSFET drain 2 of the second lower bridge chip 1-4 are fixedly connected to the phase line power output terminal 6-6 by welding, and the first lower bridge chip 1-3 and the second lower bridge chip 1-4 are both communicatively connected to the phase line power output terminal 6-6.

[0037] In the embodiment of the present invention, Figure 1 As shown, the MOSFET source 3 of the first upper bridge chip 1-1 and the MOSFET source 3 of the second upper bridge chip 1-2 are both communicatively connected to the phase line signal output terminal 6-3 and the phase line power output terminal 6-6 through the binding wire 9; the MOSFET source 3 of the first lower bridge chip 1-3 and the MOSFET source 3 of the second lower bridge chip 1-4 are both communicatively connected to the bus negative terminal 6-7 through the binding wire 9.

[0038] In the embodiment of the present invention, Figure 1 As shown, the MOSFET gate 4 of the first upper bridge chip 1-1 and the MOSFET gate 4 of the second upper bridge chip 1-2 are both communicatively connected to the upper bridge gate control signal terminal 6-2 through a binding wire 9; the MOSFET gate 4 of the first lower bridge chip 1-3 and the MOSFET gate 4 of the second lower bridge chip 1-4 are both communicatively connected to the lower bridge gate control signal terminal 6-5 through a binding wire 9.

[0039] In the embodiment of the present invention, Figure 4 As shown, the low-cost MOSFET module further includes a packaging material 5 ; the MOSFET chip 1 and the bonding wires 9 are both packaged by the packaging material 5 .

[0040] The operating principle and process of the present invention are as follows: During application development, since the low-cost MOSFET module is already insulated, it can be directly soldered or crimped onto the heat sink. The upper bridge gate control signal terminal 6-2, the phase signal output terminal 6-3, the lower bridge source control signal output terminal 6-4, and the lower bridge gate control signal terminal 6-5 can all be soldered or crimped with conductors to connect to the drive signal. The phase power output terminal 6-6, the negative busbar terminal 6-7, and the positive busbar terminal 6-1 can all be soldered or crimped with conductors to connect to the power conductors. The binding wire 9 has no electrical connection anywhere other than at the binding wire soldering points.

[0041] At the same time, the module shape and the conductor material shape can be changed according to the specific application. The parallel connection of chips is not limited to 2, but can be multiple.

[0042] like Figure 5As shown in the figure, there is another arrangement of conductor materials (not limited to the two types that appear). The direction of signal and power extraction is the same as Figure 4 Different, suitable for different application scenarios.

[0043] The beneficial effects of the present invention are:

[0044] (1) The wafer has good consistency, the packaged module has good electrical characteristics, and has the advantages of short product development cycle, low development cost and flexible development.

[0045] (2) Small size, low stray inductance, low cost, saving most of the packaging costs, such as mold, MOSFET frame and plastic packaging materials.

[0046] (3) Low thermal resistance, the chip is directly attached to the substrate, reducing the intermediate layers such as the frame.

[0047] (4) Multiple scenarios and flexible application occasions, different layouts can be made according to needs. No mold is required, and the development cycle is short.

[0048] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and it should be understood that the scope of protection of the present invention is not limited to such specific descriptions and embodiments. Those skilled in the art can make various other specific variations and combinations based on the technical teachings disclosed in the present invention without departing from the essence of the present invention, and such variations and combinations are still within the scope of protection of the present invention.

Claims

1. A low-cost MOSFET module, characterized in that: It includes a MOSFET chip (1), a MOSFET substrate (11) and a bonding wire (9); The MOSFET chip (1) is fixedly connected to the MOSFET substrate (11) via a binding wire (9), and the MOSFET chip (1) and the MOSFET substrate (11) are in communication connection; The MOSFET substrate (11) comprises a conductive material layer (6), an insulating and heat-insulating material layer (7), and a heat dissipation material layer (8) which are fixedly connected in sequence from top to bottom; The conductive material layer (6) and the insulating and heat-insulating material layer (7), as well as the insulating and heat-insulating material layer (7) and the heat-dissipating material layer (8), are fixedly connected by bonding; The MOSFET chip (1) is directly attached to the conductive material layer (6) without a MOSFET frame, and the chip electrodes are communicatively connected to the conductive material layer (6) via binding wires (9); The low-cost MOSFET module further includes a packaging material (5); the MOSFET chip (1) and the binding wire (9) are both packaged by the packaging material (5).

2. The low-cost MOSFET module according to claim 1, characterized in that The MOSFET wafer (1) comprises a first upper bridge wafer (1-1), a second upper bridge wafer (1-2), a first lower bridge wafer (1-3) and a second lower bridge wafer (1-4); The first upper bridge chip (1-1), the second upper bridge chip (1-2), the first lower bridge chip (1-3) and the second lower bridge chip (1-4) have the same structure and all include a MOSFET drain (2), a MOSFET source (3) and a MOSFET gate (4); the first upper bridge chip (1-1) and the second upper bridge chip (1-2) form an upper bridge arm of a MOSFET module; the first lower bridge chip (1-3) and the second lower bridge chip (1-4) form a lower bridge arm of the MOSFET module.

3. The low-cost MOSFET module according to claim 2, characterized in that The conductive material layer (6) comprises a busbar positive terminal (6-1), an upper bridge gate control signal terminal (6-2), a phase line signal output terminal (6-3), a lower bridge source control signal output terminal (6-4), a lower bridge gate control signal terminal (6-5), a phase line power output terminal (6-6) and a busbar negative terminal (6-7) which are arranged in sequence.

4. The low-cost MOSFET module according to claim 3, characterized in that The MOSFET drain (2) of the first upper bridge chip (1-1) and the MOSFET drain (2) of the second upper bridge chip (1-2) are both fixedly connected to the busbar positive terminal (6-1) by welding, and the first upper bridge chip (1-1) and the second upper bridge chip (1-2) are both communicatively connected to the busbar positive terminal (6-1); the MOSFET drain (2) of the first lower bridge chip (1-3) and the MOSFET drain (2) of the second lower bridge chip (1-4) are both fixedly connected to the phase line power output terminal (6-6) by welding, and the first lower bridge chip (1-3) and the second lower bridge chip (1-4) are both communicatively connected to the phase line power output terminal (6-6).

5. The low-cost MOSFET module according to claim 3, characterized in that The MOSFET source (3) of the first upper bridge chip (1-1) and the MOSFET source (3) of the second upper bridge chip (1-2) are both communicatively connected to the phase line signal output terminal (6-3) and the phase line power output terminal (6-6) via a binding wire (9); the MOSFET source (3) of the first lower bridge chip (1-3) and the MOSFET source (3) of the second lower bridge chip (1-4) are both communicatively connected to the busbar negative terminal (6-7) via a binding wire (9).

6. The low-cost MOSFET module according to claim 3, characterized in that The MOSFET gate (4) of the first upper bridge chip (1-1) and the MOSFET gate (4) of the second upper bridge chip (1-2) are both communicatively connected to the upper bridge gate control signal terminal (6-2) via a binding line (9); the MOSFET gate (4) of the first lower bridge chip (1-3) and the MOSFET gate (4) of the second lower bridge chip (1-4) are both communicatively connected to the lower bridge gate control signal terminal (6-5) via a binding line (9).

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