Amplifier Nonlinear Offset Drift Correction
By introducing differential input stage and error correction circuit into the amplifier circuit, the error correction signal is trimmed by a variety of temperature-dependent signal components, the linear and nonlinear offset error problems caused by temperature drift in the amplifier circuit are solved, and the circuit is improved Precision and robustness.
Patent Information
- Application Number
- CN202010375849.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-05-07
- Filing Date
- 2020-05-07
- Publication Date
- 2025-01-07
- Estimated Expiration
- 2040-05-07
AI Technical Summary
Amplifier circuits are susceptible to input offset voltages, especially linear and nonlinear offset errors caused by temperature drift, limiting their application in precise measurement and control environments.
Using a differential input stage and an offset error correction circuit, the differential input stage is applied to the differential input stage to reduce linearity and nonlinearity by generating an error correction signal including a constant signal component, a first-order temperature-dependent signal component and a second-order temperature-dependent signal component. Offset error, using absolute temperature square (PTAT) and zero temperature coefficient (CTAT) signal components to trim the error correction signal.
It significantly reduces the offset error in the amplifier circuit, improves the robustness to temperature changes, and reduces the residual offset voltage, and is suitable for the design of precision amplifier circuits.
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Figure CN111917384B_ABST
Abstract
Description
Technical Field
[0001] This document relates to integrated circuits, and more particularly to amplifier circuits. Background Art
[0002] Amplifier circuits or amplifiers have many uses in integrated circuits. Operational amplifiers can be used to amplify signals or to isolate signals present at their input terminals. Difference amplifiers can be used to amplify the difference in electrical signals present at the input terminals of the amplifier. Instrumentation amplifiers can be used to measure and test equipment. Amplifier circuits are susceptible to offset voltages at the input terminals, which are reflected at the output terminals. It is desirable to reduce or eliminate offset voltages, especially where precise measurement and control are required. Summary of the invention
[0003] This document relates generally to amplifier circuits, and more particularly to reducing offset in amplifier circuits. In some aspects, the amplifier circuit includes a differential input stage configured to receive a differential input signal. The differential input stage is susceptible to an offset error including a linear offset error portion and a nonlinear offset error portion. The amplifier also includes an offset error correction circuit coupled to the differential input stage and configured to apply a second-order error correction signal to the differential input stage to reduce the nonlinear portion of the offset error.
[0004] In some aspects, a method for correcting an offset error in an amplifier circuit includes: generating a second-order error correction signal including a constant signal component, a first-order temperature-dependent signal component, and a second-order temperature-dependent signal component; and applying the generated second-order error correction signal to a differential input stage of the amplifier circuit to reduce an offset error including a linear offset error portion and a nonlinear offset error portion, and the second-order temperature-dependent signal component includes an amplitude and a polarity to reduce the nonlinear offset error portion.
[0005] In some aspects, an operational amplifier circuit includes: a differential input stage configured to receive a differential input signal, wherein the differential input stage is susceptible to an offset error including a linear offset error portion and a nonlinear offset error portion; an output buffer stage coupled to the differential input stage; and an offset error correction circuit coupled to the differential input stage. The offset error correction circuit is configured to generate an error correction signal including a first-order temperature-dependent signal component and a second-order temperature-dependent signal component; and apply the error correction signal to the differential input stage to reduce the linear offset error portion and the nonlinear offset error portion of the offset error.
[0006] This section is intended to provide an overview of the subject matter of this patent application. It is not intended to provide an exclusive or exhaustive explanation of the present invention. The detailed description is included to provide more information about this patent application. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] In the accompanying drawings, which are not necessarily drawn to scale, like numbers may describe similar components in different views. Like numbers with different letter suffixes may represent different instances of similar components. The accompanying drawings generally illustrate various embodiments discussed in this document by way of example and not limitation.
[0008] Figure 1 is a circuit diagram of an example of an amplifier circuit.
[0009] Figure 2A and 2B is a graph showing example waveforms of amplifier offset voltage drift over temperature.
[0010] Figure 3 is a flow chart of an example of a method of correcting offset error in an amplifier circuit.
[0011] Figure 4 is a diagram showing an example of each part of an offset error correction circuit.
[0012] Figure 5 is a diagram showing waveforms associated with reducing offset errors.
[0013] Figure 6 is a diagram of a reference current circuit that generates a second-order temperature-dependent current.
[0014] Figure 7 is a diagram of a current trimming circuit for trimming an error correction signal.
[0015] Fig. 8A and Figure 8B is a circuit schematic diagram of an example of a differential input stage circuit of an amplifier circuit.
[0016] Fig. 9 is a circuit schematic diagram of another example of a differential input stage circuit of an amplifier circuit.
[0017] Figures 10 to 12 are simulation results showing an example of offset error correction for an amplifier. DETAILED DESCRIPTION
[0018] Figure 1 1 is a circuit diagram of an example of an amplifier circuit 100. The amplifier circuit includes a differential input stage 102 and an output stage 104 for buffering the output of the differential input stage. As described above, amplifier circuits are susceptible to offset voltage. Due to process variations and the stress of circuit packaging, all amplifiers inevitably have some random offset voltage. The offset voltage often drifts with temperature. Both the offset voltage and its temperature drift can severely limit the range of use of the amplifier.
[0019] Figure 2A2 is a graph showing an example waveform 205 of an amplifier offset voltage drifting with temperature. Waveform 205 shows that the variation of the offset voltage with temperature includes a linear component and a nonlinear component, which gives a waveform curve. In order to reduce the offset voltage, the amplifier circuit can be adjusted at two temperatures T1 and T2. The trimming of the amplifier circuit sets the offset at both temperatures to zero volts. This Figure 2A The waveform 210 shows that the dual temperature trimming can only remove the linear part of the drift. The nonlinear component of the voltage drift is still present and is obvious in the curvature of the waveform 210. An improved method is to correct the nonlinear component of the draft as well as the linear component.
[0020] It should be noted that Figure 2A is just one example of an offset voltage drift with temperature. Although the offset drift will have linear and non-linear components, the magnitude of the drift and the polarity of the drift (eg, waveform 210 may reverse) is random due to process variations and packaging stresses.
[0021] Figure 2B 215, the error first increases with increasing temperature and then decreases. For waveform 220, the error first decreases with increasing temperature and then decreases more slowly. For waveform 225, the error first decreases with increasing temperature and then increases. For waveform 230, the error first increases with increasing temperature and then decreases as shown in waveform 215, but with a different magnitude. The nonlinear components of the offset voltage waveform are primarily due to second-order terms of the offset voltage drift. 2 )The error correction signal that varies can be used to trim and reduce the nonlinear component of the offset voltage drift. The error correction method needs to consider the randomness of the magnitude and polarity of the offset voltage drift.
[0022] Figure 3 3 is a flow chart of an example of a method 300 for correcting offset error in an amplifier circuit. At 305, a second-order error correction signal is generated. The second-order error correction signal includes a second-order temperature-dependent signal component to correct for a nonlinear portion of an offset voltage of the amplifier circuit. In some aspects, the second-order temperature-dependent signal component is proportional to the square of the absolute temperature (PTAT). 2 ) signal component. In certain aspects, the second-order temperature-dependent signal component is the absolute temperature squared (CTAT 2) signal component. In some aspects, the second order error correction signal includes a constant signal component, a first order temperature dependent signal component, and a second order temperature dependent signal component. The first order temperature dependent signal component can be a proportional to absolute temperature (PTAT) signal component or a complementary to absolute temperature (CTAT) signal component. At 310, the generated second order error correction signal is applied to a differential input stage (e.g., Figure 1 The differential input stage 102 in the example of ) is used to correct an offset error including a linear offset error portion and a nonlinear offset error portion.
[0023] Figure 4 4 is a diagram of an example of portions of an offset error correction circuit 406 for reducing an offset drift voltage in an amplifier circuit. The offset error correction circuit 406 generates a voltage difference signal (V2-V1) that can be used to reduce an offset in an amplifier circuit. The circuit 406 includes two current sources (I1 and I2), each of which provides a current proportional to absolute temperature (PTAT). Resistor R1 has a resistance with a positive temperature coefficient. In a variation, resistor R1 can be a polysilicon resistor, a diffused resistor, or an n-well resistor. Resistor R2 has a resistance with a temperature coefficient different from that of R1 (e.g., a zero temperature coefficient). Resistor R2 can be a thin film resistor.
[0024] Figure 5 is a graph showing the resulting waveforms V1 and V2. To generate the offset error correction signal, the resistance of R2 should be set so that the voltage difference (V2-V1) at temperature T2 is the same as the voltage at temperature T1, or (V2-V1) at (T2) = (V2-V1) at (T1).
[0025] Figure 5 A waveform (V2-V1) with a desired value R2 is shown. A constant offset (VO) can be applied to the (V2-V1) signal to Figure 4 The (V2-V1) waveform in the output is reduced to a (V2-V1-VO) waveform. Resistor R2 can be a trimmable resistor to set a desired value for random variations in the offset voltage. When the signal (V1-V2) is available, a second-order temperature-dependent component (PTAT) of the error correction signal can be generated. 2 or CTAT 2 ), and can even be used to further reduce the curved portion of the (V2-V1-VO) waveform.
[0026] Figure 6 is a diagram of a reference current circuit 608 that generates a current proportional to a reference current of the square of the absolute temperature (PTAT 2iref), which is used to correct the nonlinear part of the offset error. In other aspects, the reference current circuit generates a reference current proportional to the square of the absolute temperature (CTAT 2 iref). The circuit is Figure 4 The offset error correction circuit 406 receives the voltages V2 and V1 and generates the PTAT using the voltage difference V2-V1. 2 Reference current. Unity gain amplifier 610 applies voltages V1 and V2 to resistor R. PTAT 2 A reference current is generated at summing node 612 as the sum of (V2-V1) / R and a zero temperature coefficient reference current (zero TC iref).
[0027] Figure 7 7 is a diagram of a current trimming circuit 714 for trimming an error correction signal of an offset error correction circuit. The error correction signal includes a constant value reference current (zero TC iref), a PTAT reference current (PTAT iref), and a PTAT 2 Reference current (PTAT 2 iref). In other aspects, the error correction signal includes a constant value reference current, a CTAT reference current and a CTAT 2 The current shaping circuit 714 may include a PTAT 2 DAC circuit 716 uses n trim bits (vos-tm<n-1:1> ) to trim the constant value current (zero TC iref), the DAC circuit 718 uses m trim bits (drift-tm<m-1:1> ) trims the PTAT current (PTAT iref), and the DAC circuit 720 uses k trimming bits (curvature tm<k-1:1> )Repair PTAT 2 Current (PTAT 2 The error correction signals are combined using a switch circuit 722 to generate an error correction current signal Ip, and the inverses of the error correction signals are combined to generate an error correction current signal In. The error correction current signals Ip and In are applied to the differential input stage to correct the offset error.
[0028] Fig. 8A and Figure 8B 802A, 802B each include a differential input transistor pair, the gates of which are coupled to the differential inputs (vp and vn) of the amplifier circuit. Fig. 8A and 8BIn the example of , the error correction current signals Ip and In are directly applied to the differential input pair to correct the offset error. Because Ip and In each contain a second-order temperature-dependent signal component, the error correction current signals Ip and In reduce or correct the nonlinear portion of the offset error that occurs at the differential input stage.
[0029] Fig. 9 is a circuit diagram of another example of a differential input stage circuit of an amplifier circuit. The differential input stage 902 includes a primary differential input transistor pair and the offset error correction circuit includes an auxiliary differential input transistor pair 924. The transistors of the auxiliary differential input transistor pair are matched to the transistors of the primary differential input transistor pair. The error correction current signals Ip and In are directly applied to the auxiliary differential input transistor pair to generate an error correction voltage signal, which is applied to the primary differential input transistor pair to correct the offset error. Because the error correction voltage signal is derived using the error correction current signals Ip and In including the second-order correction signal component, the error correction voltage signal includes a second-order voltage signal component to reduce or correct the nonlinear portion of the offset error that appears in the primary differential input stage.
[0030] The apparatus, system and method described herein provide an amplifier circuit that is robust to variations in operating temperature. In an example of an error correction circuit described herein, a constant value of the error correction signal and a linear or drift portion of the error correction signal may be trimmed at temperatures T1 and T2 (e.g., -40 degrees Celsius (°C) and 55°C) before trimming the nonlinear portion of the error correction signal.
[0031] Figures 10 to 12 are simulation results showing examples of offset error correction for amplifiers designed in a commercial CMOS semiconductor process. These examples are Monte Carlo simulation results of 1111 trials using a device statistical model. Fig.10 is a graph showing the distribution of offset voltages of 1111 amplifiers at different temperatures from -40°C to 150°C. Each curve represents one amplifier. The X-axis is temperature and the Y-axis is the offset error in millivolts (mV). If Fig.10 In the example where no compensation is applied, Fig.10 The offset error in the example is in the mV range.
[0032] Fig.11 is a graph showing the distribution of the residual offset voltage after the offset error is corrected at -40°C and 150°C using a first-order temperature-dependent signal. In principle, all first-order offset error voltages are removed from the amplifier by the first-order correction. Fig.11 No nonlinear or second-order error compensation is applied in . It can be seen that by first-order compensation Fig.11The offset error in the example is reduced to microvolts (μV). Fig.11 It can be seen that after the first-order correction, the nonlinear or second-order error becomes dominant. It can also be seen that the second-order error is random in magnitude and also random in polarity. In principle, the error at the calibration temperature of -40°C and 150°C should be zero volts. However, due to the DAC circuit (e.g. Figure 7 The DAC circuit 718 in the DAC has limited resolution, so the error at -40°C and 150°C is between -10μV and 10μV. The DAC circuit can be used to adjust the amplitude and polarity of the error correction signal (e.g. Figure 7 The second-order components of In and Ip in ).
[0033] Fig.12 is a graph showing the residual offset error voltage after the second-order error at 55° C. is corrected using the second-order temperature dependency signal. Fig.12 As can be seen in Figure 1, the residual error voltage is now significantly reduced. The residual error that remains is now attributed to limited DAC resolution and higher order nonlinearity errors, with limited DAC resolution being the dominant error source.
[0034] exist Figure 10-12 As can be seen in Figure 1, using an error correction signal with a second order signal component can significantly reduce the offset to produce a precision amplifier circuit (such as a precision op amp, a difference amplifier, or an instrumentation amplifier). The actual trimming of the results produced in the simulation can be performed after packaging using in-package fuses.
[0035] Other notes and aspects
[0036] Aspect 1 may include a subject matter (e.g., an amplifier circuit) including a differential input stage and an offset error correction circuit coupled to the differential input stage. The differential input stage is configured to receive a differential input signal, and the differential input stage is susceptible to an offset error including a linear offset error portion and a nonlinear offset error portion. The offset error correction circuit is configured to apply a second-order error correction signal to the differential input stage to reduce the nonlinear portion of the offset error.
[0037] In aspect 2, the subject matter of aspect 1 optionally includes an offset error correction circuit configured to generate a second-order error correction signal proportional to the square of the operating temperature of the amplifier circuit to reduce the nonlinear portion of the offset error.
[0038] In aspect 3, the subject matter of aspect 2 optionally includes an offset error correction circuit, comprising: a first current source and a second current source, each providing a current having a first-order dependence on temperature; a first circuit component having a resistor with a first temperature coefficient and electrically coupled to the first current source; and a second circuit component having a resistor with a second temperature coefficient and electrically coupled to the second current source, wherein the second temperature coefficient is different from the first temperature coefficient.
[0039] In aspect 4, the subject matter of aspect 3 optionally includes: the first circuit component is included in the group consisting of a polysilicon resistor, a diffused resistor, and an n-well resistor, and wherein the second circuit component is a thin film resistor.
[0040] In aspect 5, the subject matter of aspect 3 optionally includes: the second circuit component is a trimmed thin film resistor.
[0041] In aspect 6, the subject matter of any combination of Examples 1-5 optionally includes: the offset error correction circuit includes a reference current circuit, which is configured to generate a current signal having a second-order dependence on temperature as the second-order error correction signal, and to set the amplitude and polarity of the current signal according to the nonlinear part of the offset error.
[0042] In aspect 7, the subject matter of aspect 6 optionally includes: the reference current circuit being configured to generate the current signal using a voltage difference signal having a second-order temperature-dependent voltage signal component.
[0043] In aspect 8, the subject matter of one or both of aspects 6 and 7 optionally includes: the offset error correction circuit includes a first current source configured to provide a first-order temperature-dependent current, and a second current source configured to provide a constant current with a constant current value. The second-order error correction signal is a current signal including the second temperature-dependent current, the first-order temperature-dependent current, and the constant current.
[0044] In aspect 9, the subject matter of one or any combination of aspects 6-8 optionally includes: the offset error correction circuit includes a current trimming circuit configured to trim the values of the second-order temperature-dependent current, the first-order temperature current and the constant current.
[0045] In aspect 10, the subject matter of aspect 9 optionally includes: the current shaping circuit comprising a separate digital-to-analog converter (DAC) circuit for each of the second order temperature dependent current, the first order temperature dependent current, and the constant current.
[0046] In aspect 11, the subject matter of one or any combination of aspects 1-10 optionally includes: the differential input stage includes a primary differential input transistor pair; and the offset error correction circuit includes: an auxiliary differential input transistor pair, matching the primary differential input transistor pair and electrically coupling the primary differential input transistor pair; and a reference current circuit, configured to generate a second-order current signal and apply the second-order current signal to the auxiliary differential input transistor pair to generate a second-order voltage signal as the second-order error correction signal.
[0047] In aspect 12, the subject matter of one or any combination of aspects 1-11 optionally includes: the differential input stage includes a differential input transistor pair; and the offset error correction circuit is configured to: generate a second-order error correction signal, the second-order error correction signal is a signal including a square of absolute temperature (PTAT 2 ) component or proportional to the square of the absolute temperature (CTAT 2 ) a complementary current signal; and applying the current signal directly to the differential input transistor pair.
[0048] Aspect 13 may include the main subject (for example, a method for correcting an offset error in an amplifier circuit), or may be selected to be combined with one or any combination of Aspects 1-12 to include the main subject, including: generating a second-order error correction signal including a constant signal component, a first-order temperature-dependent signal component, and a second-order temperature-dependent signal component, and applying the generated second-order error correction signal to the differential input stage of the amplifier circuit to reduce the offset error including a linear offset error part and a nonlinear offset error part, and the second-order temperature-dependent signal component includes an amplitude and a polarity to reduce the nonlinear offset error part.
[0049] In aspect 14, the subject matter of aspect 13 optionally includes: applying the generated second-order error correction current signal to a differential input transistor pair of a differential input stage of the amplifier circuit.
[0050] In aspect 15, the subject matter of one or both of aspects 13 and 14 optionally includes: applying the generated second-order error correction current signal to an auxiliary differential input transistor pair matching the primary differential input transistor pair of the differential input stage to generate a second-order error correction voltage signal, and applying the generated second-order error correction voltage signal to the primary differential input transistor pair to correct the offset error,
[0051] In aspect 16, the subject matter of one or any combination of aspects 13-15 optionally includes: using a PTAT 2 The voltage difference signal of the voltage signal component is used to generate a second-order temperature-dependent signal component.
[0052] In aspect 17, the subject matter of one or any combination of aspects 13-16 optionally includes: generating the second order error correction signal generates a fine-tuned value of the second order temperature dependent current, the first order temperature dependent current, and the constant current.
[0053] Aspect 18 may include subject matter (e.g., operational amplifier circuitry), and may also be optionally used in conjunction with one or any combination of Examples 1-17 to include subject matter including: a differential input stage configured to receive a differential input signal, wherein the differential input stage is susceptible to an offset error including a linear offset error portion and a nonlinear offset error portion, an output buffer stage coupled to the differential input stage, and an offset error correction circuit coupled to the differential input stage. The offset error correction circuit is configured to generate an error correction signal including a first-order temperature-dependent signal component and a second-order temperature-dependent signal component, and apply the error correction signal to the differential input stage to reduce the linear offset error portion and the nonlinear offset error portion of the offset error.
[0054] In aspect 19, the subject matter of aspect 18 optionally includes: the differential input includes a primary differential input transistor pair; and the offset error correction circuit includes: an auxiliary differential input transistor pair, matching the primary differential input transistor pair and electrically coupling the primary differential input transistor pair, and a reference current circuit, configured to generate a second-order error correction current signal, and apply the second-order error correction current signal to the auxiliary differential input transistor pair to generate a second-order error correction voltage signal as the error correction signal.
[0055] In aspect 20, the subject matter of one or both of aspects 18 and 19 optionally includes: the differential input stage includes a differential input transistor pair; and the offset error correction circuit includes a reference current circuit, which is configured to generate a second-order error correction current signal and directly apply the second-order error correction current signal to the differential input transistor pair to reduce the linear offset error portion and the nonlinear offset error portion of the offset error.
[0056] These non-limiting aspects may be combined in any arrangement or combination. The above detailed description includes references to the accompanying drawings, which form a part of the detailed description. The accompanying drawings show, by way of illustration, specific embodiments in which the invention may be implemented. These embodiments are also referred to herein as "examples". All publications, patents, and patent documents cited in this document are incorporated herein by reference in their entirety, as if they were individually incorporated by reference. If there is an inconsistency in usage between this document and those documents incorporated by reference, the usage in the incorporated references shall be considered supplementary to this document; for inconsistencies, the usage in this document shall prevail.
[0057] In this document, the terms "one" or "an" are used in patent documents to include one or more, independent of any other instances or uses of "at least one" or "one or more". In this document, unless otherwise stated, the term "or" is used to represent a non-exclusive or, for example, "A or B" includes "A but not B", "B but not A", and "A and B". In the appended claims, the terms "including" and "wherein" are used as ordinary equivalents of the corresponding terms "including" and "wherein". In addition, in the following claims, the terms "including" and "comprising" are open-ended, that is, the system, device, article or process includes other elements in addition to the elements listed after this term in the claim, and is still considered to fall within the scope of the claim. In addition, in the appended claims, the terms "first", "second", and "third", etc. are used only as labels and are not intended to impose numerical requirements on their objects. The method examples described herein may be at least partially machine or computer-implemented.
[0058] The above description is intended to be illustrative, not restrictive. For example, the above examples (or one or more aspects thereof) may be used in combination with each other. After reviewing the above description, other embodiments may be used, for example, by a person of ordinary skill in the art. An abstract is provided to comply with 37 C.FR § 1.72 (b) to allow readers to quickly determine the nature of the technical disclosure. When submitting this document, it should be understood that it will not be used to interpret or limit the scope or meaning of the claims. In addition, in the above detailed description, various features may be grouped together to simplify the present disclosure. This should not be interpreted as intending to make undeclared public features essential to any claim. Instead, the gist of the invention may be less than all the features of a particular disclosed embodiment. Therefore, the following claims are hereby incorporated into the detailed description, with each claim independently serving as a separate embodiment. The scope of the present invention should be determined with reference to the appended claims and the full scope of equivalents to which these claims are assigned.
Claims
1. Amplifier circuit, comprising: a differential input stage configured to receive a differential input signal, wherein the differential input stage is susceptible to an offset error including a linear offset error portion and a non-linear offset error portion; and An offset error correction circuit is coupled to the differential input stage and is configured to apply a second-order error correction electrical signal to the differential input stage to reduce a nonlinear portion of the offset error, the second-order error correction electrical signal including a signal component having a second-order dependence on an operating temperature of the amplifier circuit.
2. The amplifier circuit of claim 1, wherein the error correction circuit is configured to generate a second-order error correction electrical signal proportional to the square of an operating temperature of the amplifier circuit to reduce a nonlinear portion of the offset error.
3. The amplifier circuit of claim 2, wherein the offset error correction circuit comprises: A first current source and a second current source, each providing a current having a first-order dependence on temperature; a first circuit component having a resistor with a first temperature coefficient and electrically coupled to the first current source; and A second circuit component has a resistor with a second temperature coefficient and is electrically coupled to the second current source, wherein the second temperature coefficient is different from the first temperature coefficient.
4. The amplifier circuit of claim 3, wherein the first circuit component is included in the group consisting of a polysilicon resistor, a diffused resistor, and an n-well resistor, and wherein the second circuit component is a thin film resistor.
5. The amplifier circuit of claim 3, wherein the second circuit component is a trimmable thin film resistor.
6. The amplifier circuit of claim 1, wherein the offset error correction circuit includes a reference current circuit configured to generate a current signal having a second-order dependence on temperature as the second-order error correction electrical signal, and to set the amplitude and polarity of the current signal according to the nonlinear part of the offset error. 7 . The amplifier circuit of claim 6 , wherein the reference current circuit is configured to generate the current signal using a voltage difference signal including a second-order temperature-dependent voltage signal component having a second-order dependency on an operating temperature.
8. The amplifier circuit of claim 6, wherein the offset error correction circuit comprises a first current source configured to provide a first-order temperature-dependent current having a first-order dependence on an operating temperature, and a second current source configured to provide a constant current having a constant current value, and the second-order error correction electrical signal is a current signal comprising a second-order temperature-dependent current having a second-order dependence on an operating temperature, the first-order temperature-dependent current, and the constant current.
9. The amplifier circuit of claim 8, wherein the offset error correction circuit comprises a current trimming circuit configured to trim the values of the second-order temperature-dependent current, the first-order temperature-dependent current, and the constant current.
10. The amplifier circuit of claim 9, wherein the current shaping circuit comprises a separate digital-to-analog converter circuit for each of the second-order temperature-dependent current, the first-order temperature-dependent current, and the constant current.
11. The amplifier circuit of claim 1, wherein: The differential input stage includes a primary differential input transistor pair; and The offset error correction circuit comprises: an auxiliary differential input transistor pair matched to and electrically coupled to the primary differential input transistor pair; and A reference current circuit is configured to generate a second-order temperature-dependent current signal having a second-order dependence on an operating temperature of the amplifier circuit, and to apply the second-order temperature-dependent current signal to the auxiliary differential input transistor pair to generate a second-order temperature-dependent voltage signal having a second-order dependence on the operating temperature as the second-order error correction electrical signal.
12. The amplifier circuit of claim 1, wherein: The differential input stage includes a differential input transistor pair; and The offset error correction circuit is configured as follows: generating a second-order error correction electrical signal, the second-order error correction electrical signal being a current signal including a component proportional to the square of the absolute temperature or a component complementary to the square of the absolute temperature; and The current signal is applied directly to the differential input transistor pair.
13. A method of correcting offset error in an amplifier circuit, the method comprising: generating a second-order error correction electrical signal comprising a constant signal component, a first-order temperature-dependent signal component having a first-order dependence on an operating temperature of the amplifier circuit, and a second-order temperature-dependent signal component having a second-order dependence on an operating temperature of the amplifier circuit; and The generated second-order error correction electrical signal is applied to the differential input stage of the amplifier circuit to reduce the offset error including a linear offset error portion and a nonlinear offset error portion, and the second-order temperature-dependent signal component includes an amplitude and a polarity to reduce the nonlinear offset error portion.
14. The method of claim 13, wherein applying the generated second-order error correction electrical signal to the differential input stage of the amplifier circuit comprises applying the generated second-order error correction current signal to a differential input transistor pair of the differential input stage of the amplifier circuit.
15. The method of claim 13, wherein applying the generated second-order error correction electrical signal to a differential input stage of the amplifier circuit comprises: applying the generated second-order error correction current signal to an auxiliary differential input transistor pair matching the primary differential input transistor pair of the differential input stage to generate a second-order error correction voltage signal; and The generated second order error correction voltage signal is applied to the primary differential input transistor pair to correct the offset error.
16. The method of claim 13, comprising generating the second order temperature dependent signal component using a voltage difference signal having a voltage signal component that is proportional to the square of the absolute temperature.
17. The method of claim 13, wherein generating the second-order error correction electrical signal generates a second-order temperature-dependent current having a second-order dependence on the operating temperature, a first-order temperature-dependent current having a first-order dependence on the operating temperature, and a trimmed value of a constant current.
18. Operational amplifier circuit, comprising: a differential input stage configured to receive a differential input signal, wherein the differential input stage is susceptible to an offset error including a linear offset error portion and a nonlinear offset error portion; an output buffer stage coupled to the differential input stage; and An offset error correction circuit is coupled to the differential input stage and is configured to: generating an error correction signal including a first-order temperature-dependent signal component having a first-order dependence on an operating temperature of the operational amplifier circuit and a second-order temperature-dependent signal component having a second-order dependence on an operating temperature of the amplifier circuit; and The error correction signal is applied to the differential input stage to reduce a linear offset error portion and a non-linear offset error portion of the offset error.
19. The operational amplifier circuit of claim 18, wherein: The differential input comprises a primary differential input transistor pair; and The offset error correction circuit comprises: an auxiliary differential input transistor pair matched to and electrically coupled to the primary differential input transistor pair; and The reference current circuit is configured to generate a second-order error correction current signal and apply the second-order error correction current signal to the auxiliary differential input transistor pair to generate a second-order error correction voltage signal as the error correction signal.
20. The operational amplifier circuit of claim 18, wherein: The differential input stage includes a differential input transistor pair; and The offset error correction circuit includes a reference current circuit configured to generate a second-order error correction current signal and directly apply the second-order error correction current signal to the differential input transistor pair to reduce a linear offset error portion and a nonlinear offset error portion of the offset error.
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