Integrated circuits, power circuits

Abstract

An integrated circuit of the present invention drives a transistor for controlling the inductor current based on an inductor current flowing through an inductor to which a voltage from a rectifier circuit for rectifying the prescribed AC voltage is applied and the output voltage, thereby generating an output voltage of a target level according to the input prescribed AC voltage, the integrated circuit comprising: a first comparison circuit for comparing a current value of the inductor current with a prescribed current value; a timing circuit for timing an elapsed time from when the first comparison circuit outputs a comparison result indicating that the current value of the inductor current is smaller than the prescribed current value; a second comparison circuit for comparing a level of the output voltage with a first level lower than the target level; and a signal output circuit for outputting a first signal indicating that the prescribed AC voltage is not input to the rectifier circuit when the elapsed time reaches a prescribed time and the second comparison circuit outputs a comparison result indicating that the level of the output voltage is lower than the first level.

Description

Technical Field

[0001] The invention relates to an integrated circuit and a power supply circuit. Background Art

[0002] The AC-DC converter is a circuit that generates an output voltage of a target level based on an AC voltage. However, if the AC voltage that is normally input is cut off, the output voltage decreases. In such a case, since the load of the AC-DC converter may not operate normally, a detection circuit that detects the cutoff of the AC voltage is sometimes provided in the AC-DC converter (for example, Patent Document 1).

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2006-223070 Summary of the invention

[0006] Technical problem to be solved by the invention

[0007] Furthermore, a detection circuit for detecting that the AC voltage has been cut off is generally composed of a large number of discrete components, which increases the cost of the AC-DC converter.

[0008] The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to provide an integrated circuit capable of detecting that an AC voltage is cut off at a low cost.

[0009] Technical solutions adopted to solve technical problems

[0010] The present invention mainly solves the above-mentioned problems. It is an integrated circuit that drives a transistor that controls the inductor current based on an inductor current flowing through an inductor to which a voltage from a rectifier circuit that rectifies the specified AC voltage is applied and the output voltage, thereby generating an output voltage of a target level according to the input specified AC voltage. The integrated circuit is characterized in that it includes: a first comparison circuit that compares the current value of the inductor current with a specified current value; a timing circuit that counts the elapsed time from when the first comparison circuit outputs a comparison result indicating that the current value of the inductor current is smaller than the specified current value; a second comparison circuit that compares the level of the output voltage with a first level lower than the target level; and a signal output circuit that outputs a first signal indicating that the specified AC voltage is not input to the rectifier circuit when the elapsed time reaches a specified time and the second comparison circuit outputs a comparison result indicating that the level of the output voltage is lower than the first level.

[0011] Effects of the Invention

[0012] According to the present invention, it is possible to provide an integrated circuit capable of detecting that an AC voltage is cut off at low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 1 is a diagram showing an example of the AC-DC converter 10 .

[0014] Figure 2 This is a diagram showing an example of the power factor improving IC 25 .

[0015] Figure 3 : is a diagram showing an example of the detection circuit 53 .

[0016] Figure 4 It is a diagram for explaining the operation of the AC-DC converter 10 .

[0017] Figure 5 It is a diagram for explaining the operation of the AC-DC converter 10 when an AC voltage is input.

[0018] Figure 6 It is a diagram for explaining the operation of the AC-DC converter 10 when the AC voltage is cut off.

[0019] Figure 7 : is a diagram showing an example of the detection circuit 55 . DETAILED DESCRIPTION

[0020] Cross-reference to related applications

[0021] This application claims priority based on Japanese Patent Application No. 2018-205271 filed on October 31, 2018, and cites the contents thereof.

[0022] At least the following matters are clear from the description of this specification and the drawings.

[0023] ======Present Implementation Method======

[0024] Figure 1 1 is a diagram showing a configuration of an AC-DC converter 10 as one embodiment of the present invention. The AC-DC converter 10 is a step-up chopper type power supply circuit that generates an output voltage Vout of a target level from an AC voltage Vac of a commercial power supply.

[0025] The DC-DC converter 11 is a circuit that generates a voltage suitable for a load 12 from an output voltage Vout that is a DC voltage. The load 12 is, for example, an electronic device that operates with a DC voltage.

[0026] When the level of voltage Vovp described later increases, microcomputer 13 (control circuit) reduces the power consumption of load 12, for example.

[0027] <<<Overview of AC-DC Converter 10>>>

[0028] The AC-DC converter 10 includes a full-wave rectifying circuit 20 , capacitors 21 , 22 , and 36 , an inductor 23 , a diode 24 , a power factor improving IC 25 , a power transistor 26 , and resistors 30 to 35 .

[0029] The full-wave rectifying circuit 20 performs full-wave rectification on the input predetermined AC voltage Vac, and inputs the voltage as the voltage Vrec to the capacitor 21 and the inductor 23. The AC voltage Vac is, for example, a voltage with an effective value of 100 to 240 V and a frequency of 50 to 60 Hz.

[0030] The capacitor 21 filters the voltage Vrec, and the capacitor 22 forms a step-up chopper circuit together with the inductor 23, the diode 24, and the power transistor 26. Therefore, the charging voltage of the capacitor 22 becomes a DC output voltage Vout. The output voltage Vout is, for example, 400V.

[0031] The power factor improvement IC 25 is an integrated circuit that improves the power factor of the AC-DC converter 10 and controls the switching of the power transistor 26 so that the level of the output voltage Vout becomes a target level (for example, 400 V). Specifically, the power factor improvement IC 25 drives the power transistor 26 based on the inductor current IL flowing through the inductor 23 and the output voltage Vout. In addition, the details of the power factor improvement IC 25 will be described later, but the power factor improvement IC 25 is provided with terminals CS, FB, COMP, OVP, and OUT.

[0032] The power transistor 26 is an NMOS transistor for controlling the power to the load (described later) of the AC-DC converter 10. In addition, in the present embodiment, although the power transistor 26 is set to be a MOS (Metal Oxide Semiconductor) transistor, it is not limited to this. The power transistor 26 can also be, for example, a bipolar transistor or an IGBT (Insulated Gate Bipolar Transistor) as long as it is a transistor that can control power. In addition, the gate electrode of the power transistor 26 is connected to the terminal OUT.

[0033] The resistors 30 and 31 constitute a voltage dividing circuit for dividing the output voltage Vout, and generate a feedback voltage Vfb used when switching the power transistor 26. The feedback voltage Vfb generated at the node where the resistors 30 and 31 are connected is applied to the terminal FB.

[0034] The resistor 32 is a resistor for detecting the inductor current IL, and one end is connected to the source electrode of the power transistor 26, and the other end is connected to the terminal CS. In addition, in the present embodiment, the voltage generated in the resistor 32 is set as the voltage Vcs with the source electrode of the grounded power transistor 26 as a reference (0V). Therefore, as the inductor current IL increases, the negative voltage value of the voltage Vcs increases.

[0035] The resistors 33 and 34 constitute a voltage dividing circuit for dividing the output voltage Vout, and generate a voltage Vovp used when detecting whether the output voltage Vout is in an overvoltage state. In addition, although the details are described later, the voltage Vovp (divided voltage) generated at the node connecting the resistors 33 and 34 is applied to the terminal OVP. Here, the so-called "overvoltage" refers to a state in which the level of the output voltage Vout becomes a predetermined level X that is 1.1 times the target level, for example.

[0036] Although the details will be described later, the resistor 35 and the capacitor 36 are phase compensation elements of the power factor improvement IC 25 which is feedback-controlled, and are provided between the terminal COMP and the ground.

[0037] <<<Structure of power factor improving IC25>>>.

[0038] Figure 2 2 is a diagram showing an example of the structure of the power factor improvement IC 25. The power factor improvement IC 25 includes a drive signal generation circuit 50, a drive circuit 51, a comparator 52, a detection circuit 53, and a voltage switching circuit 54.

[0039] The drive signal generating circuit 50 is a circuit that generates a drive signal Vq1 for turning on and off the power transistor 26 based on the voltage Vcs indicating the inductor current IL and the feedback voltage Vfb. The drive signal generating circuit 50 includes a comparator 70, a delay circuit 71, a pulse circuit 72, an error amplifier circuit 73, an oscillation circuit 74, a comparator 75, and an SR flip-flop 76.

[0040] The comparator 70 is a circuit for detecting whether the current value of the inductor current IL is approximately zero. Specifically, the comparator 70 compares the voltage Vcs applied to the terminal CS with the reference voltage Vref1 (for example, several mV) corresponding to a current value slightly larger than zero (for example, several mA), and detects whether the current value of the inductor current IL is approximately zero (hereinafter, for convenience, "approximately zero" is simply referred to as zero). In addition, although the details will be described later, in this embodiment, if the voltage Vcs is larger than the reference voltage Vref1, a high level (hereinafter referred to as H level) signal Vz indicating that the inductor current IL is zero is output from the comparator 70.

[0041] When the H-level signal Vz is output from the comparator 70 , the delay circuit 71 delays the signal Vz by a predetermined time and outputs the signal.

[0042] If the signal Vz of the H level is output from the delay circuit 71 , the pulse circuit 72 outputs the pulse signal Vp1 of the high level.

[0043] The error amplifier circuit 73 is a circuit that amplifies the error between the feedback voltage Vfb applied to the terminal FB and the predetermined reference voltage Vref2. In addition, the reference voltage Vref2 is a voltage determined according to the output voltage Vout of the target level. In addition, the resistor 35 and the capacitor 36 for phase compensation are connected between the output of the error amplifier circuit 73 and the ground via the terminal COMP. Here, the voltage of the node connecting the output of the error amplifier circuit 73 and the terminal COMP is set to the voltage Ve.

[0044] When the pulse signal Vp1 is output, the oscillation circuit 74 outputs a ramp wave Vr whose amplitude gradually increases.

[0045] The comparator 75 compares the magnitude of the voltage Ve with the ramp wave Vr, and outputs a signal Vp2 as a comparison result. Here, the voltage Ve is applied to the inverting input terminal of the comparator 75, and the ramp wave Vr is applied to the non-inverting input terminal of the comparator 75. Therefore, when the level of the ramp wave Vr is lower than the level of the voltage Ve, the signal Vp2 becomes a low level (hereinafter referred to as an L level), and when the level of the ramp wave Vr becomes higher than the level of the voltage Ve, the signal Vp2 becomes an H level.

[0046] The signal Vp1 is input to the S input of the SR flip-flop 76, and the signal Vp2 is input to the R input. Therefore, when the signal Vp1 changes to the H level, the Q output of the SR flip-flop 76, that is, the drive signal Vq1 changes to the H level. On the other hand, when the signal Vp2 changes to the H level, the drive signal Vq1 changes to the L level.

[0047] The drive circuit 51 is a circuit that drives the power transistor 26 based on the drive signal Vq1 , and includes an AND gate circuit 80 and a buffer circuit 81 .

[0048] The AND gate circuit 80 performs a logical AND operation on the driving signal Vq1 and a signal Vov from a comparator 52 described later, and outputs the result to the buffer circuit 81 .

[0049] The buffer circuit 81 drives the power transistor 26 having a large gate capacitance, etc., using a signal Vdr having the same logic level as the input signal.

[0050] The comparator 52 (the fourth comparison circuit) is a circuit for detecting whether the output voltage Vout is in an overvoltage state by comparing the voltage Vovp (described later) with the reference voltage Vref3. In addition, as described above, the so-called "overvoltage" refers to, for example, a state in which the level of the output voltage Vout becomes 1.1 times the target level, that is, a predetermined level X (third level). Therefore, in this embodiment, if the output voltage Vout exceeds the predetermined level X, the level of the voltage Vref3 is determined as the voltage Vovp becomes greater than the reference voltage Vref3.

[0051] The detection circuit 53 (signal output circuit) is a circuit for detecting whether the AC voltage Vac is in a cut-off state. In addition, here, the so-called "state in which the AC voltage Vac is cut off" refers to, for example, a state in which the specified AC voltage Vac is not provided to the AC-DC converter 10 and is not input to the full-wave rectifier circuit 20. In addition, the details of the detection circuit 53 are described later. If the detection circuit 53 detects that the AC voltage Vac is cut off, it outputs an L-level signal Vd (first signal). In addition, if the detection circuit 53 detects that the AC voltage Vac is not cut off, that is, the specified AC voltage Vac is provided to the AC-DC converter 10 and is input to the full-wave rectifier circuit 20, it outputs an H-level signal Vd (second signal).

[0052] The voltage switching circuit 54 is a circuit that switches the voltage level of the terminal OVP according to whether the AC voltage Vac is cut off. The voltage switching circuit 54 includes a PMOS transistor 90 , an NMOS transistor 91 , a switch 92 , and an inverter 93 .

[0053] The PMOS transistor 90 is an element for pulling up the voltage of the terminal OVP, and a signal Vd is input to the gate electrode, a predetermined voltage Vcc (predetermined voltage) is input to the source electrode, and a drain electrode is connected to the terminal OVP. In addition, the level of the voltage Vcc in this embodiment is higher than the level of the voltage Vref3, so if the voltage Vcc is applied to the terminal OVP, it is the same as the state where the output voltage Vout is an overvoltage, and the microcomputer 13 reduces the power consumption of the load 12.

[0054] The NMOS transistor 91 is an element for pulling down the voltage of the inverting input terminal of the comparator 52 , and has a gate electrode inputting a signal Vd inverted by the inverter 93 , a source electrode being grounded, and a drain electrode being connected to the inverting input terminal of the comparator 52 .

[0055] The switch 92 is a switch for preventing malfunction of the comparator 52, and is provided between the terminal OVP and the inverting input terminal of the comparator 52. The switch 92 is, for example, an NMOS transistor, a CMOS switch, etc. Here, the switch 92 is turned off based on the signal Vd at an L level, and is turned on based on the signal Vd at an H level.

[0056] Therefore, when the signal Vd at an L level is output, the voltage level of the terminal OVP becomes the level of the voltage Vcc, and when the signal Vd at an H level is output, the voltage level of the terminal OVP becomes the level of the voltage Vovp.

[0057] <<<Configuration of detection circuit 53>>>

[0058] like Figure 3 As shown, the detection circuit 53 is configured to include comparators 100 to 102 , inverters 103 and 108 , a timing circuit 104 , an AND gate circuit 105 , an OR gate circuit 106 , and an SR flip-flop 107 .

[0059] The comparator 100 (first comparison circuit) is a circuit that compares the current value of the inductor current IL with the current value I1 based on the magnitude relationship between the voltage Vcs and the voltage V1. Here, the current value "I1" is, for example, a positive current value (for example, several tens of mA) that is smaller than the average value of the inductor current IL, larger than the current value detected by the comparator 70, and close to zero. In addition, the signal Vc1 output from the comparator 100 as a comparison result becomes an L level when the current value of the inductor current IL is larger than the current value I1, and becomes an H level when it is smaller than the current value I1.

[0060] The comparator 101 (second comparison circuit) is a circuit that compares the level of the output voltage Vout with a predetermined level A (first level) lower than the target level based on the magnitude relationship between the feedback voltage Vfb and the voltage Vc2. Here, the "predetermined level A" is, for example, a level 0.9 times the target level. In addition, the signal Vc2 output from the comparator 101 as a comparison result becomes an L level when the level of the output voltage Vout is higher than the predetermined level A, and becomes an H level when it is lower than the predetermined level A.

[0061] The comparator 102 (third comparison circuit) is a circuit that compares the level of the output voltage Vout with the prescribed level B (second level) based on the magnitude relationship between the feedback voltage Vfb and the voltage V3. Here, the "prescribed level B" is, for example, a level lower than the target level and higher than the prescribed level A, for example, a level 0.95 times the target level. In addition, the signal Vc3 output from the comparator 102 as a comparison result becomes an H level when the level of the output voltage Vout is higher than the prescribed level B, and becomes an L level when it is lower than the prescribed level B.

[0062] The timing circuit 104 measures the time when the H-level signal Vc1 is input to the R input, and resets the measured time when the L-level signal Vc1 is input to the R input. Furthermore, when a predetermined time T is measured from the input of the H-level signal Vc1, the timing circuit 104 changes the signal Vtim output from the Q output from the L level to the H level.

[0063] Therefore, the timing circuit 104 of the present embodiment measures the elapsed time from when the current value of the inductor current IL becomes smaller than the current value I1 and the signal Vc1 becomes H level.

[0064] The AND gate circuit 105 performs a logical AND operation on the signal Vtim and the signal Vc2 from the comparator 101 , and outputs the result to the SR flip-flop 107 .

[0065] The OR circuit 106 calculates a logical OR of the signal Vc1 inverted by the inverter 103 and the signal Vc3 from the comparator 102 , and outputs the result to the SR flip-flop 107 .

[0066] The output of the AND circuit 105 is input to the S input of the SR flip-flop 107, and the output of the OR circuit 106 is input to the R input. The inverter 108 determines the logic level of the Q output of the SR flip-flop 107 and outputs it as a signal Vd.

[0067] ===Operation of Power Factor Improvement IC25 ===

[0068] <<<Input AC voltage Vac>>>

[0069] Reference Figure 4 , the operation of the power factor improvement IC 25 when the AC-DC converter 10 generates the output voltage Vout of the target level based on the predetermined AC voltage Vac and supplies power to a certain load will be described.

[0070] Here, the output voltage Vout is at the target level, so the comparator 101 outputs the L-level signal V2, and the comparator 102 outputs the H-level signal Vc3, so that the SR flip-flop 107 is reset. Then, the detection circuit 53 outputs the H-level signal Vd, so that the voltage Vovp is applied to the terminal OVP, and the overvoltage becomes detectable.

[0071] When generating the output voltage Vout of the target level, the voltage Vovp is lower than the reference voltage Vref3 and is not in an overvoltage state. Therefore, the comparator 52 outputs the signal Vov at the H level, and the drive circuit 51 operates based on the output of the drive signal generation circuit 50 .

[0072] First, at time t0, when the inductor current IL decreases and reaches the current value I1, that is, when the voltage Vcs increases and reaches the reference voltage Vref1, the comparator 70 changes the signal Vz to the H level (at Figure 4 (not shown in the figure) Furthermore, when the time t0 changes to the time t1 after the delay time of the delay circuit 71 has passed, the pulse circuit 72 outputs the pulse signal Vp1.

[0073] Therefore, when the pulse signal Vp1 is output, the SR flip-flop 76 outputs the driving signal Vq1 at the H level, so that the signal Vdr also becomes the H level. As a result, the power transistor 26 is turned on, and the inductor current IL increases.

[0074] Furthermore, if the pulse signal Vp1 is output, the amplitude of the ramp wave Vr from the oscillation circuit 74 increases. Then, at time t2, if the amplitude level of the ramp wave Vr becomes higher than the level of the voltage Ve, the comparator 75 changes the signal Vp2 to the H level. As a result, the SR flip-flop 76 is reset, and the signal Vdr also changes to the L level. If the signal Vdr changes to the L level, the power transistor 26 is turned off, so that the inductor current IL gradually decreases. Furthermore, at time t3, if the inductor current IL decreases and becomes the current value I1, the operation at time t0 is repeated.

[0075] Here, when the AC-DC converter 10 generates the output voltage Vout of the target level according to the predetermined AC voltage Vac and supplies power to a certain load, the feedback voltage Vfb is constant. As a result, the voltage Ve output from the error amplifier circuit 73 is also constant, and thus the period during which the power transistor 26 is turned on (for example, the period from time t0 to time t1) is also constant.

[0076] Furthermore, when the power transistor 26 is turned on, the level of the voltage Vrec obtained by rectifying the AC voltage Vac becomes higher, and the current value of the inductor current IL also becomes larger. Figure 5 As shown in FIG. 1 , the waveform of the peak value of the inductor current IL becomes the same waveform as the voltage Vrec, thereby improving the power factor. In addition, the waveform of the peak value of the inductor current IL becomes the same waveform as the voltage Vrec, and the voltage Vcs becomes more negative as the inductor current IL increases as described above. Therefore, when the level of the voltage Vrec becomes the highest, the peak value of the voltage Vcs becomes lower.

[0077] <<<When the AC voltage Vac is cut off and then restored>>>

[0078] Reference Figure 6 , the operation of the power factor improvement IC 25 when the AC voltage Vac is cut off is described. First, at time t10, if the AC voltage Vac is cut off, the level of the voltage Vrec decreases rapidly. With this, at time t11, the current value of the inductor current IL becomes smaller than the current value I1, and the level of the voltage Vcs becomes lower than the level of the voltage V1. As a result, the signal Vc1 from the comparator 100 becomes the H level, and the timing circuit 104 starts counting the time from when the signal Vc1 becomes the H level.

[0079] Then, when the predetermined time T has passed from time t11 to time t12, the timing circuit 104 changes the signal Vtim output from the Q output to the H level. The predetermined time T is, for example, about 1 / 8 of the cycle of the AC voltage Vac, which is shorter than 1 / 2 of the cycle of the AC voltage Vac.

[0080] In addition, even during this period, since the AC voltage Vac is cut off, the output voltage Vout and the feedback voltage Vfb gradually decrease. Then, at time t13, if the level of the output voltage Vout decreases to the prescribed level A, that is, if the level of the feedback voltage Vfb decreases to the level of the voltage V2, the signal Vc2 from the comparator 101 becomes the H level. As a result, the output from the AND gate circuit 105 also becomes the H level, and the detection circuit 53 outputs the L level signal Vd indicating that the AC voltage Vac is cut off. Then, when the signal Vd becomes the L level, the voltage of the terminal OVP is pulled up to the voltage Vcc.

[0081] Furthermore, at time t13, when the voltage of the terminal OVP is pulled up, the microcomputer 13 reduces the power consumption of the load 12. Therefore, after time t13, the output voltage Vout gradually decreases.

[0082] Furthermore, at time t14, if the AC voltage Vac is restored, the level of the voltage Vrec rises, and the inductor current IL also increases. Then, at time t15, if the level of the voltage Vcs becomes higher than the level of the voltage V1, the timing of the timing circuit 104 is reset, and the signal Vtim changes to the L level. In addition, at this time, the L-level signal Vc1 from the comparator 100 is inverted by the inverter 103, so the SR flip-flop 107 is also reset, and the signal Vd changes to the H level. As a result, the voltage applied to the terminal OVP becomes the voltage Vovp, and the overvoltage of the output voltage Vout becomes detectable.

[0083] Furthermore, after time t14 when the AC voltage Vac is restored, the output voltage Vout also gradually rises, so that the level of the output voltage Vout becomes higher than the predetermined level B at time t16, for example.

[0084] ===Other Embodiments of the Detection Circuit===

[0085] Figure 7: is a diagram showing the structure of a detection circuit 55 for detecting whether the AC voltage Vac is cut off. Similar to the detection circuit 53, the detection circuit 55 outputs an L-level signal Vdx (first signal) when detecting that the AC voltage Vac is cut off, and outputs an H-level signal Vdx (second signal) when detecting that the AC voltage Vac is not cut off. In addition, the current value I1 and the voltage V1 in the detection circuit 55 are the same as the above-mentioned current value I1 and the voltage V1.

[0086] The detection circuit 55 (signal output circuit) includes comparators 120 to 122 , a timer circuit 123 , an OR gate circuit 124 , a D flip-flop 125 , and inverters 126 and 127 .

[0087] The comparator 120 (first comparison circuit) is a circuit that compares the current value of the inductor current IL with the current value I1 based on the magnitude relationship between the voltage Vcs and the voltage V1. The signal Vx1 output from the comparator 120 as a comparison result becomes an L level when the current value of the inductor current IL is larger than the current value I1, and becomes an H level when it is smaller than the current value I1.

[0088] The comparator 121 (second comparison circuit) is a circuit that compares the level of the output voltage Vout with a predetermined level A (first level) lower than the target level based on the magnitude relationship between the feedback voltage Vfb and the voltage V2. The signal Vx2 output from the comparator 121 as a result of the comparison becomes an H level when the level of the output voltage Vout is higher than the predetermined level A, and becomes an L level when it is lower than the predetermined level A.

[0089] The comparator 122 (third comparison circuit) is a circuit that compares the level of the output voltage Vout with the predetermined level B (second level) based on the magnitude relationship between the feedback voltage Vfb and the voltage V3. The signal Vx3 output from the comparator 122 as a comparison result becomes an H level when the level of the output voltage Vout is higher than the predetermined level B, and becomes an L level when it is lower than the predetermined level B.

[0090] The timing circuit 123 measures the time when the H-level signal is input to the R input, and resets the measured time when the L-level signal is input to the R input. Furthermore, when the measured time from the input of the H-level signal reaches a predetermined time T, the timing circuit 123 changes the signal Vt output from the Q output from the L level to the H level. In addition, the timing circuit 123 of the present embodiment measures the elapsed time from when the current value of the inductor current IL becomes smaller than the current value I1 and the signal Vx1 becomes the H level.

[0091] The OR circuit 124 performs a logical OR operation on the signal Vx1 inverted by the inverter 127 and the signal Vx3 , and outputs the result to the D flip-flop 125 .

[0092] The D flip-flop 125 receives a signal Vt at its D input, a signal Vx2 at its ck input, and an output of the OR gate 124 at its R input. The inverter 126 inverts the logic level of the input signal and outputs it as a signal Vdx.

[0093] Here, if the current value of the inductor current IL becomes smaller than the current value I1, the signal Vx1 changes to the H level. Then, if the H level signal Vx1 is output for a predetermined time T, the timing circuit 123 changes the signal Vt to the H level, so that the H level signal is input to the D input of the D flip-flop 125. At this time, if the level of the output voltage Vout becomes lower than the predetermined level A, the signal Vx2 changes to the L level, so that the Q output of the D flip-flop 125 changes to the H level. As a result, the signal Vdx changes to the L level. In this way, if the inductor current IL decreases for a predetermined time T and the level of the output voltage Vout decreases, the detection circuit 55 operates in the same manner as the detection circuit 53.

[0094] Furthermore, if the level of the output voltage Vout becomes higher than the predetermined level B, or the current value of the inductor current IL becomes larger than the current value I1, the detection circuit 55 changes the signal Vdx to the H level. Therefore, even when the level of the output voltage Vout becomes higher than the predetermined level B, or the current value of the inductor current IL becomes larger than the current value I1, the detection circuit 55 operates in the same manner as the detection circuit 53. Therefore, for example, in the power factor improvement IC 25, the detection circuit 55 can be used instead of the detection circuit 53.

[0095] ===Summary===

[0096] The AC-DC converter 10 of the present embodiment has been described above. The power factor improvement IC 25 includes a detection circuit 53 for detecting whether the AC voltage Vac is cut off. Therefore, when the AC-DC converter 10 is implemented, it is not necessary to constitute a circuit for detecting the AC voltage Vac by discrete components or the like. Therefore, by using the power factor improvement IC 25, the AC-DC converter 10 can detect the situation that the AC voltage Vac is cut off at a low cost.

[0097] Furthermore, if the AC voltage Vac is cut off and then restored, the voltage Vrec rises, and thus the inductor current IL also increases. The detection circuit 53 of this embodiment detects that the cut-off AC voltage Vac has been restored by comparing the current value of the inductor current IL with the current value I1. In this way, the power factor improvement IC 25 can detect not only the cut-off of the AC voltage Vac but also the restoration.

[0098] In addition, if the AC voltage Vac is restored, the level of the output voltage Vout also rises. If the level of the output voltage Vout becomes higher than the specified level B, the detection circuit 53 detects that the cut-off AC voltage Vac has been restored. In this way, the power factor improvement IC25 can detect the recovery of the AC voltage Vac not only based on the inductor current IL, but also based on the output voltage Vout. In addition, the specified level B is set to be higher than the specified level A for detecting that the AC voltage Vac is cut off. That is, the level of the output voltage Vout used to detect the level when it is cut off is different from the level when it is detected when it is restored. Therefore, even if the output voltage Vout changes due to pulsation, noise, etc., the detection circuit 53 can detect the cutting and recovery of the AC voltage Vac with high accuracy.

[0099] Furthermore, when the AC voltage Vac is cut off, the voltage switching circuit 54 of the power factor improvement IC 25 changes the voltage level of the terminal OVP to the voltage level of the voltage Vcc. Therefore, the user of the power factor improvement IC 25 can detect that the AC voltage Vac is cut off by monitoring the voltage level of the terminal OVP.

[0100] Furthermore, in the power factor improvement IC 25, when the comparator 25 detects an overvoltage, the power transistor 26 is turned off. This can prevent the output voltage Vout from excessively rising.

[0101] Furthermore, if the voltage level of the terminal OVP rises, the microcomputer 13 reduces the power consumption of the load 12. Therefore, if the AC voltage is cut off, even if the output voltage Vout of the AC-DC converter 10 drops from the target level, the output voltage Vout can be returned to the target level in a short time.

[0102] The above embodiments are used to facilitate understanding of the present invention, but are not used to limit and explain the present invention. In addition, the present invention can be changed or improved without departing from its concept, and the present invention certainly includes its equivalent invention.

[0103] Description of symbols

[0104] 10 AC-DC Converter

[0105] 11 DC-DC Converter

[0106] 12 Load

[0107] 13 Microcomputer

[0108] 20 Full-wave rectifier circuit

[0109] 21, 22, 36 Capacitors

[0110] 23 Inductor

[0111] 24 Diode

[0112] 25 Power Factor Improvement IC

[0113] 26 Power transistors

[0114] 30~35 Resistors

[0115] 50 driving signal generation circuit

[0116] 51. Driving circuit

[0117] 52, 70, 75, 100-102, 120-122 Comparator

[0118] 53, 55 Detection circuit

[0119] 54 Voltage switching circuit

[0120] 71 Delay Circuit

[0121] 72 Pulse Circuit

[0122] 73 Error amplifier circuit

[0123] 74 Oscillator Circuit

[0124] 76, 107 SR trigger

[0125] 80, 105 AND gate circuit

[0126] 81 Buffer circuit

[0127] 90 PMOS transistor

[0128] 91 NMOS transistor

[0129] 92 Switch

[0130] 93, 103, 108, 126, 127 Inverter

[0131] 104, 123 Timing Circuit

[0132] 106, 124 OR gate circuit

[0133] 125 D flip-flop.

Claims

1. An integrated circuit, The integrated circuit drives a transistor for controlling the inductor current based on an inductor current flowing through an inductor to which a voltage from a rectifier circuit for rectifying a predetermined alternating voltage is applied and an output voltage of a power supply circuit including the inductor, so that the power supply circuit generates the output voltage of a target level according to the input predetermined alternating voltage, and is characterized in that it includes: a first comparison circuit that compares a current value of the inductor current with a predetermined current value; a timing circuit for timing an elapsed time from when the first comparison circuit outputs a comparison result indicating that the current value of the inductor current is smaller than the predetermined current value; a second comparison circuit that compares the level of the output voltage with a first level that is lower than the target level; as well as A signal output circuit which outputs a first signal indicating that the specified AC voltage is not input to the rectifier circuit when the elapsed time reaches a specified time and the second comparison circuit outputs a comparison result indicating that the level of the output voltage is lower than the first level.

2. The integrated circuit according to claim 1, wherein: When the comparison result indicating that the current value of the inductor current is larger than the predetermined current value is output from the first comparison circuit, the signal output circuit outputs the second signal indicating that the predetermined AC voltage is input to the rectifier circuit.

3. The integrated circuit according to claim 2, characterized in that further comprising a third comparison circuit that compares the level of the output voltage with a second level that is lower than the target level and higher than the first level, If the comparison result indicating that the current value of the inductor current is larger than the prescribed current value is output from the first comparison circuit, or the comparison result indicating that the level of the output voltage is higher than the second level is output from the third comparison circuit, the signal output circuit outputs the second signal.

4. The integrated circuit according to claim 3, characterized in that Further including: terminal; a voltage switching circuit that switches the voltage level of the terminal so that the voltage level of the terminal becomes a predetermined voltage level based on the first signal and the voltage level of the terminal becomes a divided voltage level obtained by dividing the output voltage based on the second signal; as well as a fourth comparison circuit that compares the level of the divided voltage with a level of a reference voltage corresponding to a third level higher than the target level when outputting the second signal; The predetermined voltage level is higher than the reference voltage level.

5. The integrated circuit according to claim 4, characterized in that Further including: a drive signal generating circuit for generating a drive signal for turning on and off the transistor based on the inductor current and the output voltage; as well as A driving circuit that turns on and off the transistor based on the driving signal when the level of the divided voltage is lower than the level of the reference voltage, and turns off the transistor when the level of the divided voltage is higher than the level of the reference voltage.

6. The integrated circuit according to claim 4 or 5, characterized in that The terminal is connected to a control circuit that reduces power consumption of a load that operates based on the output voltage when a voltage level at the terminal becomes higher than a reference voltage level.

7. A power supply circuit, The power supply circuit generates an output voltage of a target level according to a predetermined AC voltage, and the power supply circuit is characterized by comprising: A rectifier circuit, which rectifies the specified AC voltage; an inductor to which the voltage from the rectifying circuit is applied; and an integrated circuit that drives a transistor that controls the inductor current based on the inductor current flowing through the inductor and the output voltage, The integrated circuit comprises: a first comparison circuit that compares a current value of the inductor current with a predetermined current value; a timing circuit for timing an elapsed time from when the first comparison circuit outputs a comparison result indicating that the current value of the inductor current is smaller than the predetermined current value; a second comparison circuit that compares the level of the output voltage with a first level that is lower than the target level; as well as A signal output circuit which outputs a first signal indicating that the specified AC voltage is not input to the rectifier circuit when the elapsed time reaches a specified time and the second comparison circuit outputs a comparison result indicating that the level of the output voltage is lower than the first level.

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